Computer Organization and Architecture 3rd semester, E&C engineering dept. First and second assignment 1.

Write short notes on the history of computers stating the key concepts that were developed in all the generations. 2. Explain stack based computing machine using a neat block diagram showing the basic structure. List example instructions for the above machine. Explain how it can be used for computing the following expression, Y = ( A B) * ((C + D) / E ) showing the stack contents while it is getting executed. Note: The instruction sequence Push A, Push B and Div will push the resulting value of the operation B/A onto the stack. The instruction sequence Push A, Push B and Sub will push the resulting value of the operation B-A onto the stack. 3. Write 3-address, 2-address, 1-address and 0-address machine instructions for evaluating the following expressions. Assume that the instructions support memory operands wherever applicable. a. Y = ( A + B + C ) * D(( E / G F ) + H ) b. Z = I + J * ( K L) /(( M + N ) / O ) Note: The instruction sequence Push A, Push B and Div will push the resulting value of the operation B/A onto the stack. The instruction sequence Push A, Push B and Sub will push the resulting value of the operation B-A onto the stack. 4. Write 3-address and 2-address instructions for the given expression having a restriction that the destination operand must be a register. Write another version for the same without using any registers. Compare all the 4 sequence of instructions with respect to the following parameters. a. Number of instructions b. program size ( bytes ) c. Number of distinct registers d. number of memory accesses for operands
Y = ( A + B C ) /( D * E /( F + G ))

Assume that the memory address is of 16 bits, register address is of 3 bits and opcode is of 8 bits in length. Write your comments for the comparative analysis. 5. Encode the following instructions using Huffman encoding technique, given are the instructions and their frequency of usage. Find the average number of bits needed for instruction encoding. Instruction MOV CALL RET ADD AND CMP JMP MUL DIV SUB
E&C dept.

Frequency of usage 0.14 0.13 0.13 0.09 0.07 0.06 0.02 0.09 0.04 0.03
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0.04 0.06 0.01 0.08 0.01

6. In a computer instruction format, there are 12 bits for coding the instructions supported by the processor. If 4 bits are used for specifying the address, then give a design using expanding opcode technique which will support the following requirements. Twelve 2address instructions, thirty two 1-address instructions and four 0-address instructions. 7. Explain with a neat diagram and flowchart a 16 by 16 barrel shifter. 8. Write appropriate instructions for the following operations. Assume register length as 8 bits. a. Clearing bits B7, B3 and B0 of register R0. b. Setting bits B6, B2 and B1 of register R1. c. Complementing all the 8 bits of register R2. d. Complementing MSB and LSB of register R3. 9. Represent the following numbers in 2s complement using 4 bits and perform the following operations. Indicate carry, overflow, sign and zero flag bits for every operation. a. 2+4 b. -2+2 c. 4+5 d. -6-1 e. -5-7

E&C dept.

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