EE 42/43/100 Introduction to Digital Electronics

Lecture 16 7/31/13 Instructors: Prof. Connie Chang-Hasnain Dr. Wenbin Hsu

Lecture 16
PN Junction and Diode Characteristics Load-Line Analysis of Diode Circuits Ideal Diode Model and Diode States Analysis Rectifier Circuits Wave-Shaping Circuits
Clipper Circuit, Level Shift Circuit, Clamp Circuit, Peak Detector, Voltage Doubler

Diode Logic

Diode Structure and Circuit Symbol

A diode is an active device consists of a junction between a ptype semiconductor and an n-type semiconductor. p-type semiconductor has positive charge carriers (holes) that can conduct current. n-type semiconductor has negative charge carriers (electrons) that can conduct current.

Electronic Bonds in Silicon

Double line is a Si-Si bond with each line representing an electron. Essentially no free electrons and no conduction.

Doping Silicon with Donors (n-type)

Add small % of phosphorus (P) to the silicon. The extra electron with phosphorus, "breaks free" and becomes a free electron for conduction Donors donate mobile electrons ("n-type" silicon)

Doping Silicon with Acceptors (p-type)

Add small % of boron (B) to the silicon. The "hole" of a missing bonding electron, "breaks free from the boron acceptor and becomes a positive charge for conduction. Acceptors create mobile holes ("p-type" silicon)

Formation of pn Junction

Built-in Electric Potential

Depletion Region

Immobile Negatively Charged Ions

Immobile Positively Charged Ions

Potential Barrier

potential barrier seen by holes

potential barrier seen by electrons

Forward Bias & Reverse Bias

VF VR

-VF

+VR

I-V Characteristics of Diodes

Shockley Equation
vD kT iD =I s [exp( 1)] where VT = nVT q k = 1.38 1023 J/K is Boltzmanns constant q = 1.60 1019 C is the magnitude of the electrical charge of an electron. At a temperature of 300 K, we have VT 26mV Is, the saturation current, is a constant proportional to the junction area and has a typical value on the order of 10-14 A The parameter n takes values between 1 and 2, depending on details of the device structure. In forward bias, iD increases exponentially and is in the A-mA range for voltages typically in the range of 0.6-0.8V. In reverse bias, the current is essentially zero.

Reverse Breakdown

Zener Breakdown High electric field in the depletion region may tear covalent electrons from their bonds. A narrow depletion region is required (high doping levels on both sides)

Avalanche Breakdown The carriers of the leakage current experience large acceleration in the depletion region to break the electrons from their covalent bonds (impact ionization). Junctions with moderate or low doping levels.

Load-Line Analysis of Diode Circuits

I-V characteristics of diodes are nonlinear.

V = iD R + v D SS
(simultaneous solution of KVL equation and the diode characteristic) (the KVL equation diode seen as a load represented by iD and vD)

Example: Load-Line Analysis

Load line for VSS=10V R=10k

Load line for VSS=2V R=1k

Another Example

2V, = V= R 100 SS = V iD R + v D SS
Load line for VSS=2V R=100

vD 1.1V, iD 9.0mA = =

Zener Diodes
Diodes that are intended to operate in the breakdown region are called Zener diodes.

Voltage-Regulator Circuit
A voltage regulator circuit provides a nearly constant voltage to a load from a variable source.

VSS + RiD + vD = 0
R=1k

Load-Line Analysis of Complex Circuits

Graph the I-V relationships for the non-linear element and for the rest of the circuit The operating point of the circuit is found from the intersection of these two curves.
I

RTh I + VTh
+

VTh/RTh

operating point

V
VTh V

Example: Load-Line Analysis

IL

6 RL )= 24 ( )= 20V VTh = VSS ( 1.2 + 6 R + RL (1.2) (6) = 1k (1.2 + 6) 0 VTh + RThiD + vD = RTh= R RL=

Example (continued)

vD = 10V iD = 10mA

Example (continued)
IL iD

10V vL = vD = 10 = I L = 1.67mA 6k I S = I L iD = 1.67 ( 10)= 11.67mA

Graphical load-line analysis is useful but too cumbersome for more complex circuits.

Ideal Diode Model

In the ideal diode model, we ignore the small forward-bias voltage drop across the diode. Its I-V characteristic is given below: I
Reverse bias I 0, any V < 0 Forward bias V 0, any I > 0 V

An ideal diode passes current only in one direction.

Large-Signal Diode Model

If we choose not to ignore the small forward-bias voltage drop across the diode, it is a very good approximation to regard the voltage drop in forward bias as a constant, about 0.7V. We then have the improved "large signal model".
I

- 0.7+

Reverse bias I 0, any V < 0

V+

Forward bias V 0.7, any I > 0 V

0.7

Analyze On/Off States of Diodes

Guess the states of the diodes
forward biased (on): iD > 0, vD = 0 V (or 0.7 V) reverse biased (off): iD = 0, vD < 0 V (or < 0.7 V)

Check to see if KCL and KVL are obeyed or, conversely, if KCL and KVL are obeyed, the diodes are indeed on or off as we have guessed. If KCL and KVL are not obeyed, refine the guess Repeat steps above until KCL and KVL are obeyed.

Example: Analyze States of Diodes

Assume D1 off and D2 on v D1 = +7V this assumption is not correct

Assume D1 on and D2 off iD1 is positive and vD 2 = 3V, this assumption is correct

Another Example

Assume D1 on and D2 off vD 2 1 10 = 0 vD 2 = 11V,

- vD2 +

this assumption is not correct

+ vD1 _

Assume D1 off and D2 on vD1 + 0.5 10 = 0 vD1 = 9.5V this assumption is correct

Half-wave Rectifier Circuits

Smoothing Capacitor

Vr = peak-to-peak ripple voltage Small Vr Long diode off period Long capacitor discharge period IL T I L T C Vr C = Vr Vr VL = Vm 2 Peak inverse voltage (PIV) 2Vm

Full-wave Rectifier Circuits

Smoothing Capacitor

The capacitor discharges for only a half-cycle before being recharged. IL T The capacitance required is C = 2Vr

Clipper Circuit

Clipper Circuit (continued)

Batteries replaced by Zener diodes

Simpler circuit

Level Shift Circuit

Vcl
+ + +

Vin
-

Vd +

Vout
-

GND

When Vin = 6V, diode is on. 0 Vout = 0 and Vcl = 6V Vd = Vd + Vcl + Vin = When Vin = 4V, diode is off (capacitor holds charge). Vd + Vcl + Vin = 0 Vout = 10V Vd =

Clamp Circuit
Add a dc component to an ac input waveform so that the positive (or negative) peaks are clamped to a specified voltage. Large capacitance. Slow discharge. Constant dc on C. Small impedance for ac signal.
v = vin (t ) VC o (t ) When clamped, vo + 0.7 5.7 = 0 vin 5 vin + VC = + vo 0 with = 10V vo = 5V and VC =

Another Example
To clamp the negative peaks of an ac signal to +6V

v = vin (t ) VC o (t ) When clamped, vo 6.7 + 0.7 = 0 vo = +6V

Peak Detector

Vd
+ + + + -

Vs
-

Vc

Vout
-

GND

Voltage Doubler
Double the positive peak voltage.

Vc1
+ + + +

Vd2
+ +

Vin = Vin
-

Vd1
+

Vout1 = Vin2
-

Vc2
-

Vout1 = Vout
-

GND

Level Shift

Peak Detect

Diode Logic: AND Gate

Output voltage C is high only if both A and B are high. Inputs A and B vary between 0 V ("low") and Vcc ("high") Output C varies between 0.7 V ("low") and Vcc ("high") Vcc
RAND

A B

Diode Logic: OR Gate

Output voltage C is high if either A or B (or both) is high. Inputs A and B vary between 0 V ("low") and Vcc ("high") Output C varies between 0 V ("low") and Vcc-0.7 ("high") A B
ROR

Diode Logic: Incompatibility and Decay

Vcc A
RAND

B CAND
ROR

COR

A B

CAND High want RAND << ROR CAND Low want RAND >> ROR
Signal Decays with each stage (Not regenerative)

Device Isolation Using pn Junctions

regions of n-type Si

p-type Si

No current flows if voltages are applied between n-type regions, because two pn junctions are back-to-back
n-region p-region n-region

=> n-type regions isolated in p-type substrate and vice versa