A3-001-B CMOS ADDER DESIGN

MODULE ASSIGNMENT NABILAH BINTI SK.ABD.AZIZ GIT0755 NOR ZAKIAH BINTI ZAHARI GIT0754 INTRODUCTION The following exercise is to design and simulate the operation of CMOS adder design. OBJECTIVES 1. To design a full adder circuit. CMOS FULL ADDER DESIGN 1. The reference design datasheet (TI, CD54HC283) has been downloaded. We had been through the design specifications. 2. The schematic of a full adder circuit was designed by using the transistor model as provided by the process (model library: A2-002-M2-Fab2-Process1.lib).

Figure 1: Schematic diagram of 1 bit full adder

Schematic circuit of AND gate used in the full adder

Schematic circuit of X-OR gate used in the full adder

Schematic circuit of OR gate used in the full adder

Schematic circuit of INVERTER gate used in the full adder

3. Appropriate signals for inputs A, B and CIN was generated to test the functionality of the circuit.

4. The control file was setup accordingly and the simulations was run.

Figure 2: Control File

5. The output of the adder was tested using the truth table. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 CIN 0 1 0 1 0 1 0 S 0 1 1 0 1 0 0 COUT 0 0 0 1 0 1 1 1

1 1 1 Table 1: The truth table for full adder

Output from the simulation of the schematic circuit of a full adder

6. We got the DC Electrical Specifications at temp 25oC better than the reference datasheet. VIH and VIL

The Output

Vin(V) 2 4.5 6

VIH(V) 5.5416n 5.4897n 22.17m

VIL(V) 2 4.5 6

Output of VOH: When I = 2mA,

When I = 4mA, VCC = 4.5V,

When I = -5.2mA, VCC = 6V,

Output of VOL When I = 0.02mA,

I = -5.2mA, VCC = 6V,

7. The layout of 4-bit CMOS Adder circuit you have designed was drawn and the DRC and LVS report has been attached.

OR LAYOUT

AND LAYOUT

X-OR LAYOUT

1 BIT FULL ADDER

4-BIT FULL-ADDER

QUESTIONS AND DISCUSSION 1. What is 'glitch' and how does it affect the performance of the design? How can it be fixed?
A glitch is an unpredicted output of a digital circuit that can be read by the next stage and result in a wrong action. Glitches happen mostly due to propagtion delays in a digitalcircuit. To explain in more detail an example is include to provide a better understanding.

When input is equal to '0' or '1' the output will always be '1'. Next let assume there are some propagation delay on inverter

When the input change from 1 to 0, the inverter take a short time to provide a 1 at its output due to

it

propagation delay. Therefore for that short period of time both inputs to the OR gate are zero, resulting in a zero at the output of the OR gate. Then finally after the inverter output changes to 1, the OR gates output changes to one too.This glitch will downgrade the performance of our circuit since the waveform will propagate to another circuit resulting in more glitches. To avoid this glitches, latch or flip flop can be use to isolate this glitches from going to the next circuit.

2. What does universal gates mean? How can it be used to improve a certain circuit designs? Global gate or universal gate mean that using only one type of gate to construct or produce another type of basic gate. Global gate consist of NAND and NOR gate, for example, NAND gate can be manipulate to form another type of basic gate such as inverter, AND gate, OR gate, NOR gate and many more. Figure below will explain how a NAND can be form into an inverter

NAND into Inverter From the figure above, to transform a NAND gate into an inverter is just simply connect its input together, and the same concept applied to transform a NAND gate into another basic gate.

NAND into AND gate

NAND into OR gate

NAND into NOR gate The same goes to NOR gate which is also a global gate, a NOR gate also can be use to form any other kind of basic gates. 3. Explain the floor plan of your layout design and how you optimize the layout in terms of size, transistor arrangement and performance. 4. Describe the common issues found in the layout design. In designing a layout design, every layout design must be referred to the schematic design. This process must be done according to the specifications for fabrication process, a manufacturing process in which an item is made (fabricated) from raw or semi-finished materials instead of being assembled from ready-made components or parts. The only assembly process will be occur and finally the ready design is tested.