ECE270, HW8; DUE: October 27, 2011

[Name:______ ________] Peer Reviewed by: _____________________________

SOLUTIONS_

PROBLEM 1: Complete truth tables and K-maps for HA and FA circuits, using XOR patterns where appropriate. Loop minimum SOP equations, and sketch the circuits (assume all inputs and outputs are active high). Half Adder
A 0 0 1 1 B 0 1 0 1 S 0 1 1 0 Cout 0 0 0 1
A B

0 0 1 1 0

A B

0 0 0 0 1

A 0 1

A 0 1 S

S = A xor B

Cout = AB

Cout

Full Adder
A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 S 0 1 1 0 1 0 0 1 Cout 0 0 0 A Cin AB 00 AB 00 01 Cin

11 10 1 1 0 1 Cout

01 1 0

11 0 1

10 1 0 S

0 0 1 0

0 1

0 1

0 1

1 0 1 1 1

S= =CinA'B'+Cin'A'B+CinAB+Cin'AB' =(Cin) xor (A) xor (B)

Cout = AB+CinB+CinA =AB + Cin(A xor B)

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ECE270, HW8; DUE: October 27, 2011

[Name:______ ________] Peer Reviewed by: _____________________________

SOLUTIONS_

PROBLEM 2: Design a full-subtractor bit-slice circuit. Label the inputs A, B, and Bin, and label the outputs D and Bout. Start by completing the subtraction examples, then complete the truth table and K-maps, and then sketch the circuit. Just fill in the box for the subtractions of 2 positive numbers, below: 0 0 1 0 0 0 0 0

...0 0 1 0... -...1 0 0 0...

...0 0 1 0... -...1 1 0 0...

...0 1 1 0... -...1 0 0 0...

...0 1 1 0... -...1 1 0 0...

0 0
...

1 0
...

1 0
...

0 0 0 0

0 0 1 0... -...1 0 1 0...

0

0 0 1 0... -...1 1 1 0...

1

0 1 1 0... -...1 0 1 0...

1

...0 1 1 0... -...1 1 1 0...

0
...0 1 1 0... -...1 1 0 0...

nd -...1 0 0 0...

...0 0 1 0... ...0 1 1 0... ...1 1 0 0... row redone with borrow in = 1!: ...1 0 0 0... ...

0 0 1 0...

1
...

1
...

1
...

1
...

0 0 10 00 ... -...1 0 1 0...

1
A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 Bin 0 1 0 1 0 1 0 1 D Bout 0 1 1 0 1 0 0 1 0 1 1 1 0 0 0 1

0 0 10 00 ... -...1 1 1 0...

0

0 1 10 0... 0 -...1 0 1 0...

0

0 0 1 10 0... -...1 1 1 0...

1

AB 00 01 11 10 Bin 1 0 1 A 0 0

0 1 0 1 1 D =BinA'B'+Cin'A'B+BinAB+ Bin'AB' =(Bin) xor (A) xor (B)

AB 00 01 11 10 Bin 1 0 0 A 0 0

1 1

0 Bout

Bout = A'Bin+A'B+BinB =Bin(A xor B)'+A'B

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ECE270, HW8; DUE: October 27, 2011

[Name:______ ________] Peer Reviewed by: _____________________________

SOLUTIONS_

PROBLEM3: Complete the four 2s compliment arithmetic problems below, showing both the decimal and binary numbers in each case.

17 - 11

0 0 0 0 1 0 0 0 1 1 1 1 1 1 0 1 0 1

-22 + 6

0 0 00 00 1 1 0

- 16

11 1 1 0 1 0 1 0 00 0 0 0 0 1 1 0 11 1 1 1 0 0 0 0

166 11 155

0 1 0 1 0 0 1 1 0 1 1 1 1 1 0 1 0 1

0 1 0 0 1 1 0 1 1 1

35 - 42

-7

0 0 01 0 0 0 1 1 1 1 10 1 0 1 1 0 1 1 11 1 1 0 0 1

19 - -7 26

0 00 0 1 0 0 1 1 0 00 0 0 0 1 1 0 1 0 00 0 1 1 0 0 1 0

Is the above answer correct in 8 bits? Explain. If the 155 were represented by 8 bits, the first bit is the sign, and we would have a negative number! So you must have 9 bits to represent +155 or +166 or anything over +128

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ECE270, HW8; DUE: October 27, 2011

PROBLEM4:

[Name:______ ________] Peer Reviewed by: _____________________________

SOLUTIONS_

Latches and Flip-Flops:

(a) Implement a T-Flip-Flop from a J-K-Flip-Flop. It will help to first draw the truth table with T and Q and Q+ (Q+ implies a particular setup of J and K). Draw the resulting circuit (using the symbol for a J-K-Flip-Flop).

(b) Implement a D-Flip-Flop from a T-Flip-Flop. It will help to first draw the truth table with D and Q and Q+ (Q+ implies a particular setup of T). Draw the resulting circuit (using the symbol for a T-Flip-Flop). YOU CAN USE XOR GATE OR THE FOLLOWING LOGIC:

(c) Discuss whether following statements are true or false and why:
1. The inputs to a level-sensitive latch always affect its outputs False: Level sensitive latch will react to the inputs ONLY while the gating signal (or clock)is high 2. A master-slave flip-flop behaves similarly to a clocked latch, except that its output can change only near the rising edge of the clock. False: Master Slave flip flop can be a falling edge or a rising edge, depending on the construction. The key word that makes the statement false is "only"

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