Department of Electronics and Communication Engineering

M.Tech. (Embedded Systems)

Curriculum&Syllabus 2013Regulations

ACADEMIC REGULATIONS (M.TECH./ M.B.A. / M.C.A.) (Full - Time / Part Time) (Effective 2012-13) 1. Vision, Mission and Objectives

1.1 The Vision of the Institute is To make every man a success and no man a failure.

In order to progress towards the vision, the Institute has identified itself with a mission to provide every individual with a conducive environment suitable to achieve his / her career goals, with a strong emphasis on personality development, and to offer quality education in all spheres of engineering, technology, applied sciences and manage-ment, without compromising on the quality and code of ethics.

1.2 Further, the institute always strives To train our students with the latest and the best in the rapidly changing fields of Engineering, Technology, Management, Science & Humanities. To develop the students with a global outlook possessing, state of the art skills, capable of taking up challenging responsibilities in the respective fields.

To mould our students as citizens with moral, ethical and social values so as to fulfill their obligations to the nation and the society. To promote research in the field of science, Humanities, Engineering, Technology and allied branches.

1.3 Our aims and objectives are focused on

Providing world class education in engineering, technology, applied science and management. Keeping pace with the ever changing technological scenario to help our students to gain proper direction to emerge as competent professionals fully aware of their commitment to the society and nation. To inculcate a flair for research, development and entrepreneurship. 2

2. Admission

2.1. The admission policy and procedure shall be decided from time to time by the Board of Management (BOM) of the Institute, following guidelines issued by Ministry of Human Resource Development (MHRD). Government of India. The number of seats in each branch of the (M.TECH / M.B.A. / M.C.A.) programme will be decided by BOM as per the directives from Ministry of Human Resource Development (MHRD), Government of India and taking into account the market demands. Some seats for Non Resident Indians and a few seats for foreign nationals shall be made available.

2.2. The selected candidates will be admitted to the (M.TECH / M.B.A. / M.C.A.) programme after he/she fulfills all the admission requirements set by the Institute and after payment of the prescribed fees.

2.3. Candidates for admission to the first semester of the Masters Degree Programme shall be required to have passed an appropriate Degree Examination recognized by Hindustan University

2.4. In all matters relating to admission to the (M.TECH/M.B.A. / M.C.A.). Programme, the decision of the Institute and its interpretation given by the Chancellor of the Institute shall be final.

2.5. If at any time after admission, it is found that a candidate has not fulfilled any of the requirements stipulated by the Institute, the Institute may revoke the admission of the candidate with information to the Academic Council.

3. Structure of the programme

3.1. The programme of instruction will have the following structure i) Core courses of Engineering / Technology / Management. ii) Elective courses for specialization in areas of students choice.

3.2. The minimum durations of the programmes are as given below:

Program M.Tech.(Full-Time) M.Tech.(Part -Time) M.B.A. (Full - Time) M.B.A. (Part - Time) M.C.A.(Full - Time) M.C.A.(Part -Time)

No. of Semesters 4 6 4 6 6 8

Every (M.TECH / M.B.A. / M.C.A.) programme will have a curriculum and syllabi for the courses approved by the Academic Council.

3.3. Each course is normally assigned certain number of credits. The following norms will generally be followed in assigning credits for courses.

One credit for each lecture hour per week per semester; One credit for each tutorial hour per week per semester; One credit for each laboratory practical (drawing) of three (two) hours per week per semester. One credit for 4 weeks of industrial training and One credit for 2 hours of project per week per semester

3.4. For the award of degree, a student has to earn certain minimum total number of credits specified in the curriculum of the relevant branch of study. The curriculum of the different programs shall be so designed that the minimum prescribed credits required for the award of the degree shall be within the limits specified below.

Program

Minimum prescribed credit range 75 - 85 85 - 95 115 - 125

M.Tech. (Full time / Part time) M.B.A. (Full time / Part time) M.C.A (Full time / Part time)

3.5. The medium of instruction, examination and the language of the project reports will be English. 4

4. Faculty Advisor

4.1. To help the students in planning their courses of study and for getting general advice on the academic programme, the concerned Department will assign a certain number of students to a Faculty member who will be called their Faculty Advisor.

5. Class Committee Range of Letter Grade Grade

5.1 A Class Committee consisting of the following will be constituted by the Head of the Department for each class:

(i) AChairman,whoisnotteachingtheclass. (ii) Allsubjectteachersoftheclass. (iii) Twostudentsnominatedbythedepartmentinconsultationwiththeclass.

The Class Committee will meet as often as necessary, but not less than three times during a semester.

The functions of the Class Committee will include:

(i) Addressing problems experienced by students in the classroom and the laboratories.

(ii) Analyzing the performance of the students of the class after each test and finding ways and means of addressing problems, if any.

(iii) During the meetings, the student members shall express the opinions and suggestions of the class students to improve the teaching / learning process. 6. Grading 6.1 A grading system as below will be adhered to.

Marks 95-100 85 - 94 75- 84 65-74 55-64 50-54 < 50 S A B C D E U I (Incomplete)

points 10 09 6.2 GPA & CGPA 08 07 06 05 00 -GPA is the ratio of the sum of the product of the number of credits Ci of course i and the grade points Pi earned for that course taken over all courses i registered by the student to the sum of Ci for all i . That is,

Ci Pi GPA = i Ci
i

CGPA will be calculated in a similar manner, at any semester, considering all the courses enrolled from first semester onwards.

6.3. For the students with letter grade I in certain subjects, the same will not be included in the computation of GPA and CGPA until after those grades are converted to the regular grades. 6.4 Raw marks will be moderated by a moderation board appointed by the Vice Chancellor of the University. The final marks will be graded using an absolute grading system. The Constitution and composition of the moderation board will be dealt with separately.

7. Registration and Enrollment

7.1 Except for the first semester, registration and enrollment will be done in the beginning of the semester as per the schedule announced by the University.

7.2 A student will be eligible for enrollment only if he/she satisfies regulation 10 (maximum duration of the programme) and will be permitted to enroll if (i) he/she has cleared all dues in the Institute, Hostel & Library up to the end of the previous semester and (ii) he/she is not debarred from enrollment by a disciplinary action of the University.

7.3. Students are required to submit registration form duly filled in.

8. Registration requirement

8.1. (i) A Full time student shall not register for less than 16 credits or more than 26 credits in any given semester.

8.1. (ii) A part time student shall not register for less than 10 credits or more than 20 credits in any given semester.

8.2 If a student finds his/her load heavy in any semester, or for any other valid reason, he/she may withdraw from the courses within three weeks of the commencement of the semester with the written approval of his/her Faculty Advisor and HOD. However the student should ensure that the total number of credits registered for in any semester should enable him/her to earn the minimum number of credits per semester for the completed semesters.

9. Minimum requirement to continue the programme 9.1. For those students who have not earned the minimum required credit prescribed for that particular semester examination, a warning letter to the concerned student and also to his parents regarding the shortage of his credit will be sent by the HOD after the announcement of the results of the university examinations. 10. Maximum duration of the programme

The minimum and maximum period for the completion of various programs are given below.

Program M.Tech (Full - time) M.Tech (Part - time)

Min. Max. No. of No. of Semesters Semesters 4 8

10

M.B.A. (Full Time) M.B.A. (Part Time) M.C.A. (Full - Time) M.C.A (Part Time)

4 6 6

8 10 12

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11. Temporary discontinuation

11.1. A student may be permitted by the Director(academic) to discontinue temporarily from the programme for a semester or a longer period for reasons of ill health or other valid reasons. Normally a student will be permitted to discontinue from the programme only for a maximum duration of two semesters.

12. Discipline

12.1. Every student is required to observe discipline and decorous behavior both inside and outside the campus and not to indulge in any activity which will tend to bring down the prestige of the University. 12.2. Any act of indiscipline of a student reported to the Direcotr(Academic) will be referred to a Discipline Committee so constituted. The Committee will enquire into the charges and decide on suitable punishment if the charges are substantiated. The committee will also authorize the Director(Academic) to recommend to the Vice - Chancellor the implementation of the decision. The student concerned may appeal to the Vice Chancellor whose decision will be final. The Director(Academic) will report the action taken at the next meeting of the Council.

12.3. Ragging and harassment of women are strictly prohibited in the University campus and hostels.

13. Attendance

13.1. A student whose attendance is less than 75% is not eligible to appear for the end semester examination for that semester. The details of all students who have attendance less than 75% will be announced by the teacher in the class. These details will be sent to the concerned HODs and Dean. 8

13.2. Those who have less than 75% attendance will be considered for condonation of shortage of attendance. However a condonation of 10% in attendance will be given on medical reasons. Application for condonation recommended by the Faculty Advisor, concerned faculty member and the HOD is to be submitted to the Director(Academic) who, depending on the merits of the case, may permit the student to appear for the end semester examination. A student will be eligible for this concession at most in two semesters during the entire degree programme. Application for medical leave, supported by medical certificate with endorsement by a Registered Medical Officer, should reach the HOD within seven days after returning from leave or, on or before the last instructional day of the semester, whichever is earlier.

13.3. As an incentive to those students who are involved in extra curricular activities such as representing the University in Sports and Games, Cultural Festivals, and Technical Festivals, NCC/ NSS events, a relaxation of up to 10% attendance will be given subject to the condition that these students take prior approval from the officer in-charge. All such applications should be recommended by the concerned HOD and forwarded to Director(Academic) within seven instructional days after the programme/activity.

14. Assessment Procedure 14.1. The Academic Council will decide from time to time the system of tests and examinations in each subject in each semester. 14.2. For each theory course, the assessment will be done on a continuous basis as follows:

Test / Exam First Periodical Test Second Periodical Test Third Periodical Test/Model exam Seminar/ Assignments/Quiz End semester examination

Weigh tage 10% 10% 20%

Duration of Test / Exam 2 Periods 2 Periods 3 hours

20%

50%

3 Hours

* Best out of the two test will be considered. 14.3. For practical courses, the assessment will be done by the subject teachers as below:

(i) Weekly assignment/Observation note book / lab records weightage 60%. (ii) End semester examination of 3 hours duration including viva weightage 40%. 15. Make up Examination/periodical Test

15.1. Students who miss the end-semester examinations / periodical test for valid reasons are eligible for make-up examination /periodical test. Those who miss the end-semester examination / periodical test should apply to the Head of the Department concerned within five days after he / she missed examination, giving reasons for absence.

15.2 Permission to appear for make-up examination / model exam will be given under exceptional circumstances such as admission to a hospital due to illness. Students should produce a medical certificate issued by a Registered Medical Practitioner certifying that he/she was admitted to hospital during the period of examination / model exam and the same should be duly endorsed by parent / guardian and also by a medical officer of the University within 5 days

16. Project evaluation

16.1. For Project work, the assessment will be done on a continuous basis as follows: Review / Examination First Review Second Review Third Review End semester Examination Weightage 10% 20% 20% 50%

For end semester exam, the student will submit a Project Report in a format specified by the Director(Academic). The first three reviews will be conducted by a Committee constituted by the Head of the Department. The end semester examination will be conducted by a Committee constituted by the Controller of Examinations. This will include an external expert.

17. Declaration of results

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17.1 A candidate who secures not less than 50% of total marks prescribed for a course with a minimum of 50% of the marks prescribed for the end semester examination shall be declared to have passed the course and earned the specified credits for the course.

17.2 After the valuation of the answer scripts, the tabulated results are to be scrutinized by the Result Passing Boards of PG programmes constituted by the Vice-Chancellor. The recommendations of the Result Passing Boards will be placed before the Standing Sub Committee of the Academic Council constituted by the Chancellor for scrutiny. The minutes of the Standing Sub Committee along with the results are to be placed before the Vice-Chancellor for approval. After getting the approval of the Vice-Chancellor, the results will be published by the Controller of Examination/Registrar.

17.3 If a candidate fails to secure a pass in a course due to not satisfying the minimum requirement in the end semester examination, he/she shall register and re-appear for the end semester examination during the following semester. However, the sessional marks secured by the candidate will be retained for all such attempts.

17.4 If a candidate fails to secure a pass in a course due to insufficient sessional marks though meeting the minimum requirements of the end semester examination, wishes to improve on his/her sessional marks, he/she will have to register for the particular course and attend the course with permission of the HOD concerned and the Registrar. The sessional and external marks obtained by the candidate in this case will replace the earlier result.

17.5 A candidate can apply for the revaluation of his/her end semester examination answer paper in a theory course within 2 weeks from the declaration of the results, on payment of a prescribed fee through proper application to the Registrar/Controller of Examinations through the Head of the Department. The Registrar/ Controller of Examination will arrange for the revaluation and the results will be intimated to the candidate concerned through the Head of the Department. Revaluation is not permitted for practical courses and for project work.

18. Grade Card 11

18.1. After results are declared, grade sheet will be issued to each student, which will contain the following details: (i) Program and branch for which the student has enrolled. (ii) Semester of registration. (iii) List of courses registered during the semester and the grade scored. (iv) Semester Grade Point Average (GPA) (v) Cumulative Grade Point Average (CGPA).

19. Class / Division

19.1 Classification is based on CGPA and is as follows: CGPA8.0: First Class with distinction 6.5 CGPA < 8.0: First Class 5.0 CGPA < 6.5: Second Class.

19.2 (i) Further, the award of First class with distinction is subject to the candidate becoming eligible for the award of the degree having passed the examination in all the courses in his/her first appearance within the minimum duration of the programme.

(ii) The award of First Class is further subject to the candidate becoming eligible to the award of the degree having passed the examination in all the courses within the below mentioned duration of the programme.

Program M.Tech (Full - time) M.Tech (Part - time) M.B.A. (Full Time) M.B.A. (Part Time)

No. of Semesters 5

7 5 7 12

M.C.A. (Full - Time) M.C.A (Part Time) 7

(iii) The period of authorized discontinuation of the programme (vide clause 11.1) will not be counted for the purpose of the above classification.

20. Transfer of credits

20.1. Within the broad framework of these regulations, the Academic Council, based on the recommendation of the transfer of credits committee so constituted by the Chancellor may permit students to earn part of the credit requirement in other approved institutions of repute and status in the country or abroad.

21. Eligibility for the award of (M.TECH / M.B.A. / M.C.A.) Degree

21.1. A student will be declared to be eligible for the award of the (M.TECH / M.B.A. / M.C.A.). Degree if he/she has i) registered and successfully credited all the core courses, ii) successfully acquired the credits in the different categories as specified in the curriculum corresponding to the discipline (branch) of his/her study within the stipulated time, iii) has no dues to all sections of the Institute including Hostels, and iv) has no disciplinary action pending against him/her.

The award of the degree must be recommended by the Academic Council and approved by the Board of Management of the University.

22. Power to modify

22.1. Notwithstanding all that has been stated above, the Academic Council has the right to modify any of the above regulations from time to time. 13

Semester I

Sl. Course No Code Theory 1. PMA106 2. PES101 3. PAL101 4. PES102 5. PES103 6. PES104 Practical 7. PES105 Total

Course Title Advanced Applied Mathematics# Digital Signal Processing* Advanced Digital System Design** Embedded system Design*** Advanced Microprocessors ** Real Time Operating System## Embedded System Lab I

L 3 3 3 3 3 3 0

T 1 1 1 1 1 1 0

P 0 0 0 0 0 0 3

C 4 4 4 4 4 4 2 26

TCH 4 4 4 4 4 4 3 27

*CommontoVLSI,ES,EC **CommontoES,AE ***CommontoES,CS,AE,EC,VLSI,PC&I #CommontoCS,PC&I,AE,CCE,ES,VLSI ##CommontoES,PC&I

Semester II Sl. Course No Code Theory 1. PES201 PES202 2. 3. 4. PES203 PES204 Course Title Computer Vision Software Technology for Embedded Systems VLSI Architecture and Design Methodologies Embedded Control System Elective I Elective II Embedded System Lab II Seminar L 3 3 3 3 3 3 0 0 T 1 1 1 1 0 0 0 0 P 0 0 0 0 0 0 3 2 C 4 4 4 4 3 3 2 0 24 TCH 4 4 4 4 3 3 3 2 27

5. 6. Practical 7. PES205 8. Total

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Semester III Sl. Course No Code Theory 1. 2. 3. Practical 4. PES301 Total Elective III Elective IV Elective V Project Work (Phase I) Course Title L T P C TCH

3 3 3 0

0 0 0 0

0 0 0 12

3 3 3 6 15

3 3 3 12 21

Semester IV Sl. Course No Code Practical 1. PES401 Total Course Title L T P C TCH

Project Work (Phase II)

24

12 12

24 24

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LIST OF ELECTIVES S.No 1 2 3 4 5 6 7 8 9 Course Code PCE720 PES701 PES702 PES703 PCS101 PES704 PES705 PES706 PES707 Course Title Advanced Computer Architecture Data Communication and Computer Networks Mobile Computing Architecture & Design of Distributed Embedded System Advanced Digital Signal Processing Design of Digital Control systems Embedded Networking Reliability Engineering Cryptography and Network Security L 3 3 3 3 3 3 3 3 3 T 0 0 0 0 0 0 0 0 0 P 0 0 0 0 0 0 0 0 0 C 3 3 3 3 3 3 3 3 3 TCH 3 3 3 3 3 3 3 3 3

TOTAL CREDITS :77

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SEMESTER-I ADVANCED APPLIED MATHEMATICS L T P 3 1 0 PMA106 Goal ADVANCED APPLIED MATHEMATICS 4 Credits C 4

Develop the Mathematical skills to formulate certain practical problems, solve them and physically interpret the results Objectives Outcomes

The students should be able to: The course should enable the student to 1. Able to write the algorithm for solving the 1. Understand the techniques to solve simultaneous equations for direct and the system of equations using direct indirect methods. Identifies the Eigen method and indirect methods. Learns values using conventional method and to decompose the matrix in the LU compares with numerical solutions. Able form and to find the Eigen value of a to write the algorithm to find the Eigen matrix using power and Jacobi values of a matrix. methods. 2. Able to form the wave equations with initial conditions and solve them using 2. Learn to classify the initial and D'Alemberts solutions. Solves the wave boundary value problems. equations using Laplace transform for Understands the D'Alemberts displacements in long string long string solution of the one dimensional wave under its weight and free and forced equation. Learn significance of vibrations. characteristic curves. 3. Solves the Bessels equation and Legendre equations. Using Bessels function solves many practical problems 3. Learn series solutions of Bessels and that arise in electrical transmission Legendre equations. Understand problems and vibration of membranes as recurrence relation, generating in loudspeakers. functions and orthogonal properties. 4. Evaluates the probability using addition and multiplication theorem. Applies Bayes for practical problems to find the 4. Learn basics of probability, addition probability. Verifies whether a given and multiplication, Bayes theorems. function is a probability mass or density Understands the concept of random function. Applies the discrete and variable, moment generating function continuous distributions for solving and their properties. Learn standard practical problems. Evaluates the distributions in discrete and moments of the distributions using continuous cases moment generating function. 5. Able to analyze and classify the models, 5. Learns the different Markovian M / M / 1, M / M / C, finite and infinite models with finite and infinite capacity and solves practical problems capacity and understands to classify related to the queuing models. them.

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UNIT I LINEAR ALGEBRAIC EQUATION AND EIGEN VALUE PROBLEMS 12 System of Equations Solution by Gauss Elimination and Gauss Jordan methods LU decomposition method Indirect methods Gauss Jacobi and Gauss Seidel methods Eigen values of a matrix using Jacobi and power methods. UNIT II WAVE EQUATION 12 Solution of initial and boundary value problems - Characteristics - D'Alembert's solution Significance of characteristic curves - Laplace transform solutions for displacement in a long string, in a long string under its weight - a bar with prescribed force on one end - Free vibrations of a string. UNIT III SPECIAL FUNCTIONS 12 Series solutions - Bessel's equation - Bessel functions - Legendre's equation - Legendre polynomials - Rodrigue's formula - Recurrence relations - Generating functions and orthogonal property for Bessel functions of the first kind - Legendre polynomials. UNIT IVPROBABILITY AND RANDOM VARIABLE 12 Discrete and Continuous random variables Moments Moment generating functions - Standard distributions - Binomial, Poisson, Geometric, Negative Binomial, Uniform, Normal ,Exponential, Gamma and Weibull distributions Two dimensional random variables Joint, Marginal and Conditional distributions. Correlation and Regression. UNIT V QUEUING THEORY 12 Markovian models Birth and death queuing models Steady state Single and Multiple servers M/M/1 Finite and infinite capacity M/M/C finite and infinite capacity. TOTAL: 60 REFERENCES 1) Taha, H.A., Operations Research - An Introduction ", Prentice Hall of India Ltd., 6th Edition, New Delhi, 1997. 2) Dr.Singaravelu A., Dr.Siva Subramanian S., and Dr.Ramachandran C., Probability and Queuing Theory, Meenakshi agency, 20th edition, January 2013. 3) Veerarajan T., Probability, Statistics and Random Processes, Tata McGraw-Hill, second edition, 2004. 4) Grewal B.S., Higher Engineering Mathematics, Khanna Publishers, 34th edition. 5) Sankara Rao K., Introduction to Partial Differential Equations, PHI, 1995. 6) Veerarajan T., Mathematics IV, Tata McGraw-Hill, 2000.

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DIGITAL SIGNAL PROCESSING LTPC 31 0 4 4 CREDITS

PES101 Prerequisite Goal

DIGITAL SIGNAL PROCESSING

Objectives The course should enable the students to : (1) Study the Concept of Signals and Systems and their processing techniques. (2) Study the Sampling and Quantization techniques and to change the rate of sampling. (3) Study the Characteristics and various transform analysis of LTI systems (4) Study the design techniques of IIR and FIR filters.

To introduce the Fundamental Concepts of different signal processing techniques using Digital Processors and various transforms and their utility in control systems. Outcomes At the end of the course the student should be able to:

(1) Understand the various types of Signals and Systems along with their properties.

(2) Understand the sampling and Reconstruction of Band limited and Band pass signals along-with sampling rate conversion procedures.

(3) Understand the performance parameters of LTI system and various Transform techniques in Frequency domain. (4) Understand the structure and design techniques of IIR and FIR filters and their conversion between domains. (5) Know the various type of processors and programming concepts.

(5) Study the fundamental concepts of real time Digital Signal Processors.

UNIT I DISCRETE TIME SIGNALS AND SYSTEMS 9 Discrete time signal- Basic definition- Some elementary Discrete Time Signals-Representation of signals-Discrete time systems- Basic operation sequences-linear systems-Time invariant systemsCausal systems-Stable systems- Linear time invariant systems-Properties of LTI systems- Linear Constant Coefficient Difference Equations-Fourier Transform Of Discrete Time Signals - ZTransform-Inverse Z-Transform UNIT II SAMPLING OF CONTINUOUS TIME SIGNALS 9 Periodic Sampling-Reconstruction of Band Limited Signal from its samples- Sampling of Band Pass signals-Sampling rate conversion-Decimation by decimation factors- Inter polarization by an integer Factor-Sampling rate conversion by rational Factor-Sampling rate conversion of Band pass signals-A/D Conversion- Quantization -Coding-D/A conversion.
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UNIT III TRANSFORM ANALYSIS OF LTI SYSTEMS 9 Ideal filter characteristics-System function and frequency response of LTI systems-Stability and Causality-All pass systems-Minimum phase systems-Discrete Fourier Transform-Relationship between DFT and Fourier Transform of a Discrete Time Signal-Frequency analysis of signals using DFT-Fast Fourier Transform. UNIT IV DESIGN OF FILTERS 9 Block Diagram and signal flow graph representation- Basic structure of IIR Systems-Basic Structure of FIR Systems-Design of FIR Filters -Design of FIR filter by windowing-Classical continuous -Time Low Pass Filter Approximations-Conversion of transfer functions from continuous to discrete Time frequency Transformations of Low Pass Filters. UNIT V PRACTICAL DIGITAL SIGNAL PROCESSORS 9 Fundamentals of Fixed Point DSP architecture-Fixed Point representation of numbersArithmetic computation- Memory accessing-Pipelining of instructions-Features of example processors- Floating point DSPs-Floating point Representation of numbers- Comparison of DSPs. L = 45, T=15,TOTAL=60 TEXT BOOKS 1. Oppenheim and RW Scaffer- Digital Signal Processing-PHI,2000 2. Proakis And Manolakis Digital Signal Processing: principles, Algorithms and applications PHI,1992 REFERENCE 1. Rabiner and Gold-Theory and Application of Digital Processing-PHI,1975.
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ADVANCED DIGITAL SYSTEM DESIGN LTPC 31 0 4 ADVANCED DIGITAL SYSTEM DESIGN 4CREDITS To acquaint the students with the advanced topics in the digital systems analysis and design. Objectives The course will enable the students to: Outcomes At the end of the course the student should be able to gain the knowledge for designing different types of synchronous sequential circuits and use of ASM charts.. (ii) familiarize with the design ASCs and the problems involved in the design process and how to design circuits without hazards and races (iii) know the types of faults in digital circuits, how to detect these faults, PLA minimization and fault diagnosis. (iv) able to design CSSN using programmable logic devices and FPGA. (v) learn VHDL and will be able to design various logic devices using VHDL
(i)

PAL101 Goal

study the analysis and design of various types of CSSN, iterative networks and design using ASM charts. (ii) understand the analysis and design of various types of asynchronous circuits and how to eliminate races and hazards (iii) know various types of faults that can occur during fabrication , the methods for fault detection and faults in PLA. (iv) give an insight into programmable logic devices and FPGA.
(i)

UNIT I SEQUENTIAL CIRCUIT DESIGN 9 Analysis of Clocked Synchronous Sequential Networks (CSSN) Modeling of CSSN State table Reduction , State Assignment Design of CSSN Design of Iterative Circuits ASM Chart. UNIT II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9 Analysis of Asynchronous Sequential Circuit (ASC) Flow Table Reduction Races in ASC State Assignment Problem and the Transition Table Design of ASC Static and Dynamic Hazards Essential Hazards Data Synchronizers Mixed Operating Mode Asynchronous Circuits. UNIT III FAULT DIAGNOSIS AND TESTABILITY ALGORITHMS 9 Fault Table Method Path Sensitization Method Boolean Difference Method Kohavi Algorithm Tolerance Techniques The Compact Algorithm Practical PLAs Fault in PLA Test Generation Masking Cycle DFT Schemes Built-in Self Test. UNIT IV DESIGN OF CSSN USING PROGRAMMABLE DEVICES 9 EPROM to Realize a Sequential circuit. Programmable Logic Devices Designing a Synchronous Sequential Circuit using a GAL Realization State machine using PLD ,FPGA Xilinx FPGA Xilinx 2000 - Xilinx 3000
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UNIT V SYSTEM DESIGN USING VHDL

VHDL Description of Combinational Circuits Arrays VHDL Operators Compilation and Simulation of VHDL Code Modeling using VHDL Flip Flops Registers Counters Sequential Machine Combinational Logic Circuits - VHDL Code for Serial Adder, Binary Multiplier , Binary Divider, complete Sequential Systems. L =45 T=15 Total = 60 REFERENCES: 1. 2. 3. 4. 5. 6. Donald G. Givone Digital principles and Design Tata McGraw Hill 2002. John M Yarbrough Digital Logic applications and Design Thomson Learning, 2001. Nripendra N Biswas Logic Design Theory Prentice Hall of India, 2001. Charles H. Roth Jr. Digital System Design using VHDL Thomson Learning, 1998. Charles H. Roth Jr. Fundamentals of Logic design Thomson Learning, 2004. Stephen Brown and Zvonk Vranesic Fundamentals of Digital Logic with VHDL Design Tata McGraw Hill, 2002. 7. Navabi.Z. VHDL Analysis and Modeling of Digital Systems. McGraw International, 1998. 8. Parag K Lala, Digital System design using PLD BS Publications, 2003. 9. Peter J Ashendem, The Designers Guide to VHDL Harcourt India Pvt Ltd, 2002. 10. Mark Zwolinski, Digital System Design with VHDL Pearson Education, 2004. 11. Skahill. K, VHDL for Programmable Logic Pearson education, 1996.

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EMBEDDED SYSTEM DESIGN LTPC 3 10 4 4 CREDITS

PES102 Prerequisite Goal

EMBEDDED SYSTEM DESIGN

Nil The aim of this course is to expose the concepts of Embedded system principles and software development tools and introducing PIC and Motorola microcontrollers and interfacing. Objectives Outcomes At the end of the course the student should be The course should enable the students to: able to: 1. Review basics in Embedded hardware, 1. Use of hardware fundamentals. Gates, timing diagram, DMA, interrupts, built -Ins on the microprocessor architecture, 2. Learn basic concepts of design of 2. Explain the concept of Tasks, States, Embedded software system, Data, Semaphores, more operating system services IR in RTOS environment, Basic design using RTOS, 3. Learn the Software Development tools, architecture and 3. Develop through basic knowledge on the behavior and the characteristics of Round-Robin techniques, Functions, Queue, Host and Target machine and Debugging techniques, 4. Learn the usage of Architecture, instruction sets of PIC, Loop time subroutine, I/O port expansion,I2C for peripherals chip access, ADC and UART special features, 5. Acquire knowledge on the configuration of Introduction to ARM7 2148 Instructions set, addressing modes, Interfacing methods, ISR, Timing generations and measurements

4.Learn the operation of PIC microcontroller and interfacing,

5. Learn the operation Microcomputer systems.

of

Embedded

.UNIT I INTRODUCTION : REVIEW OF EMBEDDED HARDWARE 9 Hardware Fundamentals: Terminology- Gates- Timing Diagram- Microprocessors- Buses- Direct Memory Access- Interrupts- Other Common Parts- Built-Ins on the Microprocessor-Conventions Used on Schematics. Interrupts: Microprocessor Architecture - Interrupts Basics-Shared-Data Problem- Interrupt Latency, Examples of Embedded System. UNIT II DESIGN OF EMBEDDED SOFTWARE SYSTEM 9 Introduction: Tasks and Task States- Tasks and Data- Semaphores and Shared Data. More Operating System Services: Message Queues- Mailboxes and Pipes- Timer Functions- Events23

Memory Management- Interrupt Routines in an RTOS Environment, Basic Design Using a RealTime Operating System. UNIT III SOFTWARE ARCHITECTURES AND DEVELOPMENT AND TOOLS 9 Software Architectures: Round-Robin- Round-Robin with Interrupts- Function-QueueScheduling Architecture- Real-Time Operating System Architecture, Development Tools: Host and Target Machines- Linker/Locators for Embedded Software, Debugging Techniques. UNIT IV PIC MICROCONTROLLER AND INTERFACING 9 Introduction- CPU Architecture and Instruction Set- Loop Time Subroutine- Timer2 and Interrupts- Interrupts Timing- I/O Port Expansion- I2C Bus for Peripheral Chip Access- Analogto- Digital Converter- UART- Special Features. UNIT V EMBEDDED MICROCOMPUTER SYSTEMS 9 Introduction to ARM7 2148 Instructions set - Addressing Modes. Interfacing Methods: Parallel I/O Interface- Parallel Port Interfaces- Memory Interfacing- High Speed I/O interfacingAnalog interfacing, Interrupts, Interrupts Service Routine- Features of Interrupts- Interrupt Vector and Priority, Timing Generation and Measurements: Input Capture- Output Compare- Frequency Measurement, Serial I/O Devices: RS232- RS485. L = 45, T = 15, TOTAL= 60 TEXT BOOKS: 1. David E Simon, An Embedded Software Primer, Pearson Education Asia, 2001. 2. John B. Peat man, Design with Microcontroller, Pearson Education Asia, 1998. 3. Jonarthan W. Valvano Brooks/cole, Embedded Micro Computer Systems, Real Time Interfacing, Thomson Learning, 2001. REFERENCES: 1. Burns, Alan and Wellings, Andy, Real-Time Systems and Programming Languages, Second Edition, Harlow: Addison-Wesley-Longman, 1997. 2. Raymond J.A. Bhur and Donald L.Bialey, An Introduction to Real Time Systems: Design to Networking with C/C++, Prentice Hall Inc, NewJersey, 1999. 3. Grehan Moore, and Cyliax, Real Time Programming: A Guide to 32 Bit Embedded Development. Reading: Addison-Wesley-Longman, 1998. 4. Heath, Steve, Embedded Systems Design. Newnes , 1997.

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ADVANCED MICROPROCESSORS LTPC 3 10 4 4 CREDITS

PES103 Prerequisite Goal

ADVANCED MICROPROCESSORS

Nil The aim of this course is to give an in depth knowledge on Advanced Microprocessor Objectives Outcomes The course should enable the students to: At the end of the course the student should be able to: 1.Understand the Microprocessor use of 16/32 bit 1. Gain basics of Organization of 8086,80286,80386,80486, Minimum maximum mode, pipeline architecture, addressing modes, memory registration, segmentation, Bus structure and timing, expectation handling,

2.Understand programming

about

Assembly

level

2. Explain the concept of Assembly level programming of 8086, Instruction types, Macros and Byte string manipulation

3.Understand the interfacing

Operation of Digital

3. Develop through basic knowledge on the behavior and the characteristics Programming parallel ports, Keypad interfacing alphaneumeric display, interfacing high power devices, optical motor shaft encoder, sensor and transducers, convertors and 8086 based control systems 4.Learn the usage of Queue status and lock facility,8086/8088 based multiprocessing system,8087 NDP,8089,Pentium 4 processor,organization of bit slice processor for microprogrammed machines, 5.Acquire knowledge on the configuration of ARM 7 Organization and implementation, instruction sets, Basic ARM 7 ALP, ARM CPU cores. .

4.Understand the Operation Multiprocessor configuration and introduction to Microprogrammable microprocessors

5. Learn about High performance RISC Architecture.

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UNIT I 16/ 32 BIT MICROPROCESSOR 9 Organization of 8086, 80286,80386,80486 microprocessors - Minimum maximum mode Pipeline Architecture - Registers - Addressing modes - Memory Registration - Memory Segmentation - Instruction set of 8086 - Bus structure and timing - exception handling. UNIT II ASSEMBLY LANGUAGE PROGRAMMING 9 Assembly language programming of 8086 microprocessor - Data transfer instruction - Arithmetic instruction - Branch instructions - Loop instructions - NOP and HALT instructions - Flag manipulation instructions - Logical instructions - Shift and rotate instructions - linking and relocation - stacks procedure - Interrupts and interrupt routines - Macros - Byte and string manipulations. UNIT III DIGITAL INTERFACING 9 Programming Parallel ports - Handshake input/output - interfacing a microprocessor to a keyboard, interfacing to alphanumeric displays, interfacing a microcomputer to high power devices, Optical motor shaft encoders - Sensors and Transducers - D/A converter operations, interfacing & applications- A/D converter Specifications, types & interfacing, A 8086 based process control system. MULTIPROCESSOR CONFIGURATIONS, ADVANCED MICROPROCESSOR ARCHITECTURE, INTRODUCTION TO THE MICROPROGRAMMABLE MICROPROCESSORS 9 Queue status and lock facilities - 8086 / 8088 based multiprocessing system, 8087 numeric data processor, 8089 I/O processor. Introduction to Motorola 68HC11 processor, Pentium4 Microprocessor, Architecture, Instruction set and addressing modes, Organization of bit-slice processor, bit-slice processor architecture for micro-programmed machines. UNIT V HIGH PERFORMANCE RISC ARCHITECTURE 9 ARM: The ARM7 architecture ARM7 organization and implementation - The ARM7 instruction set - The thumb instruction set - Basic ARM7 Assembly language program - ARM CPU cores. L = 45, T = 15, TOTAL = 60 TEXT BOOKS: 1. Barry B. Brey, "The Intel Microprocessors Architecture, Programming and Interfacing", PHI, 2002 (UNIT I,II,III) 2. Hall.D.V, "Microprocessor and Interfacing: Programming and hardware", McGraw Hill Book Company, New York, 1988 (UNIT III) 3. Liu.Y and Gibson. G. A., "Microcomputer systems: The 8086/ 8088 family: Architecture, Programming and design", Prentice Hall of India Pvt. Ltd, M.D. (1979) (UNIT IV). 4. John Mick and Jim Brick, Bit-slice Microprocessor Design, McGraw-Hill, 1980 (UNIT IV). 5. Steave Furber, "ARM system - on - chip architecture", Addison Wesley, 2000. (UNIT V) REFERENCES: 1. Daniel Tabak, "Advanced Microprocessors", McGraw Hill. Inc., 1995 2. James L. Antonakos, "The Pentium Microprocessor", Pearson Education, 1997 3. James L Antonakos, "An Introduction to the Intel family of Microprocessors", Pearson Education, 1999 UNIT IV

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REAL TIME OPERATING SYSTEM LTPC 3104 4 CREDITS

PES104

REAL TIME OPERATING SYSTEM Prerequisite Nil Goal To develop in-depth skills in real time operating systems and its application domains Objectives Outcomes The course should enable At the end of the course the student should be able to: the students to: 1. Know the overview of operating systems. 1. Understand the concepts of operating system principles, files, processes and structures.

2. Know the distributed operating system. 3. Know the Real Time Models and Languages. 4. Know the Real Time Kernels principles and standards. 5. Know the RTOS Application Domains.

2. Understand about the distributed operating system.

3. Understand the concepts of Real Time Models and Languages.

4. Understand about the Real Time Kernels principles and standards.

5. Understand about the RTOS Application Domains.

UNIT I REVIEW OF OPERATING SYSTEMS 9 Basic Principles-system calls-Files-Processes - Design and implementation of processesCommunication between processes - operating system structures. UNIT II DISTRIBUTED OPERATING SYSTEMS 9 Topology-Network Types-Communication-RPC-Client server model-Distributed file systems. UNIT III REAL TIME MODELS AND LANGUAGES 9 Event based - Process based-Graph models - Petrinet models - RTOS tasks - RT scheduling Interrupt processing-Synchronization - Control blocks-Memory requirements. UNIT IV REAL TIME KERNEL 9 Principles - Polled loop systems - RTOS porting to a target - Comparison and Study of RTOS VxWorks and mCoS, Introduction to POSIX and OSEK standards. UNIT V RTOS AND APPLICATION DOMAINS 9 RTOS for image processing - Embedded RTOS for voice over IP-RTOS for fault tolerant applications - RTOS for control systems. L = 45, T = 15, TOTAL= 60
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TEXT BOOKS: 1. Hermann K, Real time systems-design principles for distributed embedded Applications, kluwer academic, 1995 2. Charles Crowley operating systems - A design oriented approach McGraw Hill REFERENCES: 1. RAJ BUHR,DL Beily, An introduction to real time systems PHI,1999 2. CM Krishna,Kang G. Shin, Real time Systems, Mc Graw Hill, 1997 3. Raymond J.A., Donald L Baily, An introduction to real time operating systems PHI, 1999

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EMBEDDED SYSTEM LAB-1 LTPC 0032

PES105 Prerequisite Goal

EMBEDDED SYSTEM LAB-1

2 CREDITS

To provide exposure to the students on frontend and backend tools in VLSI and to design and implement various circuits on FPGA board and VHDL AND Verilog HDL,RTOS environment Objective Outcomes The course will enable the At the end of the course the student should be able to students to acquire practical knowledge on 1. Verilog HDL and 1. Design and implement various digital circuits using VHDL Xilinx Simulator. 2. Microcontrollor programming 2. Design, simulate and perform interfacing programs using 8051 and 68HC11

3. RTOS environment

3. Testing RTOS environment and system programming KEIL tools

LIST OF EXPERIMENTS 1. MICROCONTROLLER PROGRAMMING Interfacing programs using 68HC11 Interfacing Programs using 8051 Microcontrollers 2. VHDL, VERILOG HDL PROGRAMMING Encoder / Decoder Design Shift Register Design 64 KB RAM Design Counter Design 3. RTOS ENVIRONMENT Testing RTOS Environment and System Programming KEIL tools TOTAL=45

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SEMESTER II COMPUTER VISION LTPC 3104 PES201 Prerequisite Goal Objectives COMPUTER VISION 4 CREDITS

To introduce the students to the basics and advanced techniques in computer vision. Outcomes

The course should enable the students At the end of the course the student should be able to: to: 1. Study the image fundamentals and 1. Understand the image fundamentals and the mathematical transforms necessary two dimensional image transforms, for image processing, 2. Study the image enhancement 2. Understand how to improve the image quality techniques and image restoration by using enhancement techniques and Restore procedures, the image by the use of various filtering 3. Study the image compression techniques, methods and segmentation 3. Understand the various image compression techniques, techniques and segmentation methods, 4. Study the feature description and 4. Understand the descriptors used to describe an extraction methods, image, extraction of features in images, 5. Study knowledge representation and 5. Gain knowledge in image analysis. image analysis. UNIT I DIGITAL IMAGE FUNDAMENTALS 9 Image transforms- Walsh Hadamard transform - Discrete cosine - Hotelling transforms- Image formation and file formats. UNIT II IMAGE ENHANCEMENT 9 Histogram modification techniques - Image smoothing - Image shaping -Image restoration degradation model - Diagonalization of circulant and block circulant matrices - Algebraic approach to restoration. UNIT III IMAGE COMPRESSION AND SEGMENTATION 9 Compression models - Elements of information theory - Error free compression - Image segmentation - Detection of discontinuities - Edge linking and boundary detection- threshold Regions oriented segmentations morphology. UNIT IV FEATURE EXTRACTION 9 Image feature description - Interpretation of line drawings- Image pattern recognition algorithms. UNIT V KNOWLEDGE REPRESENTATION AND USAGE 9 Knowledge representation and usage- Image analysis using knowledge about scenes Image understanding using two dimensional methods. L = 45, T = 15, TOTAL= 60 TEXT BOOK: 1. Gonzalez R & Woods B.E Digital Image Processing Addison Wesley 2007 REFERENCES: 1. Anil Jain K. Fundamentals of digital image processing, PHI, 2002
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SOFTWARE TECHNOLOGY FOR EMBEDDED SYSTEMS LTPC 3 10 4 4 CREDITS

PES202

SOFTWARE TECHNOLOGY FOR EMBEDDED SYSTEMS Prerequisite Nil The aim of this course is to give an in depth knowledge on Embedded control Goal systems Objectives Outcomes The course should enable the students to: At the end of the course the student should be able to: 1. Learn about the introduction to data representation, 1. know Data representations,2s complement, fixed point and floating point numbers, low level programming in c, primitive data types, functions, recursive functions, pointers, structures, unions, dynamic memory allocations ,file handling, linked list,

2. Learn about Programming in assembly,

2.Know the concept of C and ALP, register usage conventions, addressing options, procedure call and return, parameter passing, retrieving parameter, pass by value, threads, preemptive kernels, system timer scheduling, 3.Develop through basic knowledge on the design, object model with case model, key strategy, UML basics, 4.Know the usage of behavior, UML chart, timing and sequence diagram, event hierarchies, operations, design in UML concurrency design, 5.Know about co-design overview, co simulation, Re-configurable computing, SOC,IP cores, low power real time embedded systems, on chip networking

3. Learn the Object oriented analysis,

4. Learn about UML,

5. Learn about software and hardware partitioning.

UNIT I INTRODUCTION TO DATA REPRESENTATION 9 Data representation - Twos complement, fixed point and floating point number formats Low level programming in C - Primitive data types - Functions - recursive functions - Pointers Structures - Unions - Dynamic memory allocation - File handling - Linked lists. UNIT II PROGRAMMING IN ASSEMBLY 9 C and assembly - Programming in assembly - Register usage conventions - Typical use of
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addressing options - Instruction sequencing - Procedure call and return - Parameter passing Retrieving parameters - Everything in pass by value - Temporary variables - threads preemptive kernels - system timer scheduling. UNIT III OBJECT ORIENTED ANALYSIS 9 Object oriented analysis and design- Connecting the object model with the use case model - Key strategies for object identification - UML basics. UNIT IV UML 9 Object state behavior - UML state charts - Role of scenarios in the definition of behavior - Timing diagrams - Sequence diagrams - Event hierarchies - types and strategies of operations Architectural design in UML concurrency design - threads in UML. UNIT V SOFTWARE AND HARDWARE PARTITIONING 9 Software / Hardware partitioning - Co design overview - Co simulation, synthesis and verifications - Re-configurable computing - System on Chip (SoC) and IP cores - Low-Power RT Embedded Systems - On-chip Networking. L = 45, T=15, TOTAL=60 TEXT BOOKS: 1. Bruce powel Douglas, Real time UML, second edition: Developing efficient objects for embedded systems (The Addison Wesley Object technology series). 2nd edition 1999, Addison Wesley 2. Hassan Gomma, Designing concurrent, distributed, and real time applications with UML,2001 3. Daniel W.Lewis, fundamentals of embedded software where C and assembly meet PHI 2002

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VLSI ARCHITECTURE AND DESIGN METHODOLOGIES L T P C 3 1 0 4 VLSI ARCHITECTURE AND DESIGN 4 CREDITS METHODOLOGIES Prerequisite The student will get the knowledge on various Goal architectures and designs involved in digital circuits. Objectives Outcomes The course should enable the students to At the end of the course the student should be able to: 1.Understand the concepts of Study various 1. Study various theorems, circuit design with and without hazards, theorems, circuit design with and without hazards, 2. Study the CMOS processing 2.Understand concept of CMOS processing technology and MOS transistors, technology and MOS transistors, 3. Study the concepts about ASIC 3. Understand concept of ASIC design in actel design in actel Xilinx and altera, Xilinx and altera, 4. Study about programmable ASIC design software and its 4.Understand the concept of programmable ASIC design software and its representation, representation, PES203 5. Study about the development of VHDL coding for all digital performance. 5. Develop and perform VHDL digital circuits. coding of all

UNIT I INTRODUCTION 9 Overview of digital VLSI design methodologies- Trends in IC technology- Advanced Boolean algebra- shannons expansion theorem- consensus theorem- Octal designation- Run measureBuffer gates- Gate Expander- Reed Muller expansion- Synthesis of multiple output combinational logic circuits by product map method- design of static hazard free and dynamic hazard free logic circuits. UNIT II CMOS PROCESSING TECHNOLOGY AND INTRODUCTION TO CMOS CIRCUITS 9 CMOS Processing Technology: Silicon Semiconductor Technology, Basic CMOS Technology. Introduction to CMOS Circuits: MOS Transistors, MOS Transistor Switches, CMOS Logic, submicron technology and GaAs VLSI technology. Introduction to Analog VLSI. UNIT III PROGRAMMABLE ASICs 9 Types of ASICs- Design flow- Anti fuse- Static RAM- EPROM and EEPROM technology.PREP bench marks- Actel ACT- Xilinx LCA- Altera FLEX- Altera MAX DS & AC inputs and outputsclock and power inputs- Xilinx I/O blocks.
33

UNIT IV PROGRAMMABLE ASIC DESIGN SOFTWARE 9 Actel ACT- Xilinx LCA- Xilinx FPLD- Altera MAX 5000 and 7000- Altera MAX 9000- Design Systems- Logic synthesis- Half gate ASIC- Schematic entry- low level design language- PLA toolsEDIF- CFI design representation. UNIT V LOGIC SYNTHESIS, SIMULATION AND TESTING 9 Basic features of VHDL language for behavioral modeling and simulation- summary of VHDL data types- Dataflow and structural modeling- VHDL and logic synthesis- types of simulation. boundary scan test- fault simulation- automatic test pattern generation. TOTAL= 45, T = 15, TOTAL= 60 TEXT BOOKS: 1. Neil H.E Weste and Kamran Eshraghian, Principles of CMOS VLSI Design , 2nd Edition,Addition Wesley, 1998 2. M.J.S Smith Application Specific Integrated Circuits , Addison Wesley Longman Inc, 1997 3. VHDL for Designers by Stefan Sjoholm and Lennart Lindh, Prentice Hall, 1997 REFERENCES: 1. Amar Mukherjee, Introduction to NMOS and CMOS VLSI System Design. Prentice Hall 1986 2. Frederick J. Hill and Gerald R. Peterson, Computer Aided Logical Design with emphasis onVLSI 1995 3. William I.Fletcher An Engineering Approach to Digital Design Prentice Hall of India. 1996
34

EMBEDDED CONTROL SYSTEMS LTPC 3 10 4 4 CREDITS

PES204 Prerequisite Goal

EMBEDDED CONTROL SYSTEMS

Nil The aim of this course is to give an in depth knowledge on Embedded control systems Objectives Outcomes At the end of the course the student should be The course should enable the students to: able to: 1.Learn about the peripherals interface basics and operation, 1. Gain knowledge on controlling hardware and software, data lines, numbering systems, address lines, bit masking, PPI, Switch input detection,

2. Learn about interfacing and programming Input output devices,

2.Know the concept of Keypad scanning algorithm, Multiplexed LED displays, LCD module display, time of day clock,T imer manager, ISR, PWM 3.Develop through basic knowledge on the behavior and the characteristics of ADC and DAC working principles,A nalog signal measurements, multi channel data acquisition, auto port detection, recording and playback of voice, 4.Learn the usage of Asynchronous serial communication,RS-232,485,sending and receiving data,serial ports on PC,Low level PC I/O module,buffered serial I/O, 5.Acquire knowledge on the Controlling motors, H-bridge, Telephonic systems, burger alarms and fire alarms.

3. Learn the Operation of DAC and ADC conversions,

4. Learn the Operation of Asynchronous serial communication,

5. Learn about Case studies.

UNIT I INTRODUCTION 9 Controlling the hardware with software - Data lines - Numbering systems- Address lines - Ports Schematic representation - Bit masking - Programmable peripheral interface- switch input detection. UNIT II INPUT-OUTPUT DEVICES 9 Keyboard basics- Keyboard scanning algorithm - Multiplexed LED displays- character LCD modules- LCD module display-configuration- time of day clock-timer manager-interrupts Interrupt service routines- Interrupt vector or dispatch table multiple point -Interrupt driven pulse width modulation.
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UNIT III D/A and A/D CONVERSION 9 D/A and A/D converters and its working principles - Interrupts in analog signal measurement Multi channel data acquisition. - Auto port detection - recording and playing back voice. UNIT IV ASYNCHRONOUS SERIAL COMMUNICATION 9 Asynchronous serial communication - RS 232 - RS 485 - Sending and receiving data Serial ports on PC - Low level PC serial I/O module - Buffered serial I/O. UNIT V CASE STUDIES 9 Controlling motors - bi-directional - control of motors- H bridge - Telephonic systems Burger alarms- Fire alarms L = 45, T=15,TOTAL= 60 TEXT BOOKS: 1. Jean J Labrosse, Embedded System Building Blocks: Complete and Ready to use modules in C , the publisher , Paul Temme, 1999 2. Ball SR Embedded microprocessor system - Real world design, Prentice Hall , 1996 REFERENCES: 1. Hermann. K Real Time systems- Design for distributed Embedded Application, kluwer Acdemic , 1997 2. Daniel W Lewis, Fundamentals of Embedded software where C and Assembly meet PHI 2002

36

EMBEDDED SYSTEMS LAB II LTPC 0 0 3 2 PES205 Prerequisite Goal EMBEDDED SYSTEM LAB 1I 2 CREDITS

To provide exposure to the students on frontend and backend tools in VLSI and to design and implement various circuits on FPGA board,CPLD,PIC microcontroller and ARM processor Objective Outcomes The course will enable the At the end of the course the student should be able to students to acquire practical knowledge on 1.Design using Xilinx 1. Design and implement various Atmel CPLDs prochip designer, Schematic entry,VHDL entry.device programming,PROM programming

2.Design using PIC microcontroller and ARM processor

2. Interfacing program using PIC microcontroller and ARM processor

LIST OF EXPERIMENTS 1. Atmel CPLDs - Prochip Designer o Schematic Entry o VHDL entry 2. Xilinx EDA design tools - device programming - PROM programming 3. PIC MICROCONTROLLER PROGRAMMING o Interfacing Programs using PIC Microcontroller & ARM PROCESSOR. TOTAL: 45

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SEMESTER III PROJECT WORK (PHASE I) L T P C 0 0 12 6 6 CREDITS

PES301 Prerequisite

PROJECT WORK (PHASE I)

To develop the students skills and enable innovation in design and fabrication work from the theoretical and practical skill acquired from the previous semesters. Objectives Outcomes The course should enable the students to: At the end of the course the student should be able to: 1. Select and work on real life 1. Appreciate various aspects of the application in the field of Electronics curriculum which support students in & Communication, increasing their mastery, 2. Implement their skills acquired in 2. Get an idea and develop confidence the previous semesters to practical in designing, analyzing and executing problems, the project, 3. Apply and enhance the knowledge 3. Develop knowledge of latest trends in acquired in the related field, fabrication relate their ideas to 4. Make the students come up with new industrial applications, ideas in his area of interest. 4. Have complete understanding of making a product. Goal NOTE: The objective of the project work is to enable the students on a project involving theoretical and experimental studies related to the branch of study. Every project work shall have a guide who is the member of the faculty of the institution. Twelve hours per week shall be allotted in the time table and this time shall be utilized by the students to receive the directions from the guide, on library reading, laboratory work, computer analysis or field work as assigned by the guide and also to present in periodical seminars on the progress made in the project. Each student will be assigned any one of the following types of project/thesis work: (a) Industrial case study (b) Preparation of a feasibility report (c) Thesis by experimental research, and (d) Design and development of equipment. Each report must contain student's own analysis or design presented in the approved format. Sessional marks will include (a) Evaluation of the student's progress, (b) Degree of involvement and participation, (c) Merit of the project. A student will have to defend his/her project/thesis and credit will be given on the merits of presentation and viva-voce examination.
38

SEMESTER IV PROJECT WORK (PHASE II) L T P C 0 0 24 12 12 CREDITS

PES401 Prerequisite Goal

PROJECT WORK (PHASE II)

To develop the students skills and enable innovation in design and fabrication work from the theoretical and practical skill acquired from the previous semesters. Objectives Outcomes The course should enable the students to: At the end of the course the student should be able to: 1. Select and work on real life 1. Appreciate various aspects of the application in the field of Electronics curriculum which support students in & Communication, increasing their mastery, 2. Implement their skills acquired in 2. Get an idea and develop confidence the previous semesters to practical in designing, analyzing and executing problems, the project, 3. Apply and enhance the knowledge 3. Develop knowledge of latest trends in acquired in the related field, fabrication relate their ideas to 4. Make the students come up with new industrial applications, ideas in his area of interest. 4. Have complete understanding of making a product.

NOTE: The objective of the project work is to enable the students on a project involving theoretical and experimental studies related to the branch of study. Every project work shall have a guide who is the member of the faculty of the institution. Twenty four hours per week shall be allotted in the time table and this time shall be utilized by the students to receive the directions from the guide, on library reading, laboratory work, computer analysis or field work as assigned by the guide and also to present in periodical seminars on the progress made in the project. Each student will be assigned any one of the following types of project/thesis work: (a) Industrial case study (b) Preparation of a feasibility report (c) Thesis by experimental research, and (d) Design and development of equipment. Each report must contain student's own analysis or design presented in the approved format. Sessional marks will include (a) Evaluation of the student's progress, (b) Degree of involvement and participation, (c) Merit of the project. A student will have to defend his/her project/thesis and credit will be given on the merits of presentation and viva-voce examination.

39

LIST OF ELECTIVES ADVANCED COMPUTER ARCHITECTURE LTPC 3003 PCE720 Prerequisite Goal ADVANCED COMPUTER 3 CREDITS ARCHITECTURE The student will get a balanced study of the theory, Technology and architecture of advanced computer systems. It introduces the issues in designing and using high performance parallel computers. Outcomes At the end of the course the student should be able to: 1. Understand the different processor architectures and applications 2. Understand the parallel computer models and performance metrics, measures and approaches. 3. Understand the Processors and memory Hierarchy and bus structure. 4. Understand the concept of Pipelining and super scalar techniques 5. Understand the concept of multiprocessors and compound vector processing principles.

Objectives The course should enable the students to: 1. Study the uniprocessor and parallel processor architecture 2. Study the parallel computer models and performance metrics 3. Study the concept of Processors and memory Hierarchy 4. Study the concept of Pipelining and super scalar techniques 5. Study the concepts of multiprocessors and compound vector processing

UNIT I UNIPROCESSOR AND PARALLEL COMPUTER STRUCTURE 9 Basic Uniprocessor Architecture - Parallel processing Mechanisms- Balancing of Subsystem band width- Parallel Computer structure- Architectural classifications- Parallel processing applications. UNIT II PARALLEL COMPUTER MODELS AND PERFORMANCE 9 Parallel Computer Models - Multi processing and Multi computers- Multi vector and SIMD Computers - PRAM and VLSI Models. Principles of Scalable Performance - Performance Metrics and measures- Speedup Performance laws- Scalability Analysis and Approaches. UNIT III MEMORY 9 Processors and memory Hierarchy- Advanced Processor Technology-Super scalar and Vector processors- Memory hierarchy technology- Virtual memory Technology. Bus- cache- and shared memory- Backplane Bus Structure- Cache memory organizations- Shared memory organizations.

40

UNIT IV DESIGN AND PIPELINING 9 Pipelining and super scalar techniques- Linear pipe line Processors- Non linear pipeline Processors- Instruction pipeline design- Arithmetic pipeline design- Super scalar and super pipeline design. UNIT V MULTIPROCESSOR AND COMPOUND VECTOR PROCESSING 9 Multi processors and Multi computers- Multi processor system interconnects- Cache coherence and Synchronization Mechanism- Message passing mechanisms Multi vector and SIMD Computers- Vector processing principles- Compound vector processing-SIMD Computer organizations. L = 45, TOTAL= 45 REFERENCES: 1. A Kai Hwang, Advanced Computer Architecture, Kai Hwang, McGraw-Hill, Inc ,1987 2. Kai Hwang and Faye A. Briggs Computer Architecture and Parallel Processing, McGraw Hill (1989) 3. Rafiquzzaman, and Chandra -Modern computer Architecture, West Publishing Company, 1989 4. Morris Mano, Computer system Organization, Prentice Hall of India, 3rd ed,(1993.) 5. Andrew.S.Tanenbaum, Computer Networks, 5th Edition, Prentice Hall, 2010.

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DATA COMMUNICATION AND COMPUTER NETWORKS LTPC 3 0 0 3 DATA COMMUNICATION PES701 AND COMPUTER 3 CREDITS NETWORKS Prerequisite This course will allow students to develop Goal background knowledge as well as core expertise in data communications and networking. The student will get to know about computer communication and different types of networks. Objectives Outcomes The course should enable the students to At the end of the course the student should be able to: 1. Understand the evolution path of data 1. Study the evolution of data communication and networking, communication and networking up to the Internet, 2. Study the principles of data communication, channel characteristics, signalling, modulation and encoding, 3. Study the concept of multiplexing, channel error detection and correction, data link protocols 4. Study the concept of various categories and topologies of networks, 5. Study the details of IP operations in the Internet and associated routing principles through OSI model and TCP/IP architecture. 2. Understand the concepts of modulation and encoding techniques,

3. Understand the principles of multiplexing, error detection and correction techniques,

4. Understand the concept of different topologies of networks,

5. Understand the Internet principles through OSI and TCP/IP models.

UNIT I INTRODUCTION 9 Signal transmission: Transmission media, signal transmission in channels: Attenuation, distortion and noise source, signal types, signal propagation delay, physical layer interface standards. UNIT II DATA TRANSMISSION 9 Data transmission basics, Binary transmission: Parallel transmission, serial transmission, asynchronous transmission, synchronous transmission, transmission control circuits, communication control devices, Error detection and correction methods: Parity, block check sum, CRC error detection schemes for burst errors, Data Compression: Packed decimal, relative encoding, character suppression, Huffman coding, Facsimile compression.
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UNIT III LOCAL AREA NETWORK LAN topologies, LAN access techniques, bridges, routers. UNIT IV WIDE AREA NETWORK Circuit switching, packet switching, frame relay, ISDN fundamentals.

UNIT V UPPER LAYER PROTOCOLS 9 OSI Model, TCP/IP protocols suite, Internet protocol, routing, IP V6, ICMP V6, Transport protocol and application protocols. L = 45, TOTAL= 45 TEXT BOOKS: 1. F. Halsal, Data Communications, Computer Networks and Open Systems, Fourth edition, Addison Wesley Publication, 1996. 2. William Stallings, Data and Computer Communications, 9th Edition, Prentice Hall, 2010. REFERENCES: 1. Jean Walrand, Communication Networks a first course, 2nd Edition, McGraw Hill, 2002. 2. Lewis Mackenzie, Communication and Networks, McGraw Hill, 1998. 3. Andrew.S.Tanenbaum, Computer Networks, 5th Edition, Prentice Hall, 2010. 4. Gerd Keiser, Local Area Networks, 2nd Edition, McGraw Hill, 2001.

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MOBILE COMPUTING LTPC 3003 3 CREDITS

PES702 Prerequisite Goal Objectives The course should enable the students to: 1.To study the fundamentals of mobile communication 2.To study the WLAN 3.To study the satellite systems and wireless networks. 4.To study the TCP/IP protocols and WAP. 5.To learn the Mobile Adhoc Networks.

MOBILE COMPUTING To understand the fundamentals and various computational processing of Mobile Networks. Outcomes At the end of the course the student should be able to: 1.Understand the evolution and technologies used in mobile communication, 2.Understand the wireless LAN in detail. 3.Understand the satellite systems and wireless networks. 4.Understand the specifications and functionalities of various protocols 5.Understand the concept and different routing algorithms in Mobile Adhoc networks.

UNIT I INTRODUCTION 9 Introduction to mobile computing - Wireless transmission: propogation, modulation, Multiplexing, switching, spread spectrum and error control coding. UNIT II WIRELESS LAN 9 Medium access control and physical layer specifications - IEEE 802.11 - HIPERLAN Bluetooth. UNIT III WIRELESS NETWORKS 9 Satellite systems - Cellular networks - Cordless systems - Wireless in local loop - IEEE 802.16. UNIT IV MOBILE TCP/IP AND WAP 9 TCP/IP protocol suite - mobile IP - DHCP - Mobile transport layer - Wireless application protocol. UNIT V MOBILE AD-HOC NETWORKS 9 Characteristics - Performance issues - Routing algorithms: proactive and reactive - DSDV, AODV, DSR and Hierarchical algorithms. L = 45, TOTAL= 45 TEXT BOOKS: 1. J.Schiller, Mobile communications, Addison Wesley, 2000 2. William Stallings, Wireless Communications and Networks, Pearson Education , 2002

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PES703

ARCHITECTURE & DESIGN OF DISTRIBUTED EMBEDDED SYSTEMS LTPC 3003 ARCHITECTURE & DESIGN 3 CREDITS OF DISTRIBUTED EMBEDDED SYSTEMS

Prerequisite Goal

Nil To provide basic knowledge about the design methodology & architecture of embedded systems. Objectives Outcomes The course should enable At the end of the course the student should be able to: the students to: 1. Know the concepts of networks and their 1. Understand the standards. hardware infrastructure of networks. 2. Know about the internet concepts and security 2. Understand the measures. internet concepts and software architecture. 3. Know the concepts of distributed computing 3. Understand the through JAVA. distributed computing using JAVA. 4. Understand the distributed database and JAVA concepts. 5. Understand the design methodology & architecture of embedded system. 4. Know the embedded JAVA concepts.

5. Know the design methodology & architecture of embedded system.

UNIT I HARDWARE INFRASTRUCTURE 9 Broad band transmission facilities - Open interconnection standards- types of network- network principles- Ethernet- Wireless- LAN and ATM. UNIT II SOFTWARE ARCHITECTURE & INTERNET CONCEPTS 9 Internet protocol- Hard ware & soft ware of internet- Internet security- IP addressing- Interfacing internet server applications to corporate database TML and XML. UNIT III DISTRIBUTED COMPUTING USING JAVA IO streaming- object serialization-Networking- threading- RMI- Multicasting. 9

UNIT IV DESIGN METHODOLOGY & ARCHITECTURE 9 Distributed database- Embedded java concepts -Communication between distributed objects.
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UNIT V DESIGN METHODOLOGY & ARCHITECTURE 9 Analog/digital co-design- design method based on multiprocessors-architecture for reliable distributed computer -Controlled systems- Optimization functional distribution in complex system design. L = 45, TOTAL= 45 TEXT BOOKS: 1. George coulouris and jean Dollimore , Distributed Systems -concepts and design, (Pearson Education Asia)-2001 2. Architecture and Design of Distributed Embedded Systems edited by Bernd Kleinjohann Kluwer Academic Publishers, Bosten,2001 REFERENCES: 1. Dietel & Dietel ,JAVA how to program prentice Hall 1999 2. Sape Mullender , Distributed Systems, Addison - Wesely, 1993 3. Phil Feldman & Tom Rugy, Network lite made easy, Mcgraw Hill publisher -10th edition.,1999

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ADVANCED DIGITAL SIGNAL PROCESSING LTPC 3 00 3 PCS101 Prerequisite Goal ADVANCED DIGITAL SIGNAL PROCESSING 3 CREDITS

Basic knowledge of random processes, Fourier Transform, auto-correlation matrices & sampling process. To provide knowledge of digital signal processing methods and tools, including leading algorithms for various applications. Objectives Outcomes At the end of the course the students should be able to Understand the various theorems & processing that are done on discrete random processes (ii) Understand the different parametric & non-parametric spectrum estimation methods (iii) Understand the linear predictors & Wiener filters (iv) Understand the adaptive filters & their various applications (v) Understand the importance of multirate digital signal processing
(i)

The course will enable the students to: Know the basics of discrete random processes (ii) Know the basics of various Spectrum estimation methods (iii) Know the basics of linear estimators & predictors (iv) Know the basics of various adaptive filters along with their applications (v) Know the fundamentals of multirate digital signal processing
(i)

UNIT I

DISCRETE RANDOM SIGNAL PROCESSING

Discrete Random Processes- Ensemble averages, stationary processes, Autocorrelation and Auto covariance matrices. Parseval's Theorem, Wiener-Khintchine Relation- Power Spectral DensityPeriodogram Spectral Factorization, Filtering random processes. Low Pass Filtering of White Noise. Parameter estimation: Bias and consistency. UNIT II SPECTRUM ESTIMATION 9

Estimation of spectra from finite duration signals, Non-Parametric Methods-Correlation Method,Periodogram Estimator, Performance Analysis of Estimators -Unbiased, Consistent Estimators- Modified periodogram, Bartlett and Welch methods, Blackman Tukey method. Parametric Methods - AR, MA, ARMA model based spectral estimation. Parameter Estimation Yule-Walker equations, solutions using Durbins algorithm

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UNIT III LINEAR ESTIMATION AND PREDICTION

Linear prediction- Forward and backward predictions, Solutions of the Normal equationsLevinson-Durbin algorithms. Least mean squared error criterion -Wiener filter for filtering and prediction , FIR Wiener filter and Wiener IIR filters ,Discrete Kalman filter UNIT IV ADAPTIVE FILTERS 9 FIR adaptive filters -adaptive filter based on steepest descent method-Widrow-Hoff LMS adaptive algorithm, Normalized LMS. Adaptive channel equalization-Adaptive echo cancellation-Adaptive noise cancellation- Adaptive recursive filters (IIR). RLS adaptive filtersExponentially weighted RLS-sliding window RLS. UNIT V MULTIRATE DIGITAL SIGNAL PROCESSING 9 Mathematical description of change of sampling rate - Interpolation and Decimation , Decimation by an integer factor - Interpolation by an integer factor, Sampling rate conversion by a rational factor, Filter implementation for sampling rate conversion- direct form FIR structures, Polyphase filter structures, time-variant structures. Multistage implementation of multirate system. Application to sub band coding - Wavelet transform and filter bank implementation of wavelet expansion of signals. L=45, Total=45 TEXT BOOK: 1. Monson H.Hayes, Statistical Digital Signal Processing and Modeling, John Wiley and Sons, Inc., Singapore, 2002. REFERENCES: 1. John G. Proakis, Dimitris G.Manolakis, Digital Signal Processing Pearson Education, 2002. 2. John G. Proakis et.al.Algorithms for Statistical Signal Processing, Pearson Education, 2002. 3. Dimitris G.Manolakis et.al. Statistical and adaptive signal Processing, McGraw Hill, Newyork, 2000. 4. Rafael C. Gonzalez, Richard E.Woods, Digital Image Processing, Pearson Education, Inc., Second Edition, 2004.( For Wavelet Transform Topic)

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DESIGN OF DIGITAL CONTROL SYSTEMS LTPC 3003 PES704 Prerequisite Goal DESIGN OF DIGITAL 3 CREDITS CONTROL SYSTEMS The purpose of this course is to make the students conversant with the design aspects of data communications and computer networks. Outcomes At the end of the course the student should be able to: 1. Understand the effects of sampling and sampled data control systems. 2. Understand the Concepts of controllability, observability and stability analysis. 3. Understand various concepts of self tuning. 4. Understand various concepts of microprocessor based control system. 5. Understand constructional & operational features of stepping motors.

Objectives The course should enable the students to: 1. Study sampling, A/D & D/A conversion& Z-transform. 2. understand the stability of digital control system & frequency analysis. 3. Study various algorithms for self tuning. 4. Learn about microprocessor based control system. 5. learn details in microprocessor control of stepper motor.

UNIT I SAMPLING AND RECONSTRUCTION- TRANSFORM ANALYSIS OF SAMPLE DATA SYSTEMS 9 Effects of sampling- Sampled data control systems- A/D & D/A conversion- Fourier transformztransform- Pulse transform function- Stability analysis- Time and frequency response. UNIT II DESIGN USING TRANSFORM AND STATE SPACE TECHNIQUES 9 Digital PID controller- Multivariable controller- Discrete time state equation- Cayley-Hamilton theorem- Concepts of controllability and observability- Lyapunav stability analysis. UNIT III SELF TUNING CONTROL 9 Introduction- Principle of least square- Recursive least square algorithm- minimum- Variable prediction- Minimum-Variance control- Self-tuning regulators. UNIT IV MICROPROCEESOR BASED CONTROL 9 General description of microcontrollers- Digital quantization- Position control- Process modelControl algorithm- hard ware mechanization- System software. UNIT V STEPPING MOTORS AND THEIR INTERFACING TO MICROPROCESSORS 9 Introduction- Constructional & operational features of stepping motors-important parameters of stepping motors-Stepping motor drive circuits-Interfacing to microprocessor. L = 45, TOTAL= 45
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TEXT BOOKS: 1. GOPAL M , Digital Control Engineering , New age international .1996 2. Digital Control Systems: B.C.Kuo.(Holt - saunders Japan Ltd.)-1991 REFERENCES: 1. K. Ogata , Discrete Time control systems, PHI 1987 2. Forsytheand W.Goodall R.N. Digital Control Mc Millan, 1991 3. Design control system design : Samita, Stubberud Hostelier (Hercourt brace college publisher)1988.

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EMBEDDED NETWORKING LTPC 3003 3 CREDITS

EMBEDDED NETWORKING Prerequisite Nil Goal To provide basic knowledge about the embedded networking protocols. Objectives Outcomes The course should enable the At the end of the course the student should be able to: students to: 1. Know the concepts of embedded serial 1. Understand the serial and parallel communication and parallel communication protocols. communication protocols. 2. Understand the application development using USB and CAN bus for PIC micro controller. 3. Understand the Ethernet protocols. 4. Understand the application development using embedded Ethernet for rabbit processors. 5. Understand the wireless sensor network communication protocols. 2. Know about the application development using USB and CAN bus with C programming for PIC- 18 microcontroller 3. Know the concepts of Ethernet protocols and controllers. 4. Know the concepts of real time development of embedded Ethernet protocols for rabbit processors.

PES705

5. Know the wireless embedded networking protocols concepts.

UNIT I EMBEDDED COMMUNICATION PROTOCOLS 8 Embedded Networking: Introduction Serial/Parallel Communication Serial communication protocols -RS232 standard RS485 Synchronous Serial Protocols - Serial Peripheral Interface (SPI) Inter Integrated Circuits (I2C) PC Parallel port programming -ISA/PCI Bus protocols Firewire UNIT II USB AND CAN BUS 10 USB bus Introduction Speed Identification on the bus USB States USB bus communication: Packets Data flow types Enumeration Descriptors PIC 18, Microcontroller USB Interface C Programs CAN Bus Introduction - Frames Bit stuffing Types of errors Nominal Bit Timing PIC microcontroller CAN Interface A simple application with CAN. UNIT III ETHERNET BASICS 9 Elements of a network Inside Ethernet Building a Network: Hardware options Cables, Connections and network speed Design choices: Selecting components Ethernet Controllers Using the internet in local and internet communications Inside the Internet
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protocol UNIT IV EMBEDDED ETHERNET 9 Exchanging messages using UDP and TCP Serving web pages with Dynamic Data Serving web pages that respond to user Input Email for Embedded Systems Using FTP Keeping Devices and Network secure. UNIT V WIRELESS EMBEDDED NETWORKING 9 Wireless sensor networks Introduction Applications Network Topology Localization Time Synchronization - Energy efficient MAC protocols SMAC Energy efficient and robust routing Data Centric routing TOTAL = 45 REFERENCES: 1. Frank Vahid, Givargis Embedded Systems Design: A Unified Hardware/SoftwareIntroduction, Wiley Publications, 2002 2. Jan Axelson, Parallel Port Complete, Penram publications, 2006 3. Dogan Ibrahim, Advanced PIC microcontroller projects in C, Elsevier 2008 4. Jan Axelson Embedded Ethernet and Internet Complete, Penram Publications, 2007 5. Bhaskar Krishnamachari, Networking wireless sensors, Cambridge press 2005
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RELIABILITY ENGINEERING LTPC 3003

PES706 Prerequisite Goal

RELIABILITY ENGINEERING 3 CREDITS Introduction to reliability Engineering, and Practical reliability engineering. The main goals of the programme are to learn reliability Fundamentals, basics of System Reliability and Device Reliability, reliability Techniques, maintainability and Availability Concepts. Objectives Outcomes At the end of the course the student should be able to: 1. Estimate failure based on theoretical approach and study its related terms.

The course should enable the students to:

1. Understand the reliability engineering principles-bath tub curve and failure prediction. 2. Develop an in-depth knowledge on the reliability estimation of complex system structures. 3. Study various terms used to predict device reliability-electronic devices.

2. Perform system modeling and failure estimation of complex structures.

3. Develop strong theoretical knowledge on reliability of electronic devices under different working conditions. 4. Apply optimum mathematical technique for reliability prediction. 5. Choose techniques for system packaging and understand maintainability concepts.

4. Study various techniques reliability prediction. 5. Study maintainability, systems packaging interconnections.

for

electronic and I

UNIT I INTRODUCTION 9 Reliability fundamentals and bath tub curve- Reliability measures and parameters- Hazard rate model- Probability concepts and failure time distribution. UNIT II SYSTEM RELIABILITY 9 System reliability modeling- k out of n system- Analysis of complex reliability structuresSystem reliability estimation. UNIT III DEVICE RELIABILITY 9 Accelerated life testing- Early life reliability- Long term device reliability- Electrostatic discharge- Electrical stress - Electronic System reliability.
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UNIT IV RELIABILITY TECHNIQUES 9 Reliability prediction-Cut set-Tie set- FMECA - FTA- Markov- Monte Carlo Simulation- Steady state hazard rate. UNIT V MAINTAINABILITY AND AVAILABILITY CONCEPTS 9 Guidelines for design for maintainability- MTTR- BIT / BITE facility- Spares provisioningElectronics system packaging and interconnections. L = 45, TOTAL= 45 TEXT BOOKS: 1. David J. Klinger, YoshinaoNakada and Maria A. Menendez, AT & T Reliability Manual, Von Nostrand Reinhold, New York, 5th Edition, 1998. 2. Lewis, Introduction to Reliability Engineering, 2nd Edition, Wiley International, 1996. 3. O Connor, P.D.T., Practical Reliability Engineering, Hayden Book Company, New Jersey,1981. VLSI Circuit Design, 2000. REFERENCE: 1. Gregg K. Hobbs, Accelerated Reliability Engineering - HALT and HASS, John Wiley & Sons, New York, 2000.

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CRYPTOGRAPHY AND NETWORK SECURITY LTPC 3003 PES707 Prerequisite Goal CRYPTOGRAPHY AND NETWORK SECURITY 3CREDITS

The student will get to know the cryptographic algorithms and will understand the necessity of security in communication and various efficient ways of achieving the same. . Objectives Outcomes The course should enable the students to At the end of the course the student should be able to: 1. Understand the Security problems in 1. Study the Security problems in computing and the methods of defense computing 2. Study the cryptographic algorithms 2. Understand the basic encryption and decryption methods and different cryptographic algorithms 3. Understand the security involving programs and operating systems and file protection mechanisms 4. Understand the security requirements for data base and user authentication 5. Understand the communication and system security and different types of intruders

3. Study the role of operating systems

4. Study the need of database network security

5. Study the concept of communication and system security

UNIT I SECURITY PROBLEM 9 Security problem in computing - Characteristics of computers in intrusion- Kinds of security breaches - Points of security vulnerability - Methods of defence - Controls - Effectiveness of controls - Plan of attack encryption. UNIT II CRYPTOGRAPHY 9 Basic encryption and decryption - Mono alphabetic ciphers- Polyphabetic substitutionTranspositions - Fractional morse - Stream and block ciphers- Characteristics of good ciphersSecure encryption systems - Public key system- Single key system - Data encryption standard Rivest - Shamir - Adelman (RSA) encryption.

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UNIT III ROLE OF OPERATING SYSTEM 9 Security involving programs and operating systems- Information access problems- program development controls - Operating system controls - Operating system control in use of programs administration control -Protection services for users operating system- Protected objects and method of protection - File protection mechanism - User authentication. UNIT IV DATABASE AND NETWORK SECURITY 9 Database network security - Security requirements for data base - Reliability and integrity sensitive data - Interference problem - Multilevel data base - Network security issues- Encryption in networking - Access control - User authentication - Local area networks- multilevel security of network. UNIT V COMMUNICATION AND SYSTEM SECURITY 9 Communication and system security - Communication characteristics - Communication media loss of integrity - Wire tapping - electronics mail security - IP security WEB security - intruders - Viruses - Worms firewalls Standards. L = 45, TOTAL= 45 TEXT BOOKS: 1. William stalling Cryptography and networks security principles and practice, PHI,1998 2. Charles, P Pleeger, Security in computing PHI, 1989. REFERENCES: 1. Hans, Information and communication security, springer verlag, 1998. 2. Simonds, Network security, McGraw Hill, 1998. 3. Derek Atkins Internet Security , Techmedia, 1998. 4. Kernal Texplan, Communication Network Management, PHI, 1992.

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