ECE419: Digital VLSI Design Section: Roll No.

Code A Reg. No.

Time 50 min. Max.Marks:30

1. A synchronous sequential network has one input(X) and one output (Z). If the input sequence X=111, an output 1 will occur and coincident with the last input of 111. Draw the circuit diagram of sequence detector for given input and output sequence using mealy machine. [10] X=0011100111110 Z=0000100001010
2. Realize the sequential circuit of given state diagram with help of J K flip-flop. [10]

3. Realize the given Boolean expression with help of one 4X1 Mux. Y=A+B+C

[5]

4. Differentiate the Net and Register with proper Example.

[5]

ECE419: Digital VLSI Design Section: Roll No.

Code B Reg. No.

Time 50 min. Max.Marks:30

_______________________________________________________________________________
1. Describe the behavior of given sequential circuits. i. Provide the state table, state equation and state diagram.

[10]

2. Draw the behavior of sequence detector of sequence 11011 using Mealy machine and Moore machine. Where the input(X) and output(Z) sequence of sequence detector is given below.[10] X=00110110110011 Z=00000010010000

3. Design full adder with help of 2X1 Mux. 4. Differentiate Verilog HDL and VHDL with proper example.

[5] [5]

ECE419: Digital VLSI Design Section: Roll No.

E3008 Code A Reg. No.

Time 50 min. Max.Marks:30

_______________________________________________________________________________
1. Realize the sequential circuits of give state diagram. i. Provide the state table, state equation and circuit diagram.

[10]

2. Draw the behavior of sequence detector of sequence 00100 using Mealy machine and Moore machine. Where the input(X) and output(Z) sequence of sequence detector is given below.[10] X=11001001001100 Z=00000010010000 3. Realize half adder using only 2X1 Mux. [5] 4. Realize gray to binary and binary to gray code converter for 4-bit. [5]

ECE419: Digital VLSI Design Section: Roll No.

E3007 Code B Reg. No.

Time 50 min. Max.Marks:30

_______________________________________________________________________________
1. Describe the behavior of given sequential circuits. i. Provide the state table, state equation and state diagram.

[10]

2. A synchronous sequential network has one input(X) and one output (Z). If the input sequence X=000, an output 1 will occur and coincident with the last input of 000. Draw the circuit diagram of sequence detector for given input and output sequence using mealy machine. [10] X=1100011000001 Z=0000100001010
3. Describe different level of modeling. 4. Realize 8X1 Mux using 2X1 Mux. [5] [5]