A 24-Pulse Rectifier Cascaded Multilevel Inverter With Minimum Number of Transformer Windings

Alan Joseph, Jin Wang, Zhiguo Pan, Lihua Chen, and Fang Z. Peng
Department of Electric and Computer Engineering Michigan State University East Lansing, MI 48824, U.S.A. josepha2@egr.msu.edu
AbstractThis paper addresses the design of a medium voltage adjustable speed drive (ASD) utilizing the benefits of cascaded inverter technology while employing a 24pulse rectifier inspired front end. Rectifier front ends of ASDs introduce a high level of harmonics into the utility grid, creating equipment overheating problems and distorting the voltage waveform near the ASDs connection point. To greatly reduce these harmonics while limiting cost, a cascaded multilevel inverter utilizing a 24-pulse transformer with a minimum number of windings is used. This design reduces the total harmonic current to less than 5% of the full load current over the entire frequency range. Simulation and experimental results are presented to show proof of concept. Keywords-24-pulse rectifier, harmonics, harmonic mitigation, multilevel inverter.

In an attempt to cheaply reduce these injected harmonic currents, ac line and dc filter inductors have been used. While adding these components reduces the harmonic currents, they only do so to a degree. Another method employs using line filters to filter out specific harmonic frequencies. While effective, line filters suffer from line resonance problems. Another solution is to use a high pulse number rectifier. High pulse number rectifiers utilize standard 6-pulse diode rectifiers fed from the secondaries of a multi-winding transformer which outputs phase shifted voltages. As an example, a 24-pulse rectifier circuit is given in Fig. 2. The 15 phase shift allows lower order harmonics to cancel out such that the 23rd and 25th order harmonics are the first significant harmonics present. An obvious disadvantage of using these kinds of high pulse number rectifiers is the added size and cost of the transformer to the total ASD. To try to justify this added cost, an inverter topology is chosen which trades off the required use of a transformer and multiple isolated outputs for other positive attributes. Multilevel inverter topologies were originally developed to allow the use of low voltage switching devices in high voltage systems. A cascaded inverter is a type of multilevel inverter that stacks single phase inverter modules to attain a higher output voltage. Cascaded inverters benefits include modularity, redundancy, low switching frequency, and low output total harmonic distortion (THD). For grid connected applications, the main drawback of cascaded inverters is the need for isolated inputs provided by a transformer [4-6]. The proposed design takes this drawback and advantageously uses it to significantly reduce the current harmonics injected into the grid. To limit the cost of the multi-winding transformer, the number of windings on the transformer is kept to a minimum. By feeding the rectifier of each module with a single phase voltage instead of a three phase voltage, the number of windings on the transformer is reduced threefold. This can be accomplished by using a standard 24-pulse transformer and merely disconnecting the three phases of the secondary windings, as shown in Fig. 2.

I.

INTRODUCTION

Adjustable speed drives (ASDs) have the potential to provide substantial energy savings for any motor that often operates at partial or variable loads. Usually, ASDs use a front end diode rectifier to produce a dc link voltage from the ac voltage of the utility grid. A voltage source inverter is then used to drive the motor. These diode rectifiers inject significant harmonic currents into the grid, potentially causing transformers and cables to overheat, and the harmonics also distort the voltage waveform near the ASDs connection point.

Figure 1. Typical 24-pulse converter.

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II.

CASCADED MULTILEVEL INVERTER

III.

Fig. 2 shows the cascaded inverter ASD with the 24-pulse transformer. This type of cascaded inverter topology is not new and was developed in [1]. However due to the minimization of the transformer windings, each module uses a single phase rectifier as the front end as shown in Fig. 2 and still, at least partially, provides the harmonic mitigation function of a 24pulse rectifier.

EFFECT OF SINGLE PHASE MODULE INPUTS ON INPUT CURRENT THD

High pulse rectifiers work on the principal of phase multiplication. When identical currents with harmonic content are properly phase shifted and added together, some of the lower order harmonics become cancelled. In order for phase multiplication to work completely, transformer turns ratios and impedances must be identical, and each rectifier current must have the same amplitude and shape. In the case of a 24-pulse rectifier, each three phase rectifier must be phase shifted by 15 [2-3]. Assuming that the transformer is built to this exacting specification, focus turns to the point of keeping each rectifier current identical. Identical rectifier loads lead to identical rectifier currents. Since an NPC inverter module is the load for each rectifier, each NPC inverter is required to output the same real power in order for all the lower harmonics to cancel out, up to the 23rd and 25th. For cascade inverters with 3 three-phase inputs per level, as in [1], equal rectifier currents occur automatically when using carrier based PWM. Fig. 4 shows one such setup with threephase inputs for each module. Each row of modules is fed from the same three phase voltage, although each one is isolated. Each module in a phase leg outputs a high frequency PWM voltage with the same rms voltage. When the output of each module is added together, they create the multilevel phase voltage. Since each module in a phase is in series, all the modules in that phase have the same current flowing through them, thus all the modules in that phase are putting out the same amount of real and reactive power.

Figure 2. Cascaded inverter system with single phase module inputs.

The design goal for this project is a 1 MVA, 6000V, three phase ASD. Utilizing the 24-pulse topology requires that each phase consists of 4 inverter modules. The required dc link voltage for each module is then about 1250V, if third harmonic injection is not considered. In order to use standard 1200V IGBTs, an H-bridge inverter would not work. To extend the voltage rating of each inverter module, a neutral point clamped (NPC) inverter is used instead of an Hbridge. The number of voltage levels an NPC inverter is able to produce is the same as two H-bridge inverters connected in series. The availability of extra levels allows the output voltage to use fundamental frequency switching at high modulation indices, as opposed to carrier based PWM, to produce a staircase voltage that closely approximates a sine wave with a THD less than 5% when all levels are used. Fig. 3 shows the structure of the NPC used for this project. Since the NPC is a multilevel inverter, the ASD system topology is referred to as a cascaded multilevel inverter.

Figure 4. Cascaded inverter system with three phase module inputs.

Since each module in a phase outputs the same rms voltage, and each phase leg outputs a balanced voltage, each set of three modules in a row (e.g., modules A1, B1, and C1) outputs a balanced voltage with balanced currents flowing through them. When the total real powers from each module with the same input voltage phase are added up, the sum is essentially a constant power with a high frequency ripple, just like a standard 6 switch inverter. With this topology, the front end works almost exactly like a 24-pulse rectifier, regardless of output voltage frequency.
Figure 3. NPC inverter structure.

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When using a phase shifting transformer with 12 single phase secondaries instead of 12 three phase secondaries, the almost perfect 24-pulse operation is not always achieved. The main difference with using single phase inputs is that the output voltage frequency now has a profound effect on the input current THD. The output power, Po, of each module can be characterized by

Po = V sin( wo t ) * I sin(( wo t ) ),

(1)

where wo is the output frequency in radians, is the voltage phase, and is the power factor angle, t is time in seconds, and V and I are amplitudes of the voltage and current, respectively. To see how the output frequency affects the input current, the energy output by the NPC inverter module for each rectifier recharge cycle period must be calculated, as in
(i +1) / 120

Figure 5. Input current with 6 Hz envelope.

IV.

EQUAL POWER CRITERIA

i / 120

cos( ) , Po dt = 2 VI 120

(2)

with
w (i + 1) w i sin(2( o ) + ) sin(2( o ) + ) 120 120 . = 2wo 2wo

(3)

As previously stated, two of the benefits of using a multilevel inverter are low switching frequency and redundancy. The ability to switch at a low frequency is due to the ability of the inverter to output many smaller levels. At high modulation indices, the inverter outputs a staircase waveform that has very low THD while the IGBTs only switch at the fundamental frequency of the output [7], as shown in Fig. 6. At low modulation indices, where multilevel PWM is used, only a few levels of voltage might be used and the redundancy of the inverter can be utilized. By interleaving the PWM pulses between each module, the module switching frequency is a fraction of the total output switching frequency [8]. For the proposed cascaded multilevel inverter, each phase can output 17 total voltage levels; 8 positive, 8 negative, and zero. At full power, each phase leg will output voltage with amplitude of 8 levels. Fig. 6 shows the basic idea of what each module outputs. Adding each module voltage together will result in the phase voltage.

The 1/120 term in the integral is the time between the beginnings of the rectifier charge pulses. Only when the output frequency is the same as, or an integer multiple of, the rectifier input frequency do the sine terms in (3) cancel and =0. For output frequencies less than the rectifier input frequency, the exists and thus effects the input current THD. This output frequency dependency has a very profound effect on the assignment of which secondary phase from the transformer powers which inverter module. Originally, all secondaries that predominately used phase a windings (a22.5, a7.5, a-7.5, a-22.5) powered the 4 phase a modules of the cascaded inverter. Since those 4 modules were instantaneously putting out roughly the same amount of real power, the lower order harmonics of the current on the primary side of the transformer were significantly reduced. Since each of the windings connected to the phase a modules were not only from phase a, the lower order harmonics were not perfectly cancelled. The most visible effect of the output frequency was seen when the output frequency was low. The power output of any single phase voltage is at twice the frequency of the voltage. As the output power fluctuates, so does the amplitude of the primary current, creating an envelope effect around the primary current at the frequency of the output voltage. Fig. 5 shows how the primary transformer current amplitude creates an envelope of 6 Hz at an output frequency is 6 Hz, while the power fluctuates at 12 Hz.

Figure 6. Module output waveforms (left) and output phase voltage (right).

Using the constant V/Hz principle, full output power will occur at rated voltage, current, and speed. Since each module outputs the same rms current with the same power factor, only the fundamental voltages need to be equal. However, by looking at the waveforms of Fig. 6, the rms voltages of the modules are not equal. In fact module 1 has the lowest rms voltage and module 4 has the highest rms voltage. The simple solution taken is to subtract voltage from the modules with high rms voltage and add it to the modules with low rms voltage, with the restraint that the total output phase voltage must not change. Fig. 7 shows this solution, with some voltage subtracted from modules 3 and 4 and added to 1 and 2, thus equalizing the output voltage of each module.

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Figure 7. Module voltages modified to have the same rms value.

Fig. 9 shows the output and input voltages and currents for the 60 Hz output case. The input current waveforms are shown to be sinusoidal with little harmonic effects present. Fig. 10 shows the harmonics content of the input current. The zoomed in current harmonic spectrum, with fundamental amplitude of 85.3A, shows that although the lower order harmonics have been greatly reduced, they have not been eliminated, even with balanced voltages and transformer reactances. Since the output voltage is not modulated at a high frequency, the instantaneous rms voltage is not the average rms voltage, thus introducing some small errors into the harmonics cancellation. The THD is still 3.6%, and with such low line and transformer impedance, this is worst case. Also of note is that the input power factor is very high regardless of the output power factor.

V. SIMULATION RESULTS Simulations were carried out for 2 extreme cases of output voltage and frequency. The system is a rated at 1MVA and 6000V, and has a 3% transformer reactance with no transmission line impedance. The test load has a power factor of 0.6. Fig. 8 shows the waveform voltages of the 4 modules for phase a, and shows how voltage has been taken from modules A3 and A4 and has, unnoticeably, been added to A2 and A1, respectively.

Figure 9. Voltage and current waveforms for the ASD output and input during 60 Hz operation.

Figure 10. Harmonic spectrum of the input current at 60 Hz output.

Fig. 11 shows the output and input voltages and currents for the 6 Hz output case. The 6 Hz input current waveforms show the effect that the output frequency has on the harmonics cancellation. Since the frequency is 10 times lower, so is the output voltage. Interleaved PWM is used which equally uses the 4 modules in a phase and keeps each module, in a phase at least, outputting equal power. The input current THD is about 30%, which in itself seems large, but considering that the current is 10 times smaller, the actual harmonic current being fed into the grid is less than at full power.
Figure 8. Modules A1-A4 waveform voltages.

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Figure 13. 50 Hz motor operation waveform.

Figure 11. Voltage and current waveforms for the ASD output and input during 6 Hz operation.

Fig. 14 shows experimental waveforms with the motor operating at 6 Hz unloaded, so the motor current is again almost completely inductive. The motor current looks like it is in phase with the voltage because it is from a different phase.

Figure 12. Harmonic spectrum of the input current at 60 Hz output.

VI.

EXPERIMENTAL RESULTS

A 6000V, 1MVA cascaded multilevel inverter prototype has been built for testing, but with only a 12-pulse transformer setup using a variac, 480V/4160V step-up delta and wye transformer to get 30 of phase shift, and 12 single phase 4160V/930V transformers to get the required number of isolated sources. The test load is a 4160V, 800kW induction motor. Fig. 13 shows experimental waveforms with the motor operating at 50 Hz unloaded, thus all motor current is magnetizing current and is almost completely inductive. Since the load current is mostly inductive the primary input current from the 480V source is low. The input current to the cascaded multilevel inverter shows the 12-pulse rectifier front end is working, since it is starting to approximate a sine wave.

Figure 14. 6 Hz motor operation waveform.

It should be stated that the test setup is quite different from the proposed 24-pulse rectifier. The total inductance of the 12pulse transformer used is quite large compared to the simulated 3% rated inductance of the 24-pulse transformer, due to the use of the variac, step up transformers, and the single phase transformers to create the 12-pulse transformer with enough isolated outputs. That being said, the results agree well with simulations that were run, even though the full 24-pulse rectifier function was not able to be tested. With the electrical advantages of cascaded inverters already having been discussed, it should be noted that one of the significant advantages of using cascaded inverters is due to their flexibility and scalability in manufacturing. Fig. 15 shows

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the 1MVA, 6000V cascaded multilevel inverter prototype. Each cabinet houses one module from each phase leg, allowing the inverter to be scaled up or down depending on the required motor voltage rating.

amount of harmonic current injected into the utility mains remains less than at full power. Of course, an additional rectifier phase leg can be added to each module and three phase inputs can be used. Lower input current THD for the entire operation range would then be traded off with the added cost of the additional transformer windings. REFERENCES
[1] P.W. Hammond, A new approach to enhance power quality for medium voltage AC drives, IEEE Transactions on Industry Applications, vol. 33, pp. 202-208, January/February 1997. IEEE recommended practices and requirements for harmonic control in electrical power systems, IEEE Std 519-1992, 1993 M.L Zhang, Wu Bin, Xiao Yuan, F.A. Dewinter, and R. Sotudeh, A multilevel buck converter based rectifier with sinusoidal inputs and unity power factor for medium voltage (4160-7200 V) applications, IEEE Transactions on Power Electronics, vol. 17, pp. 853-863, November 2002. J.S. Lai and F.Z. Peng, Multilevel Converter - A new breed of Power Converters, IEEE Transactions on Industry Applications, vol. 32, pp. 509-517, May/June 1996. L.M. Tolbert, F.Z. Peng, and T.G. Habetler, Multilevel Converter for Large Electric Drives, IEEE Transactions on Industry Applications, vol. 35, pp. 36-44, January/February 1999. J. Rodriguez, J.S. Lai, and F.Z. Peng, Multilevel inverters: a survey of topologies, controls, and applications, IEEE Transactions on Industrial Applications, vol. 49, pp. 724-738, August 2002. J. Chiasson, L. M. Tolbert, K. McKenzie, and Z. Du, Control of a multilevel converter using resultant theory, IEEE Transactions on Control Systems Technology, vol. 11, pp. 345-354, May 2003. L.M. Tolbert, Fang Zheng Peng, and T.G. Habetler, Multilevel PWM methods at low modulation indices, IEEE Transactions on Power Electronics, vol 15, pp 719-725, July 2000.

[2] [3]

[4]

[5]

[6] Figure 15. Cascaded multilevel inverter prototype.

[7]

VII. CONCLUSION A cascaded multilevel inverter with a 24-pulse rectifier inspired front end has been presented. The transformer used to supply the necessary isolated sources has been designed to have the minimum number of windings, thus reducing total cost. The input current THD is limited to under 5% under full load and the THD is 30% at 10% load. Although the THD dramatically increases at lower output frequencies, the total

[8]

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