AUTOMATIC TELLER

MACHINE FOR
VISUALLY IMPAIRED
MUTHYAMMAL ENGINEERING COLLEGE

SUBMITTED BY
CONTACT NO:
7418128674

S.Monish Kumar,
(monishkumar.17@gmail.com).
T.Santhosh Kumar,
(santhoshgoolyy@gmail.com).

ABSTRACT

also helps them to hear a clear recorded

This paper is designed in a

voice for any transactions in ATM. Its

manner which enhances the social

more secure when head phone is

awareness and even leads physically

introduced to maintain security. This

challenged people can come across the

system can also be used by the aged

improvement in current technologies.

people and normal people

We here by introduce this system for the

gifted

people

to

operate

in

their

EMBEDDED SYSTEM

convenience. It is a secure method of

An embedded system is a

performing financial transactions in a

special-purpose computer controlled

public place without the need from

electro-mechanical system in which

others. There is no need to carry cash in

the

their hands.

encapsulated

compared

ATM is safer when

with

ordinary

banking

transaction.

computer
by

is

completely

the

device

it

controls. An embedded system has

specific requirements and performs

In normal ATM,

pre-defined tasks, unlike a general-

all the functions are performed through

purpose personal computer. The

text format and balance amount is in the

core of any embedded system is a

form

microprocessor,

of

printed

format.

Visually

programmed

to

impaired cant recognize those formats.

perform a few tasks (often just one

For that Braille keypad is used in the

task).

place of normal keypad. This project

BLOCK DIAGRAM OF ATM FOR VISUALLY IMPAIRED

LCD

ATM CARD
(EEPROM)

PIC
16F877A

CHIPCORDER
(ISD 2560)

4
7
A

5
8
0

6
9
B

HEAD PHONE

Braille keyboard

ATM card (EEPROM card) is

BLOCK DIAGRAM DESCRIPTION
AND EXPLANATION

provided to the visually impaired and by

inserting it into card reader to check

Our aim is to make the proper use

their identification. PIC can identify the

of ATM for visually impaired. They are

entered user is blind or normal people by

in need to perform money transactions

the user number which is stored in

like money withdrawal and Balance

EEPROM. For more security, the LCD

checking. Normal people can perform

will turns OFF for the blind people.

these transactions with the help of

Liquid Crystal Display.

With

the

help

of

Braille

(specially designed for the visually

impaired) keypad they can enter their pin

the amount, the controller makes sure

number. The controller checks whether

whether the amount is sufficient to

the typed pin number is matched with

withdraw or not. If it is insufficient it

the user ID and if it is not matched it will

will say that the amount is insufficient.

ask to repeat the process once again with

The typed amount is less than the

the help of audio interface.

savings amount and minimum balance

Now the visually impaired can

amount, the money withdrawal takes

hear the passage which is stored in CHIP

place. After the money transaction the

CORDER, whether they are going to

amount is reduced from the savings

check the balance or money withdrawal.

account of the customer.

This can be accessed by pressing

1 for balance
checking and
2 for money
withdrawal.

MICROCONTROLLER
A microcontroller is a computer.
All computers - whether we are talking
about a personal desktop computer or a
large mainframe computer or a
microcontroller have several things in
common

CHIP CORDER is interfaced

with

microcontroller.

The

visually

impaired can hear the voice through

head phone. When the key1 is pressed

16F877A PIC
MICROCONTROLLER

the

This device is one of the most

customer needs to check the balance

popular microcontrollers in use today.

amount and it says the balance with the

Appropriately, the term PIC stands for

help of head phone.

Programmable Interface Controller Most

the

controller

recognizes

that,

When the person presses the key

2 the controller performs the money
withdrawal operation. The controller
checks the accounts of the particular
customer and asks the customer to type
the amount for withdrawal. After typing

desktop computers use von Neumann

architecture, which means that programs
and data share a single memory area that
is accessed over a common bus. This
scheme works well for general use
computers but may not be of particular

advantage for microcontrollers. This is

An EEPROM (also called an

one reason that the PIC microcontroller

E2PROM) or Electronically Erasable

uses Harvard architecture. This design

Programmable Read-Only Memory is a

uses separate memory areas and buses

non-volatile

for data and programs.

Harvard

computers and other devices to store

architecture allows the instruction bus to

small amounts of volatile (configuration)

be a different width than the data bus.

data. When larger amounts of more

According to Microchip instruction can

static data are to be stored (such as in

execute while the next one is being

USB flash drives) other memory types

fetched, all while data memory is

like flash memory are more economical.

storage

chip

used

in

simultaneously being accessed.

Pin Diagram of 16F877A

IC93C56 EEPROM
General description
The AT93C46/56/66 provides
1024/2048/4096 bits of serial electrically
erasable

programmable

memory

(EEPROM)

read
organized

only
as

64/128/256 words of 16 bits each.

When the ORG pin is connected
to VCC and 128/256/512 words of 8 bits
each when it is tied to ground. The
Fig. no: 1.2

device is optimized for use in many

industrial and commercial applications
where low power and low voltage

EEPROM

operations are essential.

The AT93C46/56/66 is enabled
through the Chip Select pin (CS), and

accessed via a 3-wire serial interface

Fig. no: 1.3

consisting of Data Input (DI), Data

Output (DO), and Shift Clock (SK)

Upon receiving a READ instruction at

DI, the address is decoded and the data
is clocked out serially on the data output
pin DO. The WRITE cycle is completely
self-timed and no separate ERASE cycle
is required before WRITE. The WRITE

Pin Diagram

cycle is only enabled when the part is in

the ERASE/WRITE ENABLE state.
When CS is brought high following
the initiation of a WRITE cycle, the DO
pin

outputs the READY/BUSY status of the

part.

This is one type of serial

communication module in the PIC. For
writing into the EEPROM initially the

3.2.3 CONNECTIONS BETWEEN

SPI initialization has to be done.

EEPROM AND PIC 16F877A

This is the module into which we
permanently write the user number, PIN
number

and

balance

amount.

The

EEPROM is an SPI module i.e. special

peripheral interface module.

We have connected four pins of

PORT C for specific purposes such as
1. Port C, 3rd pin for clock signal.
2. Port C, 5th pin for data output.
3. Port C, 4th pin for data input.
4. Port E, 2nd pin for chip select.

BRALLIE KEYBOARD:

VCC

10

RE2

CS

18
PIC 16F877A
24

SCK

SK

23

SD0

D1

RE2
SDI

D2

8
7
93C56

Braille can be seen as the world's

first binary encoding scheme for
representing the characters of a writing
system for visually impaired.
CONNECTION DIAGRAM

Fig. no: 1.5

3. Encode the key press(produce a

standard code for the press key)
The three tasks can be done with
hardware, software, or a combination of
the two, depending on the application.
We will first show you how they can be
done with software, as might be done in
a microprocessor-based grosery scale
where the microprocessor is not pressed
for time. Later we describe some
hardware devices which do these tasks.
The rows of the matrix are
connected to four output port lines. The
column lines of the matrix are connected
to four input-port lines. To make the
program simpler, the row lines are also

Description

connected to four input lines.

In most keyboards, the key

When no keys are pressed, the

switches are connected in a matrix of

column lines are held high by the pull-up

rows and columns. We will use simple

resistors connected to +5v. Pressing a

mechanical switches for our examples

key connects a row to a column. If a low

here, but the principle is the same for

is output on a row and key in that row is

other

Getting

pressed, then the low will appear on the

meaningful data from a keyboard such as

column which contains that key and can

this requires the following three major

be detected on the input port. If the row

tasks

and the column of the pressed key is

types

of

switches.

known,

then

it

can

convert

this

1. Detect a key press

information into any code to represent

2. Debounce the key press

that key. An easy way to detect if any

key in the matrix is pressed is to output

columns are read. If none of the columns

0's to all the rows and

is low, the pressed key is not in that row,

then check the columns to see if a

so the low is rotated to the next row and

pressed key has connected a low to a

the columns are checked again.

column. First output lows to all the rows

The process is repeated until a

and check the columns over and over

low on a row produces a low on one of

until the columns are all high. This is

the columns. The pressed key then is in

done to make sure a previous key has

the row which is low at that time. The

been released before looking for the next

byte read in from the input port will

one. In standard keyboard terminology,

contain a 4-bit code which represents the

this is called two-key lockout. Once the

row of the pressed key and a 4-bit code

columns are found to be all high, the

which represents the column of the

program enters another loop, which

pressed key.

waits until a low appears on one of the

columns, indicating that a key has been
pressed. This second loop does the
detect task for us. A simple 20-ms delay
procedure then does the Debounce task.

CHIP CORDER
INTRODUCTION

After the Debounce time, another

Chip Corder is a voice IC used to

check is made to see if the key is still

record audio signals. In this project it

pressed. If the columns are now all high,

plays the major role. Visually impaired

then no key is pressed. If any of the

can hear a clear recorded voice with the

columns

the

help of this IC. Winbonds ISD 2560 is

assumption is made that it was a valid

an IC which is capable of recording data

keypress.

of 60 seconds.

are

still

low,

then

The final task is to determine the

OPERATIONAL MODES

row and column of the pressed key and

The ISD 2560 is designed with

convert this row and column information

several built in operational modes that

to the hex code for the pressed key. To

provides maximum functionality with

get the row and column information, a

minimum external components. The

low is output to one row and the

modes are accessed via the address pins

& mapped beyond the normal message

address range. There are two important

M5

considerations for using operational

modes.

CE level

message
Allows

activated

message

M6
All operations begin initially at
address 0 of its memory. The

Push

pausing
Simplified

Button

device

control

interface

address pointer is resets to 0when

the device is changed record to
playback.

Operational modes description

Operational modes are executed

M0 and M6 modes are more

when CE goes LOW. This mode

convenient

to

interface

with

remains in effect until the next

microcontroller for record and playback

LOW going CE signal ,at which

applications.

point the current modes are

sampled & executed

M0-message cueing
It allows the user to skip through
messages, without knowing the actual

Various modes
Mode
M0

address of each message. Each CE pulse

Function
Message

Typical use
Fast

cueing

forwarding

causes the internal address pointer to skip

to the next message. This mode is used for
playback only.

through
M1

Delete EOM

message
EOM at the
end of last

M2

Not

M3

applicable
Looping

M4

Consecutive
addressing

message
Reserved

M6 Push Button mode

It
external

is

designed

circuitry

and

to

minimize

components,

thereby reducing system cost. In order to

configure the device in M6 mode, the

Continuous

two MSB bits must be HIGH and M6

playback

mode pin must also be HIGH. When this

from addr 0
P/R multiple

Operational mode is implemented, three

consecutive

of the pins on the device have alternative

or a record cycle is in progress and a

functionality as given

HIGH going pulse is observed on PD,

the current cycle is terminated and the

CE^

Start/Pause Push-

Button (low pulse activated)

PD

the beginning of the message space.

Stop/reset Push-

Button (high pulse activated)

EOM^

address pointer is reset to address zero,

EOM^ (RUN)
In push button operational mode

Active HIGH run

indicator

EOM^ becomes an active HIGH run

signal which can be used to drive an

CE^ (START/PAUSE)
In push button operational mode,
CE^ acts as low going pulse-activated

LED or other external device. It is HIGH

whenever a record or playback operation
is in progress.

START/PAUSE signal. If no operation

is currently in progress, a LOW-going
pulse on this signal will initiate a
CONCLUSION

playback or record cycle according to

the level on the P/R^ pin. A subsequent
pulse on the CE^ pin, before an EOM^ is

Our project ATM for

reached in playback or an overflow

visually impaired is designed in a

condition occurs, will pause the current

manner which enhances with social

operation, and the address counter is not

awareness and even leads physically

reset. Another CE^ pulse will cause the

challenged people can come across the

device to continue the operation from the

improvement in current technologies.

place where it is paused.

We here by introduce this system for the

gifted

people

convenience.
PD (STOP/RESET)

to
If

operate
Banks

in
starts

their
to

implement this latest feature, this project

In push button operational mode,

gains more importance and there is a

PD acts as a HIGH going pulse-activated

chance for further enhancements and

STOP/RESET signal. When a playback

developments in the future.