Requirement of driver vigilance system Review of previous study General system architecture Experimental result Conclusion
REQUIREMENT
In europe,statistics show that 10% to 20% accidents are caused due to driver with less vigilence level. It is caused by fatigue,distraction. It involves single vehicle and sober driver travelling alone. As assistant system for comforts,navigation increase inside car,distraction from more basic task-driving is observed.
PREVIOUS STUDY
MIT SMART CAR ASV(ADVANCE SAFETY VEHICLE)BY TOYOTA TCD(TECH CO DRIVER)SPANISH SYSTEM ALL ABOVE MENTION SYSTEMS ARE INTRUTIVE-AS THEY REQUIRE ELECTRODES TO BE ATTACHED TO THE DRIVER CAUSING ANNOYANCE. DAIMLER CHARYSLER SYSTEM BASED ON VEHICLE SPEED,STEARING ANGLE,VEHICLE POSITION RELATIVE TO ROAD DIMENSION.
SYSTEM ARCHITECTURE
MAJOR MODULES: Image acqusition Pupil detection Visual behaviour Driver inattentiveness indicator software
IMAGE ACQUISITION
IR leds are used to brighten the users face IT produce bright pupil effect LEDS are mounted around camera axis. Ring size is choosen such that inner ring produce bright pupil effect while outer ring produce dark pupil effect. Get difference bet. two image and get pupil.
VISUAL BEHAVIOUR
EYELID MOVEMENT EYE CLOSURE DURATION BLINK FREQUENCY FIXED GAZE EYE CLOSER/OPENING SPEED PERCLOS(PERCENTAGE CLOSERE) FACE POSE DEGREE OF EYE OPENING IS CHARACTERIZED BY PUPIL SHAPE AS EYES CLOSE,THE PUPILS START GETTING OCCLUDED BY EYELID THIRE SHAPE GET MORE ELLIPTICAL.
CONCLUSION
WE DEVELOPED NONINTRUITIVE SYSTEM FOR DRIVER VIGILENCE. WE FOCUS ON SIX PARAMETERS PERCLOS,EYE
CLOSURE DURATION, BLINK FREQUENCY, NODDING FREQUENCY, FACE POSITION, AND FIXED GAZE. SYSTEM WORKS SATISFACTORILY AT MIDNIGHT AND DURING LESS LIGHT. IT PERFORMANCE IS DECREASE DURING DAY TIME AND PERSON WITH SUNGLASSES.
Assignment
[Weightage 10%]
Task 1: last date for Task-1 submission: on or before 05-10-2013 [batch wise] Design a driver vigilance system. Write the specification of the system. Develop a system level model in C language as it is a universal language. Task 2: [will be announced later] Estimate the performance of the code on PowerPC.(Do profiling) Estimate which part of the design should be migrated to HW on the FPGA. Interface the migrated design to bus. Write the driver/software. Document the result. Input : set of images of the driver