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II B.Tech Supplimentary Examinations, Aug/Sep 2008
PULSE AND DIGITAL CIRCUITS
( Common to Bio-Medical Engineering, Electronics & Control Engineering,
Electronics & Computer Engineering and Instrumentation & Control
Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explain
its operation.
(b) What is meant by comparator and explain diode differentiator comparator
operation with the help of ramp input signal is applied. [6+10]
5. (a) What type of Voltage input is required to obtain a linear current sweep?
(b) The transistor bootstrap circuit shown in Figure 5 has the following parame-
ters VCC = 10 V, VEE = -10V, RB = 30 K ohms, C=0.002 µF, C1 =0.25µF
and CB may be taken as arbitrarily large. The input gate has an amplitude
of 1V and a width of 50µs. The transistor parameters are hF E = hf e = 60,
hie =2kohms, 1/hoe = 10 K ohms, hre = 10−4 . ICBO = 0, and the forward
biased junction voltages are negligible. The diode is ideal.
i. Plot the gate voltage, collector current iC1 , and the output voltage Vo.
ii. Evaluate the sweep speed and amplitude of the sweep at its maximum
value
iii. Find time it takes to discharge C at the end of the sweep,
iv. Find peak voltage change across C1 and the time required to replace the
lost charge
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Code No: R05221101 Set No. 1
v. Find slope error. [6+10]
Figure 5
6. (a) Explain the factors which influence the stability of a relaxation divider with
the help of a neat waveforms.
(b) A UJT sweep operates with Vv = 3V, Vp=16V and η=0.5. A sinusoidal
synchronizing voltage of 2V peak is applied between bases and the natural
frequency of the sweep is 1kHz, over what range of sync signal frequency will
the sweep remain in 1:1 synchronism with the sync signal? [8+8]
7. (a) What is sampling gate? Explain how it differ from Logic gates?
(b) What is pedestal? How it effects the output of a sampling gates?
(c) What are the drawbacks of two diode sampling gate? [6+6+4]
8. The parameters in the diode OR circuit of figure 8 shown are V(0) = +12V, V(1)
= -2V, Rs =600 ohms, R =10K, Rf = 0, Rr =α and Vr =0.6 V Calculate the two
levels if one input is excited and if
(a) VR =+12V
(b) VR = +10V
(c) VR = +14V
(d) VR =0V.
For which of these cases is the OR function satisfied. Derive the equation used in
this problem. [16]
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Code No: R05221101 Set No. 1
Figure 8
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Code No: R05221101 Set No. 2
II B.Tech Supplimentary Examinations, Aug/Sep 2008
PULSE AND DIGITAL CIRCUITS
( Common to Bio-Medical Engineering, Electronics & Control Engineering,
Electronics & Computer Engineering and Instrumentation & Control
Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆
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Code No: R05221101 Set No. 2
(b) Write the different capacitances which effect on the operation of the sampling
gates. [10+6]
Figure 7
8. (a) What are the basic logic gates which perform almost all the operations in
Digital communication systems.
(b) Give some applications of logic gates.
(c) Define a positive and negative logic systems.
(d) Draw a pulse train representing a 11010111 in a synchronous positive logic
digital system. [4+4+4+4]
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Code No: R05221101 Set No. 3
II B.Tech Supplimentary Examinations, Aug/Sep 2008
PULSE AND DIGITAL CIRCUITS
( Common to Bio-Medical Engineering, Electronics & Control Engineering,
Electronics & Computer Engineering and Instrumentation & Control
Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆
2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explain
its operation.
(b) What is meant by comparator and explain diode differentiator comparator
operation with the help of ramp input signal is applied. [6+10]
4. Germanium transistors with (hF E )min = 40 are used in the fixed-bias flip-flop
with collector catching diodes(following figure 4). The circuit parameters are
VCC =18V.V=VBB =6V, Rc=1.5K, R1 = 5K and R2 = 25K. Neglect the voltage drop
across a forward-biased junction.
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Code No: R05221101 Set No. 3
Figure 4
(a) Verify that if one transistor is cut off, the other is in saturation. Find the
stable-state voltages and currents, including the currents in the two diodes.
(b) What is the heaviest load the binary can drive and still maintain the output
swing in part a? [16]
5. (a) What is a Linear time base generator? Give its Applications
(b) Write the differences between the voltage and current time base generators?
(c) Why the time base generators are called sweep circuits? [6+6+4]
6. (a) What is relaxation oscillator? Name some negative resistance devices used as
relaxation oscillators and give its applications.
(b) With the help of a circuit diagram and waveforms, explain the frequency
division by an astable multivibrator? [8+8]
7. (a) What is sampling gate? Explain how it differ from Logic gates?
(b) What is pedestal? How it effects the output of a sampling gates?
(c) What are the drawbacks of two diode sampling gate? [6+6+4]
8. (a) With the help of circuit diagram explain the purpose of clamping diode in a
positive diode AND gate.
(b) Explain the effect of and diode capacitance on the output pulse of diode AND
gate. [8+8]
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Code No: R05221101 Set No. 4
II B.Tech Supplimentary Examinations, Aug/Sep 2008
PULSE AND DIGITAL CIRCUITS
( Common to Bio-Medical Engineering, Electronics & Control Engineering,
Electronics & Computer Engineering and Instrumentation & Control
Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆
2. (a) Explain the response of the clamping circuit when a square wave input is
applied under steady state conditions.
(b) Explain the effect of diode characteristics on clamping voltage. [8+8]
4. (a) What are the different types of multivibrators? Name them and sketch their
circuits.
(b) Design an astable multi for an o/p amplitude of 15V and square wave frequency
of 500Hz. Assume hF Emin = 50, ICsat = 5mA and VCEsat = 0. [8+8]
5. (a) With the help of a neat circuit diagram and waveforms explain the working
of a transistor Miller time base generator.
(b) Find the component values of a bootstrap sweep generator, given Vcc=18V,
Ic(sat) = 2mA and hfe(min)=30. [8+8]
6. (a) Explain the factors which influence the stability of a relaxation divider with
the help of a neat waveforms.
(b) A UJT sweep operates with Vv = 3V, Vp=16V and η=0.5. A sinusoidal
synchronizing voltage of 2V peak is applied between bases and the natural
frequency of the sweep is 1kHz, over what range of sync signal frequency will
the sweep remain in 1:1 synchronism with the sync signal? [8+8]
7. (a) What is sampling gate? Explain how it differ from Logic gates?
(b) What is pedestal? How it effects the output of a sampling gates?
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Code No: R05221101 Set No. 4
(c) What are the drawbacks of two diode sampling gate? [6+6+4]
8. (a) Why totem pole is used in DTL? Draw the circuit diagram and explain a DTL
gate with this.
(b) Verify the truth table of RTL NOR gate with the circuit diagram of two inputs.
[8+8]
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