CIRCUITS AND

6.002 ELECTRONICS

Inside the Digital Gate

6.002 Fall 2000 Lecture 5 1

 Review
The Digital Abstraction
z Discretize value 0, 1
z Static discipline
meet voltage thresholds

sender receiver
VOH VIH forbidden
VIL region
VOL

Specifies how gates must be designed

6.002 Fall 2000 Lecture 5 2

 Review

Combinational gate abstraction

outputs function of input alone
satisfies static discipline

A B C
A
B C 0 0 1
NAND 0 1 1
1 0 1
1 1 0

6.002 Fall 2000 Lecture 5 3

 For example: Demo
a digital circuit
A A⋅ B
B
D
C

D = (C ⋅ (A ⋅ B ))

3 gates here

„ A Pentium III class microprocessor

is a circuit with over 4 million gates !!

„ The RAW chip

being built at the
Lab for Computer Science at MIT
has about 3 million gates.

6.002 Fall 2000 Lecture 5 4

 How to build a digital gate
Analogy
i tc hes)
l ik e (li ke sw
power taps
supply A B

C
if A=ON AND B=ON
C has H20
else C has no H20

Use this insight to build an AND gate.

6.002 Fall 2000 Lecture 5 5

 How to build a digital gate

OR gate
A

6.002 Fall 2000 Lecture 5 6

 Electrical Analogy

C
A B
V +
–

Bulb C is ON if A AND B are ON,

else C is off

Key: “switch” device

6.002 Fall 2000 Lecture 5 7

 Electrical Analogy
equivalent ckt
Key: “switch” device
in

C =0
in
control out
C
in
out
C=1

3-Terminal device out

if C = 0
short circuit between in and out
else
open circuit between in and out

For mechanical switch,

control mechanical pressure
6.002 Fall 2000 Lecture 5 8
 Consider
VS
RL RL
VOUT + VS VOUT
–
IN
C C
VS = “1”
OUT

VS

VOUT
Truth table for
C =0

C VOUT
VS 0 1
1 0
VOUT
C =1

6.002 Fall 2000 Lecture 5 9

 What about?
Truth table for
VS

VOUT c1 c2 VO
c1 0 0 1
0 1 1
c2
1 0 1
1 1 0

VS Truth table for

VOUT
c1 c2 VO
c1 c2 0 0 1
0 1 0
1 0 0
1 1 0

6.002 Fall 2000 Lecture 5 10

 What about?

can also build compound gates

VS

D
A C D = (A ⋅ B) + C
B

6.002 Fall 2000 Lecture 5 11

 The MOSFET Device
Metal-Oxide
Semiconductor
Field-Effect
Transistor
drain
D

G
gate
≡
S
source

3 terminal lumped element

behaves like a switch
G : control terminal
D, S : behave in a symmetric
manner (for our needs)

6.002 Fall 2000 Lecture 5 12

 The MOSFET Device
Understand its operation by viewing it
as a two-port element —
e c k out k
Ch extboo l
the t s interna
for it ture. D iDS +
r u c iG
s t G vDS
+
vGS S
– –

D D
iDS
G off G on
vGS < VT S vGS ≥ VT S
VT ≈ 1V typically

“Switch” model (S model) of the MOSFET

6.002 Fall 2000 Lecture 5 13

 Demo

Check the MOS device

on a scope. i DS

+
vDS
+
vGS
– –

iDS

vGS ≥ VT

vGS < VT
vDS
iDS vs vDS

6.002 Fall 2000 Lecture 5 14

 A MOSFET Inverter

VS = 5V

RL
vOUT
B
A IN

A B

Note the power of abstraction.

The abstract inverter gate representation
hides the internal details such as power
supply connections, RL, GND, etc.
(When we build digital circuits, the
and are common across all gates!)

6.002 Fall 2000 Lecture 5 15

 Example
vOUT
5V vIN vOUT

0V V v IN
T =1V 5V
The T1000 model laptop desires gates that satisfy
the static discipline with voltage thresholds. Does
out inverter qualify?
VOL = 0.5V VIL = 0.9V
VOH = 4.5V VIH = 4.1V
sender receiver
1: 5 5 1
4.5 V 4.1
OH VIH
0.9 VIL
0.5 VOL
0: 0 0 0
Our inverter satisfies this.
6.002 Fall 2000 Lecture 5 16
E.g.:
Does our inverter satisfy the static
discipline for these thresholds:

VOL = 0.2V VIL = 0.5V

yes
VOH = 4.8V VIH = 4.5V
x
VOL = 0.5V VIL = 1.5V
no
VOH = 4.5V VIH = 3.5V

6.002 Fall 2000 Lecture 5 17

 Switch resistor (SR) model
of MOSFET
…more accurate MOS model

D D D

G G RON
G
S vGS < VT S vGS ≥ VT S

e.g. RON = 5 KΩ

6.002 Fall 2000 Lecture 5 18

 SR Model of MOSFET
D D D

G G RON
G
S vGS < VT S vGS ≥ VT S

MOSFET MOSFET
S model SR model

vGS ≥ VT
vGS ≥ VT
iDS iDS 1
RON

vGS < VT vGS < VT

vDS vDS

6.002 Fall 2000 Lecture 5 19

 Using the SR model
VS
RL RL
vOUT + VS vOUT
–
IN
C C
VS = “1”
OUT

VS Truth table for

RL
vOUT
C VOUT
RON
C =0
0 1
1 0

VS
RL Choose RL, RON, VS such that:
vOUT V R
C =1 RON v = S ON ≤ V
OUT R +R OL
vGS ≥ VT ON L

6.002 Fall 2000 Lecture 5 20