Page 320-1
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02)
Why Differential Output Op Amps? Cancellation of common mode signals including clock feedthrough Increased signal swing
v1 v2
A t -A A t -A
v1-v2
2A t -2A
Fig. 7.3-1
vin +
+ -
Page 320-3
Common Mode Output Voltage Stabilization If the common mode gain not small, it may cause the common mode output voltage to be poorly defined. Illustration:
vod VDD
0
VSS CM output voltage = 0 vod VDD
0
VSS vod VDD
0
VSS
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02)
M8
M6 M4
Cc
vo1 vi1
Rz
M3
Rz
Cc
vi2
vo2
M1 M5 VSS
M2
M9
+ VBN -
M7
Fig. 7.3-3
Output common mode range (OCMR) = VDD+ |VSS| - VSDP(sat) - VDSN(sat) The maximum peak-to-peak output voltage 2OCMR Conversion between differential outputs and single-ended outputs:
+ + vid - + -
+ vod -
CL
+ + vid - -
+ -
Fig. 7.3-4
ECE 6412 - Analog Integrated Circuit Design - II
+ vo2 -
+ vo1 2CL
2CL
Page 320-5
M4 M6
M5 M7
R1
vo2
vi1
M1
M2
vi2
vo1
M3 VBias
VSS
M12 M9 M11
Fig. 7.3-5
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02)
M3
M13
M4 M6
M14
M7 vo1
Cc
Rz
vi1
Rz Cc
M1 M5 VSS M2
vi2
vo2
M9
M10
VBN -
M12
M8
Fig. 7.3-6
Comments: Able to actively source and sink output current Output quiescent current poorly defined
Page 320-7
M4 M6 vi1
M20 M19
M5
M7
R1
vo2
M16
Rz
Cc
M1
M2
vi2
M18
Rz
Cc
vo1
M17
M8
M3
VSS
VBias
M9
Fig. 7.3-7A
Note that the followers M11-M13 and M10-M12 are necessary for level translation to the output stage.
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02)
vo1
vi1
M22
M1 M2
vi2
M19 R1
vo2
M16
M17
VBias
M12
M18
M14
VSS
Fig. 7.3-8
Page 320-9
Cross-Coupled Differential Amplifier Stage One of the problems with some of the previous stages, is that the quiescent output current was not well defined. The following input stage solves this problem.
i1
VGS1
i2
VGS2
vi1
VSG3
vi2
VSG4
Fig. 7.3-9
Operation: Voltage loop vi1 - vi2 = -VGS1+ vGS1 + vSG4 - VSG4 = VSG3 - vSG3 - vGS2 + VGS2 Using the notation for ac, dc, and total variables gives, vi2 - vi1 = vid = (vsg1 + vgs4) = -(vsg3 + vgs2) If M1 = M2 = M3 = M4, then half of the differential input is applied across each transistor with the correct polarity. gm1vid gm4vid gm2vid gm3vid and i2 = - 2 = - 2 i1 = 2 = 2
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02) P.E. Allen - 2002 Page 320-10
Class AB, Differential Output Op Amp using a Cross-Coupled Differential Input Stage
VDD
M9 M26 M13
vi1
M7 M8
M25 vi2 M24 R1
M10
M1 M2
vo1
M21 M19
R2 M27 M28 + VBias -
M22
M3 M4
M14 vo2
M15
M20 M16
M17
M18
M23 M12
Fig. 7.3-10
M11
M5 VSS
M6
Quiescent output currents are defined by the current in the input cross-coupled differential amplifier.
ECE 6412 - Analog Integrated Circuit Design - II P.E. Allen - 2002
Page 320-11
M1
Ro1
vo1
vo2
io2(sink)
Fig. 7.3-11
Operation: M1 and M2 sense the common-mode output voltage. If this voltage rises, the currents in M1 and M2 decrease. This decreased current flowing through Ro3 and Ro4 cause the common-mode output voltage to decrease with respect to VSS.
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02) P.E. Allen - 2002 Page 320-12
VDD + VBP
-
M11
M7
M6 M4
Cc
vo1 vi1
Rz
M3
Rz
Cc
vi2
vo2
M1 M5 VSS
M2
M9
+ VBN -
M8
Fig. 7.3-12
Page 320-13
vo1
M1 M2
vo2
Vocm
I5
M5
Iocm I6
M6
To correction circuitry
VSS
Fig. 7.3-13
Operation: 1.) The desired common-mode output voltage, Vocm, creates Iocm. 2.) The actual common-mode output voltage creates current I5 which is mirrored to I6 . 3.) If M1 through M4 are matched and the current mirror is ideal, then when Iocm = I6 the actual common-mode output voltage should be equal to the desired commonmode output voltage. 4.) The above steps assume that a correction circuitry exists that changes the commonmode output voltage in the correct manner.
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02) P.E. Allen - 2002 Page 320-14
M4 I3 I4
v4 Selfresistances of M1-M4 v2
IC3
MC1
VCM
M1 M5
M2
VSS
Fig. 7.3-13A
This scheme can be applied to any differential output amplifier. Caution: Be sure to check the stability of common-mode feedback loops, particularly those that are connected to op amps that have a cascode output. The gain of the common-mode feedback loop can easily reach that of a two-stage amplifier.
ECE 6412 - Analog Integrated Circuit Design - II P.E. Allen - 2002
Page 320-15
Common Mode Feedback Circuits Continued The previous circuit suffers in performance when the differential output voltage becomes too large and one of the MC2A-MC2B transistors shuts off. The following circuit alleviates this disadvantage:
VDD M3 IBias MC3
Commonmode feedback circuit MC4 IC4 MC2 v3
M4 I3 I4
v4
IC3
MC1
RCM1 v1
RCM2
VCM
MC5 MB
M1 M5
M2
v2
VSS
Fig. 7.3-15New
ECE 6412 - Analog Integrated Circuit Design - II Lecture 320 Differential Output Op Amps (3/27/02)
2
vo1
CMbias vo2
+ vid - -
Operation: 1.) During the 1 phase, both Ccm are charged to the desired value of Vocm and CMbias = Vocm. 2.) During the 2 phase, the Ccm capacitors are connected between the differential outputs and the CMbias node. The average value applied to the CMbias node will be Vocm.
Page 320-17
SUMMARY Advantages of differential output op amps: - 6 dB increase in signal amplitude - Cancellation of even harmonics - Cancellation of common mode signals including clock feedthrough Disadvantages of differential output op amps: - Need for common mode output voltage stabilization - Compensation of common mode feedback loop - Difficult to interface with single-ended circuits Most differential output op amps are truly balanced For push-pull outputs, the quiescent current should be well defined Common mode feedback schemes include, - Unreferenced - Referenced