IEEE TRANSACTIONS ON POWER SYSTEMS, VOL. 19, NO.

3, AUGUST 2004

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A Method for Synchronization of Power Electronic Converters in Polluted and Variable-Frequency Environments
Masoud Karimi-Ghartemani, Member, IEEE, and M. Reza Iravani, Fellow, IEEE
AbstractThis paper presents a new synchronization method which employs an enhanced phase-locked loop (EPLL) system. The operational concept of the EPLL is novel and based on a nonlinear dynamical system. As compared with the existing synchronization methods, the introduced EPLL-based synchronization method provides higher degree of immunity and insensitivity to noise, harmonics and other types of pollutions that exist in the signal used as the basis of synchronization. The salient feature of the EPLL-based synchronization method over conventional synchronization methods is its frequency adaptivity which permits satisfactory operation when the centre frequency of the base signal varies. The proposed EPLL-based method of synchronization is also capable of coping with the unbalanced system scenarios. Structural simplicity of the EPLL-based method greatly simplifies its implementation in digital software and/or hardware environments as an integral part of a digital control platform for power electronic converters. The primary application of the proposed synchronization method is for the distributed generation units, e.g., wind generation systems, which utilize power electronic converters as an integral part of their systems. Index TermsDistributed generators, phase angle estimation, synchronization, PLL, power systems.

I. INTRODUCTION

NTERFACING power electronic converters to the utility grid, particularly at medium and high voltages, necessitates proper synchronization for the purpose of operation and control of the power electronic based apparatus [1], [2]. The synchronization is usually carried out with respect to the phase angle of voltage (or current) signal(s) of the utility system. The signal(s) used for synchronization are often corrupted by harmonics, voltage sags and swells, commutation notches, noise, phase angle jump and unbalanced operating conditions [3][8]. A desired synchronization method must detect the phase of the utility signal as fast as possible while adequately eliminating the impacts of corrupting sources on the signal. The synchronization process should be updated not only at the signal zero-crossing, but continuously over the fundamental period of the signal [1]. The need for improvements in the existing converter synchronization approaches stems from rapid proliferation of distributed generation (DG) units in electric networks. A converter-interfaced DG unit, e.g., a wind generator unit, a

photovoltaic-based unit and a micro-turbine-generator unit, under both grid-connected and micro-grid (islanding) scenarios requires converter synchronization under polluted and/or variable -frequency environment. This paper presents a new synchronization method which not only demonstrates a superior performance as compared with the existing methods with respect to corrupting factors of the signal, it also provides frequency adaptivity and tolerance to unbalanced system conditions. The main building block of the synchronization method is an enhanced phase-locked loop (EPLL) system which operates as a nonlinear dynamical system [9]. Another salient feature of the proposed method is the simplicity of structure which renders itself for digital implementation in both software environment, e.g., a DSP, or a digital hardware environment, e.g., FPGA or ASIC, as an integral part of a digital control platform for power electronic converters. The paper is organized as follows. Section II is devoted to a brief study of the existing synchronization schemes. They are categorized into two general branches of open-loop and closed-loop strategies. Principles of operation of four open-loop and two closed-loop methods are explained and their advantages and shortcomings are described. The proposed method of synchronization is presented in Section III. Section IV is devoted to overview the EPLL system which is the main building block of the proposed synchronization method. Performance of the method is investigated with reference to different conditions and its advantages over the existing methods are shown in Section V. Some properties of the method which make it advantageous for digital implementation are explained in Section VI. Section VII provides a comparison summary and conclusions are stated in Section VIII. II. EXISTING METHODS OF SYNCHRONIZATION This section outlines various existing methods of synchronization. They are categorized into open-loop and closed-loop methods. Open-loop methods directly estimate phase angle of the voltage based on -frame signals. In closed-loop methods, while the -frame voltages are being processed, the estimation of the phase is adaptively updated through a loop mechanism. This loop is aimed at locking the estimated value of the phase angle to its actual value. A. Open-Loop Synchronization Methods In an ideal case that no distortion/unbalance is present, represent the grid voltages for which the transformed

Manuscript received August 20, 2003. The authors are with the Centre for Applied Power Electronics (CAPE), Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON M5S 3G4, Canada (e-mail: masoud@ele.utoronto.ca; iravani@ecf.utoronto.ca). Digital Object Identifier 10.1109/TPWRS.2004.831280

0885-8950/04$20.00 2004 IEEE

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Fig. 1. LPF-based open-loop method of synchronization.

Fig. 2. Block diagram of a single-phase PLL system.

signals are expressed as . The open-loop synchronization methods stem from the fact that and voltages are in-phase with and orthogonal to the grid voltage , respectively, and they hold the same amplitude. Appropriate filtering processes are used to reduce undesired effects of distortions. Three methods are described in this section. 1) LPF-Based Method: In this method (Fig. 1), the utility voltages are transformed to . Then ordinary low-pass filters (LPFs) are used to remove distortion. The filtered signals are normalized and passed through the rotation matrix to compensate for the phase lag due to the LPFs. In designing LPFs, a tradeoff should be made between robustness and transient convergence speed. Smaller cut-off frequency of the filters results in less distortion in the estimated angle. However, this results in a slower rate of convergence. A major deficiency of this method is its sensitivity to the grid frequency deviations [1]. If the center frequency varies, there is no control on the phase lag introduced by the LPFs and hence its full compensation is not possible. Another shortcoming of the LPF-based method is its sensitivity to voltage unbalance. 2) Space Vector Filter (SVF)-Based Method: The SVF is a -components of the low-pass filter based on the fact that the grid voltage are mutually dependent. The SVF is formulated as follows [1]: (1) where in which is the 2 2 identity matrix, and is called the forgetting factor. A closer value of to one provides better filtering of the inputs, and therefore, results in less distortion in the estimated phase angle. A SVF-based method can be tuned to provide highly distortion-free estimation. The main drawbacks of this method are sensitivity to the input frequency variations and imbalance. Attempts have been made to modify the SVF-based method to accommodate frequency deviations [1], [10]. Investigations show that the modified SVF-based method is not fully capable of exhibiting the desired performance. Difficulty in precise adjustment and high sensitivity to noise and harmonics are other limitations of this method. 3) Extended Kalman Filter (EKF)-Based Method: The EKF can be used to estimate the state vector of amplitude, frequency, and phase angle of the grid voltage. EKF is capable of estimating the state vector provided that an adequate state-space model is available to represent the actual variations of the state vector. It is not a trivial task to design an EKF which is capable of following variations of the state vector in various distorted environments [1]. An EKF-based method of synchronization is not able to cope with unbalanced input conditions. Internal calculation time of an EKF procedure is relatively long [1].

4) WLSE-Based Method: Another method of synchronization employs the recursive weighted least-squares estimation (WLSE) algorithm [11]. The WLSE-based synchronization method of [11] rejects the impact of negative-sequence and accommodates variations in the frequency. In addition to the threshold and change detection problems, this method exhibits two other shortcomings as: 1) long transient time intervals in detecting frequency changes and 2) the computational problems associated with the LS methods. Moreover, the frequency-varying WLSE-based method is sensitive to noise and distortions. B. Closed-Loop Synchronization Methods A closed-loop method operates based on a closed-loop structure which is regulating an error signal to zero. A well-known strategy is to employ a phase-locked loop (PLL) system [12][15]. Block diagram of a single-phase PLL is shown in Fig. 2. The phase difference between the input and the output signals is measured using a phase detector (PD) and passed through a loop filter (LF). The error signal drives a voltage-controlled oscillator (VCO) which generates the output signal. An intuitive structure for a PD is a multiplier. The output of the LF is a measure of the total phase difference of the two input signals of PD. Ideally, such an error signal is proportional to, or at least a monotonic function of, the total phase difference of the two input signals of PD. 1) Synchronization Based on Three-Phase PLL: The single-phase PLL of Fig. 2 can be extended to a three-phase PLL in conformity with the power system applications. Assume represent the fundamental components of the grid voltand transformed signals ages for which the and are expressed as . A closed-loop control system which regulates to is capable of setting to its actual value . A block diagram is shown in Fig. 3. is based on a small signal analysis in The design of is approximated by . Various methods for which the design of the controller are presented in the literature. The Wiener optimization method which is based on the stochastic characteristics of noise has been reported to provide good results [15]; however, neither a trivial nor an easy methodology to adopt. Method of symmetrical optimum is also used for the [3], [16]. design of A desirable closed-loop system must provide both fast tracking and good filtering characteristics. However, these two features are not simultaneously attainable and a trade-off should always be made between them. A design paradigm

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Fig. 3.

Block diagram of the three-phase PLL system.

Fig. 4. Positive sequence extractor based on all-pass filters with 90-degree phase shift at the center frequency.

should also take into account the PLL environment. More specifically, distortion types, noise level, and the rates of phase and frequency variations should not be overlooked. 2) Extended Three-Phase PLL-Based Method: The major disadvantage of the three-phase PLL is its sensitivity to grid voltage unbalance. Some attempts have been made to extend this method for unbalanced voltages based on the concept of symmetrical components. Although the concept of symmetrical components is originally defined with respect to phasors, one can extend it to the signals as functions of time. The idea is to replace the comwith a phase-shift operator in plex phasor time domain [6]. The phase-shift operator of 90-degree is easier , one to implement [7]. Using can derive the time-domain positive sequence components. The time-domain positive sequence system is defined as (2) where superscript stands for the fundamental component Rewriting (2) in terms of 90-degree phase-shift operator yields

interesting. However, the method of [7] for detecting the instantaneous positive sequence has the following shortcomings. 1) All-pass filters are not frequency-adaptive. Therefore, they can not make appropriate 90-degree phase shift when the frequency varies from its nominal value of . 2) All-pass filters do not block harmonics and distortions. Therefore, the performance of the phase detection scheme to some degree is compromised. A low-pass filter is recommended to be used after -component extraction to reduce the impact of harmonics, [7]. III. PROPOSED METHOD OF SYNCHRONIZATION A block diagram of the proposed method is shown in Fig. 5. The positive sequence component is extracted by the first block and then is passed to the EPLL to estimate its phase angle. In other words, this structure is based on extracting the positive sequence of the input voltages and then extracting the phase angle based on this component. This strategy considers the effect of all three phases of the system while maintaining adequate insensitivity with respect to unbalanced conditions. The block diagram for extracting the positive sequence component is also shown in Fig. 5. This unit is comprised of three EPLLs and arithmetic operations. The EPLLs adaptively extract the fundamental components of the system voltages and their 90-degree phase-shifted versions. The arithmetic blocks receive the fundamental components and the corresponding 90-degree phase-shifted components and calculates the positive sequence component of the utility voltages based on (3). The computational procedure is the same as the computational unit shown in Fig. 4. Advantages of this method with respect to the extended threephase PLL-based method are as follows. The all-pass filters are replaced with EPLLs in the proposed structure. EPLL is an adaptive notch filter whose frequency moves based on the center frequency of the grid. This prevents sensitivity of the method with respect to frequency variations which is a major deficiency of the method of [7]. Moreover, since the EPLL is a bandpass filter rather than an all-pass filter, the extracted positive sequence is highly distortion-free. Indeed, the input signal undergoes two stages of filtering: one in the positive sequence extraction stage and then in the phase estimation stage.

(3) is a 90-degree phase-shift operator. A block diaIn (3), gram of the positive sequence extractor based on (3) is shown in Fig. 4, [7]. This block diagram is a modified version of the one presented in [7]. In [7], (5) does not fully take care of unbalance. More specifically, it ignores the unbalance at some points. The filters in Fig. 4 should be all-pass and generate a 90-degree phase-shift at the center frequency . A simple first-order filter such as can be used for this purpose. The idea of using the positive sequence component for robust phase detection, under unbalanced conditions, is conceptually

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Fig. 5. Block diagram of the proposed method of phase detection.

Fig. 7. Performance comparison of five existing methods and the EPLL-based method in the presence of noise.

Fig. 6.

EPLL Structure.

IV. EPLL SYSTEM This section is devoted to the EPLL of [9] which is used as the building block of the proposed synchronization scheme of this paper. EPLL is well suited for power system applications since it not only provides an output signal whose phase is locked to that of the fundamental component of the input signal, the output signal is also locked to the fundamental component of the input signal in its amplitude and frequency. In other words, EPLL is capable of providing an on-line estimate of the fundamental component of the input signal while following its variations in amplitude, phase, and frequency. In addition to the on-line estimate of the fundamental component, EPLL also provides an on-line estimate of the basic parameters of this component including its amplitude, phase, and frequency. This is the salient feature of EPLL. Another important feature of EPLL is that it provides the 90-degree phase-shifted version of the fundamental component. This is readily done by EPLL since it directly estimates the phase angle of the fundamental component of its input. An implementation of EPLL of [9] is shown in Fig. 6, in accordance with the conventional PLL structure which consists of is compared with its a PD, LF, and VCO. The input signal to generate an error signal extracted smooth version which is used by LF to generate a driving signal for VCO. The basic structure of Fig. 6 has three independent internal , and . Parameter dominantly parameters: controls the speed of convergence of amplitude . Parameters and control the rates of convergence of phase and frequency. A low-pass filter can be incorporated after the integration unit in the VCO to obtain a smoother estimate of the phase angle when the utility signal is distorted. The EPLL is originally applicable to a single-phase signal. All the previous methods, except EKF, are suited only for threephase situations. However, four units of similar EPLL units are

Fig. 8. Performance comparison of five existing methods and the EPLL-based method in the presence of harmonics.

linked together in the proposed synchronization method to build a three-phase structure which is highly immune to distortions and unbalanced conditions. V. PERFORMANCE EVALUATION Performance of the EPLL-based method of synchronization is evaluated by means of a number of simulations. Fig. 7 shows the steady-state error which occurs in phase angle detection due to the presence of noise. For a high signal-to-noise-ratio (SNR) of 0 dB, the error is almost 5 degrees and decreases to less than one degree as SNR goes above 10 dB. Among the existing methods, the LPF-based method generates the largest error while the EKF-based, the PLL-based, the SVF-based, and the LSE-based methods perform better, respectively. Comparing with the conventional three-phase PLL-based method, the proposed method performs almost twice as good. The proposed method provides a highly distortion-free estimate of the phase angle in the presence of harmonic pollution. A set of study results are shown in Fig. 8. The input signal is comprised of a fundamental component and a fifth harmonic component. The amplitude of this harmonic is taken as the variable,

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Fig. 9. Response of the EPLL-based method to a phase jump of 10 degrees at t = 20 ms.

Fig. 11. Response of the EPLL-based method to 50% voltage sag on phases a and b at t = 20 ms.

Fig. 10.

Response of the EPLL-based method to a frequency jump of 5 Hz at Fig. 12. Response of the EPLL-based method to a random voltage sag on all three phases at t = 20 m: (a) input signals and (b) error in estimated phase angle.

t = 20 ms.

and its effect on the steady-state performance is shown. As the parameter varies from zero to 0.4, a maximum error of almost 0.2 degrees is generated by the EPLL-based method. The LSEbased method generates an error which is almost twice. The error associated with the conventional three-phase PLL-based method is around 20 times larger. Effects of jumps in phase and frequency are shown by Figs. 9 and 10. A phase jump of 10 degrees occurs in the input signal at msec and the error in tracking this variation by the time EPLL-based method is shown in Fig. 9. A transient error with a peak of about 10 degrees is observed which dies out in a few cycles. In Fig. 10, a frequency step of 5 Hz occurs in the input msec and the error introduced in the voltage at time estimated phase angle using the EPLL-based method is shown. Similarly, a transient error is generated which decays to zero in a few cycles. The EPLL-based method adaptively follows the phase and frequency variations with no steady-state errors. Unbalance tolerance is another main feature of the EPLL-based synchronization scheme. In Fig. 11, a 50% voltage msec. sag occurs simultaneously in phases and at The method is able to adjust itself to the new condition with no steady-state error. In a very significant unbalance scenario (Fig. 12), a random voltage sag is imposed on all three phases of the utility voltages. Fig. 12(a) shows the input signals. The estimated phase angle has no steady-state error, Fig. 12(b). In the last case, a step-up of 10 degrees occurs in the phase at ms. Fig. 13 shows that the method angle of adjusts itself to the new condition within a few cycles and no steady-state error.

Fig. 13. Response of the EPLL-based method when the phase angle of v (t) undergoes a 10-degree step-up at t = 20 ms.

The proposed system is employed for synchronization purpose in a DG system to investigate micro-grid operational scenarios [17]. The system of Fig. 14 is a single-line diagram of a three-phase system which is used to investigate micro-grid operational scenarios [17]. The basic configuration and parameters come from the IEEE Standard 399-1997. This system is composed of a 13.8 kV, three-feeder distribution subsystem which is connected to a large network through a 69-kV radial line. A combination of conventional and nonconventional loads ( to ) are supplied through three radial feeders. Loads to are composed of linear RL loads. Load is a diode-rectifier load. The aggregate of and constitutes a sensitive load

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Fig. 14.

Single-line diagram of the DG system.

within the distribution system. The system includes two generation units: DG1 (5 MVA) and DG2 (2.5 MVA) located on the first and third feeders. A voltage-source converter (VSC) is utilized by DG2 as an interface to control exchange of active and reactive powers for the sensitive load [17]. Conventional three-phase PLL [3], [15] is optimally set and its performance is compared with the proposed EPLL-based system in this section. To make the comparison, both the PLL and the EPLL are used to measure the frequency. The DG1 speed is used as an index to judge accuracy and convergence. The power system is modeled in PSCAD/EMTDC environment and the EPLL-based system is simulated in Matlab/Simulink and is properly interfaced to the power system. s. A line-to-ground fault occurs on the 69-kV line at The fault is cleared by triple-pole operation of CBs at both ends of the line, five cycles after the fault inception, i.e., at s, and a micro-grid is formed due to the accidental islanding. The islanding phenomenon is detected five cycles after the CBs open, i.e., at s, at which time the micro-grid control strategy of the DG units is activated. Results of frequency and phase angle estimation are shown in Fig. 15 that confirms close behavior of the PLL and EPLL. However, the zoomed version of the graph over the fault period, Fig. 16, reveals that the PLL is not capable of providing an accurate estimate for frequency neither for phase angle. The reason is due to the presence of fault which makes the voltages unbalanced. Oscillatory behavior in estimated frequency by the PLL is observed [Fig. 16(a)] even though some low-pass filters are already employed to smoothen its response. On the contrary, the EPLL is capable of providing a smooth and accurate estimate of the frequency [Fig. 16(a)]. Similar error is also observed in the estimated phase angle by the PLL, which is shown in Fig. 16(b). Another case study investigates the micro-grid formation and its electrical transients due to a permanent line-to-line-to-line-to-ground (L-L-L-G) fault on the 69-kV line. The time intervals corresponding to fault clearing, islanding detection and reclosure attempts are the same as those of the previous case studies except that system islanding is detected in two cycles (as opposed to five cycles in the previous cases). Islanding detection in two cycles is possible in this case because of the severe voltage drop due to the L-L-L-G fault. Fig. 17 shows the estimated frequency and phase angle by the PLL and the EPLL. The EPLL provides more accurate results with better transient response. A zoomed version of this graph is shown in Fig. 18 for better view of the performance of PLL and EPLL during unbalanced conditions.

Fig. 15. Temporary line-to-ground fault at t = 0:5 s, islanding at t = 0:583 s, and reclosure at t = 1:083 s: (a) DG1 speed, estimated frequency by PLL, and estimated frequency by EPLL and (b) difference between estimated phase angles by PLL and EPLL.

Fig. 16.

Zoomed version of Fig. 15 over the fault period of [0.5 0.583] s.

Fig. 17. Three-phase line-to-ground fault. (a) DG1 speed, estimated frequency by PLL, and estimated frequency by EPLL. (b) Difference between estimated phase angles by PLL and EPLL.

VI. DIGITAL IMPLEMENTATION This section studies advantages of the EPLL-based method from the standpoint of digital implementation. The proposed method is fundamentally comprised of a number of EPLLs. The

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Fig. 18.

Zoomed version of Fig. 17.

continuous-time differential equations governing an EPLL are derived from the block diagram of Fig. 6 as

(4)
Fig. 19. angle. Implementation on DSP: (a) distorted input and (b) extracted phase

where dot on top stands for time derivative, is is the input signal, the error signal, is its fundamental component, and , and are the amplitude, frequency, and phase angle, respectively. A discrete-time version of (4) can be derived based on the first approximation of the derivative for digital implementation purposes. The investigations show that the first-order approximated system adequately maintains the desired properties of the algorithm due to the structural robustness of the EPLL. Assuming sampling period of , the discrete-time recursive equations are (5) where , and are called step sizes. These equations resemble the LMS algorithm used in signal processing applications. The LMS algorithm is known for its simple structure and efficient performance in many applications. Equations (5) are well suited for implementation on software (e.g., DSP) platforms or hardware (e.g., FPGA or ASIC) platforms due to their simplicity of structure. An important feature are of this algorithm is that its three parameters qualitative parameters. These parameters are directly related to , and , respectively. This indicates that small variations of these parameters do not affect the performance of EPLL. This is very important in fixed-point implementations for which bit-length limitations exist. The feasibility of the EPLL algorithm is verified in laboratory using the TMS320C6711 Texas Instruments floating point platform. It comprises an on-board power supply, peripherals providing A/D and D/A units and the shell program through which the DSP is controlled. The C programming language is used to write the code. Fig. 19 shows a distorted signal whose phase angle is extracted by the proposed method.

Further evaluations have been carried out regarding the performance of the discrete version of the synchronization method using Fixed-Point Blockset in Matlab Simulink environment. The results confirm that the method performs well even when it is implemented with a relatively low number of bits, e.g., 8 or 10 bits. VII. SUMMARY OF COMPARISON This section provides a qualitative comparison of the EPLLbased method with the existing synchronization methods. The methods are compared from the following standpoints. Noise immunity. Distortion/disturbance rejection. Phase angle adaptivity. Frequency adaptivity. Unbalance robustness. Structural simplicity (ease of design, tuning and implementation), An index is defined with respect to each item to relatively compare performances of the methods. The possible range of performance is divided into six regions, as follows. (0) Lacking: means that the method takes no account of that parameter and hence the performance of the method is completely prone to that specific parameter. For example, the LPF-based method does not consider frequency variations and its performance with respect to frequency variations is not acceptable. (1) Bad: means that although the method has not taken that parameter into consideration in its structure, nevertheless, its performance can be acceptable in some scenarios. Examples of this are all the open-loop methods with respect to unbalance. Although they do not consider any precau-

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TABLE I COMPARISON OF THE SYNCHRONIZATION METHODS

REFERENCES
[1] J. Svensson, Synchronization methods for grid-connected voltage source converters, in Proc. Inst. Elect. Eng. Generation, Transmission, Distribution, vol. 148, May 2001, pp. 229235. [2] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics-Converters, Applications, and Design. New York: Wiley, 1995. [3] V. Kaura and V. Blasko, Operation of a phase locked loop system under distorted utility conditions, IEEE Trans. Ind. Applicat., vol. 33, pp. 5863, Jan. 1997. [4] Voltage Characteristics of Electricity Supplied by Public Distribution Systems, 1994. European Standard EN50160, CENELEC. , F. P. Dawson, and R. Bonert, New synchronization [5] R. Weidenbrug method for thyristor power converters to weak AC systems, IEEE Trans. Ind. Electron., vol. 40, pp. 505511, Oct. 1993. [6] C.-C. Chen and Y.-Y. Hsu, A novel approach to the design of a shunt active filter for an unbalanced three-phase four-wire system under nonsinusoidal conditions, IEEE Trans. Power Delivery, vol. 15, pp. 12581264, Oct. 2000. [7] S.-J. Lee, J.-K. Kang, and S.-K. Sul, A new phase detecting method for power conversion systems considering distorted conditions in power system, in Proc. Industry Applications Conf., 34th IAS Annu. Meeting, vol. 4, 1999, pp. 21672172. [8] M. H. J. Bollen, Fast assessment methods for voltage sags in distribution systems, IEEE Trans. Ind. Applicat., vol. 32, pp. 14141423, Nov. 1996. [9] M. Karimi-Ghartemani and M. R. Iravani, A nonlinear adaptive filter for on-line signal analysis in power systems: Applications, IEEE Trans. Power Delivery, vol. 17, pp. 617622, Apr. 2002. [10] G. H. Jung et al., DSP based control of high power static VAR compensator using novel vector product phase locked loop, in Proc. 27th Annu. IEEE Power Electronics Specialists Conf. (PESC97), Baveno, Italy, 1996, pp. 238243. [11] H.-S. Song and K. Nam, Instantaneous phase-angle estimation algorithm under unbalanced voltage-sag conditions, in Proc. Inst. Elect. Eng. Generation, Transmission, and Distribution, vol. 147, 2000, pp. 409415. [12] M. F. Lai and M. Nakano, Special section on phase-locked loop techniques, IEEE Trans. Ind. Electron., vol. 43, pp. 607608, Dec. 1996. [13] G. C. Hsieh and J. C. Hung, Phase-locked loop techniquesA survey, IEEE Trans. Ind. Electron., vol. 43, pp. 609615, Dec. 1996. [14] W. C. Lindsey and C. M. Chie, A survey of digital phase-locked loops, Proc. IEEE, vol. 69, pp. 410431, Apr. 1981. [15] S.-K. Chung, A phase tracking system for three phase utility interface inverters, IEEE Trans. Power Electron., vol. 15, pp. 431438, May 2000. [16] W. Leonhard, Control of Electrical Drives. Berlin, Germany: Springer-Verlag, 1985. [17] F. Katiraei, M. R. Iravani, and P. W. Lehn, Micro-grid autonomous operation during and subsequent to islanding process, IEEE Trans. Power Syst., to be published.

tions for unbalanced conditions, nevertheless, due to the to transformation, they may resymmetry of the ject impact of some types of unbalance. (2) Average: means that the method inherently has the tendency to improve its performance in this regard but it can not reach the desired level, even though, some improvements are achieved. For example, the extended SVF-based method tries to accommodate frequency variations but it can not perform a satisfactory job. (3) Good: means that the performance is good enough. For example, most of the methods offer a good harmonic rejection. This is as far as some ordinary applications are concerned, but the estimated value may not be sufficiently precise for more crucial applications. (4) Very Good: means that the method performs very well, however, there might still be some room for improvement. (5) Excellent: means that the method performs as good as possible for the prescribed application and no further improvement is desired with regard to this specific factor. For example, all the methods properly follow the step changes in the phase angle. No more improvement in this regard is needed. Table I shows the comparison results. Major shortcomings of the existing methods can be summarized as follows. The LPF-based method is not capable of adjustment to frequency variations. Its performance is also affected by the utility voltage unbalance. The SVF-based method has the same shortcomings as the LPF-based method while it performs better with respect to utility distortions and noise. The main drawback of the threephase PLL method is that it cannot accommodate voltage unbalance. Although the extended three-phase PLL method eliminates this shortcoming, it is sensitive to frequency variations. The introduced EPLL-based method has no major shortcoming comparable to the other methods. VIII. CONCLUSION A new synchronization method is proposed and its performance is evaluated. The method is based on an EPLL system which offers structural simplicity and robustness. The EPLLbased method of synchronization is immune to noise, harmonics and other types of distortion. It is capable of coping with unbalanced conditions and it is frequency adaptive. Its structural simplicity and robustness makes it suitable for digital implementation as an integral part of digital controller platforms for power electronic converters.

Masoud Karimi-Ghartemani (M01) received the B.Sc. and M.Sc. degrees in electrical engineering from Isfahan University of Technology, Isfahan, Iran, in 1993 and 1995 and the Ph.D. degree in electrical engineering from University of Toronto, Toronto, ON, Canada, in 2004. He was with the Center for Applied Power Electronics (CAPE), Department of Electrical and Computer Engineering, University of Toronto, from 1998 to 2001. His research is focused on developing control and signal processing algorithms for power systems protection, control and power quality.

M. Reza Iravani (M85F03) received the B.Sc. degree from Tehran Polytechnique University, Tehran, Iran, in 1976 and the M.Sc. and Ph.D. degrees from the University of Manitoba, Winnipeg, MB, Canada, in 1981 and 1985, respectively, all in electrical engineering. He started his career as a Consulting Engineer in 1976. Presently, he is a Professor at the University of Toronto, Toronto, ON, Canada. His research interests include power electronics and power system dynamics and control.