IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO.

2, MAY 1983

75

The Use of Microprocessors for Electronic Engine Control

THOMAS J. FLIS,
MEMBER, IEEE

Abstract-By the 1984 model year, virtually all spark-ignition passenger cars sold in the United States will contain microprocessorbased electronics to meet prescribed emissions and fuel economy levels. Effective implementation of engine control strategies to meet these objectives through the use of electronics, particularly microprocessorbased electronics. depends on a broad knowledge of many diverse engineering disciplines-from basic concepts of emissions control, through microprocessor and semiconductor memory architecture and operation. This paper provides automotive and electronics systems engineers with a simplified overview of a) the nature of engine emissions control, b) the fundamentals of microprocessors and semiconductor memories, and c) the use of microprocessors for engine control applications at Ford Motor Company. The focus of this presentation is on microprocessor features that are critical for engine control application, with emphasis on Ford Motor Company's new fourth generation electronic engine control microcomputer, EEC-IV, as an illustrative example.

TABLE I EXHAUST EMISSION REQUIREMENTS FOR PASSENGER CARS BY MODEL YEAR

EXHAUST EMISSIONS (gpm)

MODEL YEAR
1970
1975-76 1977-79

CALIFORNIA CO NOx HC
2.2
0.9

HC
2.2
1.5

FEDERAL
CO 23.0 15.0

NOx
NONE
3.1

HC
-

CANADA CO NOx
-

23.0
9.0 9.0

NONE
2.0

2.0

25.0

3.1

0.41
0.41

1.5 1.0
0.7

1.5
0.41
0.41

15.0
7.0
3.4

2.0 2.0
1.0
_

2.0 2.0
2.0
_

25.0 25.0
25.0
_ _

3.1 3.1
3.1

1980
1981-84

9.0
7.0

0.41

crankcase emissions, and became standard for the rest of the United States for 1963-model cars. Carmakers voluntarily equipped their cars with a blowby device which virtually eliminated crankcase emissions. Essentially, blowby gases in the crankcase are recirculated back into the engine's induction system using a closed positive crankcase ventilation (PCV) system. In 1963, Congress passed the Clear Air Act, giving money to the states for development of air pollution programs. The law was amended in 1965 to give the Federal Government authority to set emission standards for new cars. These standards were first applied nationwide to 1968 models and major changes followed in 1970 when the Environmental Protection Agency (EPA) was established (December 2, 1970) to consolidate the federal government's environmental regulatory activities under a single agency. At this time, emission standards were established for 1973-1974 cars, and projected for 1975 and later models. The EPA first set standards which required that hydrocarbon (HC) and carbon monoxide (CO) emissions for 1975 passenger cars be reduced 90 percent from 1970 levels, with a 90-percent reduction in oxides of nitrogen (NO,) by 1976. These standards were later amended to the levels shown in Table I [1]. In addition, the EPA has established standards in other automotive areas, such as fuel consumption and fuel additives. The Corporate Average Fuel Economy (CAFE) standards began in 1978 for each car manufacturer with an 1 8-mi/gal sales-weighted combined

city/highway average. CAFE standards gradually increase through 1985, when the industry must meet a 27.5-mi/gal requirement. California has its own regulatory agency, called I. INTRODUCTION the California Air Resources Board (CARB), whose authority A UTOMOTIVE emission control legislation began in Cali- roughly parallels that of the Federal EPA, but its authority Afornia when all 1961-model cars required control over extends only to those vehicles sold in or brought into Cali-

fornia.

A variety of systems and devices are used to control exhaust emissions: unburned HC, CO, and NO,. Two of these emissions, HC and CO, result from imperfect combustion, while NOX is a natural product of the combustion chemical reaction. HC results from unburned fuel and CO emissions depend on the amount of air available for combustion and relate to the engine air-fuel ratio (A/F). Simultaneous control of all three, while achieving acceptable fuel economy and driveability, is becoming increasingly complex because of more stringent government, consumer, and market pressures, and requires the use of microprocessors to provide a more optimum engine control strategy than is possible with mechanical systems.

II. AUTOMOTIVE EMISSIONS

Basically, automotive emissions controls can be grouped into three major categories: crankcase emission controls (discussed previously), evaporative emission controls, and exhaust emission controls. Evaporative emission control systems control the evaporation of HC vapors from the fuel system (fuel tank, pump, and carburetor). Today, most manufacturers use a charcoal canister to store fuel vapors and a canister purge value is opened periodically to vent the vapors back into the induction system. In general, methods which reduce NOx are not optimum for control of HC and CO, since chemical reduction is required to eliminate NOX and oxidation is needed to eliminate HC and Manuscript received June 4, 1982; revised December 18, 1982. in understanding the fundaThe author is with the Electrical and Electronics Division of the CO. A useful concept that helps systems relates to the control all engine behind idea mental Ford Motor Company, Dearborn, MI.

0278-0046/83/0500-0075$01.00 1983 IEEE

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76

EXHAUST EMISSIONS

RICH

Fig. 1.

Exhaust gas composition varies with air-fuel ratio.

1,0

CATALYTIC CONVERTER

EFFICIENCY

RICH

Fig. 2.

Catalytic converter efficiency varies with air-fuel ratio.

-Th

EGO SENSOR VOLTAGE

~ ~0
STOICHIOMETRY

IEEE TRANSACTIONS ON INDUSTRIAL

ELECTRONuCS, VOL. IE-30, NO. 2, MAY

1983

LEAN

AIR FUEL RATIO

combustible for firing; and second, for many catalytic conA/F ratio must be maintained at stoichiometry for optimum elimination of all three exhaust emission gases. The window for which catalytic converter efficiency for all three emissions is optimized is very narrow-about +0.05 A/F of stoichiometry (Fig. 2). A key component in maintaining precise control of A/F ratio at stoichiometry is the exhaust gas oxygen (EGO) sensor with a transfer function as illustrated in Fig. 3. The sensor produces a near step change in voltage at stoichiometric A/F. It is a galvanic device with a solid electrolyte (usually zirconium dioxide) and porous electrodes (platinum), one exposed to exhaust gases and the other to ambient air. The electrolyte allows passage of oxygen ions from one electrode to the other, forming a battery, producing less than 200 mV for a lean mixture and greater than 600 mV for a rich A/F ratio. Engine control systems which depend on feedback from the EGO sensor will be discussed subsequently.
verters the

III. BASIC EXHAUST EMISSIONS CONTROL

TECHNIQUES

STOICHIOMETRY

LEAN

RICH

STOICH16METRY

Il

LEAN

Fig. 3.

Exhaust-gas oxygen-sensor output voltage switches at stoichi-

ometry'

variation of exhaust gas composition as a function of air-fuel ratio as shown in Fig. 1 [2]. The ratio of air to fuel for which perfect combustion takes place is called stoichiometry and is typically 14.7 to 1, 14.7 lb (by weight) of air for each pound of fuel. This ratio is important for two reasons: first, there are natural limits to how rich (more fuel, lower A/F ratio) or how lean (more air, greater A/F ratio) the A/F mixture can be, and still remain
or

A variety of basic techniques have been used, stand-alone combination, during this last decade to control exhaust emissions. Each system is described succinctly to present the concept, not to explore the implementation details. 1) Air Injection: These systems use an air pump to supply fresh air into the exhaust manifold or cylinder head. The air mixes with the hot exhaust leaving the engine and improves the oxidation reaction necessary to reduce HC and CO emissions. 2) Spark Timing Controls: Various systems are used to delay or retard ignition spark timing to control HC and NOQ emissions. Since the greatest amount of exhaust emissions are produced at idle and during low-speed operation, all mechanical spark control systems are basically designed to reduce these emissions by delaying vacuum advance at idle and when the car is in low gear. This means that a spark control system should work only when the engine is at normal operating temperature and the car is operating at low speeds or in low gear. At normal operating temperature and when the car is at cruising speed or in high gear, vacuum advance works as it should without spark control. However, centrifugal and vacuum advance mechanical systems cannot react fast enough to changes in engine operating conditions, nor can they provide the extreme timing accuracy required to meet today's emission and fuel economy standards. Therefore, all manufacturers have developed electronically controlled ignition systems to gain the necessary response time and accuracy. The forerunners of today's electronic engine control systems were, in fact, electronic spark timing computers, i.e., Chrysler's Electronic Lean Burn (ELB), GM's Microprocessed Sensing and Automatic Regulation (MISAR), and Ford's Electronic Engine Control I (EEC-I), were essentially electronic spark controller sytems. 3) Exhaust Gas Recirculation: An effective way of controlling NO, emissions is to recirculate a small amount of exhaust gas back to the intake manifold to dilute the incoming air-fuel mixture. Nitrogen and oxygen do not combine unless
or in

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FLIS: MICROPROCESSORS FOR ELECTRONIC ENGINE CONTROL

77

the temperature above which the converter becomes effective. Light-off temperature increases with mileage accumulation and is an important wear-out factor in 50 000 mi emissions 80t certification testing. During cold-start operation, prior to the HC and CO emissions can be expected to pass light-off, CATALYST / HC CO | CONVERSION 60 unreacted through the converter. Since a rich A/F ratio is EFFICIENCY (%) required for driveability during cold-start, the excess fuel passing through the cold engine produces disproportion40 + ately high HC and CO emissions. Consequently, secondary air is supplied by an engine driven pump to the exhaust 201ports during start-up (called upstream air injection), where the exhaust gas temperature is highest, and hence, where the greatest potential for gas oxidation exists. Once a COC 00 200 300 400 500 converter lights off, port-injected air may be continued or TEMPERATURE bypassed (dumped) to the atmosphere. Three-way catalysts (IC) have analogous light-off characteristics and in a closed-loop Fig. 4. Conventional oxidizing catalyst efficiency depends on its operating temperature. an EGO sensor, the sensor also has a warm-up system using characteristic. Hence, during cold-start, a closed-loop TWC combustion chamber temperatures exceed 13700C. Two system is forced to operate open-loop until the EGO sensor methods are used to control peak combustion chamber tem- warms up. The time required for EGO sensor warm-up deperatures to prevent NOX formation. One is to slightly retard pends upon the location of the EGO sensor in a given engine. spark timing as discussed previously. The second, and more IV. FEDERAL EMISSIONS CERTIFICATION PROCESS efficient method, is to inject a small amount of an inert gas into the air-fuel mixture to lower the combustion chamber The availability of new passenger cars each year depends temperature. Because exhaust gases are relatively inert, they on whether carmakers successfully complete a complex and are used for this purpose. A small quantity (6 to 10 percent) lengthy emission certification process for each model/driveof the exhaust gas is recirculated from the engine's exhaust train combination. Automakers are responsible for conducting ports to the intake manifold. Since the exhaust gas contains a 50 000 mi durability test for each engine family with emisno oxygen, the resulting air-fuel plus exhaust gas mixture sion tests being performed, per rigidly prescribed procedures, does not create as much heat as an undiluted air-fuel mix- at regular intervals. Only scheduled maintenance or EPA apture would produce. Exhaust gas recirculation (EGR) is not proved special maintenance can be performed during the needed or desired at idle or at high-speed wide-open throttle testing. A straight line fit to the emissions data for each operating conditions. It is necessary only during cruising gas is obtained to determine the deterioration factor (DF)and acceleration at speeds between about 30 and 70 mi/h, the ratio of grams per mile (g/mi) at 50 000 mi to that at when NOX formation is greatest. Recirculation is also elimi- 4000 mi. Additional data cars representative of the given nated when engine temperature is low, and NOX formation engine family are then run for 4000 mi to obtain fuel econis also low, to produce fast warm-up and better driveability. omy data, and their 4000-mi emissions are multiplied by the 4) Catalytic converters: The first catalytic converters, respective DF's to obtain projected emissions levels at 50 000 called conventional oxidation catalysts (COC), were installed mi. If the multiplied projection exceeds the standard, then that in the exhaust systems of 1975 and 1976 cars to help the particular engine family cannot be sold to the public. chemical oxidation, or burning, of HC and CO in the exhaust. Prototype and development emissions control components Since HC and CO oxidize at a lower temperature with a COC, must often be designed and available for vehicle prove-out less spark retard is required to satisfy HC and CO standards, three to five years prior to market introduction to ensure thereby decreasing the fuel economy sacrifice. Later, catalytic sufficient time to complete all internal design and production converters, which began to appear on 1977 and 1978 cars, prove-out and Federal emission testing schedules. were called three-way catalysts (TWC) and helped to promote V. ELECTRONIC ENGINE CONTROLS the chemical reduction of NOX emissions. Many of today's catalyst assemblies are composed of two sections. The front Electronic engine control systems can range in complexity section is a three-way catalyst to oxidize HC and CO while from simple control of spark timing and EGR flow, to fully simultaneously reducing NOX. This section requires precise interactive monitoring and control of air-fuel ratio, secondary control of the air-fuel ratio for proper operation, as discussed air, EGR flow, spark timing, idle speed, spark knock, and previously. The rear section contains a conventional oxidation evaporative fuel [41. Depending on the specific control catalyst to further oxidize HC and CO. The conversion effi- strategies employed, electronic engine control system comciency of a conventional oxidizing catalyst is a function of plexity is also influenced by the particular sensor/actuator mix temperature as illustrated in Fig. 4 [3]. The catalyst is in- and accuracy requirements, increasing processing speed and effective until its temperature rises above about 250 to 3000C, computational power requirements, and by the increasing and this phenonema complicates cold-start emissions control. range of powertrain displacements and fuel delivery systems. The term "light-off' temperature is often used in describing For example, fuel delivery systems can be divided into two
1oo-+
1

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78
AIR

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

FUEL

I1

~~~~~~COMPARATOR

REFEf tE~~~NCE

FIXED DUTY CYCLE

COMPENSATION FOR LOAD, RPM, & COOLANT TEMP.

ELECTRONIC CONTROLLER

Fig. 5. Block diagram for a typical closed-loop feedback-carburetor electronic control system.

categories-carburetor and fuel injection-consisting of four basic configurations: conventional carburetor, feedback carburetor, single-point or throttle body fuel injection (also called central fuel injection-CFI), and multipoint or individual port fuel injection (also called electronic fuel injection-EFI). A feedback carburetor functions similarly to a conventional carburetor, but it has an actuator that controls fuel flow, and thereby air-fuel ratio, in response to command signals from a microprocessor. Single-point fuel-injection systems use a single injector in each bore of a throttle body, and multipoint fueldelivery systems use a separate intake manifold mounted injector for each cylinder. Initially, electronic controls were used primarily for spark timing, EGR control, and secondary air management, because HC and CO emissions standards could usually be met with conventional oxidation catalysts, and NOx emissions were controlled by EGR techniques. However, starting in 1978, with the advent of a tightened NOx emission standard (from 2 g/mi to 1 g/mi) for 1981, and projected future gradient altitude compensation requirements, automakers began to accelerate their use of electronics, three-way catalysts, and electronic fuel injection. A typical closed-loop feedbackcarburetor electronic control system is diagrammed in Fig. 5. The essential components of a feedback-carburetor (FBC) closed-loop electronic control system tare an exhaust-gas oxygen sensor, a feedback (controlled A/F ratio) carburetor with vacuum modulator, an electronic controller, and a threeway catalytic converter. During closed-loop operation, the electronic control unit monitors the voltage output of the EGO sensor and generates a control signal to the FBC vacuum modulator. This signal is of constant current, which is constantly cycling between on and off (dithering) at a fixed frequency and variable duty cycle. The duty cycle (on-time to off-time ratio) is a function of the EGO sensor voltage.

As the sensor voltage increases beyond a reference threshold set point, the proportional gain immediately changes the duty cycle in the direction which will minimize the error. Since the EGO sensor observes A/F mixture changes only after a time delay (due to the induction, combustion, exhaust process), which can be over 0.5 s at idle [5], the proportional term attempts to compensate for this time delay by taking a quick stepped change each time the EGO sensor voltage crosses the set point. The duty cycle is further changed at a constant rate (integral gain) to maintain a stoichiometric air-fuel ratio on the average, and to minimize transient error disturbances. In open-loop operation, the FBC vacuum modulator is driven by a predetermined duty cycle which varies depending on engine operating condition. Two additional sensors are normally used to help maintain regulation during cold-start and heavy-load driving conditions, engine coolant temperature (ECT) and manifold absolute pressor (MAP). The engine coolant temperature sensor, a thermistor, is utilized to attenuate EGR flow during low and abnormally high engine temperatures to improve cold/hot performance and driveability. It is the primary input for open-loop operation during engine warm-up. Engine load is reflected in changes of manifold absolute pressure. When manifold pressure is combined with a barometric pressure sensor, altitude compensation and ambient density changes are used to update spark timing, EGR flow, and A/F ratio. A typical control strategy is normally divided into two segments, an engine control strategy and a diagnostic self-test program. Fig. 6 shows the engine control strategy divided into three operating modes: crank, underspeed, and run. The run strategy is of particular importance since it contains the control logic for most of the engine operating regions. Based on throttle position, three run modes are defined: closed throttle, part throttle, and wide-open throttle. These three run modes,

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FLIS: MICROPROCESSORS FOR ELECTRONIC ENGINE CONTROL

79

CRANK

UNDERSPEED

FILTERS TIMERS CALIBRATIONS

CLOSED THROTTLE WPART THROTTLE WIDE OPEN THROTTLE

Fig. 6. Operating modes for a typical engine control strategy.

TABLE II OPERATING STATES FOR A FEEDBACK-CARBURETOR ENGINE CONTROL STRATEGY

Popit)pp DOW 0.M.ods
Fest Idle

Throitl,

Fuel Control

State

Mod.
izto . Mode

Loop

Syy.10,o
Act-va-,o

of

Al F.*[

Rawo
R'ch
transltsonal {8rfled

Op4,0t1g

EngUne

Conilob
Start
to

Engine Lo.d
Start

Thor. ctor Al, (Typila)

~~~~~L ght ~~~~~Load

Part ThroUtlU
closedThrotife

Cos.ed LTUp
Mode

Balanced U--d

cLuUse (WsU.PdUp)
Wie

M.derBt

IniP ed on...w.Into Catalytic Con-eteU

8ypas..d
or

Op.. L QOp Mode.

rrnT-.dn.l

AUUUdUUPg
to Eng.ne

Adl..t. sy' em
Load)

onPUdPPd..t Engi.n
Csabrrt on3

(DependpUPo

R,,ch r Leen

(Um-t-prrped)
(Prolonged)

LOtht
Model.
to

Atmosphere

ecel.gst,on

njected UpstUe,m Io Et.h.us M-p,)U

Ind vdual EnJgtne

L,ghl

(Dep*odPng

on

EGO strategy, transient fuel compensation, adaptive fuel strategy, ignition strategy, EGR valve control, and distributor rotor registry. As illustrated by the feedback-carburetor electronic control system example, electronic engine control systems are intended to provide a more optinum engine control strategy than is possible with a strictly mechanical system. This is accomplished by using a microprocessor which interprets data from a number of engine parameter sensors, and based on a control strategy stored in semiconductor memory, generates appropriate output control signals to a number of actuators.

W,de

Thnfotle

Open

Open
Mode

.T-lans on.1

Loop

(Adiu.t. Syster
Acc.,d,,SI
to

R,ch

Acc.l.w.on

moderate
thru

Crowd

Bypassed to Atmlosph-r

"= __. _.

LUod)

E.qne
_ ..U _PU

HeUvy

to

VI. MICROPROCESSOR AND SEMICONDUCTOR MEMORY FUNDAMENTALS

in combination with fuel states:

open- or

closed-loop control, result in six

1) start-up open-loop state; 2) closed throttle closed-loop state; 3) part throttle closed-loop state; 4) wide-open throttle open-loop state; 5) crowd open-loop state; and 6) high-airflow open-loop state.
Each state would be
a

control of the state-to-state transitions becomes a fundamental part of developing an optimum fuel strategy. To enter a state, precise conditions must be satisfied; once in a given state, precise conditions must be met to exit the state and enter a different state. Table II lists the throttle position fuelcontrol states for the feedback-carburetor electronic control system with a three-way catalyst. Additional factors which are important in the overall control strategy are: adaptive

complete strategy module, and

Microprocessors contain the major computational and control sections of a digital computer, called the central processing unit (CPU) on a single integrated circuit (IC). A simple CPU contains control circuits for fetching and executing instructions, an arithmetic logic unit for performing operations on data, and registers for storing temporary results, data, and processor status. The block diagram in Fig. 7 is a simple description of a microcomputer system that identifies its four basic functional parts: microprocessor, memory, input, and output. The microprocessor (also called the CPU on a chip) is the "brains" of the system. The memory stores the program to be executed and may also store data. Since all computers need to exchange information with the outside world, input and output blocks are needed. When all four of these functions are implemented and contained on a single integrated cirucit, we have a "microcomputer"; when only the CPU is contained on a single chip, we have a "microprocessor". A computer control system can be constructed using a single microcomputer chip (called a microcomputer-based system),

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80
r--

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

MICROCOMPUTER

ADDRESS BUS

-7
I

DATA

. 1 u 1.
CONTROL BUS

OUTPUTS

Fig. 7.

Microcomputer block diagram.

Intel 8085 (8-bit) microprocessor [6]. The accumulator is the focus of many internal data operations and connects the data bus to one input of the Arithmetic and Logic Unit (ALU). A temporary register connects to the second ALU input. In essence, the ALU operates on one operand (accumulator input) or two operands (accumulator and temporary register inputs) and deposits the results of these operations into the accumulator, or places them on the data bus for use or storage elsewhere. Before continuing with the discussion on the internal structure and operation of a microprocessor, a review of computer memory concepts is required. Conceptually, memory can be viewed as a collection of storage locations called registers, which are each individually selectable by using another register. When accessing data stored in a particular register, an m-bit binary number, called the address, is placed in an address register (Fig. 9). This address register has an m-bit capacity and can select 2M individual registers. Once a storage register is selected, n-bits of data can be stored (write) or retrieved (read). In general, storage consists of an contain. array of registers with a pair of address and data interface Some knowledge of the internal structure and operation of registers. The input and output ports may be considered as an a typical microprocessor is useful in understanding a system's extension of this storage concept, with the primary difoperation. Fig. 8 shows the simplified block diagram of an ference being the accessibility of the selected registers to the

or it can be configured using a microprocessor IC, support memory, and input-output IC's (called a microprocessorbased system). The key feature to recognize in Fig. 7 is the address, data, and control bus structure that connects the four functional blocks in parallel. A bus is simply a bundle of interconnecting wires for transferring information. Busses are normally identified by the category of information they transfer, i.e., address, data, and control. The total number of wires included in a given bus varies depending on the system. The microprocessor uses the address bus to locate data stored in memory or to identify specific inputs and outputs. One can literally think of addresses as post office box numbers that identify locations in which data is stored. Notice that all addresses originate from the microprocessor and get broadcast to the remaining functional blocks, i.e., the address bus is unidirectional. Once a location is specified via an address on the address bus, data is transferred on the data bus. Information can travel on the data bus in either directionfrom the microprocessor to other elements (called a WRITE operation), or from other elements into the microprocessor (called a READ operation). The data bus is, therefore, bidirectional. A third bus, called the control bus, consists of signals used by the microprocessor to direct or control the operation and sequencing of operations between itself and one of the other functional elements. Microprocessors handle information in binary digit form. A single digit of binary information (0 or 1) is called a bit, but most microprocessors handle data as groups of bits called a word. Depending on the individual microprocessor a word could be 4 bits, 8 bits, 16 bits, or 32 bits in length. An 8-bit word is called a byte and a 16-bit word is called a doublebyte. The first microprocessor, the 4004 (a 4-bit machine), was introduced in 1971 by Intel Corporation. Ten years later (November 1981), Electronic Design News magazine listed 46 commercially available microprocessors of various word lengths from 4 to 32 bits. This list did not include the large number of custom devices used for dedicated consumer, industrial, or military applications. These machines vary considerably in capability not only in word length but in internal architecture, as well as in the total number of input/output ports they

Fig. 8. Block diagram of a simplified 8-bit microprocessor.

.(1/0)

Fig. 9. Computer memory viewed as a collection of storage locations.

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FLIS: MICROPROCESSORS FOR ELECTRONIC ENGINE CONTROL

81
REGISTER NUMBER
0
1

outside world. Data stored in memory usually consists of three types of information: instructions (or operation codes) for the microprocessor, numerical binary data (or operands) for manipulation by the microprocessor, and other user defined data (e.g., alphabetic characters or symbols). The distinction between data and information is important: "Microprocessors process data; when meaning is attached to data it becomes information; humans process information" [7]. Returning to Fig. 8, the control and timing logic, instruction decoder, program counter, and instruction register are used to obtain (fetch) commands (instructions) and data from storage (memory) and to perform the prescribed operation(s) (execute) on the prescribed operand(s) (data). In general, the microprocessor, once initiated to a starting address, will read sequential locations through memory and perform the prescribed operations. Four basic operations are performed: 1) read data from memory or an input port, 2) write data to memory or an output port, 3) perform an internal operation, and 4) transfer program control.

MEMORY ADDRESS
0
1

m - BIT

ADDRESS
000 001 010 Oil 10( 101 110 111

MEMORY CONTENTS (DATA)

2 3 4 5 6 7

2 3 4 5 6 7

Fig. 10.

Memory organization: 2m locations by n-bits per location.

SERIAL ACCESS MEMORY

RANDOM ACCESS

MEMORY
(RAM)

__

SIN

STATIC

DNAC

CMOSs
I

'N
S

VII. SEMICONDUCTOR MEMORY TYPES Memory organization relates to internal memory capacity and structure. Fig. 10 shows eight memory storage locations, wherein each location can store one byte (8 bits) of data. In terms of total storage capacity this structure can store 64 bits (8 locations X 8 bits per location). In terms of memory organization, it would be described as an 8 X 8 structure where the first numnber identifies the total number of locations, and the second number represents the number of bits stored in each location. Other memory organizations, each having a total storage capacity of 64 bits would be: 64 X 1, 32 X 2, or 16 X 4. Memory organization refers to individual semiconductor memory IC's, or to memory systems. Most memory IC's and systems are byte-wide (that is, each location stores one byte) regardless of the microprocessor's word length. It is not uncommon to see 16- and 32-bit microproccessors using byte-wide memory systems. As the number of memory locations increases, usually by powers of two, a shorthand notation is used. The letter "K" is used as a suffix for larger numbers and it represents 210 or 1024, e.g., 8K = 8192 aind 16K- 16384. Semiconductor memories can be classified many different ways (Fig. 11). Somne examples are: serial access versus random access, volatile versus nonvolatile, and program memory versus data memuory. The distinction between serial and randomii relates to access time, the time required to receive valid data from a memory device after it has been accessed and a read signal is given. For serial-access memories, the access time is variable and is a function of the location of the data in memory. For random-access memories, the access time is essentially a constant ( a nominal tolerance) and is independent of the location of the data in memory. Examples of serialaccess memories are: shift registers, charge-coupled devices, and magnetic-bubble memories. Microprocessor systems normally utilize random-access memories for data storage. The random-access memory (RAM) is also called readwrite memory (RWM) because data can be written into or read from any location in memory. With RAM, the internal storage structure can be static or dynamic. The term static

WITH BATTERY -,

BACK-UP \ s

NON-VOLATILE

Fig. 11. Semiconductor memory classifications.

means that once data is stored it is latched as a voltage level, and the data will be retained as long as power is applied to the memory array. Another structure, called dynamic, is generally faster and uses less power than static memory circuits, but data is stored as a charge on a capacitor. The charge can leak off very quickly and must be periodically "refreshed" or recharged to maintain data. This requirement normally adds operating and design complexity to the device and/or memory system, and is a tradeoff against higher speed and lower power consumption. The major advantage of dynamic RAM devices over static RAM's is density (or on-chip bit capacity); today, 256 K-bit dynamic RAM's are being sampled by the semiconductor industry, while static RAM density is at the 64 K-bit level. All RAM's, static or dynamic, are volatile, i.e., they lose data when power is removed from the device. Memory devices that retain their stored data when power is removed are nonvolatile. Nonvolatility is an obvious system advantage for memory devices. (Fig. 11 illustrates, using crosshatching, which memory devices are nonvolatile.) RAM's are used in a microprocessor system to store variable data which is constantly being modified and which, generally, can be regenerated during each program execution as required. Consequently, a RAM is often called data storage by an electronic system engineer. Another basic category of semiconductor memory is called

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82

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

read only memory (ROM). ROM's are permanently or semipermanently programmed, during manufacture by the memory supplier or after delivery by the user, to contain predetermined data which, during system operation, can be read only. Read only memories, by definition, are categorically random-access devices, but the acronym RAM is reserved exclusively to refer to the read-write memory device. By their nature, all ROM's are nonvolatile. Read only memory is analogous to a reference book. The information it contains is accessible, but for all practical purposes, unalterable. ROM is used for program storage and is often called program memory. ROM's are available in several forns: 1) mask-programmed read only memory (ROM or MROM); 2) programmable read only memory (PROM); 3) erasable programmable read only memory (EPROM); and 4) electrically alterable read only memory (EAROM). With a ROM (or MROM), data is programmed only once, by the memory supplier, when the ROM is manufactured. There is normally a one-time tooling expense to generate the mask used to program the ROM. ROM's are used in relatively high-volume products because they are the least expensive and have the highest bit capacity (density). However, there is a turnaround time of typically 6 to 16 weeks, depending on volume and supplier, from transfer of a ROM code to the supplier and receipt of the first ROM shipment. In ROM's, many companies offer 64 K-bit versions, with 128 K-bit and 256 K-bit chips expected soon. A PROM is similar to a ROM since it can only be programmed once; the customer programs the PROM using a lab instrument called a PROM programmer. Typically, a PROM device is manufactured with all data bits set to 1 s; the user then programs selected data bits to 0 s by literally using excessive electrical current to blow tiny fuse elements within the PROM. PROM densities have reached the 64 K-bit level. An EPROM is similar to a PROM that can be reused. Most EPROM's are erased by removing them from the circuit and exposing them to an ultraviolet light source. EPROM's are programmed using a PROM programmer and are used for prototype systems or small-volume production runs. Two suppliers currently offer 128 K-bit EPROM's, and Intel is expected to have a 256 K-bit version in early 1983 [8]. An EAROM is similar to an EPROM that can be erased and reprogrammed in circuit by electrical means. EAROM's permit small sections of the memory to be erased and reprogrammed. However, they have the smallest bit capacity and are the most expensive of the four types discussed.

INPUT PORTS

MEMORY

OUTPUT PORTS

Fig. 12. Microcomputer viewed as a collection of registers and storage

locations.

tion set. Typically, for an 8-bit system, an instruction can be one, two, or three bytes long. Each instruction, regardless of length, begins with an 8-bit operation code (opcode) that uniquely specifies the operation to be performed. During execution the opcode is decoded by the instruction register (IR) (Fig. 12), and provides information used by the control and logic timing section to generate the necessary sequence of internal operations which implement the instruction. Following the opcode are zero, one, or two additional bytes, the instruction operand(s) that are either constants or addresses. It is common to divide the instruction set into groups of functionally similar instructions. Four commonly used groups
are:

VIII. INSTRUCTION SET/ADDRESSING MODES For the purpose of understanding the following material, assume a typical 8-bit microprocessor system with a 16-bit address bus and single-accumulator architecture, as previously discussed in Fig. 8. A microprocessor system must be programmed by the user to perform the desired functions and operations using a predefined instruction set and addressing modes for the particular machine. Every microprocessor is designed to recognize a specific group of binary codes called the instruc-

memory; the load and store data instructions are the most common examples. The second group consists of the various arithmetic and logical instructions. The third group is used to maintain the internal stack and control flags. Instructions in the last group can conditionally or unconditionally alter the program execution sequence by changing the value in the program counter. Since a microprocessor, when it is not actually processing data, spends most of its time locating data stored in memory, instructions are also categorized by the method they use to "6address" or locate their operands. Five common addressing modes and their descriptions follow. 1) Inherent Addressing: A 1-byte instruction wherein the location of the operand is inherent in the opcode itself (e.g., clear accumulator, increment stack pointer). 2) Immediate Addressing: The operand immediately follows the opcode. If an 8-bit operand is required, it is contained in the byte following the opcode; if a 16-bit operand

1) memory reference instructions; 2) arithmetic and logic instructions; 3) program control instructions; and 4) stack and machine control/status instructions. Instructions in the first group involve the accumulator and

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FLIS: MICROPROCESSORS FOR ELECTRONIC ENGINE CONTROL

83
PROMARKET
.

is requir-ed, it is contained in the next two bytes following the opcode. 3) Absolute Addressing: A three-byte instruction wherein the two bytes following the opcode contain an absolute 16bit address. The address length implies the maximum amount of memory that can be accessed. (A 16-bit address can access 216 or 64K memory locations.) 4) Indirect Addressinig: The address of the operand is contained in a 16-bit internal register, i.e., an index register. 5) Relative Addressing: An 8-bit value, contained in the byte following the opcode, is added to the current value of the program counter to modify program flow. Many other addressing modes such as direct addressing, paged addressing, based addressing, and based indexed addressing are used with other microprocessor architectures to reduce the total number of instructions required in a program and, consequently, the number of memory locations needed to
store the program.

VEHICLE
*SIZE
*WEIGHT
M FARKET

MIARKET
*COST
EMISSIONS FUEL ECONOMY

PERFORMbANCE
ECONOMY

* FUEL

|*SERVICEA8ALTITY
i
_<

DRlVEABlLIT,

* II_

I*RELIABILITY SEGMcENT

*FEDERAL
X L

EG,CALIFORNIA

NON DOMESTIC

DISPLACEMENT
| V6 X
_

OPTIONS

STRtATEGIES
X

CAIRTO U
=

BASE
URBO
,

SECONDARY
-

CALIF

_Vs

- T I

AIRPEDDESTY
K4~~~~~~~~~

ALTITUDE
AIR T ~ ~~~~ASS

Fig. 13. Market, government, and vehicle image factors result in wide range of powertrain product configurations.

the normal memory reference instructions can be used to handle I/O data manipulations and transfers. Conceptually, this approach is simple, but it has several disadvantages: part of the memory space is no longer available for memory, interfaces could need more circuitry to recognize longer addresses, and memory reference instructions can be longer and could execute more slowly than optimized I/O instructions. In an isolated I/O system, a number of I/O registers (or ports) coexist with memory at specific locations, and special I/O instructions are used such as IN (port), to transfer data from an input port to an accumulator, and OUT (port), to transfer data from an accumulator to an output port. This method requires a unique control line that signals when a value on the address bus refers to actual memory or to an I/O port. I/O instructions are generally shorter and faster, no memory space is used up for I/O devices, and potentially simpler interface circuitry are a few of the advantages of isolated I/O. Two disadvantages are that additional opcodes are needed, and the total number of I/O ports is limited.
X. INTERRUPT STRUCTURES Basically, an interrupt is an internal or external event that signals the microprocessor to temporarily suspend current program execution and to initiate execution of special code (called an interrupt service routine) designed to react to the specific interrupt. Most microprocessors now handle multiple interrupts and contain complex prioritization circuitry to maintain control over simultaneous interrupts or the potential situation wherein an interrupt could occur while a

INPUT/OUTPUT ORGANIZATION There are two basic input/output (I/O) organizations in common use today: memory-mapped and isolated. For memory-mapped systems, input/output devices are assigned addresses as though they were memory. Typically, a portion of the total memory space is reserved by the system designer for I/O devices. No special I/O instructions are required, and
IX.

a) All or part of the machine state is saved. b) The service routine is initiated. c) The identity of the interrupting event or device is determined. d) The appropriate portion of the service routine is executed. e) Machine status is restored and program control transfers back to the initial program. There are as many different ways of implementing interrupt structures and servicing interrupts as there are microprocessors. Some of the commonly used methods are listed below [9]. a) Jump to a fixed memory location. b) Jump to the address contained in a fixed memory location(s). c) Jump to an address provided by the interrupting event or device. d) Jump to an address contained in a table in memory, where the index to the table is provided by the interrupting event or device. e) Execute an instruction (usually a jump) provided by the interrupting event or device. In microprocessor systems with many I/O devices of varying operational speeds, all devices must be kept running concurrently for maximum system efficiency and throughput. Consequently, the major differences between microprocessors are usually in the manner used to implement the I/O and interrupt structures, since they can provide many of the speed and performance benefits sought by microprocessor manufacturers for competitive advantage in the marketplace.

previous interrupt is being serviced. A microprocessor system must usually perform lowing tasks when interrupts occur [9].

XI. ELECTRONIC ENGINE CONTROL SYSTEM DESIGN CONSIDERATIONS In addition to the usual product design objectives (quality, reliability and durability, cost, weight, and power consumpttion) product flexibility and commonality should be seriously considered when identifying design objectives for a microprocessor-based electronic engine control system. First, consider the product flexibility required by today's powertrains. Each automaker offers a wide range of engine families, each with different displacements, fuel delivery systems, performance options, and engine control strategies the fol- to meet a broad mix of market, emissions and fuel economy, and vehicle image objectives (Fig. 13). Depending on the con-

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84
ENVIRONMENT'i
MARKET - VEHICLE IMAGE
- REGULATIONS

IEEE TRANSACTIONS ON INDUSTRIAL

MODEL YEAR
1978

ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

GENERATION
ECU-A

APPLICATION
PINTO, BOBCAT (2.3L CA) VERSAILLES

1978
1979

EEC-I (TOSHIBA)
*

SPARK EGR

(5 0L)
FORD iMERCURY

EEC-Il
*

(TOSHIBA) SPARK EGR iFUEL-FBC

(5.8L)

1980!83

* SPARK EGR FUEL-CFI

EEC-ill (MOTOROLA)

LINCOLN

MARK (5 0L)

1981-83
1983
SOFTWARE
4

MCU (INTEL)

(2 3L 3,3L 4,2L 4 9L)

ESCORT LYNX EXP LN7 (1 6L)

EEC-IV (INTEL)
EEC-IV (INTEL)

STRATEGY

1983-1 2
1984

DIAGNOSTICS

HARDWARE

DEVELOPMENT

Fig. 15. Evolution of electronic engine control systems Motor Company.

EPA

EEC-IV (INTEL)

at Ford

INTERNAL RESOURCES
-

L
-

DEVELOPMENT SUPPORT DESIGN ENGINEERING FACILITIES/TOOLING

EMISSIONS DURABILITY FUEL ECONOMY

ECI-I, EEC-IL, EEC-III, AND EEC-IV SYSTEM CAPABILITY

EEC-1 I

TABLE III

Fig. 14.

Flexibility and commonality are key design objectives for electronic engine control systems.

EEC-1I EEC-il I
X
X

SENSORS/ INPUTS
THROTTLE POSITION BAROMETER/MANIFOLD PRESSURE EGR VALVE POSITION EXHAUST GAS OXYGEN INFERRED MILEAGE VANE AIR FLOW VANE AIR TEMP PROFILE IGNITION AIR CONDITIONING CLUTCH NEUTRAL/DRIVE SWITCH SELF TEST
CARB AIR TEMP ENGINE COOLANT TEMP CRANKSHAFT POSITION
X X
X

EEC-IVI 83
EFI
X
X

system wherein fuel is metered into the intake air stream in accordance with engine demand via two throttle body mounted solenoid injectors. The CFI concept utilizes speed density calculations of the engine's air flow characteristics to precisely determine the pulse duration modulation of fuel delivery through the injectors for economical and imXII. EVOLUTION OF ELECTRONIC ENGINE proved control of air-fuel ratio. In the span of three years, CONTROLS AT FORD Ford introduced interactive electronic control, using microThe evolution of electronic engine control systems at processors, of the four key engine parameters: spark timing, Ford Motor Company is shown in Fig. 15. The use of digital EGR flow, secondary air, and air-fuel ratio. Ford's all-new electronics engine controls began in 1978 with the first gen- fourth generation electronic engine control system, EEC-IV, eration Electronic Engine Control (EEC-I) system for inter- will be introduced on selected 1983-model-year applicaactive control of spark timing and exhaust gas recirculation. tions starting with the 1983 1.6-1 EFI engine on Escort, Next came EEC-Il in 1979, which added feedback-controlled Lynx, EXP, and LN7 passenger cars. The EEX-IV system

trol strategies employed, electronic engine control system complexity is influenced by a) the particular sensor/actuator combinations and their respective accuracy and response requirements, and b) the computational power, processing speed, and program memory requirements inherent in implementing the selected strategies. Therefore, today's electronic engine control system must have designed-in flexibility to address this range of powertrain products and options. Secondly, consider product commonality. The installation rate of electronic engine controls (virtually all 1984-model passenger cars sold in the United States will have electronic engine controls) alludes to the large numbers of people in different automotive product activities who must be involved with this microprocessor-based product from design inception through production and field service. Consequently, the electronic engine control product family, model year to model year, must have an inherent designed-in commonality or at least downward compatibility. Hardware, software, and system commonality and modularity are also vitally important to minimize development time and cost. Clearly, as electronic engine control product application rates and product life cycles increase, the relative importance of product flexibility and commonality/modularity as design objectives, when compared to technical and functional objectives, increases. Fig. 14 outlines several electronic engine control product considerations where flexibility and commonality are important.

X
X

X
X

X
X

X
X X
X

X
X X X X

X
X

X
X

FUNCTIONS / OUTPUTS
FUEL CONTROL FBC
EFI CFI
X

X X
X

AIR MANAGEMENT SELF DIAGNOSTICS FUEL ECONOMY METER INTERFACE SELF TEST OUTPUT DECEL FUEL SHUT-OFF EGR ON/OFF WOT AC CUT-OFF

THROTTLE KICKER IDLE SPEED CONTROL

SPARK CONTROL CANISTER PURGE

PROPORTIONAL EGR

X X
X X

X X
X
X

X
X X

X X

X
X

X X

X X
X
X

carburetion and secondary air injection into a three-way catalyst. In 1980, Ford introduced EEC-Ill for use with a Central Fuel Injection (CFI) delivery system. The EEC-Ill system is a single-point pulse-time modulated fuel-injection

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FLIS: MICROPROCESSORS FOR ELECTRONIC ENGINE CONTROL

85
XTAL

state-of-the-art concept in electronic engine management, providing control capability for the following functions in 1983: a) fuel-Electronic Fuel Injection ('83) or Feedback Carburetor ('83 1/2); b) ignition-spark timing (all applications) and interactive knock control ('83 1/2); c) exhaust gas recirculation; and d) boost control for turbocharged applications (83 1/2). These features utilize only a fraction of EEC-IV's capability; additional features are planned for 1984 and beyond. Specifically, the 1.6-1 EFI engine electronics system for 1983 is composed of six sensors, an EEC-IV control module, two switches, three solenoids, two relays, and four injectors. Table III details the sensors/inputs and functions/outputs for III and IV, respectively. EEC-I, II,
represents
a new

Vcc ANALOG INPUTS

13

C= HIGH SPEED
8081 MICROPROCESSOR
3(8 LEAD FLATPACK)
S
-

HIGH SPEED DIGITAL OUTPUTS BIDIRECTIONAL LINES

RESET

8
2

EEC-IV

8E
8

-tDIGITAL iNPUTS 8 MORY BUS

CONTROL LINES LOW SPEE DIGITAL OUTPUTS

INTERRUPT-

1NTERRUPT-

Fig. 16. EEC-IV microprocessor I/O

GND

configuration.

TABLE IV EEC-IV PERFORMANCE RELATIVE TO EEC-III

MAXIMUM CAPABILITY EEC IV
CLOCK FREQUENCY MEMORY ADDRESS CAPABILITY INPUT CHANNELS
15 MHz
EEC III (REF)
4 MHz

PERFORMANCE RATIO

XIII. EEC-IV CHIP SET The EEC-IV electronic engine control system was designed and developed to provide superior functional capability and maximum flexibility to handle all of Ford Motor Company's engine control requirements through the 1980's [10] . The heart of the EEC-IV system is a pair of custom VLSI integrated circuits, the 8061-a companion 8 K-byte ROM/128byte RAM. Developed jointly by Ford Motor Company and Intel Corporation, this optimal two-chip microcomputer system was tailored specifically for electronic engine control application using state-of-the-art HMOS process technology for maximum performance and circuit density [11]. A third custom chip, the Keep Alive Memory (KAM), a low-power static CMOS 128-byte RAM from Toshiba Corporation, was developed for additional engine control system flexibility in implementation of adaptive fuel control and diagnostics strategies. Fig. 16 highlights the all-important I/O configuration of the 68-lead flat package version of the 8061. Notice that 41 of the 68 leads (60 percent) are allocated for I/O (maximum I/O capability was a major design objective for EEC-IV). An optional 40-lead dual in-line package version of the 8061 that utilizes the identical die, but with a reduced bond out of I/O pads, has 18 pins dedicated to I/O. For additional design flexibility, the 8061 is available in two clock-frequency versions, 7.5 and 15 MHz. Key 8061 architectural features are as follows. 1) On-Chip Analog-to-Digital (A/D) Converter: A full 10-bit 13-channel successive approximation A/D converter with a 35-ps conversion time has been intergrated on-chip. 2) Hardware Multiply and Divide: Most controller applications, particularly automotive engine control, require high-speed hardware MUL/DIV capability. The 8061 executes a 16 X 16 multiply or a 32 X 16 divide in 5.1 Ms. 3) Watchdog Timer: A 16-bit watchdog timer is designed to generate a CPU reset when it overflows. This feature is used to prevent system runaway. Normal program execution must periodically clear the watchdog. Should a program get lost, the watchdog would overflow, reset the CPU, and force a return to the base program. 4) Two High-Speed I/O Coprocessors: Ford Motor Company engineers developed and patented ([12] -[14]) the fundamental concepts for high-speed processing of digital input and output signals to reduce CPU 1/0 service overhead.

64K

8K

8X

ANALOG DIGITAL HIGH SPEED

TOTAL
OUTPUT CHANNELS
HIGH SPEED LOW SPEED

13 83

10
2

21

12

19X

10

BI-DIRECTIONAL

8 2'
20

10
10
IOBfT

2X

DATA WORD SIZE

8OR 16 BIT

64X

A/D CONVERTER
SPEED RESOLUTION
SPEED MULTIPLY BYTE DIVIDE BYTE HIGH SPEED 1/0 RESOLUTION

35 SEC 1S 25 CRANK-' SHAFT , 6000 RPMI 35 _SEC 10 BT

3 4 jiSEC

2500 uSEC 8 BIT

8 uSEC

71X 4X
23X

36 6SEC 2 4 'SEC

10,uSEC
25 uSEC

28X 104X

'(SPARK ONLY),

'SAME CHANNELS CAN BE USED EITHER FOR INPUT OR OUTPUT

An 11-deep first-in first-out (FIFO) register stack was designed for high-speed inputs, and a 12-slot content addressable memory (CAM) circulating file is used for the highspeed outputs. At 15 MHz, input-signal transitions can be resolved to within 1.2 ps, and output transitions can be generated with the same time resolution. 5) Multilevel Prioritized Interrupt Structure: A two-level eight-input sequential priority interrupt hierarchy determines the order of service routine execution when an interrupt
occurs.

6) Large Memory Address Space: The 8061 has a full 16-bit addressing range (64K). The first 256 locations reside on-chip and refer to the internal general register file. 7) Powerful Instruction Set and Addressing Modes: Bit, byte, word, and double-word data types and operations are supported. A total of 230 instructions, which include extensive test and conditional jump instructions, combined with 6 addressing modes (direct, immediate, indirect, indirect with auto increment, short indexed, and long indexed), have been defined to minimize average instruction length (and thereby reduce program memory size) and increase execution speed. To highlight the capabilities of the 8061 microprocessor,

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86
400 p

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

350
300

EXECUTION 250 SPEED 200

150
1OC

50
EEC
EEC 11

EEC III

EEC IV

Fig. 17. Execution speed evolution.

MAXIMUM 64K MEMORY CAPACITY (IN BYTES)
64K

10K 9K 8K 7K

6K 5K

/I /b1

16X

Fig. 20. Support tools are a major portion of the total electronic engine control development task.

4K 3K

2K

1K

EEC

EEC 11

EEC III

EEC iV

so ;

Fig. 18. Memory capacity evolution.

NUMBER OF 10
50

STRATEGY DEVELOPMENT DESIGN

COMPUTER SIMULATOR

40-

30'

2o
10'
EEC

BENCH TEST WITH DEVELOPMENT SYSTEM

3;

EEC 11

EEC III

EEC IV

VEHICLE DEVELOPMENT

"SOFT TOOLED

Fig. 19. I/O-capacity evolution.

PARTS" (PROM)

relative comparison of key features between EEC-IV (8061) and EEC-Ill chip sets was made (Table IV). The EEC-IV 8061 microprocessor system, listed in Table IV, represents the maximum-capability 68-lead 1 5-MHz design; the performance ratios would obviously be different for a 40-lead 7.5-MHz design comparison with EEC-IlI. The improvements in execution speed (Fig. 17), memory capacity (Fig. 18), and I/O capacity (Fig. 19) made during the electronic engine control evolution at Ford, from EEC-I to EEC-lI to EEC-Ill and to EEC-IV, parallel the advancements made in VLSI microprocessor design and semiconductor process technology from 1978 through today. Presently, the 8061 microprocessor and 8361 ROM/RAM utilize HMOS I technology. Both were designed to be scaled as semiconductor process technology advances (HMOS I to HMOS II and then HMOS III), develops and achieves production qualification status for automotive application. EEC-IV components and systems will therefore evolve in concert with semiconductor process advances to address all of Ford's electronic engine control requirements through the 1980's.
a

CALIBRATION

ROM CODE DEFINITION TO SUPPLIER

"HARD"
TOOLED PARTS

RELEASE

SOFTWARE

"HARD"

(ROM)

Fig. 21. Typical engine control strategy.

development effort. Critical elements of any microprocessorbased product are the hardware/software support tools. Hardware tools include in-vehicle and lab debug/monitor units, input signal simulators, output load boxes, and EPROM memory units. Software tools include assemblers, cross assemblers, realtime simulators, and programs for engine strategy/calibration, file management, and code release. Fig. 21 is a flow chart of typical strategy development procedure from initial strategy XIV. EEC-IV SUPPORT HARDWARE AND SOFTWARE design to final production code release. Since this process As shown in Fig. 20, the EEC-IV VLSI chip set and control could include reiterations for emissions and fuel economy module represent the tip of the iceberg in terms of design and certification and testing, it can take up to 1-2 years.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. IE-30, NO. 2, MAY 1983

87

XV. CONCLUSIONS

Today's automobiles represent the successful integration of microprocessor-based systems for sophisticated engine control. The question no longer is whether electronic engine controls are to be used or not, but rather how cleverly they are to be used. In addition to expanded functions (e.g., interactive engine and transmission control), the objectives now will be concerned with reducing the component complexity of electronic controls and with enhancing the quality, durability, and reliability of the product. Electronics will continue to provide the solution for maximum fuel economy within the prescribed emission constraints at levels of driveability, reliability, and cost acceptable to the consumer. REFERENCES
[11 K. Layne, K. C. Lahue, and G. Clark, "Introduction to fuel system and emission controls," in Fuel Systems and Emission Controls. New York: Harper & Row, 1978, pp. 2-9. [21 J. F. Cassidy, Jr., "Electronic closed-loop control for the automobile," Society of Automotive Engineers, paper no. 740014 (SP388). [31 C. A. Amann, "Control of the homogeneous-charge passenger-car engine-Defining the problem," Society of Automotive Engineers,

[4]

[5]

[6]
[7] [8] [91
[10]

[11]
[12]

[13]

[14]

Paper 801440; also presented at the Detroit Section Junior Activity Spring Lecture Series, Mar., 1980. H. A. Nickol, "Automotive powertrains-Now and into the 1990's," Society of Automotive Engineers, Paper 801340; see also "Engines, fuels and lubricants-A perspective on the future,," SP-47 1, Oct., 1980. R. P. Canale, C. R. Carlson, S. R. Winegarden, and D. L. Miles, "General Motors Phase II catalyst system," Society of Automotive Engineers, paper no. 780205. M. Slater and B. Bronson, "Inside the microprocessor," in Practical Microprocessors. Santa Clara, CA: Hewlett-Packard, Mar. 1979, p. 83. C. A. Ogdin, "EDN pC design course,"' Electron. Des., Nov. 20, 1976. D. Bursky, "Memory chips of every type are exploding density limits," Electron. Des., Aug. 19, 1982. J. F. Wakerly, Microcomputer Architecture and Programming. New York: Wiley, 1981. D. F. Hagen and D. F. Wilkie, "EEC-IV: Tomorrow's electronic engine controls today," presented at Convergence '82, Dearborn, MI, Oct. 1982. R. C. Breitzman and J.H. Kerins, "Development of an optimal automotive control custom microprocessor," presented at the Soc. Automotive Eng. Congr., Detroit, MI, Feb. 1982, paper no. 820250. B. S. Edelman and R. L. Robinson, "Improved binary input/output processing in a digital computer," U.S. Patent 4 283 761. B. S. Edelman and R. L. Robinson, "Improved binary input processing in a digital computer," U.S. Patent 4 259 719. B. S. Edelman and R. L. Robinson, "Improved binary output processing in a digital computer," U.S. Patent 4 279 015.

Applications of Microcomputers in Automotive Electronics

JONAS BEREISA
Abstract-The history of microcomputer application in automotive electronics is briefly reviewed. American, Japanese, and European automobile manufacturer's microcomputer products are considered, and representative production designs are compared. Differences in approaches and problem solutions are examined. The chronological introduction of microcomputer-controlled functions is presented for engine, transmission, entertainment/comfort/convenience, and instrument panel control. Growth trends are noted for each category, and future automotive microcomputer applications are discussed. Projections are made of future semiconductor VLSI technology and automotive microcomputers.

I. INTRODUCTION
motive milestone was reached. Microcomputerized engine controls were incorporated in the entire domestic gasoline engine-powered passenger car production of General Motors. Because this involved a major production commitment to microcomputer-based electronics by General Motors, it essentially
Manuscript received October 6, 1982; revised December 17, 1982. The author is with Delco Electronics Division, General Motors Corporation, Goleta, CA 93117.

IN 1981, a relatively unnoticed, but highly significant, auto-

ushered in the long awaited "age of computers" in automobiles-in volume production. The federal and state mandated engine emission and fuel economy requirements for 1981 posed a unique problem. To meet both requirements simultaneously, and still provide good vehicle driveability, required interactive engine controls. However, interactive mechanical controls of the required accuracy and complexity were either not possible or not cost-effective. This gave rise to the "acceptance by necessity" of the microcomputer by the United States automotive industry as a practical and cost-effective engine control solution. The 1981 model year accounted for approximately 3 700 000 GM closed-loop carburetor engine control modules (ECM) and GM digital electronic fuel-injection ECM's. To deliver these quantities, GM's Delco Electronics Division had to reach and sustain production rates of 22 000 ECM's per day. This task involved concurrent implementation of new technology, manufacturing methods, and test approaches and equipment. In the case of the Motorola M6802-based designs and for the General Motors Custom Microcomputer (GMCM) chip set, this necessitated outright buys from, as well as coproduction among, Delco Electronics and five major semi-

0278-0046/83/0500-0087$01.00 1983 IEEE

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