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International Journal of ElectronicsJOURNAL and Communication Engineering & Technology (IJECET), INTERNATIONAL OF ELECTRONICS AND ISSN 0976 6464(Print),

, ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)

ISSN 0976 6464(Print) ISSN 0976 6472(Online) Volume 5, Issue 1, January (2014), pp. 01-10 IAEME: www.iaeme.com/ijecet.asp Journal Impact Factor (2013): 5.8896 (Calculated by GISI) www.jifactor.com

IJECET
IAEME

CONTROL SIGNAL GENERATION OF SWITCHING COMPONENTS FOR FREQUENCY REGULATION TO THE OUTPUT SIGNAL AC
Sabrije OSMANAJ Faculty of Electrical and Computer Engineering, University of Prishtina, Prishtina, Kosova

ABSTRACT In this paper was developed single-phase controller circuit for inverter using microcontroller. Inverter with PWM is easier to implement in microcontroller, and to generate control signals to the exit. However, this type of modulation is characterized by high distortion factor. For this reason, for generating control signals for switching components we used wavelets. As shown in this paper, wavelet expressions enable us to control the frequency of the pulses, width and number within a half period. It formed the corresponding model, also shows the results of simulations. An ATMEL AVR Atmega328p microcontroller is used to generate gating signals. By implementing such wavelets expressions on microcontroller, development of a configurable switching signal generator is possible. Such generators can be applied on invertors and AC motor speed controllers. Key-Words: Wavelets, Microcontroller, Single-phase DC/AC converter, Interrupt vectors. 1. INTRODUCTION

Single phase and three phase AC motors have a huge application in industry. On mostly of these applications, remote or local motor speed regulation and control is necessary. Because of AC motors design, controlling of speed is achieved by changing the frequency of motor driving voltage. To control this voltage source, AC motor needs to be supplied from a DC/AC converter. This converter also provides controlling the amplitude of driving voltage [1]. Pulse Width Modulation (PWM) topology and Space Vector Modulation (SPM) topology are mostly know to be implemented on design of DC/AC converters. In this paper, controlling frequency of output driving voltage by measuring the frequency of input voltage source approach has described. This circuit consists of three main blocks: frequency measuring block, processing block and DC/AC converting block. Processing block calculates the frequency of input voltage source and controls the frequency of output driving voltage. Therefore,
1

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

this paper is divided in two main parts: where technique of measuring the frequency is described and generating of output driving voltage with controllable frequency approach is described. 2. MEASUREMENT OF AC INPUT VOLTAGE FREQUENCY

A transformer with Np/Ns ration of 0.1 has been used for galvanic isolation between voltage input source and measuring circuit. Measurement of the frequency is achieved by measuring the time (half-period) between last two zero-cross of the voltage input source. Diode bridge is connected in cascade with the secondary winding to rectify the voltage signal from transformer. To start with, 220 [] resistive load is wired with output terminals of the diode bridge. An operation amplifier is used to detect zero-cross of voltage by comparing the rectified voltage signal and grounding point.
XSC1
Ext T rig + _ A + _ + B _

D1 V1

D3

R2 220 Vpk 50 Hz 0
0

T1 2 220
3

V3 7V

D2

11

D4

U2A v_out
1

3 4

LM324D V2 7V D5

R4 1k

C1 0.1F

Figure 1: Cross-zero detecting circuit As shown in figure 1, positive pin of the operational amplifier (integrated circuit LM234D) is connected to referent grounding rail, and the negative pin of operational amplifier is connected to the positive output pin of the diode bridge. On the other hand, a 1 [k] dummy load is connected to the output of the operational amplifier. Also, cathode of a diode (D5) is connected to the output of operational amplifier and serves as a negative voltage clipping. Waveform of the rectified voltage at output of the diode bridge (red) and the waveform of signal at output node of operation amplifier (green) which represents the cross-zero detecting signals are shown in figure 2. Software of implemented microcontroller consists of two main sessions: configuration session and routine session. Configuration data, declarations and initialization are located at the configuration session. And on the other hand, generating the modulated gating signals in function of the frequency is executed in main routine main loop.

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

Figure 2: Waveform of rectified voltage (red) and the cross-zero detecting signal waveform (green) Every instruction block located in memory is decoded and executed from central processing unit. Whereas, interrupts are signal that triggers the processing unit to change the execution routine. Processing unit is switched to execute certain instructions at predefined locations which depends from interrupting signal and goes back to execute the main routine. These predefined locations are known as interrupt vector addresses or interrupt vectors. ATmega328p microcontroller provides several interrupting sources, including internal interrupts as well as external interrupts. External interrupts can be triggered by two groups of pins: external interrupting pins (PINn) and pin exchange external interrupt pins (PCINTn). In general, for each interrupting source there is an interrupting vector which controls switches the processing unit at certain instruction block [4]. In this paper, an ATmea328p microcontroller is implemented. Interrupting source INT0 is used to detect any voltage level change at the output of comparing amplifier connected at PORTD2 pin of microcontroller. INT0 interruption can be triggered by falling edge sensing or rising edge sensing. As shown in figure 2, the pulse rises when the input signal falls at zero. Therefore, to detect this fall, rising edge detection is the right interrupting option. At EICRA register (EICRA, external interrupt control register A) of ATmgea328p microcontroller, corresponding ISC00 and ISC01 (ISC, interrupt sense control) bits defines the interrupt sensing type. All possible combination of ISC00 and ISC01 bits, respectively are listen on table 2. Referring to this table, to detect the rising edge, ISC00 and ISC01 bits needs to assign at high bit state, as shown in code below. Table 2: Combination of two interrupt sense control bits for ATmega328 microcontroller. [1] ISC01 ISC00 Description 0 0 Low-level at INT0 triggers an interrupt request. 0 1 Any logical state change at INT0 triggers an interrupt request. 1 0 Falling edge at INT0 triggers an interrupt request. 1 1 Rising edge at INT0 triggers an interrupt request. Code 1: Assigning the ISC00 and ISC01 bits at EICRA register EICRA|=(1<<ISC00); EICRA|=(1<<ISC01);

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

A voltage follow realized with an operational amplifier is used as an intermediate circuit to connect the output of zero-detecting circuit and the input of microcontroller, as shown in figure 3. The voltage follower circuit is realized by using the LM324D integrated circuit. Because of high input impedance of operation amplifier, there is no current leakage from zero-detecting circuit and microcontroller only voltage following is achieved. Following circuit ATmega328p microcontroller based on AVR architecture is shown in figure 4. As seen, the 5 [V] dc source is supplying the microcontroller and clocked by 16 [MHz] external oscillators. Zero-cross detecting signal is followed be signal follower at pin PD2 of microcontroller and shunted by a 220 [] pull-down resistor to avoid high-impedance state.
V3 7V
11 2

U2A PD2
1

v_out
3 4

LM324D V2 7V

Figure 3: Voltage follower designed by using LM324D IC operation amplifier

G1

G2

G1

G2

PD2 R4 220 C1 22pF C2 22pF X1 16MHz

VCC 5V IC1
1_PC6 2_PD0 3_PD1 4_PD2 5_PD3 6_PD4 7_VCC 8_GND 9_PB6 10_PB7 11_PD5 12_PD6 13_PD7 14_PB0 28_PC5 27_PC4 26_PC3 25_PC2 24_PC1 23_PC0 22_GND 21_AREF 20_AVCC 19_PB5 18_PB4 17_PB3 16_PB2 15_PB1

VCC 5V

ATmega328p

Figure 4: Microcontroller circuit

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

3.

GENERATING THE SWITCHING DEVICES CONTROLLING SIGNALS

There are several pulse width modulation strategies to generate the gating signals, such as: single pulse width modulation, multiple pulse width modulation, sinusoidal pulse width modulation, modified sinusoidal modulation, step modulation, delta modulation, etc. Two signals needs to be compared in order to use on of strategies listed above: reference signal and carrier signal [5]. Therefore, to design any system based on one of strategies listed above, two independent signal sources needs to be included. In this paper, Haar wavelets are used to solve the generating of gating signals. With this solution, there is no need for carrier signal; therefore this solution can be called carrierless pulse width modulation. Wavelets are defined by the wavelet function (also called the mother wavelet) and a Haar scaling function : 1 1 2 1 0 0,1 1 0 1 2 (1)

Dilation and translation of generates a family of Haar scaling function: , 2

1 01 0 0,1

(2)

where j is the scale parameter and k is the translation parameter. The output PWM signal is controlled by changing the value of width and position of pulses, respectively. To generate variable width pulses, two Haar scaling functions are combined to construct a new scaling function given as: 2 2 1 2 2 2 1 2

(3)

Function , is subtracted from the original Haar scaling function to obtain a synthesis function: which represents the pulse function at high level state from and , where and are given as: 2 1 2 (5.a) (5.b) (4)

where j is the scale parameter and 1 is a constant.

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

For D pulses within half-period , times and of pulse d, are given by 2 1 2

(6.a) (6.b)

for d = 0, 1, 2, , D-1, and width of pulses depends from and j, but since is a constant parameter, width of all D pulses depends from j parameter. At following part of this paper, simulation according to expressions (6.a) and (6.b) for D = 4, 6, 8 and 16, are listed using Matlab. Also, attached to results, corresponding half-period waveforms are shown. 4. SIMULATIONS

Results 1: Pulses for D = 4, =0.4. Tm = 0.50 D =4 = 0.40 j=[1221] ============================================= d(0), j(1) td1=0.0474[s] -> td2=0.0776[s] dt=0.0303[s] d(1), j(2) td1=0.1609[s] -> td2=0.2141[s] dt=0.0532[s] d(2), j(2) td1=0.2859[s] -> td2=0.3391[s] dt=0.0532[s] d(3), j(1) td1=0.4224[s] -> td2=0.4526[s] dt=0.0303[s] =============================================
Tm = 0.50 | D = 4 | = 0.40 1.4 d=0 1.2 j=1 1 j=2 j=2 j=1 d=1 d=2 d=3

0.8

0.6

0.4

0.2

-0.2 -0.1

0.1

0.2 Koha (s)

0.3

0.4

0.5

0.6

Figure 6: Waveform of results 1 (for half-period)

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME

Results 2: For D = 6, =0.4. Tm = 0.50 D =6 = 0.40 j=[123321] ============================================= d(0), j(1) td1=0.0316[s] -> td2=0.0518[s] dt=0.0202[s] d(1), j(2) td1=0.1073[s] -> td2=0.1427[s] dt=0.0355[s] ..................................................... d(4), j(2) td1=0.3573[s] -> td2=0.3927[s] dt=0.0355[s] d(5), j(1) td1=0.4482[s] -> td2=0.4684[s] dt=0.0202[s] =============================================

Tm = 0.50 | D = 6 | = 0.40 1.4 d=0 1.2 j=1 1 j=2 j=3 j=3 j=2 j=1 d=1 d=2 d=3 d=4 d=5

0.8

0.6

0.4

0.2

-0.2 -0.1

0.1

0.2 Koha (s)

0.3

0.4

0.5

0.6

Figure 7: Waveform of results 2 (for half-period) Results 3: For D=8. Tm = 0.50 D =8 = 0.40 j=[12344321] ============================================= d(0), j(1) td1=0.0237[s] -> td2=0.0388[s] dt=0.0151[s] d(1), j(2) td1=0.0804[s] -> td2=0.1071[s] dt=0.0266[s] ................................................. d(6), j(2) td1=0.3929[s] -> td2=0.4196[s] dt=0.0266[s] d(7), j(1) td1=0.4612[s] -> td2=0.4763[s] dt=0.0151[s] =============================================

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME
Tm = 0.50 | D = 8 | = 0.40 1.4

1.2

0.8

0.6

0.4

0.2

-0.2 -0.1

0.1

0.2 Koha (s)

0.3

0.4

0.5

0.6

Figure 8: Waveform of results 3 (for half-period) Results 4: For D=16. Tm = 0.50 D = 16 = 0.40 j=[1234567887654321] ============================================= d(0), j(1) td1=0.0118[s] -> td2=0.0194[s] dt=0.0076[s] d(1), j(2) td1=0.0402[s] -> td2=0.0535[s] dt=0.0133[s] ................................................... d(14), j(2) td1=0.4465[s] -> td2=0.4598[s] dt=0.0133[s] d(15), j(1) td1=0.4806[s] -> td2=0.4882[s] dt=0.0076[s] =============================================
Tm = 0.50 | D = 16 | = 0.40 1.4

1.2

0.8

0.6

0.4

0.2

-0.2 -0.1

0.1

0.2 Koha (s)

0.3

0.4

0.5

0.6

Figure 9: Waveform of results 4 (for half-period)

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME
G1 G2

C1

S1 V_load
+ V

S2

0.000

V_batt G2 R_Load

G1

C2

S4

S3

Figure 10: Diagram of single phase dc-ac converter

Sinjali i gaitit G1: Tm = 0.50 | D = 6 | = 0.40 1 0.8 0.6 0.4 0.2 0 -0.2 0 0.2 0.4 Koha (s) Sinjali i gaitit G2: Tm = 0.50 | D = 6 | = 0.40 1 0.8 0.6 0.4 0.2 0 -0.2 0 0.2 0.4 Koha (s) 0.6 0.8 1 0.6 0.8 1

Figure 11: Gating signals G1 and G2

International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online), Volume 5, Issue 1, January (2014), IAEME
V load

10

-5

-10

Figure 12: Voltage waveform at dummy load


0 0.1 0.2 0.3 0.4 0.5 Koha (s) 0.6 0.7 0.8 0.9

5.

SUMMARY

The strategy of controlling the gates is shown in Figure 10. Switches S1 and S3 will be controlled by the signal G1, and switches G2 and G4 will control by the gate signal G2. G1 and G2 signals generated from the microcontroller. The microcontroller calculates time between two zerocrosses and generates gating signals using Haar scaling functions. Microcontroller accounts time Tm and taking D and generates signals G1 and G2 in pine PD3, PB3, PB1 and PB2. The voltage waveform at output inverter for load resistive will be as shown in Figure 12. As a result, we can conclude that the use of wavelets and Haar scaling functions - is easier to implement because it requires only two equations to generate switching signals. By this approach, there is no need for carrier signal carrierless PWM approach, too. For future works, real-time experiments has to be done to get data of the accuracy of frequency calculation, distortions factor and transient effects while changing the frequency of input signal. 6. REFERENCE
[1] [2] [3] [4] [5] [6] Holmes, D. G. & Lipo, T. A (2003). PWM for Power Converters Principles and Practice, John Wiley & Sons. Inc., Canada Lipo, T. A. (1996). Introduction to AC Machine Machine Design, Vol. 1, University of Wisconsin Power Electronics Research Center, Madison F. Wang, Sine-Triangle versus Spae Vector Modulation for Three-Level PWM Voltage Source Inverter, IEEE Trans. On Industry Applications, Vol. 38, No. 2, 2002 J. H. Seo, C. H. Choi, V. Hyun, A. New Simplified Space Vector PWM Method for Three Level Inverters, IEEE Trans. On Power Electronics, Vol. 16, No. 4, 2001. M. Rashid, Power Electronics: Circuits, Devices and Applications, Third edition, Prentice Hall, 2003. L.Raguraman and P.Sabarish, Integrated Bridgeless PWM Based Power Converters, International Journal of Advanced Research in Engineering & Technology (IJARET), Volume 4, Issue 5, 2013, pp. 17 - 23, ISSN Print: 0976-6480, ISSN Online: 0976-6499. B.Kiran Kumar, Y.V.Sivareddy and M.Vijayakumar, Comparative Analysis of Sine Triangle and Space Vector PWM for Cascaded Multilevel Inverters, International Journal of Electrical Engineering & Technology (IJEET), Volume 4, Issue 2, 2013, pp. 155 - 164, ISSN Print: 0976-6545, ISSN Online: 0976-6553.
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