Features Description: Lt3763 60V High Current Step-Down Led Driver Controller

FEAtURES
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LT3763 60V High Current Step-Down LED Driver Controller DESCRIPtION

The LT3763 is a fixed frequency, synchronous, step-down DC/DC controller designed to accurately regulate output currents up to 20A. The average current mode controller will maintain inductor current regulation over a wide output voltage range from 0V to 55V. Output current is set by analog voltages on the CTRL pins and an external sense resistor. Voltage regulation and overvoltage protection are set with a voltage divider from the output to the FB pin. The switching frequency is programmable from 200kHz to 1MHz through an external resistor on the RT pin or with the SYNC pin and an external clock signal. Input and output current sensing provides input current limiting and an accurate measurement of these currents. The FBIN pin is provided for applications requiring a peak power tracking function. Additional features include an accurate external reference voltage for use with the CTRL pins, an accurate UVLO/ EN pin that allows for programmable UVLO hysteresis, a PWM driver for LED applications, output voltage fault detection, and thermal shutdown.
Accurately Control Input and Output Current 3000:1 True Color PWM Dimming 1.5% Voltage Regulation Accuracy 6% Current Regulation Accuracy 6V to 60V Input Voltage Range Wide Output Range Up to 55V <2A Shutdown Current Control Pin for Thermal Control of Load Current Input and Output Current Monitor and Limit Open, Short, and C/10 Fault Detection PWM Driver Output for LED Applications Thermally Enhanced 28-Lead FE Package
APPLICAtIONS
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High Power Architectural Lighting Automotive Lighting Aviation and Marine Strobe Lights Solar-Powered Chargers, Laser Diodes
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and True Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7199560, 7321203 and others pending.
TYPICAL APPLICAtION
20A, Pulse Width Modulated, Single LED Driver
VIN 10V TO 30V 2.5m 84.5k 15.4k IVINP EN/UVLO 2.2F VREF 45.3k CTRL2 470k 50k CTRL1 FBIN IVINMON ISMON PWM SYNC RT 82.5k 10nF SS LT3763 BOOST SW INTVCC 47.5k BG GND 50 1nF 50 1nF SENSE+ SENSE PWMOUT FAULT FB VC 59k 4.7nF 12.1k
3763 TA01
1k
1F
1k
100F 4.7F
IVINN
VIN TG 220nF 1.5H 2.5m VOUT 6V, 20A MAXIMUM 220F 2 22F
PWM Dimming
PWM 10V/DIV VSW 50V/DIV IL 5A/DIV 5s/DIV
3763 TA01b
10
10
33nF
47.5k
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For more information www.linear.com/LT3763
LT3763 ABSOLUtE MAXImUm RAtINGS

(Note 1)
PIN CONfIGURAtION
TOP VIEW BG INTVCC VIN EN/UVLO VREF IVINN IVINP IVINMON FAULT 1 2 3 4 5 6 7 8 9 29 GND 28 GND 27 BOOST 26 SW 25 TG 24 PWM_OUT 23 GND 22 PWM 21 SYNC 20 RT 19 ISMON 18 VC 17 SENSE+ 16 SENSE 15 SS
VIN, EN/UVLO, IVINP, and IVINN................................60V SENSE+ and SENSE..................................................60V CTRL1, CTRL2, FB, and FBIN.......................................3V SYNC and PWM...........................................................6V INTVCC and FAULT.......................................................6V VC, RT, and SS.............................................................3V VREF, IVINMON, and ISMON.........................................3V SW.............................................................................60V BOOST.......................................................................66V BOOST-SW...................................................................6V Operating Junction Temperature (Notes 2, 3) LT3763E/LT3763I............................... 40C to 125C LT3763H............................................. 40C to 150C Storage Temperature Range................... 65C to 150C Lead Temperature (Soldering, 10 sec).................... 300C
FBIN 10 FB 11 GND 12 CTRL2 13 CTRL1 14
FE PACKAGE 28-LEAD PLASTIC TSSOP JA = 30C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORdER INfORmAtION
LEAD FREE FINISH LT3763EFE#PBF LT3763IFE#PBF LT3763HFE#PBF TAPE AND REEL LT3763EFE#TRPBF LT3763IFE#TRPBF LT3763HFE#TRPBF PART MARKING* LT3763FE LT3763FE LT3763FE PACKAGE DESCRIPTION 28-Lead Plastic TSSOP 28-Lead Plastic TSSOP 28-Lead Plastic TSSOP TEMPERATURE RANGE 40C to 125C 40C to 125C 40C to 150C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECtRICAL CHARACtERIStICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25C. VIN = 12V, VEN/UVLO = 5V unless otherwise noted.
CONDITIONS From Low to High VEN/UVLO = 1.4V, Not Switching VEN/UVLO = 0V 1.47 EN/UVLO = 1.4V, VIN = 6V 1.4 MIN 6 3.75 4.0 1.7 0.2 1.52 185 5 1.5 675 1.6 TYP PARAMETER Input Voltage Range Supply Undervoltage Lockout VIN Pin Quiescent Current Non-Switching Operation Shutdown Mode EN/UVLO Pin Threshold (Falling Edge) EN/UVLO Hysteresis EN/UVLO Pin Current SYNC Pin Threshold (Falling Edge) SYNC Pin Hysteresis MAX 60 4.25 3.5 2 1.57 UNITS V V mA A V mV A V mV
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LT3763 ELECtRICAL CHARACtERIStICS The l denotes the specifications which apply over the full operating
PARAMETER PWM Pin Threshold (Falling Edge) PWM Pin Hysteresis CTRL1 Pin Current CTRL2 Pin Current Reference Reference Voltage (VREF pin) Inductor Current Sensing Full Range SENSE+ to SENSE SENSE+ Pin Current SENSE Pin Current Internal VCC Regulator (INTVCC Pin) Regulation Voltage Current Limit NMOS FET Driver Non-Overlap Time TG to BG Non-Overlap Time BG to TG Minimum On-Time BG Minimum On-Time TG Minimum Off-Time BG High Side Driver Switch On-Resistance Gate Pull-Up Gate Pull-Down Low Side Driver Switch On-Resistance Gate Pull-Up Gate Pull-Down Switching Frequency Soft-Start Charging Current Voltage Regulation Amplifier Input Bias Current gm Feedback Regulation Voltage FAULT Comparator Upper FAULT Threshold (FB Rising) Upper FAULT Threshold Hysteresis Lower FAULT Threshold (FB Falling) Lower FAULT Threshold Hysteresis FAULT Pull-Down Current Input Voltage Regulation FBIN Pin Current Sense Voltage (VSENSE+ VSENSE) VFBIN = 1.5V VFBIN = 1.22V, VSENSE = 4V VFBIN = 1.26V, VSENSE = 4V 150 10 45 nA mV mV
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CONDITIONS
MIN 1.4
TYP 1.5 675 20 100
MAX 1.6
UNITS V mV nA nA
VCTRL1 = 1.5V VCTRL1 = 1.5V, VCTRL2 = 1.5V, VFBIN = 2V

l
1.94 48
2 51 20 40
2.06 54
V mV A A
VCTRL1 = 2V, VCTRL2 > 2V, VSS = VFBIN = 2V, VC = 1.2V VSENSE+ = VSENSE = 4V VSENSE
+=V SENSE = 4V, V CTRL1 = 1.5V
ILOAD = 10mA VINTVCC = 0V
4.8
5 60 42 44
5.2
V mA ns ns ns ns ns
(Note 4) (Note 4) (Note 4) VCBOOST VSW = 5V VINTVCC = 5V RT = 40k RT = 221k 930 180
50 55 140 2.2 1.3 2.2 1

l
1000 200 11
1070 220
kHz kHz A nA A/V
VFB = 1.3V VSENSE+ = VSENSE = VCTRL1 = 2V

l
750 850 1.188 1.137 0.24 1.206 1.16 40

l
1.224 1.183 0.26
V V mV V mV mA
0.25 40 8
VFAULT = 2V, VFB = 0V
LT3763 ELECtRICAL CHARACtERIStICS The l denotes the specifications which apply over the full operating
CONDITIONS VISMON Regulated to 1V, VSENSE = 10V VISMON Regulated to 200mV, VSENSE = 10V VIVINMON Regulated to 1V, VIVIN+ = 12V VIVINMON Regulated to 200mV, VIVIN+ = 12V
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PARAMETER Output Current Monitor Sense Voltage (VSENSE+ VSENSE) Input Current Monitor Sense Voltage (VIVIN+ VIVIN) Input Current Limit Sense Voltage (VIVIN+ VIVIN) PWM Driver PWM_OUT Driver On-Resistance Gate Pull-Up Gate Pull-Down PWM to PWM_OUT Propagation Delay Rising Falling Current Control Loop gm Amp Offset Voltage Input Common Mode Range VCM(LOW) VCM(HIGH) Output Impedance gm Differential Gain Overvoltage FB Overvoltage Protection (VFB Maximum) Overcurrent Overcurrent Protection (VSENSE+ VSENSE Maximum)
MIN 45 5 46 6 45
TYP 50 10 50 10 50
MAX 55 15 54 14 55
UNITS mV mV mV mV mV
VINTVCC = 5V VINTVCC = 5V
2.2 0.9 11 38
l
ns ns 3 mV V V M 625 A/V V/mV V mV
VSENSE = 4V, VCTRL1 = 0V (Note 5) VCM(HIGH) Measured from VIN to VCM, VSENSE+ = VSENSE
0 0 1.4 3.5
375
475 1.7 1.515
VSENSE = 0V, RT = 221k
85
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3763E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the 40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3763I is guaranteed to meet performance specifications over the 40C to 125C operating junction temperature range. The LT3763H is guaranteed over the 40C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125C.
Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 4: The minimum on- and off-times are guaranteed by design and are not tested. Note 5: The minimum common mode voltage is guaranteed by design and is not tested.
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LT3763 TYPICAL PERfORmANCE CHARACtERIStICS

EN/UVLO Threshold (Falling)
1.70 6.0
EN/UVLO Current
10000 1000 EN/UVLO CURRENT (A) 5.5 QUIESCENT CURRENT (nA) 100 10 1 0.1 0.01
Quiescent Current (Shutdown)

6VIN 12VIN 60VIN
EN/UVLO THRESHOLD (V)
1.64
1.58
5.0
1.52 1.46
4.5
1.40
24 VIN (V)
42
60
3763 G01
4.0
24 VIN (V)
42
60
3763 G02
0.001 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G03
Quiescent Current (Non-Switching)

3.0 2.03
VREF Voltage
6VIN 12VIN 60VIN
1.5 1.4 VREF CURRENT LIMIT (mA) 1.3 1.2 1.1 1.0
VREF Current Limit
QUIESCENT CURRENT (mA)
2.02 2.5 VREF (V) 2.0 2.00 TA = 150C TA = 25C TA = 50C 6 24 VIN (V) 42 60
3763 G04
2.01
1.5
1.99 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G05
0.9
TA = 150C TA = 25C TA = 50C 6 24 VIN (V) 42 60

3763 G06
RT Current Limit
70 16
SS Current
6 5 14 SS CURRENT (A) 4 12 VINTVCC (V) 0 25 50 75 100 125 150 TEMPERATURE (C)
3763 G08
INTVCC Current Limit
64 RT CURRENT LIMIT (A)
58
3 2
52
46
10 1 8 50 25 0
40 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G07
10
20
30 40 IINTVCC (mA)
50
60
3763 G09
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6.0
VIN UVLO
4.2
VBOOST VSW UVLO Thresholds
4.5
INTVCC UVLO
6VIN 12VIN 60VIN
4.1 VBOOST VSW (V) 5.0 VIN (V) RISING VINTVCC (V) FALLING 3.8 0 25 50 75 100 125 150 TEMPERATURE (C)
3763 G11
4.0
4.0
3.5
3.9
4.0
3.0
3.0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G10
3.7 50 25
2.5 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G12
INTVCC Load Regulation

5.10 1.55
Overvoltage Threshold
14
Overvoltage Timeout
5.05 VINTVCC (V)
1.53 TIMEOUT (s)
13
VFB (V)
1.51
5.00
12
1.49
4.95
1.47
11
4.90
10
20
30 IINTVCC (mA)
40
50
60
3763 G13
1.45 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G14
10 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G15
Overcurrent Threshold
100 125
Maximum Output Voltage

150
Regulated Current vs VFB
80 VSENSE+ VSENSE (mV) OUTPUT CURRENT (%)
100 OUTPUT CURRENT (%)
100
60
75
50
40
50
20
25
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G16
0.5
1.0 1.5 VIN VOUT (V)
2.0
2.5
3763 G17
50 1.16
1.17
1.18 1.19 VFB (V)
1.20
1.21
3763 G18
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4
TG Driver RDS(ON)
BG Driver RDS(ON)
Nonoverlap Time
80
PULL-UP RDS(ON) () 2 RDS(ON) () 2
PULL-UP
NONOVERLAP TIME (ns)
60 BG TO TG 40 TG TO BG
PULL-DOWN
PULL-DOWN
20
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G19
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G20
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G21
Minimum Off-Time
200 80
Minimum On-Time
1.2
Oscillator Frequency
1MHz
MINIMUM OFF-TIME (ns)
160
MINIMUM ON-TIME (ns)
LG
60
HG LG FREQUENCY (MHz)
0.9
120 HG 80 40
40
0.6 500kHz 0.3 200kHz
20
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G22
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G23
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G24
Regulated Sense Voltage

60 50 VSENSE+ VSENSE (mV) 0.5 ACCURACY (%) 40 30 20 10 0 1.0 1.0
Current Regulation Accuracy

VCTRL1 = 1.5V VIN = 12V 1.0
Current Regulation Accuracy

VCTRL1 = 0.75V VIN = 12V
0.5 ACCURACY (%) 0 2 4 6 VOUT (V) 8 10

3763 G26
0.5
0.5
0.5
1.0 VCTRL1 (V)
1.5
2.0
3763 G25
1.0
4 6 VOUT (V)
10
3763 G27
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PWM Driver RDS(ON)
4 50
PWM Driver Delay

20
C/10 Threshold
PULL-UP DELAY (ns) 30
VSENSE+ VSENSE (mV)
3 RDS(ON) ()
40
FALLING
15 RISING 10 FALLING 5
20 RISING
PULL-DOWN
10
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G28
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G29
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G30
FAULT Threshold
1.6 75
FAULT Hysteresis
2.0
Output Current Sense
1.2 UPPER VFB (V) 0.8 HYSTERESIS (mV) 50 VISMON (V) 25 0 50 25
1.5
1.0
0.4
LOWER
0.5
0 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G31
25 50 75 100 125 150 TEMPERATURE (C)

3763 G32
25 50 75 VSENSE+ VSENSE (mV)
100
3763 G33
Input Current Sense

2.0 55
Input Current Limit

8
Output Voltage Load Regulation

VIN = 12V VOUT = 5V ILIMIT = 20A
VIVINP VIVINN (mV)
1.5 VIVINMON (V)
53
6 VOUT (V)
51
1.0
49
0.5
47
25 50 75 VIVINP VIVINN (mV)
100
3763 G34
45 50 25
25 50 75 100 125 150 TEMPERATURE (C)

3763 G35
12 ILOAD (A)
18
24
3763 G36
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32 VIN = 48V VOUT = 24V ILIMIT = 10A EFFICIENCY (%) 100
Efficiency vs Load Current

100
24 VOUT (V)
95 EFFICIENCY (%)
95
16
90
90
85 VIN = 12V VOUT = 5V 0 6 12 ILOAD (A) 18 24

3763 G38

3763 G39
6 ILOAD (A)
12
3763 G37
80
80
Shutdown and Recovery

VOUT 5V/DIV SS 2V/DIV EN/UVLO 5V/DIV IL 5A/DIV 1ms/DIV
3763 G40
15A Load Step

VOUT 20mV/DIV AC-COUPLED IL 10A/DIV
500s/DIV
3763 G41
PWM Dimming
IL 500mA/DIV VSW 50V/DIV PWM 10V/DIV 10s/DIV
3763 G42
Solar Powered SLA Battery Charging

FAULT 10V/DIV VIN 500mV/DIV AC-COUPLED IL 2A/DIV VOUT 50mV/DIV AC-COUPLED
50s/DIV
3763 G43
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LT3763 PIN FUNCtIONS

BG (Pin 1): BG is the bottom FET gate drive signal that controls the state of the external low side power FET. The driver pull-up impedance is 2.2, and pull-down impedance is 1. Do not force any voltage on this pin. INTVCC (Pin 2): The INTVCC pin provides a regulated 5V output for charging the BOOST capacitor. INTVCC also provides the power for the digital and switching subcircuits. Do not force any voltage on this pin. Bypass with at least a 22F capacitor to ground. INTVCC is current-limited to 50mA. Shutdown operation disables the output voltage drive. VIN (Pin 3): Input Supply Pin. Must be locally bypassed with at least a 4.7F low ESR capacitor to ground as close as possible to the exposed pad of the package. EN/UVLO (Pin 4): Enable Pin. The EN/UVLO pin acts as an enable pin and turns on the internal current bias core and sub-regulators at 1.705V and turns off at 1.52V. The pin does not have any pull-up or pull-down, requiring a voltage bias for normal operation. Full shutdown occurs at approximately 0.5V. If unused, the Enable pin may be tied to VIN. VREF (Pin 5): Buffered 2V Reference Capable of 0.5mA Drive. Bypass with at least 1F capacitor to ground. IVINN (Pin 6): IVINN is the inverting input of the input current sense amplifier. This pin connects to the drain of the high side N-channel power FET and the input current sense resistor. IVINP (Pin 7): IVINP is the noninverting input of the input current sense amplifier. This pin connects to the input supply VIN and the input current sense resistor. IVINMON (Pin 8): IVINMON is the buffered output of the input current sense amplifier. This pin enables monitoring of the averaged supply current with an output voltage of 20 (VIVINP VIVINN). The capacitive loading to this pin should be less than 1nF . FAULT (Pin 9): Output Voltage Fault Detection Pin for Shorted or Open LEDs. Internal comparators pull down this pin when the FB pin voltage is lower than 0.25V or higher than 1.16V and when the inductor current is less than ten percent of the maximum value. This pin should be pulled up to INTVCC with a resistance higher than 10k. FBIN (Pin 10): The FBIN pin enables peak power tracking for solar powered chargers and other similar applications by controlling the output current of the system based on the input voltage. This pin should be tied to VREF if this feature is not used. FB (Pin 11): The feedback pin is used for voltage regulation and overvoltage protection. The feedback voltage is regulated to 1.206V. When the feedback voltage exceeds 1.515V, the overvoltage lockout prevents switching.
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LT3763 PIN FUNCtIONS

GND (Pin 12, Pin 23, Pin 28, Exposed Pad Pin 29): Ground. The exposed pad must be soldered to the PCB. CTRL2 (Pin 13): Thermal Control Input to Reduce the Regulated Output Current. CTRL1 (Pin 14): The CTRL1 pin sets the regulated output current. The maximum control voltage is 1.5V. Above 1.5V, there is no change in the regulated current. SS (Pin 15): The Soft-Start Pin. Place an external capacitor to ground to limit the regulated current during start-up conditions. The soft-start pin has an 11A charging current. When the voltage at this pin is lower than voltages at CTRL1 and CTRL2, it overrides both signals and determines the regulated current. SENSE (Pin 16): SENSE is the noninverting input of the error amplifier for the current regulation loop. The reference current, based on CTRL1, CTRL2, SS or FBIN determines the regulated voltage between SENSE+ and SENSE. SENSE+ (Pin 17): SENSE+ is the inverting input of the error amplifier for the current regulation loop. This pin is connected to an external current sense resistor. The voltage drop between SENSE+ and SENSE is measured against the voltage drop across an internal resistor at the input to the current regulation loop. VC (Pin 18): A resistor and capacitor connected in series to the VC pin provide the necessary compensation for the stability of the average current loop. Typical values are 5k to 60k for the resistor and 2.2nF to 10nF for the capacitor. ISMON (Pin 19): ISMON is the buffered output of the output current sense amplifier. This voltage output enables monitoring the averaged output current of the LED driver with a voltage of 20 (VSENSE+ VSENSE). The capacitive loading to this pin should be less than 1nF . RT (Pin 20): A resistor from the RT pin to ground sets the switching frequency between 200kHz and 1MHz. When using the SYNC function, set the frequency to be at least 20% lower than the SYNC pulse frequency. This pin is current-limited to 55A. Do not leave this pin open. SYNC (Pin 21): Frequency Synchronization Pin. This pin allows the switching frequency to be synchronized to an external clock. The RT resistor should be chosen to operate the internal clock at 20% slower than the SYNC pulse frequency. This pin should be grounded when not in use. PWM (Pin 22): The input pin for PWM dimming of LEDs. When low, all switching is terminated and the PWM_OUT pin is low. This pin should be connected to INTVCC when not in use. PWM_OUT (Pin 24): This pin can drive an external FET for PWM dimming of LEDs. The pull-up and pull-down impedances of the driver are 2.2 and 0.9, respectively. Do not force any voltage on this pin. TG (Pin 25): TG is the top FET gate drive pin that controls the state of the external high side power FET. The driver pull-up impedance is 2.2, and pull-down impedance is 1.3. Do not force any voltage on this pin. SW (Pin 26): The SW pin is used internally as the lower rail for the floating top FET gate driver. Externally, this node connects the two power FETs and the inductor. BOOST (Pin 27): The BOOST pin provides a floating 5V regulated supply for the top FET gate driver. An external schottky diode is required from the INTVCC pin to the BOOST pin to charge the BOOST capacitor when the SW pin is near ground.
11
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LT3763 BLOCK DIAGRAm

VIN RFILTA 1k RSENSE_IN 2.5m RFILTB 1k CIN1 4.7F CVCC 22F 3 IVINN VIN 2 INTVCC HIGH SIDE DRIVER 27 BOOST TG SW LOW SIDE DRIVER BG 25 26 1 CBOOST 200nF CIN2 47F
CFILT 1F
7 IVINP
R EN/UVLO INTERNAL REGULATOR AND UVLO
SYNCHRONOUS CONTROLLER
IVINMON CURRENT MIRROR
14
CTRL1
1.5V
+ +CONTROL BUFFER
1.5V
gm AMP
gm = 475A/V RO = 3.5M VCM(HIGH) = VIN 1.4V
C/10 COMPARATOR
3k
11A CSS 10nF 15 SS
50k
13
CTRL2
VOLTAGE REGULATOR AMP gm = 850A/V 0.25V
1.206V
1.16V
10
FBIN
+
1.206V
FAULT DETECTION COMPARATORS FAULT GND (12, 23, 28, 29)

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Figure 1. Block Diagram
12
90k
CREF 2.2F
2V REFERENCE
VREF
OSCILLATOR
+
1.5V
INPUT CURRENT MONITORING gm = 400A/V
SYNC 21 RT 20 RT 82.5k RC 47.5k CC 4.7nF L1 1H VC PWM_OUT PWM 18 24 22 0.1V ISMON 19 OUTPUT MONITORING SENSE+ SENSE 17 16 FB RFB1 47.5k 11 RFB2 12.1k RS 2.5m VOUT COUT 200F 2
INTVCC RFAULT 47.5k 9
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LT3763 OPERAtION
The LT3763 utilizes fixed frequency, average current mode control to accurately regulate the inductor current independently from the output voltage. This is an ideal solution for applications requiring a regulated current source. The control loop will regulate the current in the inductor at an accuracy of 6%. If the output reaches the regulation voltage determined by the resistor divider from the output to the FB pin, the inductor current will be reduced by the voltage regulation loop. In voltage regulation, the output voltage has an accuracy of 1.5%. For additional operation information, refer to the Block Diagram in Figure 1. The current control loop has two main inputs, determined by the voltages at the analog control pins, CTRL1 and CTRL2. The lower voltage between CTRL1 and CTRL2 determines the regulated output current. The voltages at CTRL1 and CTRL2 are buffered to produce a reference current set by the voltage across an internal 90k resistor. This reference current produces a reference voltage that the average current mode control loop uses to regulate the inductor current as a voltage drop across the external sense resistor, RS. The outputs of the internal buffers are clamped at 1.5V, limiting the control range of the CTRL1 and CTRL2 pins from 0V to 1.5Vcorresponding to a 0mV to 51mV range on RS. The FBIN pin provides a third input to the current control loop. This input is dedicated to regulating the input voltage by controlling the inductor current. Inductor current regulation commences when the voltage at the FBIN pin rises higher than 1.206V. Above 1.206V, the inductor current is linearly increased, providing the maximum current, as determined by the voltages at the CTRL pins, when FBIN is at and above 1.26V. When input voltage regulation is not needed, FBIN should be tied to VREF to allow the CTRL pins to control the inductor current. The 2V reference provided on the VREF pin allows the use of a resistor voltage divider to the CTRL1 and CTRL2 pins. The current supplied by the VREF pin should be less than 0.5mA. The error amplifier for the average current mode control loop has a common mode lockout that regulates the inductor current so that the error amplifier is never operated out of the common mode range. The common mode range is from ground to 1.4V below the VIN supply rail. The LT3763 prevents excessive inductor current by triggering overcurrent limit when the inductor current produces a voltage greater than 85mV across the SENSE+ and SENSE pins. The current is limited on a cycle-by-cycle basis; switching shuts down as soon as the overcurrent level is reached. Overcurrent is not soft-started. The regulated output voltage is set with a resistor divider from the output to the FB pin. The reference for the FB pin is 1.206V. If the output voltage level is high enough to engage the voltage loop, the regulated inductor current will be reduced. If the voltage at the FB pin reaches 1.515V, an internal overvoltage flag is set, shutting down switching for a brief period. The EN/UVLO pin functions as a precision shutdown pin. When the voltage at the EN/UVLO pin is lower than 1.52V, the internal reset flag is asserted and switching is terminated. Full shutdown is guaranteed below 0.5V with a quiescent current of less than 2A. The EN/UVLO pin has 185mV of hysteresis built in, and a 5A current source is connected to this pin that allows any amount of hysteresis to be added with a series resistor or resistor divider from VIN. Alternatively, this pin can be tied directly to VIN to reduce the number of off-chip components. During start-up, the SS pin is held low until the internal reset goes low and PWM goes high the first time after a reset event. Once the reset is cleared, the capacitor connected to the soft-start pin is charged with an 11A current source. Initially, the internal buffers for the CTRL1, CTRL2, and FBIN voltages are limited by the voltage at the soft-start pin, and the inductor current reference slowly increases to the level determined by the lowest voltage of those three pins. The rising threshold for thermal shutdown is set at 165C with 5C hysteresis. During thermal shutdown, all switching is terminated, and the part is in reset mode (forcing the SS pin low). The switching frequency is determined by a resistor at the RT pin. This pin is limited to 55A, which limits the switching frequency to approximately 2MHz when the RT pin is shorted to ground. The LT3763 may also be synchronized to an external clock through the use of the
13
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LT3763 OPERAtION
SYNC pin which has precise thresholds at 2.175V and 1.5V for rising and falling edges, respectively. LT3763 also features a PWM driver for LED dimming. PWM_OUT is high when the PWM pin voltage is higher than 2.175V, and low when PWM is lower than 1.5V. Switching is terminated when PWM is lower than 1.5V. PWM should be tied to INTVCC when the PWM function is not needed. The FAULT pin is pulled down to ground when the voltage at FB becomes less than 0.25V which indicates a shortcircuit condition. It is also pulled down to indicate an open-circuit condition when the voltage becomes greater than 1.16V and the inductor current is less than ten percent of the maximum (C/10), or equivalently, when the voltage between SENSE+ and SENSE is less than 5mV. To avoid jitter when recovering from a fault condition, 50mV hysteresis is employed in the comparators. Additionally, when the inductor current is lower than C/10, the C/10 comparator disables the low side MOSFET regardless of the voltage at FB. The integrated input current and output current monitoring functions of the LT3763 allow users to acquire system information such as the input power and output power. The outputs of the current monitors, IVINMON and ISMON, range from 0V to 1V when the inputs vary from 0V to 50mV. When using 2.5m sense resistors, for example, these current monitoring amplifiers sense from 0A to 20A. To filter out the switching portion of the currents and measure the average current information, the input pins of the input current monitor, IVINP and IVINN, should connect to the sense resistor through two 1k resistors and a capacitor directly between the IVINP and IVINN pins. The capacitance value can be adjusted according to the switching frequency and the ripple magnitude. The output current monitor employs an internal filter to reduce ripple, and it does not require an external filter, but if one is added, the corner frequency should be higher than the switching frequency. The LT3763 also includes an input current limiting function to regulate the input current to a value determined by the RSENSE_IN resistor. When the voltage drop across the RSENSE_IN resistor approaches 50mV, the inductor current is reduced and regulated so that 50mV is maintained across the IVINP and IVINN pins.
APPLICAtIONS INfORmAtION
Programming Inductor Current
MAXIMUM OUTPUT CURRENT (A) 30 25 20 15 10 5 0
The analog voltage at the CTRL1 pin is buffered and produces a reference voltage, VCTRL, across an internal resistor. The regulated average inductor current is determined by: IO = VCTRL 30 RS
where RS is the external sense resistor and IO is the average inductor current, which is equal to the output current. Figure 2 shows the maximum output current versus RS. The maximum power dissipation in the resistor will be: PRS
2 0.05V ) ( =
8 10 12 14 16 18 20 RS (m)
3763 F02
Figure 2. RS Value Selection for Regulated Output Current
RS
Figure 3 plots the power dissipation in RS, and Table 1 lists several resistance values and the corresponding
maximum inductor current and sense-resistor power dissipation. Susumu, Panasonic and Vishay offer accurate sense resistors.
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14
LT3763 APPLICAtIONS INfORmAtION

1.4 1.2 POWER DISSIPATION (W) 1.0 0.8 0.6 0.4 0.2 0 0 6 14 16 18 20
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Table 2. Recommended Inductor Manufacturers

VENDOR Coilcraft Sumida Vishay Wrth Electronics NEC-Tokin WEBSITE www.coilcraft.com www.sumida.com www.vishay.com www.we-online.com www.nec-tokin.com
Switching MOSFET Selection

2 4 8 10 12 RS (m)
Figure 3. Power Dissipation in RS Table 1. Sense Resistor Values

MAXIMUM OUTPUT CURRENT (A) RESISTOR, RS (m) POWER DISSIPATION (W) 1 5 10 25 50 10 5 2 0.05 0.25 0.50 1.25
The following parameters are critical in determining the best switching MOSFETs for a given application: total gate charge (QG), on-resistance (RDS(ON)), gate to drain charge (QGD), gate-to-source charge (QGS), gate resistance (RG), breakdown voltages (maximum VGS and VDS) and drain current (maximum ID). The following guidelines provide information to make the selection process easier, and Table 3 lists some recommended parts and manufacturers. For both switching MOSFETs the rated drain current should be greater than the maximum inductor current. Use the following equation to calculate the peak inductor current: V V V 2 IMAX = IO + IN O O 2 fSW L VIN The rated drain current is temperature dependent, and most data sheets include a table or graph of the rated drain current versus temperature. The rated VDS should be higher than the maximum input voltage (including transients) for both MOSFETs. As for the rated VGS, the signals driving the gates of the switching MOSFETs have a maximum voltage of 5V with respect to the source. However, during start-up and recovery conditions, the gate-drive signals may be as low as 3V. Therefore, to ensure that the LT3763 recovers properly, the maximum threshold voltage should be less than 2V, and for a robust design, ensure that the rated VGS is greater than 7V. Power losses in the switching MOSFETs are related to the on-resistance, RDS(ON); gate resistance, RG; gate-to-drain charge, QGD and gate-to-source charge, QGS. Power lost to the on-resistance is an Ohmic loss, I2RDS(ON), and usually dominates for input voltages less than 15V. Power lost while charging the gate capacitance dominates for voltages
Inductor Selection Size the inductor so that the peak-to-peak ripple current is approximately 30% of the output current. The following equation sizes the inductor for best performance: VIN VO VO 2 L= 0.3 fSW IO VIN where VO is the output voltage, VIN is the input voltage, IO is the maximum regulated current in the inductor and fSW is the switching frequency. The overcurrent comparator terminates switching when the voltage between the SENSE+ and SENSE pins exceeds 85mV. The saturation current for the inductor should be at least 20% higher than the maximum regulated current. Recommended inductor manufacturers are listed in Table 2.
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MOSFET POWER LOSS (W)
greater than 15V. When operating at higher input voltages, efficiency can be optimized by selecting a high side MOSFET with higher RDS(ON) and lower QG. The total power loss in the high side MOSFET can be approximated by: PLOSS = ohmic loss + transition loss V PLOSS O IO 2 RDS(ON) T + VIN V I (QGD + QGS ) IN OUT fSW 5V ( 2 RG + RPU + RPD ) where rT is a dimensionless temperature dependent factor in the MOSFETs on-resistance. Using 70C as the maximum ambient operating temperature, rT is roughly equal to 1.3. RPD and RPU are the LT3763 high side gate driver output impedances: 1.3 and 2.2, respectively. A good approach to MOSFET sizing is to select a high side MOSFET, then select the low side MOSFET. The trade-off between RDS(ON), QG, and QGS for the high side MOSFET is evident in the following example. VO is equal to 4V. These two N-channel MOSFETs are rated for a VDS of 40V and mounted in the same package, but with 8 different RDS(ON) and 4.5 different QG and QGD: M1: RDS(ON) = 2.3m, QG = 45.5nC, QGS = 13.8nC, QGD = 14.4nC, RG = 1 M2: RDS(ON) = 18m, QG = 10nC, QGS = 4.5nC, QGD = 3.1nC, RG = 3.5 Power loss for both MOSFETs is shown in Figure 4. Observe that whereas the RDS(ON) of M1 is eight times lower, the power loss at low input voltages is about equal to that of M2, and at high voltages, it is four times higher. Power loss within the low side MOSFET is almost entirely from the RDS(ON) of the FET. Select the low side FET with the lowest RDS(ON) while keeping the total gate charge QG to 30nC or less. Another power loss related to switching MOSFET selection is the power lost driving the gates. The total gate charge,
7 6 5 4 3 2 1 0 0 10 20 INPUT VOLTAGE (V)

3763 F04a
TOTAL TRANSITIONAL
OHMIC 30 40
Figure 4a. Power Loss Example for M1

2.5 2.0
MOSFET POWER LOSS (W)
1.5 1.0
TOTAL
TRANSITIONAL OHMIC
0.5
10
20 INPUT VOLTAGE (V)
30
40
3763 F04b
Figure 4b. Power Loss Example for M2
QG, must be charged and discharged each switching cycle, so the power lost to the charging of the gates is: PGATE = VIN (QGLG + QGHG) fSW where QGLG is the low side gate charge and QGHG is the high side gate charge. The majority of this loss occurs in the internal LDO within the LT3763: PLOSS_LDO (VIN 5V) (QGLG + QGHG) fSW Whenever possible, utilize a switching MOSFET that minimizes the total gate charge to limit the internal power dissipation of the LT3763. Some recommended MOSFETs are listed in Table 3.
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Table 3. Recommended Switching FETs
VIN VOUT IOUT (V) (V) (A) 60 24 4 4 20 5 10 20 TOP FET RJK0853DPB RJK0368DPA RJK0851DPB FDMS8680 Si7884BDP BOTTOM FET MANUFACTURER RJK0853DPB Renesas RJK0332DPB www.renesas.com RJK0851DPB FDMS8672AS Fairchild www.fairchildsemi.com SiR470DP Vishay www.vishay.com
end of every pulse as the decreasing inductor current flows into the output capacitor. Use of a small output capacitor may trigger overvoltage protection through the FB pin. CBOOST Capacitor Selection The CBOOST capacitor must be sized no bigger than 220nF and more than 50nF to ensure proper operation of the LT3763. Use 220nF for high current switching MOSFETs with high gate charge. INTVCC Capacitor Selection The bypass capacitor for the INTVCC pin should be larger than 22F to ensure stability, and it should be connected as close as possible to the exposed pad underneath the package. It is recommended that the ESR be lower than 50m to reduce noise within the LT3763. For driving MOSFETs with gate charges larger than 44nC, use 0.5F/nC of total gate charge. Soft-Start Unlike conventional voltage regulators, the LT3763 utilizes the soft-start function to control the regulated inductor current instead of the output voltage. The charging current is 11A and reduces the set current as long as the SS pin voltage is lower than CTRL1 and CTRL2. Output Current Regulation To adjust the regulated load current, an analog voltage is applied to the CTRL1 pin. Figure 5 shows the regulated voltage across the sense resistor for control voltages up to
60 50 VSENSE+ VSENSE (mV) 40 30 20 10 0
48 10 to 35 10 12 2 to 4 26 24 36 4 4 12
40 PSMN4R0-30YL RJK0346DPA NXP/Philips www.nxp.com 10 BSC100N06LS3 BSC100N06LS3 www.infineon.com
Input Capacitor Selection The input capacitor should be sized at least 2F for every 1A of output current and placed very close to the high side MOSFET. The loop created by the input capacitor, high side MOSFET, low side MOSFET should be minimized. It should have a ripple current rating equal to half of the maximum output current. Additionally, a small 4.7F ceramic capacitor should be placed between VIN and ground as close as possible to the VIN pin and the exposed pad of the package for optimal noise immunity. It is recommended that several low ESR (equivalent series resistance) ceramic capacitors be used as the input capacitance, although other capacitors with higher density may be required to reduce board area. Only X5R or X7R capacitors maintain their capacitance over a wide range of operating voltages and temperatures. Output Capacitor Selection The output capacitors need to have very low ESR to reduce output ripple. A minimum of 20F/A of load current should be used in most designs. The capacitors also need to be surge rated to the maximum output current. To achieve the lowest possible ESR, several low ESR ceramic capacitors should be used in parallel. Many lower output voltage applications benefit from the use of high density POSCAP capacitors, which are easily destroyed when exposed to overvoltage conditions. To prevent this, select POSCAP capacitors that have a voltage rating that is at least 50% higher than the regulated voltage. Note that when dimming, the output voltage increases at the
0.5
1.0 VCTRL1 (V)
1.5
2.0
3763 F05
Figure 5. Sense Voltage vs CTRL Voltage
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2V. Figure 6 shows the CTRL1 voltage created by a voltage divider from VREF to ground. When sizing the resistor divider, please be aware that the VREF pin should have a total load current less than 0.5mA, and that above 1.5V, the control voltage has no effect on the regulated inductor current. Setting CTRL1 to 0V does not automatically stop switching. To disable switching, set PWM pin voltage below 1.5V. Input Current Monitoring Users can monitor the input current at the IVINMON pin, which produces 0V to 1V as the voltage between IVINP and IVINN varies from 0mV to 50mV, as shown in Figure 7. Due to the switching of the high side FET, the input current is noisy and monitoring the average input current requires an external filter with 1k resistors connecting IVINP and IVINN to the input current sense resistor RSENSE_IN. Choose the capacitor for this filter according to the switching frequency so that the noise is reduced by at least a factor of 100. If the frequency is 500kHz, for example, 1F is sufficient, and higher switching frequencies will require a smaller capacitor. A resistor and capacitor may be connected to IVINMON to further filter the noise. With both input and
VREF LT3763 CTRL1 R1
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output current monitoring, the LT3763 enables users to calculate the overall efficiency of the circuit including the losses in the external components. Output Current Monitoring The LT3763 provides users the capability to monitor the output current as a voltage provided at the ISMON pin. The voltage will linearly increase from 0V to 1V as the voltage between SENSE+ and SENSE increases from 0mV to 50mV as shown in Figure 8. If, for example, a 2.5m resistor is chosen for RS, then a 1V output at ISMON will indicate a 20A output current. A resistor and capacitor may be connected to ISMON to filter noise. Voltage Regulation and Overvoltage Protection The LT3763 uses the FB pin to regulate the output voltage and to provide an overvoltage lockout to avoid high voltage conditions. The regulated output voltage is programmed using a resistor divider from the output to the FB pin (Figure9). When the output voltage approaches
2.0
1.5 R2 VISMON (V) 1.0
0.5
Figure 6. Analog Control of Inductor Current

2.0 0 0 25 50 75 VSENSE+ VSENSE (mV) 100
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1.5 VIVINMON (V)
Figure 8. Output Current Monitoring Voltage vs Output Current Sense Voltage
1.0 VOUT 0.5 LT3763 FB 0 0 25 50 75 VIVINP VIVINN (mV) 100

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R2
R1
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Figure 7. Input Current Monitoring Voltage vs Input Current Sense Voltage
Figure 9. Output Voltage Regulation and Overvoltage Protection Feedback Connections

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the programmed level (1.206V at the FB pin), the voltage error amplifier overrides CTRL1 to set the inductor current and regulate VOUT. When the output voltage exceeds 125% of the regulated voltage level (1.515V at the FB pin), the internal overvoltage flag is set, terminating switching. The regulated output voltage must be greater than 1.5V and is set by the equation: R2 VOUT = 1.206V 1+ R1 Programming Switching Frequency The LT3763 has an operational switching frequency range between 200kHz and 1MHz. This frequency is programmed with an external resistor from the RT pin to ground. Do not leave this pin open under any condition. The RT pin is also current-limited to 55A. See Table 4 and Figure10 for resistor values and the corresponding switching frequencies.
Table 4. Switching Frequency
SWITCHING FREQUENCY (MHz) 1.00 0.75 0.50 0.30 0.20 RT (k) 40.2 53.6 82.5 143 221
Fault Detection The LT3763 detects that the load has had an open-circuit or short-circuit event indicated by pulling the FAULT pin to ground. These conditions are detected by comparing the voltage at the FB pin to two internal reference voltages. A short-circuit is defined as VFB lower than 0.25V. In an open-circuit condition, the regulated inductor current will charge the output capacitor, the voltage at FB will begin to increase, and the voltage error amplifier will begin to reduce the inductor current. The open-circuit condition will be indicated at FAULT when FB is higher than 1.16V and the inductor current is less than ten percent (C/10) of the maximum value set by the sense resistor RS. The output voltage will be regulated as determined by the resistor divider to the FB pin. Low Current Detection When the inductor current decreases to ten percent of the maximum current, the C/10 comparator will also disable the low side gate driver, so the converter will become non-synchronous and automatically transition into discontinuous conduction mode when the inductor current is low enough relative to the ripple. The low current condition is an essential part of battery charging applications. The LT3763 works well in this application delivering a constant current to the battery as it charges and then automatically reducing the current to a trickle charge as the battery voltage approaches its fully charged value. In this application, the signal at FAULT triggered by the low current detection comparator serves as an indicator that the trickle charge phase of charging the battery has begun.
Switching Frequency Synchronization The nominal switching frequency of the LT3763 is determined by the resistor from the RT pin to ground and may be set from 200kHz to 1MHz. The internal oscillator may also be synchronized to an external clock through the SYNC pin. The external clock applied to the SYNC pin must have a logic low below 1.5V and a logic high above 2.175V. The input frequency must be 20% higher than the frequency that would otherwise be determined by the resistor at the RT pin. Input signals outside of these specified parameters will cause erratic switching behavior and subharmonic oscillations. Synchronization is tested at 500kHz with a 221k RT resistor. Operation under other conditions is guaranteed by design. When synchronizing to an external
1.2 1.0 FREQUENCY (MHz) 0.8 0.6 0.4 0.2 0.0
50
100 150 RT (k)
200
250
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Figure 10. Frequency vs RT Resistance
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clock, please be aware that there will be a fixed delay from the input clock edge to the edge of the signal at the SW pin. The SYNC pin must be grounded if the synchronization to an external clock is not required. When SYNC is grounded, the switching frequency is determined by the resistor RT. PWM Driver The LT3763 includes a PWM driver for users who want to control the dimming of LEDs connected to the output. The driver will pull up the gate of an external N-channel MOSFET connected to the PWM_OUT pin when the voltage at the PWM pin rises above 2.175V and pull down the gate when the voltage falls below 1.5V. When VPWM is lower than 1.5V, switching is terminated and VC is disconnected from the current regulation amplifier. When VPWM is above 2.175V, the inductor current is regulated to the current programmed by the voltage at the CTRL1, CTRL2, or FBIN pins. The pull-up driver impedance is 2.2, and the pull-down driver impedance is 0.9. The PWM dimming pulse-width should be longer than two switching cycles.
VOUT
When the PWM functionality is not desired, the PWM pin should be tied to INTVCC so as not to disable switching. PWM MOSFET Selection The rated VDS for the PWM MOSFET need only be higher than the maximum output voltage. Although this permits a MOSFET choice with a smaller QG specification than that of the switching MOSFETs, it will have little effect on efficiency, because the PWM switching frequency will be much lower than that of the switching MOSFETs. Power lost charging the gate of the PWM MOSFET will naturally be much lower than the power lost charging the switching MOSFETs. RDS(ON) conduction losses in the PWM MOSFET will also be much smaller if the duty cycle of the PWM signal is very low. Like the drivers for the switching MOSFETs, the PWM driver draws power from the INTVCC pin, and the choice of MOSFET should follow the same recommendations for threshold voltage (less than 2V) and rated VGS (at least 7V). Thermal Shutdown The internal thermal shutdown within the LT3763 engages at 165C and terminates switching and discharges the soft-start capacitor. When the part has cooled to 160C, the internal reset is cleared and the soft-start capacitor is allowed to charge. Shutdown and UVLO The LT3763 has an internal UVLO that terminates switching, resets all synchronous logic, and discharges the softstart capacitor for input voltages below 4V. The LT3763 also has a precision shutdown at 1.52V on the EN/UVLO pin. Partial shutdown occurs at 1.52V and full shutdown is guaranteed below 0.5V with less than 2A IQ in the full shutdown state. Below 1.52V, an internal current source provides 5A of pull-down current to allow for programmable UVLO hysteresis. The following equations determine the voltage-divider resistors for programming the UVLO voltage and hysteresis as configured in Figure 12. R2 = VHYST 5A
LOAD PWM
PWM_OUT
1.5V
3763 F11
Figure 11. PWM Driver Operation
PWM Operation When the voltage at PWM is low, all switching of the high and low side MOSFETS is terminated, and the inductor current will decrease to zero. After PWM increases above the logic threshold, the inductor current ramps up to the regulated value. The ramp time, tD, can be estimated using the following equation: tD = L IO VIN VO
which assumes that the output capacitor does not discharge significantly in the time that PWM is low.
20
1.52V R2 R1= VUVLO 1.52V
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VIN LT3763 EN/UVLO R1
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VIN R2
Average Current Mode Control Compensation The use of average current mode control allows for precise regulation of the inductor current and load current. Figure14 shows the average current mode control loop used in the LT3763, where the regulation current is programmed by a current source and a 3k resistor. To design the compensation network, the maximum compensation resistor needs to be calculated. In current mode controllers, the ratio of the sensed inductor current ramp
VCTRL 11A/V 3k RS
Figure 12. UVLO Configuration
Load Current Derating Using the CTRL2 Pin The LT3763 is designed specifically for driving high power loads. In high current applications, derating the maximum current based on operating temperature prevents damage to the load. In addition, many applications have thermal limitations that will require the regulated current to be reduced based on load temperature and/or board temperature. To achieve this, the LT3763 uses the CTRL2 pin to reduce the effective regulated current in the load, which is otherwise programmed by the analog voltage at the CTRL1 pin. The load/board temperature derating is programmed using a resistor divider with a temperature dependant resistance (Figure 13). When the load/board temperature rises, the CTRL2 voltage will decrease. When the CTRL2 voltage is lower than voltage at the CTRL1 pin, the regulated current is reduced.
RV VREF R2 LT3763 CTRL2 R1 (OPTION A TO D) A B C D RNTC RNTC RX RNTC RNTC RX
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MODULATOR
gm ERROR AMP RC CC
LOAD
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Figure 14. LT3763 Average Current Mode Control Scheme
RV
to the slope compensation ramp determines the stability of the current regulation loop above 50% duty cycle. In the same way, average current mode controllers require the slope of the error voltage to not exceed the PWM ramp slope during the switch off time. Since the closed loop gain at the switching frequency produces the error signal slope, the output impedance of the error amplifier will be the compensation resistor, RC. Use the following equation as a good starting point for compensation component sizing: RC = 1k 1V L 2nF , CC = T VO RS TSW s SW
Figure 13. Load Current Derating vs Temperature Using NTC Resistor
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where TSW is the switching period, L is the inductance value, VO is the output voltage and RS is the sense resistor. For most applications, a 4.7nF compensation capacitor is adequate and provides excellent phase margin with optimized bandwidth. Please refer to Table 6 for recommended compensation values. Board Layout Considerations Average current mode control is relatively immune to the switching noise associated with other types of control schemes. Nevertheless, the high di/dt loop formed by input
VIN (V) 12 12 12 60 60 VO (V) 4 4 5 30 30 VCTRL1 (V) 0.75 1.50 1.50 0.15 1.20 IL (A) 5 10 20 1 8
capacitors and switching MOSFETS should be minimized. Placing the sense resistor as close as possible to the SENSE+ and SENSE pins also helps avoid noise issues. Due to sense resistor ESL (equivalent series inductance), 10 resistors in series with the SENSE+ and SENSE pins with a 33nF capacitor placed between the SENSE pins are recommended. Utilizing a good ground plane underneath the switching components will minimize interplane noise coupling. To dissipate the heat from the switching components, use a large area for the switching node while keeping in mind that this negatively affects the radiated noise.
Table 6. Recommended Compensation Component Values (VCTRL2 = 2V)

fSW (kHz) 500 500 250 500 500 L (H) 2.2 2.2 2.2 10 10 RS (m) 5 5 2.5 5 5 RC (k) 54.9 54.9 44.2 15.4 15.4 CC (nF) 4.7 4.7 8.2 4.7 4.7
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LT3763 TYPICAL APPLICAtIONS

20A, Pulse Width Modulated, Single LED Driver
VIN 10V TO 30V RSENSE_IN 2.5m REN1 84.5k REN2 15.4k RFILTA 1k CFILT 1F RFILTB 1k VIN TG BOOST SW INTVCC CTRL1 FBIN IVINMON ISMON PWM SYNC RT RT 82.5k CSS 10nF BG GND 50 1nF 50 1nF SENSE+ SENSE PWMOUT FAULT FB SS VC RC 59k CC 4.7nF L1: COILCRAFT XAL1010-152 M1: RENESAS RJK0365 M2: RENESAS RJK0453 M3: IR IRFH6200 RS: VISHAY WSL25122L500FEA CS 33nF M3 RFB1 47.5k RFB2 12.1k
3763 TA02
CIN1 4.7F
CIN2 100F
IVINP EN/UVLO VREF CTRL2 RNTC 470k
IVINN
CREF 2.2F
RHOT 45.3k
CBOOST 220nF
M1 L1 1.5H RS 2.5m VOUT 6V, 20A MAXIMUM COUT 220F 2
LT3763
50k
RFAULT 47.5k
CVCC 22F
D1 M2 RSA 10 RSB 10
PWM Dimming
PWM 10V/DIV VSW 50V/DIV IL 5A/DIV 5s/DIV
3763 TA02b
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1A, Five LED Driver
VIN 32V TO 60V RFILTA 1k RSENSE_IN 50m CFILT 1F RFILTB 1k VIN TG BOOST SW INTVCC BG 50k CTRL1 GND SENSE+ FBIN IVINMON INTVCC ISMON PWM SYNC RT RT 82.5k CSS 10nF SS SENSE PWMOUT FAULT FB VC RC 59k CC 4.7nF L1: COILCRAFT MSS1278-104 M1, M2: RENESAS RJK1054 RS: VISHAY WSL2512R0500FEA CS 33nF CBOOST 50nF M1 L1 100H RS 50m VOUT 30V, 1A MAXIMUM D1 RFAULT 47.5k CVCC 22F RSA 10 RSB 10 D2 D3 D4 D5 COUT 10F 2 CIN1 1F CIN2 4.7F
IVINP ENABLE CREF 2.2F RHOT 45.3k RNTC 470k EN/UVLO VREF
IVINN
LT3763 CTRL2
M2
RFB1 287k RFB2 12.1k

3763 TA03
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3.3A, Six-Cell (36V) SLA Battery Charger
VIN 48V RFILTA 1k RSENSE_IN 15m CFILT 1F RFILTB 1k VIN TG BOOST SW INTVCC BG CTRL1 GND SENSE+ FBIN IVINMON INTVCC ISMON PWM SYNC RT RT 82.5k CSS 10nF SS SENSE PWMOUT FAULT FB VC RC 8.06k CC 4.7nF L1: WRTH 74471112 M1, M2: INFINEON BSC100N06LS3 M3: VISHAY VN2222LL RS: VISHAY WSL2512R0150 CS 33nF RFB1 402k RFB2 12.1k RFB3 178k M3
3763 TA04
CIN1 1F
CIN2 47F
IVINP ENABLE CREF 2.2F EN/UVLO VREF
IVINN
CBOOST 220nF
M1 L1 12H RS 15m VOUT 45V, 3.3A MAXIMUM
LT3763 CTRL2
+
12V RFAULT 47.5k CVCC 22F M2 RSA 10 RSB 10
+
12V
COUT 10F
+
12V
36V SLA Battery Charging

FAULT 10V/DIV IL 2A/DIV VOUT 50mV/DIV AC-COUPLED 50s/DIV
3763 TA04b
25
3763fa

20A, Synchronized, 5V Regulator
VIN 7V TO 30V RSENSE_IN 2.5m REN1 44.2k REN2 15.4k RFILTA 1k CFILT 1F RFILTB 1k VIN TG BOOST SW INTVCC BG CTRL1 GND SENSE+ FBIN IVINMON INTVCC 500kHz ISMON PWM SYNC RT RT 121k CSS 10nF SS SENSE PWMOUT FAULT FB VC RC 59k CC 4.7nF L1: COILCRAFT XAL1010-152 M1: RENESAS RJK0365 M2: RENESAS RJK0453 RS: VISHAY WSL25122L500FEA CS 33nF RFB1 38.3k RFB2 12.1k
3763 TA05
CIN1 4.7F
CIN2 100F
IVINP EN/UVLO VREF
IVINN
CREF 2.2F
RHOT 45.3k RNTC 470k
CBOOST 220nF
M1 L1 1.5H VOUT RS 2.5m 5V, 20A MAXIMUM COUT 220F 2
LT3763 CTRL2
RFAULT 47.5k
CVCC 22F
M2
RSA 10
RSB 10
3V 0V

8 VIN = 12V VOUT = 5V ILIMIT = 20A EFFICIENCY (%) 100
6 VOUT (V)
95
90

3763 TA05c
12 ILOAD (A)
18
24
3763 TA05b
80
26
3763fa

350W White LED Driver
VIN 48V REN1 374k REN2 124k CIN1 4.7F IVINP EN/UVLO CREF 2.2F VREF LT3763 CTRL2 IVINN VIN TG BOOST SW INTVCC BG 50k CTRL1 GND SENSE+ FBIN IVINMON INTVCC 400kHz ISMON PWM SYNC RT RT 200k CSS 10nF SS SENSE PWMOUT FAULT FB VC RC 5k CC 5nF L1: COILTRONICS HC2-6R0 M1, M2: RENESAS RJK0851 RS: VISHAY WSL25125L000 CS 1nF RFB1 931k RFB2 30.9k
3763 TA06
CIN2 100F
CBOOST 220nF
M1 2 L1 6H RS 5m VOUT 37V, 10A MAXIMUM COUT 10F 6
RFAULT 100k
CVCC 22F
M2 2
LUMINUS PT-121
3V 0V
Maximum Output Voltage

40 100
Efficiency vs LED Current
30 EFFICIENCY (%) VIN = 48V ILIMIT = 10A 0 3 6 ILED (A) 9 12

3763 TA06b
95
VOUT (V)
20
90
10
85 VIN = 48V VOUT = 35V 0 3 6 ILED (A) 9 12

3763 TA06c
80
27
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LT3763 PACKAGE DESCRIPtION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev I) Exposed Pad Variation EB
4.75 (.187)
9.60 9.80* (.378 .386) 4.75 (.187) 28 27 26 2524 23 22 21 20 1918 17 16 15
6.60 0.10 4.50 0.10
2.74 (.108)
SEE NOTE 4
0.45 0.05
EXPOSED PAD HEAT SINK ON BOTTOM OF PACKAGE
6.40 2.74 (.252) (.108) BSC
1.05 0.10 0.65 BSC

RECOMMENDED SOLDER PAD LAYOUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.25 REF
4.30 4.50* (.169 .177)
1.20 (.047) MAX

0 8
0.09 0.20 (.0035 .0079)
0.50 0.75 (.020 .030)
0.65 (.0256) BSC
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE
0.195 0.30 (.0077 .0118) TYP
0.05 0.15 (.002 .006)

FE28 (EB) TSSOP REV I 0211
4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE
28
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LT3763 REVISION HIStORY

REV A DATE 05/13 DESCRIPTION Clarified switching frequency resistor values Clarified offset voltage conditions Clarified programming resistor value Clarified end of 7th paragraph Clarified CBOOST capacitor Clarified programming resistor value and Figure 10 Clarified schematic PAGE NUMBER 3 4 4 13 17 19 25, 27, 30
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3763
29
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LT3763 TYPICAL APPLICAtION

70W, Solar Energy Harvester Compatible with Maximum Power Point Regulation
PANEL VOLTAGE UP TO 60V 37V VIN REG POINT RSENSE_IN 10m D1 D2 RFILTA 1k CFILT 1F RFILTB 1k VIN TG BOOST SW INTVCC BG RFBIN1 348k RFBIN2 12.1k INTVCC VREF CTRL1 GND SENSE+ FBIN IVINMON ISMON PWM SYNC RT RT 82.5k CSS 10nF SS SENSE PWMOUT FAULT FB VC RC 26.1k CC 4.7nF L1: COILCRAFT MSS1278-123 M1, M2: INFINEON BSC100N06LS3 M3: VISHAY VN2222LL RS: VISHAY WSL2512R0100FEA CS 33nF RFB1 121k RFB2 12.1k RFB3 182k M3
3763 TA07
CIN1 4.7F
CIN2 100F
IVINP Dn CREF 2.2F ENABLE RHOT 45.3k RNTC 470k EN/UVLO VREF
IVINN
CBOOST 100nF
M1 L1 12H VOUT RS 10m 14V MAXIMUM 12V COUT 50F
LT3763 CTRL2
RFAULT 47.5k
CVCC 22F
M2
RSA 10
RSB 10
Solar Powered SLA Battery Charging

FAULT 10V/DIV VIN 500mV/DIV AC-COUPLED IL 2A/DIV VOUT 50mV/DIV 50s/DIV
3763 TA07b
RELAtEd PARtS
PART NUMBER DESCRIPTION LT3743 LT3741 LT3791 Synchronous Step-Down LED Driver Controller Synchronous Step-Down LED Driver Controller Synchronous Buck-Boost LED Driver Controller COMMENTS 92% Efficiency, IOUT to 20A, VIN: 5.5V to 36V, IQ = 2mA, ISD < 1A, 4mm 5mm QFN-28, TSSOP-28E 94% Efficiency, IOUT to 20A, VIN: 6V to 36V, IQ = 1.8mA, ISD < 1A, 4mm 4mm QFN-20, TSSOP-20E 98.5% Efficiency, IOUT to 25A, VIN: 4.7V to 60V, TSSOP-38E
30 Linear Technology Corporation

(408) 432-1900 FAX: (408) 434-0507
3763fa LT 0513 REV A PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3763

www.linear.com/LT3763
LINEAR TECHNOLOGY CORPORATION 2012

Features Description: Lt3763 60V High Current Step-Down Led Driver Controller

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Features Description: Lt3763 60V High Current Step-Down Led Driver Controller

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FEAtURES

LT3763 60V High Current Step-Down LED Driver Controller DESCRIPtION

For more information www.linear.com/LT3763

LT3763 ABSOLUtE MAXImUm RAtINGS

FBIN 10 FB 11 GND 12 CTRL2 13 CTRL1 14

For more information www.linear.com/LT3763

TYP 1.5 675 20 100

VCTRL1 = 1.5V VCTRL1 = 1.5V, VCTRL2 = 1.5V, VFBIN = 2V

ILOAD = 10mA VINTVCC = 0V

50 55 140 2.2 1.3 2.2 1

kHz kHz A nA A/V

VFB = 1.3V VSENSE+ = VSENSE = VCTRL1 = 2V

750 850 1.188 1.137 0.24 1.206 1.16 40

1.224 1.183 0.26

VFAULT = 2V, VFB = 0V

For more information www.linear.com/LT3763

ns ns 3 mV V V M 625 A/V V/mV V mV

475 1.7 1.515

VSENSE = 0V, RT = 221k

For more information www.linear.com/LT3763

LT3763 TYPICAL PERfORmANCE CHARACtERIStICS

Quiescent Current (Shutdown)

EN/UVLO THRESHOLD (V)

25 50 75 100 125 150 TEMPERATURE (C)

Quiescent Current (Non-Switching)

VREF Current Limit

QUIESCENT CURRENT (mA)

25 50 75 100 125 150 TEMPERATURE (C)

TA = 150C TA = 25C TA = 50C 6 24 VIN (V) 42 60

INTVCC Current Limit

64 RT CURRENT LIMIT (A)

25 50 75 100 125 150 TEMPERATURE (C)

For more information www.linear.com/LT3763

LT3763 TYPICAL PERfORmANCE CHARACtERIStICS

VBOOST VSW UVLO Thresholds

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

INTVCC Load Regulation

5.05 VINTVCC (V)

1.53 TIMEOUT (s)

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

Maximum Output Voltage

Regulated Current vs VFB

80 VSENSE+ VSENSE (mV) OUTPUT CURRENT (%)

100 OUTPUT CURRENT (%)

25 50 75 100 125 150 TEMPERATURE (C)

1.0 1.5 VIN VOUT (V)

1.18 1.19 VFB (V)

For more information www.linear.com/LT3763

LT3763 TYPICAL PERfORmANCE CHARACtERIStICS

PULL-UP RDS(ON) () 2 RDS(ON) () 2

NONOVERLAP TIME (ns)

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

MINIMUM OFF-TIME (ns)

MINIMUM ON-TIME (ns)

0.6 500kHz 0.3 200kHz

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

25 50 75 100 125 150 TEMPERATURE (C)

Regulated Sense Voltage