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RP CBTA (RANCANGAN PELAJARAN HARIAN)

Jabatan Tajuk Tarikh Hari Masa Nama Pengajar Kejuruteraan Elektrik & Elektronik Kursus : Teknologi Elektronik Modul : 304 ( Electronic Digital) Kompetensi : K3 COMBANITION OF LOGIC GATES 10 FEBRUARI 2014 ISNIN 11.00 PG 1.00 PTG HEJRIAH BINTI MOHD UZIR / LAILATUL SAADIA BT DORALIM / KHALID MOHD SHAH

Learning Standard/ Standard pembelajaran Time/ masa

K3.1 Describe the logic circuits for AND, OR, NOT, NAND,NOR, EXCLUSIVE NOR GATES. K3. 2 Construct basic digital circuits. K3.3 Construct the combination Minterm and Maxterm project.

Performance Crietria/ Kriteria Pencapaian

Main Task/ process Tugas utama / Proses

Bahan sumber pembelajaran

2 x 60 minit = 120 minit

K3.1E1. Explain the combination of logic circuit according to Boolean Logic Expression. K3.1 E2. Identify the Boolean logic expression according to a combination of logic circuits. K3.1 E3. Construct logic circuits according Boolean expression to standard.

Buku teknologi Elektronik Berdigit Buku teks Pengajian Kejuruteraan Elektrik & Derive logic expressions from logic Elektronik circuits. Buku Prinsip Elektrik & Construct truth table of combinations Elektronik of logic gates Sketch circuits from logic expressions Sketch the positive edge- triggered timing diagram for combinations of logic gates.

K3.2 E1 Transform Boolean expression from truth table according t E1 Transform Concept. K3.3 E2 Construct truth table from Boolean expression according to concept. K3.4 E3 Sketch the timing diagram according to combination logic .get circuit

Refleksi (ditulis tangan)

Tanda tangan Pensyarah ..............................................

Tanda tangan Ketua Unit .............................................

RP CBTA (RANCANGAN PELAJARAN HARIAN)


Jabatan Tajuk Tarikh Hari Masa Nama Pengajar Kejuruteraan Elektrik & Elektronik Kursus : Teknologi Elektronik Modul : 304 ( Electronic Digital) Kompetensi : K3 COMBANITION OF LOGIC GATES 17 FEBRUARI 2014 ISNIN 11.00 PG 1.00 PTG HEJRIAH BINTI MOHD UZIR / LAILATUL SAADIA BT DORALIM / KHALID MOHD SHAH

Learning Standard/ Standard pembelajaran Time/ masa

K3.1 Describe the logic circuits for AND, OR, NOT, NAND,NOR, EXCLUSIVE NOR GATES. K3. 2 Construct basic digital circuits. K3.3 Construct the combination Minterm and Maxterm project.

Performance Crietria/ Kriteria Pencapaian

Main Task/ process Tugas utama / Proses

Bahan sumber pembelajaran

2 x 60 minit = 120 minit

K3.1E1. Explain the combination of logic circuit according to Boolean Logic Expression. K3.1 E2. Identify the Boolean logic expression according to a combination of logic circuits. K3.1 E3. Construct logic circuits according Boolean expression to standard.

Buku teknologi Elektronik Berdigit Buku teks Pengajian Kejuruteraan Elektrik & Derive logic expressions from logic Elektronik circuits. Buku Prinsip Elektrik & Construct truth table of combinations Elektronik of logic gates Sketch circuits from logic expressions Sketch the positive edge- triggered timing diagram for combinations of logic gates.

K3.2 E1 Transform Boolean expression from truth table according t E1 Transform Concept. K3.3 E2 Construct truth table from Boolean expression according to concept. K3.4 E3 Sketch the timing diagram according to combination logic .get circuit

Refleksi (ditulis tangan)

Tanda tangan Pensyarah ..............................................

Tanda tangan Ketua Unit .............................................