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B.C.A (Pt.II) 212 Digital Elect. And Circuits


Answers of all the question (objective as well as descriptive) are to be given in the main answer-book only. Answer of objective type questions must be given in sequential order. Similarly all the parts of one question of descriptive part should be answered at one place in the answer-book. One complete question should not be answered at different places in the answer-book. No supplementary answer-book will be given to any candidate. Hence the candidates should write their answers precisely in the main answer-book only.

OBJECTIVE PART-I Maximum Marks: 20 It contains 40 multiple choice questions with four choices and students will have to pick the correct one (each carrying mark) 1 Octal equivalent of (47)10 is (a) 49 (b) 57

(c) 21 (d) 48 2 Decimal value of hexadecimal FFFF is : (a) 65535 (b) 65534 (c) 65536 (d) 65537 3 Decimal value of hexadecimal FFFF is : (a) C (b) C (c) A (d) A 4 A(A+B) will reduce to : (a) AB (b) AB (c) A+B (d) A+B 5 Which of the following logic expressions is wrong? (a) 1 0 =1 (b) 1 1 =0 (c) 1 (d) 1 6 The NAND gate is AND gate followed by : (a) AND gate (b) NOR gate (c) NOT gate (d) None of the above

7 A half-adder consists of : (a) X-OR and OR gates (b) AND and OR gates (c) X-OR and AND gates (d) XOR, AND and OR gates 8 256 kB memory is equivalent to : (a) 2,52,144 byte (b) 2,62,144 byte (c) 2,72,144 byte (d) 2,56,000 byte 9 The transistor is in off state when it is in : (a) Cut-off (b) Saturation (c) Active (d) None of the above 10 The term RTL means : (a) Retreat logic (b) Receiver through logic (c) Resistor-transistor logic (d) Reverse transistor logic 11 A diode is called in condition state, when (a) It is in reverse biased (b) Without biasing (c) It is in forward biased (d) Either (a) or (b) 12 Which one of the following gates is used as parity checker? (a) NOT (b) NAND

(c) NOR (d) EX-NOR 13 The simplest expression of AA + B B is : (a) B (b) B (c) A (d) A 14 De-Morgans first theorem is given by: (a) A+B = AB (b) A+B =AB (c) A+B=A+B (d) A+B=AB 15 The SOP form of logical expression is most suitable for design logic circuit using only: (a) NAND gate (b) NOR gates (c) EX-OR gates (d) AND gates 16 Which is not a minimization technique for logical expression? (a) Using Boolean theorem (b) Karnaugh map (c) Gate realization (d) Quine McCluskey method 17 Dont care combination are assumed: (a) Always 0 (b) Always 1 (c) Either 0 or 1 (d) Neither 0 nor 1

18 The maxterm M0 is equivalent to: (a) (A+B + C + D) (b) A B C D (c) ABCD (d) (A + B +C +D) 19 The function : Can be written as : (a) (b) (c) (d) 20 Minimization of logical expression while designing digital helps in reducing : (a) Cost (b) Space requirements (c) Power requirements (d) All of the above 21 A standard TTL, gate, average power dissipation is : (a) 10nw (b) 10 (c) 1mw (d) 10mw 22 Schottky TTL series is given by the IC: (a) 7400 (b) 74S00 (c) 74H00

(d) 74L00 23 If the applied voltage in MOSFET is more than the threshold voltage, then it behaves like: (a) Closed switch (b) Open switch (c) FET (d) BJT 24 The most suitable IC family for LSI chips: (a) TTL (b) ECL (c) NMOS (d) RTL 25 The IC which is used as decimal to BCD priority encoder is : (a) 74145 (b) 74180 (c) 74147 (d) 7490 26 The IC which is used as 4 line to 16 line decoder demultiplexer is: (a) 74150 (b) 74151 (c) 74154 (d) 74152 27 Filp-flop is a : (a) Monostable device (b) Bistable device (c) Astable device (d) None of the above

28 In a J-K flip-flop if J=1 and K=0, then the output Q and Q (when the clock input is applied ) as : (a) Q =1 and Q =1 (b) Q=0 and Q =0 (c) Q=1 and Q= 0 (d) Q = 0 and Q=1 29 A type of shift register that requires access to the Q outputs of all stages is : (a) Serial in-parallel out (b) Parallel in-serial out (c) Serial in-serial out (d) A bidirectional shift register 30 A major drawback to an SR latch is its: (a) Complexity (b) Slow speed (c) Invalid condition (d) Latch mode 31 A 4-bit binary UP/DOWN counter is in the binary state of zero. The next state in DOWN mode is: (a) 0001 (b) 1111 (c) 1000 (d) 1110 32 A 3-bit binary counter has a maximum modulus of : (a) 3 (b) 6 (c) 8 (d) 16

33 To obtain output frequency equal to half the clock frequency, one should use the counter: (a) Decade counter (b) Up counter (c) Down counter (d) Johnson counter 34 The SiO2 layer in an IC acts as : (a) Mechanical output (b) A register (c) An insulating layer (d) None of the above 35 The component cannot be fabricated on IC: (a) Transistors (b) Diodes (c) Resistors (d) Inductors and transformers 36 The highest count in an n-bit ripple counter is : (a) (b) (c) (d) 37 The simplified Boolean expression in SOP form from K-map given below is: C AB 00 01 11 10 0 0 1 1 0

(a) BC (b) BC (c) AB (d) BC

+ + + +


38 The Boolean function F simulated by the logic circuit, is : A F B (a) A.B (b) A.B (c) A+B + C (d) A 39 .The truth table of a logic gate is given below. The gate is : A 0 1 0 1 B 0 0 1 1 Y 0 1 1 0

(a) OR (b) XOR (c) NAND (d) NOR

40 -


C The above diagram is of: (a) Subs tractor (b) Full adder (c) Multiplexer (d) Half adder

DESCRIPTIVE PART-II Maximum Marks :30 Attempt any four descriptive type of questions out of six. All questions carry 7.5 marks each. 1- (a) (b) (b) What is EX-NOR gate? Give its significance. 2 Draw the block diagram and truth table of the following basic gates. AND, NOR, XOR, and Bubbled OR. Solve expression : Y= AB + AC + ABC (AB + C) Using Boolean theorems. 2- (a) (b) (c) Prove the statement A positive logic AND operation is equivalent to a negative logic OR operation and vice-versa. Realize the circuit of EX-OR gate with the help of Boolean theorems by using NOR gate only Prove that: AB + C (A + D) = AB + BD +BD + A C D If AB + CD =0 Given the logical expression : Y(A, B C) = (A +BC) . (B+ CA) (i) Convert this equation in sum-of-products (SOP)form and in product-of-sums (POS) form. (ii) Design the circuits with only one type of gates corresponding to SOP and POS equations obtained above. Express the following function into minterm and maxterm notation :Y=(A,B,C,D) =D What is use of K-map in circuit in circuit designing? Define redundant group in a given K-map.

3- (a)

(b) (c)

4- (a)

Write short notes on the following ICs : (i) 7400 (ii) 74S00 (iii) 74L00 Explain speed and delay in logic circuits. Draw CMOS NOR gate and explain its operation. Define multiplexer. Draw the pin out diagram and truth table for IC74151, 8 to 1 multiplex. Explain the construction and working of a 1:16 demultiplexer. Draw pin out diagram and logic diagram for 74154 demultiplexer IC and truth table for this. Write brief notes on the : (i) Priority encoder , and (ii) Up/down counter Make circuits for SR flip-flop using NAND gates and NOR gate. Convert one of these circuits into clocked SR flip-flop and make truth table for this . What is meant by edge triggering? Give the difference between positive and negative edge triggering. What is ripple counter and ring counter? Write their application one of each counter.

(b) (c) 5- (a) (b)


6- (a)

(b) (c)