Customer Model:
PD P4206EM
Safety Precaution Technical Specifications Block Diagram Circuit Diagram Basic Operations & Circuit Description Main IC Specifications Product Specification of PDP Module Trouble Shooting Manual of PDP Module Spare Part List Exploded View If you forget your V-Chip Password Software Upgrade
This manual is the latest at the time of printing, and does not include the modification which may be made after the printing, by the constant improvement of product.
Safety Precaution
CAUTION
RISK OF ELECTRIC SHOCK DO NOT OPEN
The lightning flash with arrowhead symbol, within an equilateral triangle, is intended to alert the user to the presence of uninsulated dangerous voltage within the products enclo sure that may be of sufficient magnitude to constitute a risk of electric shock to persons. The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance (servicing) instructions in the literature accompanying the appliance.
CAUTION: TO REDUCE THE RISK OF ELECTRIC SHOCK, DO NOT REMOVE COVER (OR BACK). NO USER-SERVICEABLE PARTS INSIDE. REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY.
WARNING:
Before servicing this TV receiver, read the SAFETY INSTRUCTION and PRODUCT SAFETY NOTICE.
SAFETY INSTRUCTION
The service should not be attempted by anyone unfamiliar with the necessary instructions on this apparatus. The following are the necessary instructions to be observed before servicing. 1. An isolation transformer should be connected in the power line between the receiver and the AC line when a service is performed on the primary of the converter transformer of the set. 2. Comply with all caution and safety related provided on the back of the cabinet, inside the cabinet, on the chassis or picture tube.
5. Make sure that wires do not contact heat generating parts (heat sinks, oxide metal film resistors, fusible resistors, etc.) 6. Check if replaced wires do not contact sharply edged or pointed parts. 7. Make sure that foreign objects (screws, solder droplets, etc.) do not remain inside the set.
3. To avoid a shock hazard, always discharge the picture tube's anode to the chassis ground before removing the anode cap. 4. Completely discharge the high potential voltage of the picture tube before handling. The picture tube is a vacuum and if broken, the glass will explode.
5. When replacing a MAIN PCB in the cabinet, always be certain that all protective are installed properly such as control knobs, adjustment covers or shields, barriers, isolation resistor networks etc. 6. When servicing is required, observe the original lead dressing. Extra precaution should be given to assure correct lead dressing in the high voltage area. 7. Keep wires away from high voltage or high tempera ture components. 8. Before returning the set to the customer, always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, screwheads,metal overlay, control shafts, etc., to be sure the set is safe to operate without danger of electrical shock. Plug the AC line cord directly to the AC outlet (do not use a line isolation transformer during this check). Use an AC voltmeter having 5K ohms volt sensitivity or more in the following manner. Connect a 1.5K ohm 10 watt resistor paralleled by a 0.15F AC type capacitor, between a good earth ground (water pipe, conductor etc.,) and the exposed metallic parts, one at a time. Measure the AC voltage across the combination of the 1.5K ohm resistor and 0.15 uF capacitor. Reverse the AC plug at the AC outlet and repeat the AC voltage measurements for each exposed metallic part. The measured voltage must not exceed 0.3V RMS. This corresponds to 0.5mA AC. Any value exceeding this limit constitutes a potential shock hazard and must be corrected immediately. The resistance measurement should be done between accessible exposed metal parts and power cord plug prongs with the power switch "ON". The resistance should be more than 6M ohms.
AC VOLTMETER
MODEL :
PDP4206EM
42 Plasma Monitor
Technical
DATE FIRST ISSUED
Specifications
ISSUE RAISED BY
CHECKED BY
NUMBER OF PAGES
1
REVISIONS ISSUED DATE DESCRIPTION
9
RAISED BY :
SPECIFICATION AGREED :
SIGNATURE
DATE
R & D DEPARTMENT ...................................................................................... ...... COMMERCIAL DEPARTMENT ...................................................................................... ...... PRODUCTION DEPARTMENT ........................... ... ........................... ...
Q/A DEPARTMENT
...................................................................................... .......
........................... ...
CUSTOMER
...................................................................................... .......
........................... ...
...................................................................................... .......
........................... ...
SPECIFICATION APPROVED : .
SIGNATURE :
DATE :
NOTE :
Only documents stamped Controlled Document to be used for manufacture of production parts.
Technical
1.
Specifications
CONTINUATION PAGE
PDP420
NUMBER
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PAGES
Standard Test Conditions All tests shall be performed under the following conditions, unless otherwise specified. 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 Ambient light Viewing distance Warm up time PDP Panel facing : : : : 150ux (When measuring IB, the ambient luminance 0.1Cd/m2) 50cm in front of PDP 30 minutes no restricted PC, Chroma 2225 signal generator (with Chroma digital additional card) or equivalent, Minolta CA100 photometer no restricted Brightness, Contrast, Tint, Color set at Center(50) 110~120Vac 20C 5C (68F 9F) 31.5KHz/60Hz (Resolution 852 x 480)
Ambient temperature : : :
With image sticking protection of PDP module, the luminance will descend by time on a same still screen and rapidly go down in 5 minutes. When measuring the color tracking and luminance of a same still screen, be sure to accomplish the measurement in one minute to ensure its accuracy. Due to the structure of PDP, the extra-high-bright same screen should not hold over 5 minutes for fear of branding on the panel.
1.11.2
Technical
Specifications
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PDP4206EM
NUMBER
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ELECTRICAL CHARACTERISTICS 2. Power Input 2.1 2.2 2.3 2.4 2.5 Voltage Input Current Maximum Inrush Current Test condition Frequency Power Consumption Test condition Power Factor Withstanding voltage : : : : : : : : : 110 ~120VAC 3.5 / 1.5A <30 A (FOR AC110V ONLY) Measured when switched off for at least 20 mins 50Hz to 60Hz(3Hz) 330W full white display with maximum brightness and contrast Meets IEC1000-3-2 1.5kVac or 2.2kVdc for 1 sec
2.6 2.7 3.
Display 3.1 3.2 3.3 3.4 3.5 3.6 3.7 Screen Size Aspect Ratio Pixel Resolution Peak Brightness Contrast Ratio (Dark room) Viewing Angle OSD language : : : : : : : 42 Plasma monitor 16:9 852x480 1000 cd/m (Panel module without filter) 3000:1 (Panel module without filter) Over 160 English
4.
Signal 4.1 AV & Graphic input 4.1.1 Composite signal 4.1.2 Y,C Signal 4.1.3 Component signal 4.1.4 Graphic I/P 4.1.5 PnP compatibility 4.1.6 I/P frequency : : : : : : CVBS S-Video Y, Pb/Cb, Pr/Cr, HDTV compatible Analog: D-sub 15pin detachable cable Digital: DVI DDC 1.0 fH: 31.5kHz to 60kHz/fV: 56.25Hz to 75Hz (640x480 recommended)
Technical
4.2
Specifications
:
CONTINUATION PAGE
PDP4206EM
NUMBER
OF
PAGES
1 for DVI / D-Sub 1 for Y/ Pb/Pr 1 for Y/ Cb/Cr 1 for Video 1 for S-Video 1 for Line out PIP, 16:9, 4:3, Zoom
4.3 4.4 5.
: :
Environment 5.1 Operating environment 5.1.1 Temperature : 5.1.2 Relative humidity: 5.2 Storage and Transport 5.2.1 Temperature : 5.2.2 Relative humidity:
6.
Panel Characteristics 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 Type Size : : LG V6 42, 1005mm(width)x597mm(height)x61mm(depth)1 mm) 16:9 Over 160 852x480 14.8kg 0.5 kg (Net) 16.77 million colors by combination of 8 bits R,G,B digital Average 60:1 (In a bright room with 150Lux at center) Typical 3000:1 (In a dark room 1/25 White Window pattern at center). Typical 1000cd/ (1/25 White Window) Contrast; Brightness and Color control at normal setting Full white pattern Average of point A,B,C,D and E +/- 0.01
Aspect ratio : Viewing angle : Resolution : Weight : Color : Contrast : Peak brightness :
Technical
Specifications
:
CONTINUATION PAGE
PDP4206EM
NUMBER
OF
PAGES
Contrast at center (50); Brightness center (50); Color temperature set at Natural x=0.2850.02 y=0.2930.02
7.
Front Panel Control Button 7.1 SEL. UP/Down Button Volume Up/ Down Button Menu Button Input Select Button 7.2 7.3 Stand by Button Main Power Switch : : : : : : Push the key to selecting the item on OSD menu Push the key to increase the volume up or down. When selecting the adjusting item on OSD menu increase or decrease the data-bar. Enter to the OSD menu. Push the key to select the input signals source. Switch on main power, or switch off to enter power Saving modes. Turn on or off the unit.
8.
OSD Function 8.1 8.2 Audio Picture : : Adjust or Select Volume; Bass; Treble; Balance; SRS; BBE; AVC; Int./Ext. Speaker. Adjust or Select Brightness; Contrast; Sharpness; Scaling (Picture changes According to Fill or One to One.; DNR; Video Format; More options for Y/Pb/Pr and VGA ( H. Position, V. Position Phase, Frequency) Position; OSD H. Position; OSD V. Position; OSD Timeout; OSD Backgroud; Language. Factory Reset; Source Scan; Blank Color; Turn Off Timer; Screen Saver; Saver Mode. TV Channel Blocking; Movie Blocking; Change Blocking Password; Clear Password; CC Mode; CC Background.
OSD Tools
: :
CC-V Chip :
Technical
9.
Specifications
CONTINUATION PAGE
PDP4294LV1
NUMBER
OF
PAGES
10. Reliability 11.1 MTBF 11. Accessories : : 20,000 hours(Use moving picture signal at 25C ambient) User manual x1, Remote control x1, Stand x1, Power cord x1, Battery x 2, Accessories box x 1.
Technical
Specifications
CONTINUATION PAGE
PDP4206EM
NUMBER
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12. Supportthe Signal Mode The PDP can support the different from DVI or VGA Signal Mode in 24 kinds NO. 1# 2# 3 4 5 6 7# 8 9 10 11 12 13 14 15 16 17 18* 19 20* 21 22 23 24# Resolution 640 x400 640 x400 640 x480 640 x480 640 x480 640 x480 640 x480 800 x600 800 x600 800 x600 800 x600 800 x600 832 x624 1024 x768 1024 x768 1024 x768 1024 x768 1152x864 1152x864 1152x864 1280x1024 1280 x960 1280 x960 1280x720 Horizontal Frequency (KHz) 31.47 37.90 31.50 35.00 37.50 37.86 43.30 35.16 37.90 46.90 48.08 53.70 49.00 48.40 56.50 60.00 68.70 54.53 67.52 63.86 63.37 75.02 60.02 44.96 Vertical Frequency (Hz) 70.08 85.00 60.00 67.00 75.00 72.81 85.00 56.25 60.32 75.00 72.19 85.00 75.00 60.00 70.00 75.00 85.00 60.00 75.02 70.02 60.01 75.02 60.02 59.95 Dot Clock Frequency (MHz) 25.17 31.5 25.18 30.24 31.50 31.50 36.00 36.00 40.00 49.50 50.00 56.25 57.27 65.00 75.00 78.75 94.50 80.37 108.03 94.51 111.51 126.00 108.04 74.19
Note: DVI could not support * of signal mode. VGA could not support # of signal mode. - Press DISPLAY button to confirm the input signal format. Note: Some data will be updated in five seconds if you change them.
Technical
13.
Specifications
CONTINUATION PAGE
PDP4206EM
NUMBER
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Remote Function+
Mute YPbPr PC
Standby on/off PIP Video Number Buttons/ Channel up/ Channel down/ Return
V-CHIP I. P. C I. S. C
C/C
VOL +/Menu Left/Right Up/Down Left/Right Button SRS ZOOM plus/minus Display Sleep
Technical
Specifications
CONTINUATION PAGE
PDP4206EM
NUMBER
OF
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PHYSICAL CHARACTERISTICS 14. Power Cord Length Type 15. Cabinet 15.1 Color : Black colour as defined by colour plaque reference number : : 1.8m nominal optional
15.3 Dimensions(with stand) Width Height Depth : : : 40-7/8 inches (1040mm) 27-1/4 inches (692mm) 11-1/4 inches (286mm)
Block Diagram
LVDS Input
Memory Controller
Address Driver
Applied Voltage level is specified at the time when Full-White pattern is displayed on the panel.
Scan Driver
Block Diagram
Circuit Diagram
Power supply board of PDP Module, DGP-420WXGA Power supply board of PDP Module, USP490M-42LP Main (Video) board Audio/Tuner board Keypad board Remote control receiver board External L/R Speakers board Remote control board
CN01 3-176976-2 L101 23mH L103 CH108200S L104 CH108200S R108 5W 15 R103 5W 20 2 1
VI T204,205 VS EER4042 T208 PFC COIL 200uH D102 FEP30JP PFC+ PFC + R609 300KF R600 1W4R7 Q203,204 SPW11N80C3*2 D601 FSF10A60 C602 250V 820uF R611 300KF C600 C222 630V 0.1uF 1KV 220pF R610 300KF C206 630V 0.047uF R223 2.2M R603 R112 3KF PFC VCC R115 1.5KF R224 2.2M R227 1W 4.7 R228 1W 4.7 1W4R7 1KV 220pF C221 630V 0.1uF R612 12KF C601 VS DET D600 FSF10A60 190VS
2 CN03 3-176976-1
R221 2.2M RELAY1 SDT-SH-118DM RYC D103 LL4148 L102 23mH C102,103 250V 0.001uF TNR102 14D 621K BD101 D25XB60 R104 10W 0.02 VA VCC C104 630V 1uF Q102,Q103,Q109 SPW20N60C3*3 C105,106 450V 330uF D204 LL4148 R222 2.2M
C110 470pF C111 PFC+ R117 180KF R118 180KF R119 180KF R120 160KF R121 160KF R122 18KF R129 150KF R125 75KF R126 75KF R127 75KF R128 75KF C112 330pF R123 330KF C113 2.2uF R124 220KF 11 9 0.1uF R116 10KF
3K
C108 680pF
R109 1W 4.7 R113 24KF D109 1N5236B C109 68PF Q104 KTC3209
R106 1W 4.7
R107 1W 4.7
R144 10F
R114
C123 35V 47uF Q106 KSP2907 R232 1K R231 5W 0.05 R620 2W 100K PC102 PC-17K1C C220 35V 47uF 6 R602 2W 100K R604 120KF R606 270KF R613 120KF R627 120KF R628 120KF OUT 5 R243 1W 47R GND IS + 3 PC204 R608 120KF IC201 KA7552A C212 0.0047uF D211 1N5234B Q702 KTC3207 VR601 5K R607 130KF
MO
VS
RE
PK
VO IA VR
VI
6 8
CA GT EN 16 10
IS
R131 33KF
R233 100KF
15
8 7 1 2
CS CT RT FB
C115
C116
R135
R134 24KF
R260 2.4KF L301 27uH +5VSTBY R301 220F C301,301A 10V 2200uF*2 R146 2W 100 PC101 C302 0.68uF R303 1KF GND D226 LL4148 VA VS R155 100KF D301 US1M R305 5W15 R151 100KF R150 100KF R149 100KF R148 100KF R152 100KF R154 100KF R153 100KF D302 US1M R306 5W6.8 R307 5W6.8 R156 1KF Q300 FQP17N40 D303 1N5245B C304 50V 4.7uF PC100 PC-17K1C AC DET PFC ON/OFF VA VCC PFC + R302 1.02KF C263 10uF
VCC
R143 3W 470K AC-1 D107 US1M R199 56KF R198 56KF R196 56KF R195 56KF R193 56KF R192 56KF R189 200KF R190 200KF R140 7.5KF
R615 18KF
T206 VA EER4042
D700 FSF10A60 60VA R704 22KF R700 C700 1KV 100pF C701,702,704 100V 330uF R706 20KF R705 20KF
C
Q107 KTC3198Y 2 3
DRAIN
VCC
IC300 KA431AZ
GND
FB
0.1uF
D108 1N5236B
C119
R229 1W 4.7F
VA DET
PFC VCC C128 35V 470uF PFC GND D106 US1M CTL
Q108 KTC3198Y
60VA R247 1.2K R246 5W 0.2 R715 45.3KF R716 45.3KF R720 45.3KF R710 18KF R701 18KF R708 18KF R702 33KF
C215 R500 1W 10 C500 1KV0.001uF C550~C554 10V 2200uF*5 L500 6*20 2.5uH C504,C555~C557 10V 2200uF*4 VR500 2K MULTI ON/OFF R248 100KF C216 C217 R502 0 R503 1KF +5V DET R249 10KF PC205 PC-17K1C GND R505 1W 4R7 D501 C505 1KV 0.001uF 1 Adj IC500 KA317 Output 2 R525 56KF R511 15KF R512 15KF C507 35V 47uF R508 0R R510 5W 1K SEL CABLE R513 2.7KF GND 1 +30V/1.0A (+24V/1.25A) 5VSC Q210 KRC103M R250 C218 R251
35V 47uF R718 45.3KF R717 45.3KF R721 45.3KF R712 18KF R714 18KF R719 18KF R703 36KF 6 1uF 0.001uF 4.7KF 0.047uF 10KF IC202 KA7552A PC205 PC206 PC-17K1C C261 4.7uF C226 0.001uF C219 0.01uF D212 1N5234B R711 11KF R261 1KF 4 8 7 1 2 CS CT RT FB GND VCC
+5VCTRL
D500 SF30SC6
OUT
R520 470F
R709 36KF
VA ON/OFF
IS +
D5001 SF30SC6 C200 630V 0.01uF Q201 SPW11N80C3 D206 LL4148 D203 LL4148
R210 1W 10F
R504 1.8KF
C214 0.01uF
Input
Q200 KTA1281
R212 10KF
R214 360RF
R237 5W 0.1
SUF30J
LED401 RED
R509 3.3KF C506 50V 220uF C202 35V 47uF 6 R507 5W 2.7K
REVISION HISTORY NO 1
LED400 GREEN C401 50V 0.1uF 1 CRST400 4MHZ Xin GND Xout 3 10KF
/
2004/07/28
PH967C6
FEP30JP
C203 R216 100KF C204 R218 C205 Q202 KRC103M R219 10K
8 7 1 2
CS CT RT FB
VCC
OUT
50V0.01uF
ON/OFF
R514 2KF +12V DET C511 35V 47uF 24 23 22 21 20 19 18 17 16 15 14 R515 1.8KF R516 1KF GND
C410
R421
Vss
RA3/AN3
RA2/AN2
RA1/AN1
RA0/EC0
|RESET
Xout
RC1
RC0
RD3
Xin
RD2
PC-17K1C
R262 1KF R217 10KF C201 0.01uF C262 4.7uF PC202 PC-17K1C C227 0.001uF C208 470pF C520 R526 1 D503 D10L20U C516 35V 1000uF
IC502 KIA378R09PI ON/OFF Vin Vo 2 R518 3.9KF C514 35V 47uF +9V DET J2 0 R519 1.5KF GND CN803 C403 C404 C405 CN806 CN804 9VSC 1 2 3 4 5VSC 5 6 7 8 9 171825-9 5VCTRL CN805 4 3 2 1 1-1123723-4
4
AN0/AVref/RB0
9VSC
PWM0/COMP0/RB4
GND
INT0/RB2
PC201
10
11
INT1/RB3
BUZ/RB1
AN4/RA4
AN5/RA5
AN6/RA6
AN6/RA6
VDD
RD0
RD1
12
R415
100F
IC401 HMS87C1304A
R416 1KF
R422
C411
13
R532 1W 2.7K
10KF
GND
IS +
GND
Vin
Vo
+12V /1.0A
50V0.01uF
IC501 KIA278R12PI
DGP-420WXGA
SW400 R420 4.7KF JSS 2209
A
50V 0.68uF 330F R412 1KF R414 2KF R417 1KF 9 ACD OUT 4 5VD OUT 5 VS ON R418 1KF 8 RLY ON 50V 0.1uF 50V 0.1uF 50V 0.1uF 50V 0.1uF 1KF 50V 0.1uF 50V 0.1uF R403 1KF 1KF 1KF 1KF R408 1KF
5VSC
1 2 3 4 60VA
R407
330F
C409
R406
R409 2KF
R411
C406
8 9 10 11 12 1-171825-2
VA,VS ON/OFF
MULTI ON/OFF
7 +5VSTBY
11 GND
6 GND
21 VS DET
20 VA DET
16 +5V DET
18 +12V DET
17 +9V DET
19 +30V DET
3 PFC ON/OFF
R410
13
R404
R405
2 AC DET
15
1 RY ON/OFF
190VS
2 1 1-1123723-0
<
D
1
1
HIC_MICOM
<D
USP490M-42LP
INPUT GBAIN GGAIN RXCm RX0m GHSYNC RX1m RXCp HDCBIN HDYIN RX1p RX2p GRAIN Y RX0p RX2m GVSYNC CB HDCRIN CR
DVI RXCm RX0m RX1p RX1m RX0p GDFEOE RX2m RX2p RXCp GRE[7:0] GPEN GBE[7:0] GVS GBO[7:0] GFBK GHS GGE[7:0] GCLK GRO[7:0] GGO[7:0]
AFE HDCBIN HDYIN GAFEOE VGASEL GVSYNC GCOAST HDCRIN GRAIN SCL GBAIN GBLKSPL GGAIN SDA GHSYNC GBE[7:0] GRE[7:0] GHS GCLK GFBK GGE[7:0] GVS
PW171 D[15:0] SDA A[19:0] GFBK CS1n VPPEN RDn NMI VR[7:0] VCLK VG[7:0] VB[7:0] GHS GCLK GRE[7:0] GBO[7:0] GBE[7:0] GGO[7:0] GRO[7:0] GVS GGE[7:0] MCKEXT RXD 08_PW171 IRRCVR1 RESET DCKEXT VPEN VVS VFIELD GPEN ICSCLK ICSSTD ICSSTM ICSDAT LED-R LED-G NDSP_EN DTXON VGASEL GAFEOE GDFEOE VVINT VHS MUTE SLEEP1 PIO3 CPUGO PDPGO RESET-2 PDWN IRQ DGE[7:0] DBE[7:0] DRO[7:0] DGO[7:0] DRE[7:0] DBO[7:0] DCLK GBLKSPL GCOAST ROMWEn ROMOEn TXD DVS DENB DENG DENR DHS SCL
04_AFE 03_DVI
02_INPUT
MEMORY
C
VCP3230 VVINT CB RESETn Y SDA CR STBLED VUV[7:0] VVHS VY[7:0] VVCLK SCL VVVS VFIELD MUTE POWER_ON MUTE1 IR
NV320 SDA SCL VVHS RESETn VVCLK NDSP_EN VY[7:0] VUV[7:0] VVVS VG[7:0] VB[7:0] VR[7:0] VCLK VVS VHS VPEN
07_MEMORY
06_NV320
05_VCP3230 TMDS DBO[7:0] DHS DENG DENR DGE[7:0] DRE[7:0] DGO[7:0] DRO[7:0] DCLK DVS 09_TMDS DENB DBE[7:0]
MISC LED-G ICSSTM ICSCLK ICSSTD LED-R ICSDAT TXD RDn D[7:0] CS1n STBLED DCKEXT MCKEXT RXD RESET RESETn NMI POWER_ON IRRCVR1
POWER
LVDS DENG DCLK DVS DHS DTXON RESET-2 SCL SDA CPUGO PDPGO PDWN IRQ DGE[7:0] DRE[7:0] DBE[7:0] 12_LVDS
11_POWER 10_MISC
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size B File TOP Thursday, December 09, 2004 Checked by: Sheet
1
PVDD
VCC 1
AVDD
C46 47uF
C47 0.1uF
C49 47uF
D
V33 14 1 2
26 27 39 42 45 46 51 52 59 62
11 22 23 69 78 79
AVD1 AVD2 AVD3 AVD4 AVD5 AVD6 AVD7 AVD8 AVD9 AVD10
U8A 3 74LVC126A 7
R16 3.3K
PVD1 PVD2
3.9nF
GFLT1
34 35
C60
39nF
TP7
TP8
GFILT
33
FILT
SDA SCL U9 VGASEL HDCRIN HDYIN HDCBIN GRAIN GGAIN GBAIN 1 15 2 5 11 14 3 6 10 13 A/B OE A1 A2 A3 A4 B1 B2 B3 B4 PI5V330 VCC 16 VCC GBLKSPL GCOAST
57 56 55 38 29
RED0 RED1 RED2 RED3 RED4 RED5 RED6 RED7 GREEN0 GREEN1 GREEN2 GREEN3 GREEN4 GREEN5 GREEN6 GREEN7 BLUE0 BLUE1 BLUE2 BLUE3 BLUE4 BLUE5 BLUE6 BLUE7 DATACK HSOUT SOGOUT VSOUT
77 76 75 74 73 72 71 70 9 8 7 6 5 4 3 2 19 18 17 16 15 14 13 12 67 66 65 64
ADR0 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ADR7 ADG0 ADG1 ADG2 ADG3 ADG4 ADG5 ADG6 ADG7 ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7 ADCK ADHS ADSOG ADVS
47R
47R
RP14 GRE0 GRE1 GRE2 GRE3 RP15 GRE4 GRE5 GRE6 GRE7 RP16 GGE0 GGE1 GGE2 GGE3 RP17 GGE4 GGE5 GGE6 GGE7 RP18 GBE0 GBE1 GBE2 GBE3 RP19 GBE4 GBE5 GBE6 GBE7 RP20 ADSOGR
GRE[7:0]
47R
GGE[7:0]
Y1 Y2 Y3 Y4
4 7 9 12
47R
54 48 49 43
U7 AD9883A_140
47R
GBE[7:0]
47nF
47R
30 31
HSYNC VSYNC
10
B
GHSYNC
U8C 8 74LVC126A
GBHSY
58 37
REFBYP MIDSCV
47R
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20
13 12 U8D 11
TP9
GVSYNC
1 10 20 21 24 25 28 32 36 40 41 44 47 50 53 60 61 63 68 80
GHS
74LVC126A
GAFEOE
Main (Video)
Drawn by:
5 4 3 2
Checked by:
1
Approved by:
OVCC
CVCC
PVCC
AVCC
VCC 1
V33T
18 29 43 57 78
6 38 67
97
82 84 88 95
C14 SCDT QE0 QE1 QE2 QE3 QE4 QE5 QE6 QE7 QE8 QE9 QE10 QE11 QE12 QE13 QE14 QE15 QE16 QE17 QE18 QE19 QE20 QE21 QE22 QE23 QO0 QO1 QO2 QO3 QO4 QO5 QO6 QO7 QO8 QO9 QO10 QO11 QO12 QO13 QO14 QO15 QO16 QO17 QO18 QO19 QO20 QO21 QO22 QO23 ODCK DE VSYNC HSYNC 8 10 11 12 13 14 15 16 17 20 21 22 23 24 25 26 27 30 31 32 33 34 35 36 37 49 50 51 52 53 54 55 56 59 60 61 62 63 64 65 66 69 70 71 72 73 74 75 77 44 46 47 48 40 41 42 SISCDT SIBE0 SIBE1 SIBE2 SIBE3 SIBE4 SIBE5 SIBE6 SIBE7 SIGE0 SIGE1 SIGE2 SIGE3 SIGE4 SIGE5 SIGE6 SIGE7 SIRE0 SIRE1 SIRE2 SIRE3 SIRE4 SIRE5 SIRE6 SIRE7 SIBO0 SIBO1 SIBO2 SIBO3 SIBO4 SIBO5 SIBO6 SIBO7 SIGO0 SIGO1 SIGO2 SIGO3 SIGO4 SIGO5 SIGO6 SIGO7 SIRO0 SIRO1 SIRO2 SIRO3 SIRO4 SIRO5 SIRO6 SIRO7 SICLK SIDE SIVS SIHS RP1 TP1 47R GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GBE[7:0] 0.1uF
C16 47uF
D
AVCC
PVCC
RP2
47R
V33T GGE[7:0]
L15 FB_420_OHM_200MA
4 OVCC
RP3
47R
EXT_RES
C17 10uF
RP4
47R
90 91 85 86 80 81 93 94
RP5
47R
GRE[7:0]
V33T
L16 FB_420_OHM_200MA
CVCC
RP6
47R
C23 10uF
RXCp RXCm
RP7
47R
GBO[7:0]
V33T
L17 FB_420_OHM_200MA
PVCC
RP8
47R
OVCC 100 4 1 7 3 9 2 99
RP9
47R
GDFEOE
RP10
47R
RP11
47R
RP12
47R
TP2
TP3
TP4
TP5
TP6
B
RP13
47R
PGND
GFBK
19 28 45 58 76
5 39 68
98
79 83 87 89 92
Main (Video)
5 4 3 2
Size B
File DVI INPUT Thursday, December 09, 2004 Checked by: Sheet
1
D[15:0]
V33 26 28 11 12 14 47 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16
U16 CE OE WE RP WP BYTE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 Flash_8M VPP VCC D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 GND1 GND2 13 37
V33 VPP 3
Q4 3906
V33 2
VPPEN
1 3
2 4
FWPn A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
HDR_2X2
29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 46 27
22uF
V33
C167
VP3 R67 1K VP2 3 U17 SCL SDA 6 5 1 2 3 SCL SDA NC0 NC1 NC2 24C16 VCC WP GND 8 C168 7 4 0.1uF
V33
R68
10K
VP1
1 2
Q5 3904
V33
R69 3.3K
R70 3.3K
R71 3.3K
HDR_2X2
VCC
3.3K 3.3K
3.3K 3.3K
HDR_30X2
A[19:1]
Main (Video)
4 3 2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size B File FLASH Thursday, December 09, 2004 Checked by: Sheet
1
HDCR L1 J1 1 2 3
D
FB_40_OHM_500MA
HDCRF
L2
FB_40_OHM_500MA
HDCRIN
HDY Y
L3
FB_40_OHM_500MA
HDYF
L4
FB_40_OHM_500MA
HDYIN
HDCB
L5
FB_40_OHM_500MA
HDCBF
L6
HDCBIN
D
4 5 CB R1 7 8 CR Y 75 R2 75 R3
BAV99L
BAV99L
75
3 C1 D1 1 12pF
3 C2 D2 1 12pF
BAV99L
3 C3 D3 1 12pF
9 YUV
CB CR GVCC1 2 BAV99L
GVCC1 BAV99L 2
GVCC 2
GVCC R4
GVCC 2
GVCC R5 3.3K 3
GVCC
3 D4
3 D5 1
BAV99L
BAV99L
3.3K 3 D6 1
R9 3.3K U2 GVCK GSCL GSDA 7 6 5 VCLK SCL SDA VCC NC1 NC2 NC3 GND 8 1 2 3 4 C5 0.1uF J15 DB15HD_V 6 1 11 7 2 12 8 3 13 9 4 14 10 5 15 16 GRED GGREEN GBLUE G5V 17 GVCC
R6 3.3K
R7 3.3K
R8 3.3K CVCK CSCL CSDA 7 6 5 U1 VCLK SCL SDA VCC NC1 NC2 NC3 GND 24LC21A 8 1 2 3 4
GVCC1
D7 1
C4 0.1uF
24LC21A
L7 L9 L11
L8 L10 L12
BAV99L
RX0m RX0p
BAV99L
DATA2DATA2+ DATA2/4_SHLD DATA4DATA4+ DDC_CLK DDC_DATA A_VSYNC DATA1DATA1+ DATA1/3_SHLD DATA3DATA3+ +5V GND H_PLUG_DET DATA0DATA0+ DATA0/5_SHLD DATA5DATA5+ CLK_SHLD CLK+ CLK-
RX1m RX1p
GVCC1 GVCC1
GVCC1 GVCC1
BAV99L
BAV99L
R13 2K 3
R14 2K 3
75
75
75
3 C7
3 C8 D9 1
BAV99L
GDC5V
2 3 C9 D10 1 12pF
R10
R11
R12
AVDD
AVDD
AVDD
VCC
D13 1 2
GVCC1 3
D8 1
12pF
12pF
BAV70L
D11 1
D12 1
28
VCC
GVCC
VCC L14 NS
GVCC1
C11 0.1uF
C12
C13 0.1uF
47uF_NS
47uF_NS
Main (Video)
5 4 3 2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size File Custom Date: Drawn by: INPUT Sheet
1
SDA SCL
V33 DRE[7:0]
D
DGE[7:0]
DBE[7:0]
DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7
47R
47R
47R
47R
47R
47R
RP60 ARE0 ARE1 ARE2 ARE3 RP61 ARE4 ARE5 ARE6 ARE7 RP62 AGE0 AGE1 AGE2 AGE3 RP63 AGE4 AGE5 AGE6 AGE7 RP64 ABE0 ABE1 ABE2 ABE3 RP65 ABE4 ABE5 ABE6 ABE7
C273 0.1uF
1 9 26
44 OVCC
DCLK ARE0 ARE1 ARE2 ARE3 ARE4 ARE5 ARE6 ARE7 AGE0 AGE1 AGE2 AGE3 AGE4 AGE5 AGE6 AGE7 ABE0 ABE1 ABE2 ABE3 ABE4 ABE5 ABE6 ABE7 DHS DVS DENG
31 51 52 54 55 56 3 50 2 4 6 7 11 12 14 8 10 15 19 20 22 23 24 16 18 27 28 30 25 17 32
CLKIN TXIN0 TXIN1 TXIN2 TXIN3 TXIN4 TXIN6 TXIN27 TXIN5 TXIN7 TXIN8 TXIN9 TXIN12 TXIN13 TXIN14 TXIN10 TXIN11 TXIN15 TXIN18 TXIN19 TXIN20 TXIN21 TXIN22 TXIN16 TXIN17 TXIN24 TXIN25 TXIN26 TXIN23 R_F PWRDN
PVCC
34
J14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 JEA31
B
TXOUT0 TXOUT0 TXOUT1 TXOUT1 TXOUT2 TXOUT2 TXOUT3 TXOUT3 TXCOUT TXCOUT
47 48 45 46 41 42 37 38 39 40
TXE0m TXE0p TXE1m TXE1p TXE2m TXE2p TXECKm TXECKp TXE3m TXE3p 3WSDA 0 3WSCL 0 3WSLE 0 PDWN SCL SDA R141 R142 R143
U31 DS90C383A
DRE[7:0]
DGE[7:0]
B
DBE[7:0]
DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7
47R
47R
47R
47R
47R
47R
ARE6 RP50 ARE7 ARE0 ARE1 ARE2 RP51 ARE3 ARE4 ARE5 AGE6 RP52 AGE7 AGE0 AGE1 AGE2 RP53 AGE3 AGE4 AGE5 ABE6 RP54 ABE7 ABE0 ABE1 ABE2 RP55 ABE3 ABE4 ABE5
DTXON
R144
5 13 21 29 53 36 43 49 33 35
GND1 GND2 GND3 GND4 GND5 OGND1 OGND2 OGND3 PGND1 PGND2
Main (Video)
5 4 3 2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size B File LVDS OUTPUT Thursday, December 09, 2004 Checked by: Sheet
1
V33 R98
U21 OE SCLK DATA STROBE X1 X2 ICS307 ICSREF VDD CLK1 CLK2 GND 3 11 6 5
V33
510
8 12 9 1 16
MCKEXT D19 LED RED C231 0.1uF +5VIN J8 V33 1 NMI1 4 SW2 SW_MOM_4P 2 3 R106 1K R107 4.7K C240 0.1uF STBLED 1 2 3 4 5 6 STBLED PH-6A PH-3A IR +5V +5V
V33
0.1uF J16 +5V 1 2 3 4 5 CON5 FROM PDP C241 4.7uF R389 1 1K 3 IRRCVR1 Q6 3906 2
DCKEXT
NMI
ICSSTD
1 16
V33 C233 V33 0.1uF V33 7 RSTINn TLCCT C234 0.1uF TLC7733 TXD 2 3 1 V33 VDD RESET RESET GND 8 6 5 4
3 2 1
RESET RESETn RXD 200 R104 MC1P MC1M RRXD 1 3 12 9 11 10 MC2P MC2M C238 1K C239 0.1uF 4 5
U25 C1P C1M ROUT1 ROUT2 TIN1 TIN2 C2P C2M MAX232A VCC VP RIN1 RIN2 T1OUT TOUT2 VM GND 16 2 13 8 14 7 6 15 MVP MRXD MTXD MVM C235 0.1uF C236 0.1uF
VCC 10 5 9 4 8 3 7 2 6 1 11 J7
CONTROL
R105
C237 0.1uF
DB9_V
R109 R110 R111 R112 R113 R114 R115 10K 10K 10K 10K 10K 10K 10K V33 V33 V33 V33 V33 V33 V33
POWER_ON
0.1uF
J10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PH-14A
10 11 12 13 14 15 16 17 18 20
GND O7 O6 O5 O4 O3 O2 O1 O0 VCC
R118
NS CS1n RDn
V33
C243 C244 C245 C246 C247 C248 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
5 4
C249 0.1uF
3
Main (Video)
2
Size B
U12 VCC MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 C124
D
U13 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC NC 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 33 37 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DQM1 CLK_M V33N MWECASRASMCS21 22 23 24 27 28 29 30 31 32 20 19 14 36 35 34 15 16 17 18 1 25 7 13 38 44 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA LDQM UDQM CLK CKE WE CAS RAS CS VDD VDD VDDQ VDDQ VDDQ VDDQ VSS VSS VSSQ VSSQ VSSQ VSSQ 26 50 47 41 10 4 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC NC 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49 33 37 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 V33N
21 22 23 24 27 28 29 30 31 32 20 19 14 36 35 34 15 16 17 18 1 25 7 13 38 44
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA LDQM UDQM CLK CKE WE CAS RAS CS VDD VDD VDDQ VDDQ VDDQ VDDQ
C123 0.1uF
0.1uF
C125 0.1uF
C126 0.1uF
C127 0.1uF
C128 0.1uF
C129 0.1uF
V33N
C140 0.1uF
C141 0.1uF
C142 0.1uF
C143 0.1uF
C144 0.1uF
C145 0.1uF
C146 0.1uF
MWECASRASMCS-
HY57V161610D-7
HY57V161610D-7
CLK_M
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
VCC 1 YQ0 YQ1 YQ2 YQ3 YQ4 YQ5 YQ6 YQ7 YQ8 YQ9 UQ0 UQ1 UQ2 UQ3 UQ4 UQ5 UQ6 UQ7 UQ8 UQ9 VQ0 VQ1 VQ2 VQ3 VQ4 VQ5 VQ6 VQ7 VQ8 VQ9 PCLK VSQ HSQ HVQ VBQ DVQ 72 67 66 60 59 52 49 47 46 45 91 90 88 87 86 84 82 81 80 73 106 105 103 100 99 97 96 95 94 92 37 41 38 39 42 109 51 50 68 77 75 43 74 76 56 57 58 63 64 65 69 70 71 RP26 47R 4 3 2 1 1 2 3 4 47R 47R 4 3 2 1 4 3 2 1 47R 47R 8 7 6 5 8 7 6 5 47R VG[7:0] VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB[7:0] VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 VR[7:0] VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 VR[7:0] VB[7:0] VG[7:0] + C149 22uF C150 0.1uF
22
U15 VY[7:0] VY0 VY1 VY2 VY3 VY4 VY5 VY6 VY7 171 172 173 174 175 176 178 179 180 181 183 184 185 186 187 188 189 190 191 192 193 194 195 196 159 163 164 165 VVVS VVHS LLC320 VVCLK 197 198 199 200 201 202 203 24 27 167 168 169 204 118 119 116 115 34 35 107 114 113 111 110 132 133 R64 100 NO STUFF Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 U0 U1 U2 U3 U4 U5 U6 U7 V0 V1 V2 V3 V4 V5 V6 V7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
CLK
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10
GND
VI
U14 LM2937_TO263 VO 3
V33N
9 8 6 5 4 2 1 208 20 18 17 16 14 13 12 10 147 146 145 143 142 141 140 138 158 156 155 154 152 151 150 149
VUV[7:0]
+ C148 22uF
5 6 7 8 8 7 6 5 RP27
+ C151 22uF
C
DVDLLC DVDB DVDHS DVDVS ODD VS HS HREF CREF LLC HRC LLAD2 HRA CLV HREFO LLA RESET CSA0 CSA1 I2C3W SCS SDA SCL TEST RFLOCK APLLF OEQ P60 XI XO
RESETn
ADVDD ADGND COMP DAC-VCC DAC-GND RSET VREFOUT VREFIN YA RED-VDD RED-GND BYA GRN-VDD GRN-GND RYA BLU-VDD BLU-GND
R62 0 V33N COMP320 + C152 1uF RSET320 R63 100 C153 0.1uF X7R 0603
SDA SCL
V33N
28 85 131 182
7 15 23 36 44 53 79 89 98 108 117 126 139 148 157 166 207 25 78 134 177
NV320 V33N
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND15 GND16 GND17 GND_CORE1 GND_CORE2 GND_CORE3 GND_CORE4
NDSP_EN
VCCIO_1 VCCIO_2 VCCIO_3 VCCIO_4 VCCIO_5 VCCIO_6 VCCIO_7 VCCIO_8 VCCIO_9 VCCIO_10 VCCIO_11 VCCIO_12 VCCIO_13 VCCIO_14 VCCIO_15 VCCIO_16 VCCIO_17
R65 0
NV320XO
NV320XI
10uF V33N 10uH L27 VCC320P V33N 10uH C164 0.1uF X7R 0603 L28 + C156 10uF VCC320A C157 0.1uF X7R 0603
Y1 10.000MHZ HC-49/SD
A
2M C166 22pF
+ C161 10uF
Main (Video)
5 4 3 2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size C Date: Drawn by: File DEINTERLACE Thursday, December 09, 2004 Checked by:
1
VCC 3
D
V25
C253 0.1uF 2
C250 22uF
R126 510
C252 22uF
1000uF-16V
R129 510
+5VIN
C
VCC
C
C259 2
220uF-16V
VCC
4 V25ADJ
C267 0.1uF
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size A File POWER Thursday, December 09, 2004 Checked by:
2
Main (Video)
5 4 3
GFBK GCLK GPEN GVS GHS L24 K26 L25 J26 R82 K25 L26 L23 GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7 U26 V24 V23 V25 V26 W25 W24 W23 H23 G26 H25 P23 P24 P25 P26 R23 B25 A26 D24 E23 C25 B26 C26 E24 R24 R25 R26 T23 T24 T25 T26 U25 F23 D25 D26 F24 E25 E26 F25 F26 D21 B22 C22 A23 B23 D22 C23 A24 GCLK GPEN GVS GHS GSOG GFIELD PLLCLK GRE0 GRE1 GRE2 GRE3 GRE4 GRE5 GRE6 GRE7 GGE0 GGE1 GGE2 GGE3 GGE4 GGE5 GGE6 GGE7 GBE0 GBE1 GBE2 GBE3 GBE4 GBE5 GBE6 GBE7 GRO0 GRO1 GRO2 GRO3 GRO4 GRO5 GRO6 GRO7 GGO0 GGO1 GGO2 GGO3 GGO4 GGO5 GGO6 GGO7 GBO0 GBO1 GBO2 GBO3 GBO4 GBO5 GBO6 GBO7 U18A PW365 PA3 PA4 SDA SCL PDWN 3WSCL 3WSDA 3WSLE GCLKOUT GFBK GREF GBLKSPL GCOAST GHSFOUT GADCCLK M25 H26 J25 J23 J24 M24 M26
V3P V3P V3P V3P V3P R78 R79 R80 R81 4.7K RESET 4.7K 4.7K 4.7K 4.7K MCKEXT DCKEXT CLKIN1 UCSRC XTALI XTALO WDTEN C171 18pF R86 0 RXD TXD R77 CPUEN CLKIN F2 E1 Y2 AE15 AF15 F3 Y3 Y4 F4 D1 D2 E3 E2 C1 C2 B1 B2 D5 B3 A2 A3 C5 D6 B4 A4 C6 B5 A5 B6 A6 D8 C8 B7 A7 B8 D9 C9 B17 B9 AE4 AF2 E4 AC5 A8 U2 V1 V2 W1 V3 V4 W3 W4 AA1 AB2 AA3 AC1 AB3 AD1 AE1 AD2 AB4 AC3 AF1 AE2 H3 H2 J4 J3 K1 K2 L1 L2 L3 L4 M3 M4 N1 N2 N3 N4 T3 T4 U1 R2 R1 P2 P1 R3 R4 T1 T2 G2 G1 H1 F1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
NS
GBLKSPL GCOAST
GRE[7:0]
CPUEN RESET CLKIN MCKEXT DCKEXT UCSRC XTALI XTALO WDTEN RXD TXD IRRCVR0 IRRCVR1 PORTA0 PORTA1 PORTA2 PORTA3 PORTA4 PORTA5 PORTA6 PORTA7 PORTB0 PORTB1 PORTB2 PORTB3 PORTB4 PORTB5 PORTB6 PORTB7 PORTC0 PORTC1 PORTC2 PORTC3 PORTC4 PORTC5 PORTC6 PORTC7 CPUTMS CPUTCLK CPUTDI CPUTDO MODE0 MODE1 MODE2
GGE[7:0]
IRRCVR1
PDWN
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
A[19:0]
DCLK DVS DHS DENR DENG DENB DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7
AD13 AD15 AC15 AF17 AC16 AD16 Y25 AA26 AA25 AB26 AA24 AA23 AC26 AC25 AB23 AC24 AD26 AD23 AC22 AE24 AF25 AF24 AE23 AF23 AD21 AE22 AE19 AE18 AD18 AE17 AF13 AC12 AD12 AE12 AF12 AE11 AF11 AE10 AF10 AD9 AC9 AE9 AD8 AC8 AF8 AF7 AE7 AF6 AE6 AC6 AE5 AD5 AF4 AE3 V3P C177 0.1uF
RDK
47
R76
RRE0 47R RRE1 RRE2 RRE3 RRE4 47R RRE5 RRE6 RRE7 RGE0 47R RGE1 RGE2 RGE3 RGE4 47R RGE5 RGE6 RGE7 RBE0 47R RBE1 RBE2 RBE3 RBE4 47R RBE5 RBE6 RBE7 RRO0 47R RRO1 RRO2 RRO3 RRO4 47R RRO5 RRO6 RRO7 RGO0 47R RGO1 RGO2 RGO3 RGO4 47R RGO5 RGO6 RGO7 RBO0 47R RBO1 RBO2 RBO3 RBO4 47R RBO5 RBO6 RBO7 V3P C178 0.1uF V3P C179 0.1uF
RP34 DRE0 DRE1 DRE2 DRE3 RP35 DRE4 DRE5 DRE6 DRE7 RP36 DGE0 DGE1 DGE2 DGE3 RP37 DGE4 DGE5 DGE6 DGE7 RP38 DBE0 DBE1 DBE2 DBE3 RP39 DBE4 DBE5 DBE6 DBE7 RP40 DRO0 DRO1 DRO2 DRO3 RP41 DRO4 DRO5 DRO6 DRO7 RP42 DGO0 DGO1 DGO2 DGO3 RP43 DGO4 DGO5 DGO6 DGO7 RP44 DBO0 DBO1 DBO2 DBO3 RP45 DBO4 DBO5 DBO6 DBO7 V3P C180 0.1uF V3P C181 0.1uF
DGE[7:0]
U18D PW365
D[15:0]
U18C PW365
GBE[7:0]
Graphics Port
VCLK VPEN VVS VHS VFIELD VR[7:0]
B16 B18 A21 B21 A22 C21 VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 A9 B10 A10 D11 C11 B11 A11 D12 C12 B12 A12 B13 A13 D14 C14 B14 A14 D15 C15 B15 A15 D16 C16 A16 V33
VCLK VPEN VLAV VVS VHS VFIELD VR0 VR1 VR2 VR3 VR4 VR5 VR6 VR7 VG0 VG1 VG2 VG3 VG4 VG5 VG6 VG7 VB0 VB1 VB2 VB3 VB4 VB5 VB6 VB7 V3P L30 FB_11_OHM_500MA
GRO[7:0]
NDSP_EN VGASEL GAFEOE ICSDAT ICSCLK ICSSTD ICSSTM GDFEOE DTXON MUTE SLEEP1 in/ext VPPEN V3P
Misc
Display Port
DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7
DBE[7:0]
DRO[7:0]
MUTE
GGO[7:0]
R380 4.7K
VG[7:0]
Video Port
GBO[7:0]
B
RD WR BHEN ROMOE ROMWE RAMOE RAMWE CS0 CS1 CS2 CS3 EXTINT0 EXTINT1 EXTINT2 NMI
DGO[7:0]
NS
DBO[7:0]
VB[7:0]
R89 10K V25 C172 V25 C173 0.1uF V25 C174 0.1uF V25 C175 0.1uF
V25
V25P
0.1uF
Y24 AA2 AC19 AD4 AD7 AD10 AD17 AD19 AD20 AD25 AE21 AF14 AF18 AF19 AF26
C3 C13 C24 G25 H4 J1 M1 N24 P3 W2 Y26 AB24 AC2 AC21 AD3 AD6 AD11 AD14 AD24 AE8 AE13 AE16
A20 A25 C4 C7 C10 C17 C18 C19 C20 D18 D19 G3 G24 K3 K24 N26 U3 U24
C192 0.1uF
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22
VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34
PW365
A
U18E
A1 GND1 A17 GND2 A18 GND3 A19 GND4 B19 GND5 B20 GND6 B24 GND7 D4 GND8 D7 GND9 D10 GND10 D13 GND11 D17 GND12 D20 GND13 D23 GND14 G4 GND15 G23 GND16 H24 GND17 J2 GND18 K4 GND19 K23 GND20 M2 GND21 M23 GND22 N23 GND23 N25 GND24 P4 GND25 U4 GND26 U23 GND27 W26 GND28 Y1 GND29 D3 GND30 Y23 GND31 AA4 GND32 AB1 GND33 AB25 GND34 AC4 GND35 AC7 GND36 AC10GND37 AC11GND38 AC13GND39 AC14GND40 AC17GND41 AC18GND42 AC20GND43 AC23GND44 AD22GND45 AE14 GND46 AE20 GND47 AE25 GND48 AE26 GND49 AF3 GND50 AF5 GND51 AF9 GND52 AF16 GND53 AF20 GND54 AF21 GND55 AF22 GND56
Main (Video)
3 2
Size B
C207 330pF
D
C208 330pF
C209 330pF
+ C210 330pF C211 330pF C212 330pF C213 330pF C214 330pF C205 1uF
C215 0.1uF
D
DRE[7:0]
DGE[7:0]
DBE[7:0]
DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7
U19 Sil150 97 96 95 94 93 92 91 90 6 5 4 3 2 1 100 99 16 15 14 13 12 11 10 9 55 54 53 52 51 50 49 48 65 64 63 62 61 60 59 58 75 74 73 72 71 70 69 68 80 78 76 77 84 83 82 24 25 DIE16 DIE17 DIE18 DIE19 DIE20 DIE21 DIE22 DIE23 DIE8 DIE9 DIE10 DIE11 DIE12 DIE13 DIE14 DIE15 DIE0 DIE1 DIE2 DIE3 DIE4 DIE5 DIE6 DIE7 DIO16 DIO17 DIO18 DIO19 DIO20 DIO21 DIO22 DIO23 DIO8 DIO9 DIO10 DIO11 DIO12 DIO13 DIO14 DIO15 DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 IDCK DE HSYNC VSYNC CTL1 CTL2 CTL3 EDGE PIXS VCC VCC VCC VCC IVCC IVCC IVCC IVCC AVCC AVCC AVCC PVCC1 PVCC2 8 30 56 88 17 66 81 98 36 38 44 18 85 L32 C216 330pF C217 330pF C218 330pF C219 10uF C220 10uF 200+ Ohm
V33L
C221 0.1uF
L33 C222 100pF TX2+ TX2TX1+ TX1TX0+ TX0TXC+ TXCV33L + C223 10uF + C224 22uF C225 200+ Ohm 0.1uF
V33L
V33T
C226 0.1uF
R90 0
R91 0 J6 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 C1 C2 C3 C4 C5 C6 26 SHELL1 NC1 DATA2DATA2+ DATA2/4_SHLD DATA4DATA4+ DDC_CLK DDC_DATA A_VSYNC DATA1DATA1+ DATA1/3_SHLD DATA3DATA3+ +5V GND H_PLUG_DET DATA0DATA0+ DATA0/5_SHLD DATA5DATA5+ CLK_SHLD CLK+ CLKA_RED A_GREEN A_BLUE A_HSYNC A_GND1 A_GND2 NC2 SHELL2 DVI_V
B
46 45 43 42 40 39 35 34
27
DRO[7:0]
C
V33L
R92 10K
R93 EXT_SWING PD RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED GND GND GND GND GND GND AGND AGND AGND AGND PGND1 PGND2 32 26 20 21 22 23 27 28 29 87 7 31 57 67 79 89 33 37 41 47 19 86
400
V33L
R94 NC
DGO[7:0]
V33L
R95 NU
28
VCC JP4 DRE[7:0] DRE0 DRE1 DRE2 DRE3 DRE4 DRE5 DRE6 DRE7 DGE0 DGE1 DGE2 DGE3 DGE4 DGE5 DGE6 DGE7 DBE0 DBE1 DBE2 DBE3 DBE4 DBE5 DBE6 DBE7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 DRO0 DRO1 DRO2 DRO3 DRO4 DRO5 DRO6 DRO7 DGO0 DGO1 DGO2 DGO3 DGO4 DGO5 DGO6 DGO7 DBO0 DBO1 DBO2 DBO3 DBO4 DBO5 DBO6 DBO7 DRO[7:0]
DGE[7:0]
DGO[7:0]
DBO[7:0]
DHS DVS
Main (Video)
5 4 3
HDR_34X2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size File Custom Date: Drawn by:
2
R17 VCCV U10 SCL5V SDA5V VVVS VVHS CCV2 C69 0.1uF R22 R25 R30 NC 33 470 C70 560pF +5VT L19 FB_420_OHM_200MA VCCV R32 10K 15 14 16 13 5 7 10 4 6 1 SCL SDA SDO VDD BOX 12 17 18 2 3 8 9 R31 11 6.8K C71 C74 47uF C75 0.1uF 6.8nF C72 68nF R20 R23 R26 R28 VCCV
3.3K C280 220nF VBOX VCCR 8.2K 13K 13K 13K VCCG VCCB
VVINT
V33
VCC
R18 22K
Q1
R19 22K
VIN INTRO RED HIN GREEN BLUE VIDED CSYNC REF LPF SEN SMS ASEL VSSA Z86229
SDA
SDA5V
SN7002 C286 C287 2K R33 33pF 2K 33pF 2K R35 C285 33pF 2K R36 R37 22K Q2 R38 22K 1 D15 1 2 1N1183A V33 VCC
C284 33pF
C73 0.1uF
R34
SCL5V
C77
330pF
R41 75
C79
C78 220nF
VYIN
V33
VAAV
10 26 29 36 45 52
59 69 76
330pF
R43 75
C81
C80 220nF
VCRIN
220nF 220nF 220nF 79 1 2 3 4 5 6 71 72 73 74 75 17 FB1IN B1/CB1IN G1/Y1IN R1/CR1IN B2/CB2IN G2/Y2IN R2/CR2IN CIN VIN1 VIN2 VIN3 VIN4 VGAV YCOEQ RESQ SCL SDA XTAL1 XTAL2 I2CSEL TEST NC1 NC2
53 57 56 54 28 27 31 32 33 34 37 38 39 40 41 42 43 44 47 48 49 50 23 22 21 20 19 55 58 24 60 70 78 66 VLLC1 VVY7 VVY6 VVY5 VVY4 VVY3 VVY2 VVY1 VVY0 VVUV7 VVUV6 VVUV5 VVUV4 VVUV3 VVUV2 VVUV1 VVUV0
RP21
47R
VFIELD VVVS VVHS VVCLK VY7 VY6 VY5 VY4 VY3 VY2 VY1 VY0 VUV7 VUV6 VUV5 VUV4 VUV3 VUV2 VUV1 VUV0 VY[7:0]
47 RP22
R45 47R
330pF
J3
8 4 2 3 1
VLUMA
680nF 680nF
C85
1nF
RP23
47R
VCVID VVIN3
U11 VPC3230D_C5
4
B
3 1
V33
VDOEn
18 15
C7 C6 C5 C4 C3 C2 C1 C0 FFOE FFRE FFRSTW FFWE FFIE FSY/HC FPDAT CLK20 CLK5 VOUT VREF VRT
RP24
47R
VUV[7:0]
RP25
47R
R50 10K VX1 VX2 R53 0 R54 51K Z1 XTAL_20.25 RESETn C91 18pF C92 18pF VVSCAP C97 0.1uF
13 14 62 63 67 16 8 61 9
VAAV
J4
R51 2K C90 VVREF VVRT C93 0.1uF R55 4.7uF C94 22uF C95 0.1uF C96 22uF 470 1 2 3
R52 47
VSUPCAP
CCV2
R57 2K
12 25 30 11 C98 0.1uF
7 64 35 65 77 46 51 68 80
SCL SDA
R60 R61
0 0
VVGCAP
VVGPA
C99 0.1uF
A
V33
V33
V33
V33
V33
VCC
VAAV
VAAV
VAAV
VAAV
VAAV
VAAV
VAAV
C100 0.1uF
C101 0.1uF
C102 0.1uF
C103 0.1uF
C106 0.1uF
C107 0.1uF
C108 0.1uF
C109 0.1uF
C110 0.1uF
C111 0.1uF
Main (Video)
3 2
Shanghai Jiaying Multimedia Technology Co.,Ltd Title PW171-LGPDP Size File CustomVIDEO INPUT Date: Drawn by: Thursday, December 09, 2004 Checked by:
1
02_INPUT OUTA OUTB AUDIO OUTL AUDIO OUTB SIF SDA5V SCL5V SDA IR MUTE MUTE1 POWER_ON SCL
02_INPUT 03_AUDIO
IR
04_MCU+AMP
A A
"U3(UVS7305M.FH)
only for the Model with Turner"
Audio/Tuner
Audio/Tuner
Audio/Tuner
Remote control
SET
There are 5 pc.s PCBs including 1 pc. Tuner/Audio board, 1 pc. Keypad board, 1 pc. Remote Control Receiver board, 1 pc. L/R Speakers and 1 pc. Main (Video) board in the SET.
Parts position
Internal Speaker (Right) Power Supply Internal Speaker (Left)
Y-Drive Top
Z-Sustainer Y-Sustainer
EMI filter + AC Inlet only for the Model with Turner Main (Video) Stand Tuner/Audio X right Extension
PCB function
1. Power: (1). Input voltage: AC 110V~240V, 47Hz~63Hz. Input range: AC 90V(Min)~265V(Max) auto regulation. (2). To provide power for PCBs. 2. Main (Video InterFace) board: To converter TV signals, S signals, AV signals, Y Pb/ Cb Pr/Cr signals, DVI signals and D-SUB signals to digital ones and to transmit to Control board. 3. Control board: Dealing with the digital signal for output to panel. 4. Y-Sustainer / Z-Sustainer board: (1). Receiving the signals from Control and high voltage supply. (2). Output scanning waveform for Module. 5. Y-Drive board: Receive signal from Y sustainer, output horizontal scanning waveform to the panel. 6. X (left and right) extension board: Output addressing signals. 7. Tuner/Audio Board: Amplifying the audio signal to the internal or external speakers of which selected.
Main IC Specifications
PW171 Image Processor AD9883A 110MSPS/140MSPS Analog Interface for Flat Panel Displays NV320 Video Enhancement Processor VCP 323XD comb Filter Video Processor SiI161B Panel Link Receiver Z86229 NTSC Line 21 CCD Decoder TDA9850 BTSC stereo/SAP decoder(only for the Model with Turner) NJW1144 Audio Processor
d to result in a personal injury or loss of life. Customers using or selling Pixelworks devices for use in such applications do so at their ris
P r e li m i n a r y
General Description
PW171 is a highly integrated system-on-a-chip that interfaces analog, digital, and video inputs in virtually any format to a flat panel monitor or multimedia display. PW171 is pin-compatible with the PW364. An embedded SDRAM frame buffer and memory controller perform frame rate conversion. Computer images from VGA to UXGA at almost any refresh rate can be resized to fit on a fixed-frequency target display device with any resolution up to UXGA with full 24-bit color. PW171 includes advanced second-generation image scaling that provides completely programmable, horizontal and vertical image scaling. PW171 also includes advanced second-generation sync decoding which provides full support for a wide variety of sync types. This includes interlaced, progressive, sync-on-green, and TMDS DE (Data Enable) only. PW171 ImageProcessor supports NTSC or PAL video data with a 4:3 aspect ratio and 16:9 aspect ratio sources, such as DVD or HDTV. Nonlinear scaling and separate horizontal and vertical scalers allow these inputs to be resized optimally for the native resolution and aspect ratio of the display device. PW171 uses an integrated PLL to synchronize the display interface timing to the input timing. This requires only a single external crystal to generate all necessary clocks for the system. An integrated OSD controller provides bit-mapped based OSDs with 16 colors from a 64K color palette. The OSD controller supports transparent and translucent functions. PW171 provides a Pulse Width Modulation (PWM) output for low cost backlight or audio control. With reference source code and an on-chip microprocessor, manufacturers can develop feature-rich products with rapid time-tomarket. Programmable features include the user interface, custom start-up screen, all automatic imaging features, and special screen effects.
Features
!Second-generation Image Scaling !Second-generation Automatic Image Optimization !Color Space Converter for graphics inputs !Video processing !Picture-In-Picture (PIP) !Frame rate conversion !Color matrix for improved color temperature adjustment !On-board PLLs to generate MCLK and DCLK !On-screen display !On-chip microprocessor !JTAG debugging port !8-bit, 9-bit, or 10-bit display outputs !24-bit CPU Addressing !Hardware 2-Wire serial bus support !Hardware PWM output
Applications
!LCD Monitors !Plasma Displays !Multimedia Displays
a
FEATURES 140 MSPS Maximum Conversion Rate 300 MHz Analog Bandwidth 0.5 V to 1.0 V Analog Input Range 500 ps p-p PLL Clock Jitter at 110 MSPS 3.3 V Power Supply Full Sync Processing Sync Detect for Hot Plugging Midscale Clamping Power-Down Mode Low Power: 500 mW Typical 4:2:2 Output Format Mode APPLICATIONS RGB Graphics Processing LCD Monitors and Projectors Plasma Display Panels Scan Converters Microdisplays Digital TV
110 MSPS/140 MSPS Analog Interface for Flat Panel Displays AD9883A
FUNCTIONAL BLOCK DIAGRAM
RAIN CLAMP A/D 8 ROUTA
GAIN
CLAMP
A/D
GOUTA
BAIN
CLAMP
A/D
BOUTA MIDSCV
SCL SDA A0
AD9883A
GENERAL DESCRIPTION
The AD9883A is a complete 8-bit, 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports resolutions up to SXGA (1280 1024 at 75 Hz). The AD9883A includes a 140 MHz triple ADC with internal 1.25 V reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 3.3 V power supply, analog input, and Hsync and COAST signals. Three-state CMOS outputs may be powered from 2.5 V to 3.3 V. The AD9883As on-chip PLL generates a pixel clock from the Hsync input. Pixel clock output frequencies range from 12 MHz to
140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of Hsync. A sampling phase adjustment is provided. Data, Hsync, and clock output phase relationships are maintained. The AD9883A also offers full sync processing for composite sync and sync-on-green applications. A clamp signal is generated internally or may be provided by the user through the CLAMP input pin. This interface is fully programmable via a 2-wire serial interface. Fabricated in an advanced CMOS process, the AD9883A is provided in a space-saving 80-lead LQFP surface-mount plastic package and is specified over the 0C to 70C temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: Fax:
nD S P C o r po r a t io n
NV 3 2 0 D a ta S he et
sion Frame rate up-conversion (50Hz up to 75Hz for PAL, 60Hz up to 90Hz for NTSC) DCTI (Digital Color Transient Improvement) Black Level Stretch Saturation Control
Converters (DACs) Built-in memory controller supporting SDRAM or SGRAM 0.35 CMOS process 3.3V power supply with 5V tolerant I/Os Standard 208-pin PQFP
Advanced, non-linear video processing Motion compensated deinterlacing Programmable peaking Non-linear interpolation Background coloring
nD S P C o r po r a t io n
NV 3 2 0 D a ta S he et
2.0 Ordering Information Part Number Package Description Version NV320 PQFP 208 Plastic quad flat package, 208 leads 1.0
Digital YUV/RGB nDSP Video Enhancement Processor 10-Bit DAC 10-Bit DAC 10-Bit DAC Y/G U/B V/R
LLC LLAD2 HS/CLP VS LLA CLV HREFO Host Interface Timing PCLK Controller Memory Controller SCL SDA Timing Generator HSQ HBQ VSQ VBQ
SDRAM/SGRAM Interface
VPC 323xD
1. Introduction
The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9. 50/60 Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products. The main features of the VPC 323xD are - High-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking. - Multi-standard color decoder PAL/NTSC/SECAM including all substandards. - Four CVBS, one S-VHS input, one CVBS output. - Two RGB/YCrCb component inputs, one Fast Blank (FB) input. - Integrated high-quality A/D converters and associated clamp and AGC circuits. - Multi-standard sync processing. - Linear horizontal scaling (0.25......4), as well as nonlinear horizontal scaling 'Panoramavision'. - PAL+ preprocessing. - Line-locked clock, data and sync, or 656-output interface. - Peaking, contrast, brightness, color saturation and tint for RGB/YCrCb and CVBS/S-VHS. - High-quality soft mixer controlled by Fast Blank. - PIP processing for four picture sizes (1/4, 1/9, 1/16, or 1/36 of normal size) with 8-bit resolution. - Control interface for external field memory. - I2C-bus interface. - One 20.25-MHz crystal, few external components. - 80-pin PQFP package.
August 2002
Low Power Operation: 280mA max. current consumption at 3.3V core operation Time staggered data output for reduced ground bounce and lower EMI Sync Detect feature for Plug & Display Cable Distance Support: over 5m with twistedpair, fiber-optics ready ESD tolerant to 5kV (HBM on all pins) Compliant with DVI 1.0 (DVI is backwards TM TM compatible with VESA P&D , FPDI-2 and DFP) HSYNC de-jitter circuitry enables stable operation even when HSYNC contains jitter Low power standby mode Automatic entry into standby mode with clock detect circuitry Standard and Pb-free packages (see page 25).
"
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$%"#
"
#4//.
#8+2.+6. $/ 4
"+21/ 83
Complete Stand-Alone Line 21 Decoder for ClosedCaptioned and Extended Data Services (XDS) Preprogrammed to Provide Full Compliance with EIA608 Specifications for Extended Data Services Automatic Extraction and Serial Output of Special XDS Packets (Time of Day, Local Time Zone, and Program Blocking) Programmable XDS Filter for a Specific XDS Packet Cost-Effective Solution for NTSC Violence Blocking inside Picture-in-Picture (PiP) Windows
Minimal Communications and Control Overhead Provide Simple Implementation of Violence Blocking, Closed Captioning, and Auto Clock Set Features Programmable, On-Screen Display (OSD) for Creating Full Screen OSD or Captions inside a Picture-inPicture (PiP) Window User-Programmable Horizontal Display Position for easy OSD Centering and Adjustment I2C Serial Data and Control Communication Supports 2 Selectable I2C Addresses
" #" $
Capable of processing Vertical Blanking Interval (VBI) data from both fields of the video frame in data, the Z86229 Line 21 Decoder offers a feature-rich solution for any television or set-top application. The robust nature of the Z86229 helps the device conform to the transmission format defined in the Television Decoder Circuits Act of 1990, and in accordance with the Electronics Industry Association specification 608 (EIA608). The Line 21 data stream can consist of data from several data channels multiplexed together. Field 1 consists of four data channels: two Captions and two Texts. Field 2 consists of five additional data channels: two Captions, two Texts, and Extended Data Services (XDS). The XDS data structure is defined in EIA608. The Z86229 can recover and display data transmitted on any of these nine data channels. The Z86229 can recover and output to a host processor via the I2C serial bus. The recovered XDS data packet is further defined in the EIA608 specification. The on-chip XDS filters in the Z86229 are fully programmable, enabling recovery of only those XDS data packets selected by the user. This functionality allows the device to extract the required XDS information with proper XDS filter setup for compatibility in a variety of TVs, VCRs, and Set-Top boxes. In addition, the Z86229 is ideally suited to monitor Line 21 video displayed in a PiP window for violence blocking, CCD, and other XDS data services. A block diagram of the Z86229 is illustrated in Figure 1.
#
TDA9850
FEATURES - Quasi alignment-free application due to automatic adjustment of channel separation via I2C-bus - Dbx noise reduction circuit - Dbx decoded stereo, Second Audio Program (SAP) or mono selectable at the AF outputs - Additional SAP output without dbx, including de-emphasis - High integration level with automatically tuned integrated filters - Input level adjustment I2C-bus controlled - Alignment-free SAP processing - Stereo pilot PLL circuit with ceramic resonator, automatic adjustment procedure for stereo channel separation, two pilot thresholds selectable via I2C-bus - Automatic pilot cancellation - Composite input noise detector with I2C-bus selectable thresholds for stereo and SAP off - I2C-bus transceiver.
NJW1144
AUDIO PROCESSOR
GENERAL DESCRIPTION The NJW1144 is a sound processor includes all of the functions required to process the audio signal for TV, such as tone control, balance, volume, mute, and AGC functions. Also the NJW1144 performs BBE sound enhancement and SRS 3D Stereo. The BBE regenerates high definitive and nearly real sound, and SRS 3D Stereo regenerates 3D surround sound with only two speakers. All of the internal stats and variables are controlled by I2C BUS interface. FEATURES - Operating Voltage - I2C BUS Interface
8 to 13V
- BBE Sound Enhancement (Low Boost and High Boost: 15dB max.) - Internal 6 Input Audio Selectors and Monitor Output - The AGC circuit reduces volume difference among input sources. - Variable AGC Compression Level via I2C (4-levels) - SRS 3D Stereo and Simulated Stereo - Variable Surround Effect Level via I2C - Low Noise VCA - Bi-CMOS Technology - Package Outline SOP40