w

Version: 0 Date: 2005/12/06

Product Functional Specification 14.1 inch WXGA Color TFT LCD Module Model Name: B141EW02 V.3

(u ) Preliminary Specification ( ) Final Specification

Note: This Specification is subject to change without notice.

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Contents
1.0 Handling Precautions ..........................................................................................................4 2.0 General Description ..............................................................................................................5
2.1 Display Characteristics.............................................................................................................................. 5 2.2 Functional Block Diagram ......................................................................................................................... 6

3.0 Absolute Maximum Ratings .................................................................................................7 4.0 Optical Characteristics .........................................................................................................8 5.0 Signal Interface ...................................................................................................................10
5.1 Connectors ............................................................................................................................................. 10 5.2 Signal Pin ............................................................................................................................................... 10 5.3 Signal Description ................................................................................................................................... 11 5.4 Signal Electrical Characteristics .............................................................................................................. 12 5.5 Signal for Lamp connector ...................................................................................................................... 12

6.0 Pixel Format Image .............................................................................................................13 7.0 Parameter guide line for CCFL Inverter.............................................................................13 8.0 Interface Timings.................................................................................................................14
8.1 Timing Characteristics............................................................................................................................. 14 8.2 Timing Definition ..................................................................................................................................... 15

9.0 Power Consumption ...........................................................................................................16 10. Power ON/OFF Sequence ...................................................................................................17 11.0 Reliability /Safety Requirement........................................................................................18
11.1 Reliability Test Conditions ..................................................................................................................... 18 11.2 Safety ................................................................................................................................................... 18

12.0 Shipping and Packing dimension....................................................................................19

12.1 Shipping Label Format .......................................................................................................................... 19 12.2 Carton packing...................................................................................................................................... 20 12.3 Shipping packing of palletizing sequence .............................................................................................. 21

13.0 Mechanical Characteristics ..............................................................................................23

13.1 LCM Outline dimension (Front View) ..................................................................................................... 23 13.2 LCM Outline Dimension (Rear View) ..................................................................................................... 24 13.3 Screw Hole Depth and Center Position.................................................................................................. 25

14.0 EDID Data...........................................................................................................................27

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II Record of Revision
Version and Date V.0 2005/12/6 Page All Old description First Release NA New Description Remark

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1.0 Handling Precautions

1) Do not press or scratch the surface harder than a HB pencil lead because the polarizers are very fragile and could be easily damaged. 2) Be sure to turn off power supply when inserting or disconnecting from input connector. 3) Wipe off water droplets or oil immediately. Long contact with the droplets may cause discoloration or spots. 4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) Protect the module from static electricity and insure proper grounding when handling. Static electricity may cause damage to the CMOS Gate Array IC. 7) Do not disassemble the module. 8) Do not press the reflector sheet at the back of the module. 9) Avoid damaging the TFT module. Do not press the center of the CCFL Reflector when it was taken out from the packing container. Instead, press at the edge of the CCFL Reflector softly. 10) Do not rotate or tilt the signal interface connector of the TFT module when you insert or remove other connector into the signal interface connector. 11) Do not twist or bend the TFT module when installation of the TFT module into an enclosure (Notebook PC Bezel, for example). It should be taken into consideration that no bending/twisting forces are applied to the TFT module from outside when designing the enclosure. Otherwise the TFT module may be damaged.

12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow local regulations for disposal.
13) The LCD module contains a small amount of material that has no flammability grade, so it should be supplied by power complied with requirements of limited power source (2.11, IEC60950 or UL1950).

14) The CCFL in the LCD module is supplied with Limited Current Circuit (2.4, IEC60950 or UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.

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2.0 General Description

This specification applies to the 14.1 inch Color TFT/LCD Module B141EW01 This module is designed for a display unit of notebook style personal computer. The screen format is intended to support the WXGA (1280(H) x 800(V)) screen and 262k colors (RGB 6-bits data driver). All input signals are LVDS interface compatible. This module does not contain an inverter card for backlight.

2.1 Displa y Characteristics

The following items are characteristics summary on the table under 25 ! condition: ITEMS Unit SPECIFICATIONS Screen Diagonal Active Area Pixels H x V Pixel Pitch Pixel Arrangement Display Mode Typical White Luminance (CCFL=6.0mA) Contrast Ratio Response Time Nominal Input Voltage VDD Typical Power Consumption (VDD line + VCFL line) Weight Physical Size Electrical Interface Support Color Surface treatment Temperature Range Operating Storage (Shipping) RoHS compliance [msec] [Volt] [Watt] [Grams] [mm] [cd/m ]
2

[mm] [mm] [mm]

357.7 (14.1") 303.36(H) x 189.6(V) 1280(x3) x 800 0.237 R.G.B. Vertical Stripe Normally White 200 Typ., 170 Min. (5 points average) 300:1 Min., 400:1 Typ. 25 Typ., 35 Max. +3.3 Typ. 5.0 Typ. 400 g Typ., 420 g Max. 320 Max(W) x 206 Max.(H) x 5.5(D) Max. R/G/B Data, 3 Sync, Signals, Clock (4 pairs LVDS) Native 262K colors (RGB 6-bit data driver) Haze 25%, Hard coating 3H, Glare type

[ C] [oC]

0 to +50 -20 to +60 RoHS compliance

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2.2 Functional Block Diagram

The following diagram shows the functional block of the 14.1 inches Color TFT/LCD Module:

X-Driver
(4 pairs LVDS) RxIN0 RxIN1 RxIN2 RxCLKIN LCD DRIVE CARD LCD Controller

TFT ARRAY/CELL 1280(R/G/B) x 3

DC-DC Converter Ref circuit

Y-Driver
VDD GND

Backlight Unit

Lamp Connector(2pin) JAE FI-XB30SL-HF10 JST BHSR-02VS-1 Mating Type SM02B-BHSS-1-TB

Mating Housing JAE FI-X30SL Mating ContactFI-XC3-1-15000

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3.0 Absolute Maximum Ratings

Absolute maximum ratings of the module is as following: Item Symbol Min Logic/LCD Drive Voltage Input Voltage of Signal CCFL Current CCFL Ignition Voltage Operating Temperature Operating Humidity Storage Temperature Storage Humidity Vibration Shock Note 1: Duration = 50msec Note 2: Maximum Wet-Bulb should be 39! and No condensation. VDD Vin ICFL Vs TOP HOP TST HST 0 5 -20 5 -0.3 -0.3 2.5 +4.0 VDD+0.3 7 1200 +50 95 +60 95 1.5,10-500/Random 240, 2 ,x/y/z axis Max Unit [Volt] [Volt] [mA] rms Vrms [ C] [%RH] [ C] [%RH] [G Hz] [G ms]
o o

Conditions

Note 1 Note 2 Note 2 Note 2 Note 2 30 min,x/y/z axis Half sine wave

Wet bulb temperature chart

Twb=39 C

Operating Range Storage Range

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4.0 Optical Characteristics

The optical characteristics are measured under stable conditions as follows under 25! condition : Item Unit Conditions Horizontal (Right) Viewing Angle (CR = 10) CR: Contrast Ratio Min. 40 40 15 30 300 [msec] Rising Falling Red x Red y Green x Color Chromaticity Coordinates (CIE) (Normal view angle) Green y Blue x Blue y White x White y White Luminance (CCFL 6.0mA) Cross talk 0.550 0.310 0.280 0.520 0.125 0.115 0.283 0.299 170 -400 15 10 0.580 0.340 0.310 0.550 0.155 0.145 0.313 0.329 200 --Typ. 45 45 20 35 Max. 1.2 1.5 20 15 0.610 0.370 0.340 0.580 0.185 0.175 0.343 0.359 1.4 Note

[degree s] Vertical

(Left) (Upper) (Lower)

Uniformity Contrast ratio (Center) Response Time

5 Points 13 Points

(1) (2)

[cd/m2] %

5 points average

(1) (3)

Note (1): 5 points position (Display area: 303.36 mm x 189.6 mm)

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W W/4 W/4 W/4 W/4

H/4

1
H/4 H H/4

4
H/4

Note (2): 13 points position

W W/4 10 10 H/4 W/4 W/4 W/4 10

1 4

2 5

H/4 H H/4

9
H/4 10

10 12 13

11

Note (3): Definition of Cross Talk (D CT)

DCT = | YB YA | / YA "100 (%) YA ,YB = (511,127) or (170,383) or (853,383) or (511,639) Where : YA = Luminance of measured location without darkest gray pattern (cd/m2) 2 YB = Luminance of measured location with darkest gray pattern (cd/m )
(0, 0) VIEW AREA YA (0, 0) VIEW AREA YB

Gray Level 0 Gray Level 63 (1023, 767) Gray Level 63 (1023, 767)

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5.0 Signal Interface

5.1 Connectors
Physical interface is described as for the connector on module. These connectors are capable of accommodating the following signals and will be following components. Connector Name / Designation For Signal Connector Manufacturer Type / Part Number Mating Housing/Part Number Mating Contact/Part Number Connector Name / Designation Manufacturer Type / Part Number Mating Type / Part Number JAE FI-XB30SL-HF10 FI-X30H FI-XC3-1-15000 For Lamp Connector JST BHSR-02VS-1 SM02B-BHSS-1-TB

5.2 Signal Pin

Pin# 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 Signal Name GND VDD Aging DATAEDID RxIN0+ RxIN1GND RxIN2+ RxCLKINGND NC NC GND NC NC Pin# 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Signal Name VDD VEDID CLKEDID RxIN0GND RxIN1+ RxIN2GND RxCLKIN+ NC GND NC NC GND NC

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The module uses a LVDS receiver embedded in AUOs ASIC. LVDS is a differential signal technology for LCD interface and high-speed data transfer device. Signal Name VEDID CLKEDID DATAEDID RxIN0-, RxIN0+ RxIN1-, RxIN1+ RxIN2-, RxIN2+ RxCLKIN-, RxCLKIN0+ VDD GND +3.3V EDID Power EDID Clock Input EDID Data Input LVDS differential data input(Red0-Red5, Green0) LVDS differential data input(Green1-Green5, Blue0-Blue1) LVDS differential data input(Blue2-Blue5, Hsync, Vsync, DSPTMG) LVDS differential clock input +3.3V Power Supply (Internal 2.5V logic operation) Ground Description

5.3 Signal Description

Note: Input signals shall be in low status when VDD is off. Internal circuit of LVDS inputs are as following. Signal Name +RED5 +RED4 +RED3 +RED2 +RED1 +RED0 +GREEN 5 +GREEN 4 +GREEN 3 +GREEN 2 +GREEN 1 +GREEN 0 +BLUE 5 +BLUE 4 +BLUE 3 +BLUE 2 +BLUE 1 +BLUE 0 -DTCLK Description Red Data 5 (MSB) Red Data 4 Red Data 3 Red Data 2 Red Data 1 Red Data 0 (LSB) (Red-pixel Data) Green Data 5 (MSB) Green Data 4 Green Data 3 Green Data 2 Green Data 1 Green Data 0 (LSB) (Green-pixel Data) Blue Data 5 (MSB) Blue Data 4 Blue Data 3 Blue Data 2 Blue Data 1 Blue Data 0 (LSB) (Blue-pixel Data) Data Clock Red-pixel Data Each red pixel's brightness data consists of these 6 bits pixel data.

Green-pixel Data Each green pixel's brightness data consists of these 6 bits pixel data.

Blue-pixel Data Each blue pixel's brightness data consists of these 6 bits pixel data.

DSPTMG

Display Timing

The typical frequency is 71.1 MHz. The signal is used to strobe the pixel data and DSPTMG signals. All pixel data shall be valid at the falling edge when the DSPTMG signal is high. This signal is stored at the falling edge of -DTCLK. When the signal is high, the pixel data shall be valid to be displayed.

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VSYNC HSYNC

Vertical Sync Horizontal Sync

The signal is synchronized to -DTCLK . The signal is synchronized to -DTCLK .

Note: Output signals from any system shall be low or Hi-Z state when VDD is off.

5.4 Signal Electrical Characteristics

Input signals shall be in low status when VDD is off. It is recommended to refer the specifications of SN75LVDS86DGG (Texas Instruments) in detail.
Signal electrical characteristics are as follows; Parameter VTH VTL VCM Condition Differential Input High Voltage(Vcm=+1.2V) Differential Input Low Voltage(Vcm=+1.2V) LVDS input common mode voltage Min Max 100 Unit [mV] [mV] [V]

!
-100 1.125

!
1.375

5.5 Signal for Lamp connector

Pin # 1 2 Signal Name Lamp High Voltage Lamp Low Voltage

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6.0 Pixel Format Image

Following figure shows the relationship of the input signals and LCD pixel format.

0 1st Line

1278 1279 R GB R GB

R GB R GB

800th Line

R GB R GB

R GB R GB

7.0 Parameter guide line for CCFL Inverter

Parameter White Luminance 5 points average CCFL current (ICFL) CCFL Frequency (FCFL) CCFL Ignition Voltage (Vs) CCFL Voltage (Reference) (VCFL) CCFL Power consumption (PCFL) Min DP-1 Max Units [cd/m2 ] [mA] rms [KHz] [Volt] rms [Volt] rms [Watt] Condition

170 2.5 50

200 6.0 60 1000 660 4.2

! 7.0 65 1200 ! !

(Ta=25!)
(Ta=25!) (Note 2) (Ta=25!) (Note 3) (Ta= 25!) (Note 4) (Ta=25!) (Note 5) (Ta=25!) (Note 5)

! ! !

Note 1: DP-1 are AUO recommended Design Points. *1 All of characteristics listed are measured under the condition using the AUO Test inverter.
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*2 In case of using an inverter other than listed, it is recommended to check the inverter carefully. Sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen. *3 In designing an inverter, it is suggested to check safety circuit ver carefully. Impedance of CCFL, for instance, becomes more than 1 [M ohm] when CCFL is damaged. *4 Generally, CCFL has some amount of delay time after applying start-up voltage. It is recommended to keep on applying start-up voltage for 1 [Sec] until discharge. *5 The CCFL inverter operating frequency must be carefully chosen so that no interfering noise stripes on the screen were induced. *6 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL discharge frequency. So all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high-voltage output of the inverter. Note 2: It should be employed the inverter, which has Duty Dimming, if ICCFL is less than 4mA. Note 3: The CCFL inverter operating frequency should be carefully determined to avoid interference between inverter and TFT LCD. o Note 4: The inverter open voltage should be designed larger than the lamp starting voltage at T=0 C, otherwise backlight may be blinking for a moment after turning on or not be able to turn on. The open voltage should be measured after ballast capacitor. If an inverter has shutdown function it should keep its open voltage. for longer than 1 second even if lamp connector is open.
Note 5: Calculator value for reference (ICFL!VCFL=PCFL)

8.0 Interface Timings

Basically, interface timings should match 1280x800 /60Hz manufacturing guideline timing.

8.1 Timing Characteristics

Symbol DOTCLK Description DOTCLK Frequency Min Typ 71.1 14 1440 1280 160 823 800 60 Max Unit

1303 1280 23 803 800 !

2047 1280 767 1023 800 !

[MHz]
[nsec] [tck] [tck] [tck] [tx] [tx] [Hz]

TCLOCK
TH THD THB TV TVD Vsync

DOTCLK cycle time

X total time X active time X blank time Y total time Y active time Frame rate

Note: DE mode

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8.2 Timing Definition

TCLOCK

Input Timing Definition ( DE Mode)

DOTCLK

Input Data

Invaild Data

Pixel 1

Pixel 2

Pixel 3

Pixel N-1

Pixel N

Invaild Data

Pixel 1

DE THB TH THD

DE TVB TVD TV

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9.0 Power Consumption

Input power specifications are as follows; Symbol Module VDD PDD IDD VDDrp Logic/LCD Voltage VDD Power IDD Current Allowable Logic/LCD Drive Ripple Voltage Allowable Logic/LCD Drive Ripple Noise Drive 3.0 3.3 0.8 (TBD) 3.6 [Volt] [Watt] [mA] [mV] p-p [mV] p-p Load Capacitance 20uF Max: All black pattern Max: All black pattern Parameter Min Typ Max Units Condition

! ! ! !

! !
100

! !

VDDns Lamp ICFL VCFL PCFL Total Power Consumption Note: VDD=3.3V

100

CCFL current CCFL Voltage (Reference) CCFL Power consumption

2.5

6.0 660 4.2 5.0

7.0 ! ! !

[mA] rms [Volt] rms [Watt] [Watt]

(Ta=25!) (Ta=25!) (Ta=25!)

(Without inverter)

! ! !

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10. Power ON/OFF Sequence

VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off.

Sequence of Power-on/off and signal-on/off

T1 Power Supply VDD

0.1VDD

0.9VDD

0.9VDD

T7 T2 VALID DATA T5 T6 T3

0.1VDD

T4

LVDS Interface

Backlight On

Value Parameter T1 T2 T3 T4 T5 T6 T7 Min. 0.5 0 0 400 200 200 0 Typ. Max. 10 50 50 10 Units [ms] [ms] [ms] [ms] [ms] [ms] [ms]

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11.0 Reliability /Safety Requirement

11.1 Reliability Test Conditions
Items
Temperature Humidity Bias High Temperature Operation Low Temperature Operation Continuous Life On/Off Test Hot Storage Cold Storage Thermal Shock Test Hot Start Test Cold Start Test Shock Test (Non-Operating) Vibration Test (Non-Operating) 40!/90%,300Hr 50!/20%,300Hr 0!,300Hr 25! ,300 hours 25!,ON/10 sec. OFF/10sec., 30,000 cycles 60!/20% RH ,300 hours -20!/50% RH ,300 hours -20!/30 min ,60!/30 min, 100cycles 50!/1 Hr min. Power on/off per 5 minutes, 5 times 0!/1 Hr min. Power on/off per 5 minutes, 5 times 240G, 2ms, Half sine wave Sinusoidal vibration, 1.5G zero-to-peak, 10 to 500 Hz, 0.5 octave/minute in each of three mutually perpendicular axes. Contact : 8KV, operation, class B Air : 15KV, operation, class B 0~14000 ft / operation / Ramp 2000ft/min. 0~40000 ft /non-operation/Ramp 2000ft/min. 2.5 kgf.cm .

Required Condition

ESD Altitude Test Maximum Side Mount Torque

Note1: CCFL Life: 15,000 hours minimum Note2: MTBF(Excluding the CCFL) : 30,000 hours with a confidence level 90% Note3: According to EN61000-4-2, ESD class B: Some performance degradation allowed. No data lost. Self-recoverable. No hardware failures.

11.2 Safety
UL1950

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12.0 Shipping and Packing dimension

12.1 Shipping Label Format Model name
83mm

Week code
06/01
0AXXXG

Manufacturing area

B141EW02 V3

23mm

*XXXXXXXXXXXX-XXXXX

0A

Control code Note1

Hardware: Note1
Note 1:

Firmware

IC Combination

Control Code

H/W

Source IC: NEC Gate IC: MEC Source IC: NT Gate IC: NT

0AXXG 1AXXG

0A 1A

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12.2 Carton packing

The outside dimension of carton is 454(L)mm* 388(W)mm* 352(H)mm, carton and cushion weight are 2920g.

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12.3 Shipping packing of palletizing sequence

By air : 6 *4 layers, one pallet put 24 boxes, total 480 pcs module. By sea : 6 *5 layers, one pallet put 30 boxes, total 600 pcs module.

Corner angle Stretch film

Moisture-proof film

Label

PET band

Corner angle

Pallet

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13.0 Mechanical Characteristics

13.1 LCM Outline dimension (Front View)

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13.2 LCM Outline Dimension (Rear View)

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13.3 Screw Hole Depth and Center Position

Screw hole minimum depth, from side surface =2.5 mm (See drawing) Screw hole center location, from front surface = 3.1 0.1mm (See drawing) Suggestions: Customers Screw maximum length = 2.3 mm (See drawing) Screw Torque: Maximum2.5 kgf-cm

2.5 Min

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14.0 EDID Data

FUNCTION HEX Header Value HEX Value BIN 00000000 11111111 11111111 11111111 11111111 11111111 11111111 00000000 00000110 10101111 01000100 00100001 00000000 00000000 00000000 00000000 00000001 00001111 00000001 00000011 10000000 00011110 00010011 01111000 00001010 10000111 11000101 10010100 01010111 01001111 10001100 00100111 00100101 01010000 Value DEC 0 255 255 255 255 255 255 0 6 175 68 33 0 0 0 0 1 15 1 3 128 30 19 120 10 135 197 148 87 79 140 39 37 80

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 (C) Copyright

00 FF FF FF FF FF FF 00

EISA Manuf. Code LSB Compressed ASCII Product Code hex, LSB first 32-bit ser #

06 AF 44 21 00 00 00 00

Week of manufacture Year of manufacture EDID Structure Ver. EDID revision # Video input definition Max H image size Max V image size Display Gamma Feature support Red/green low bits Blue/white low bits Red x/ high bits Red y Green x Green y Blue x Blue y White x AU Optronics

01 0F 01 03 80 1E 13 78 0A 87 C5 94 57 4F 8C 27 25 50

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22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39

White y Established timing 1 Established timing 2 Manufacturer's Timing Standard timing #1 Standard timing #2 Standard timing #3 Standard timing #4 Standard timing #5 Standard timing #6 Standard timing #7 Standard timing #8 Pixel Clock/10,000 (LSB) Pixel Clock/10,000 (MSB) Horiz. Active pixels(Lower 8 bits) Horiz.Blanking (Lower 8 bits) Horiz. Active pixels:Horiz. Blanking (Upper4:4 bits)

54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 C7 1B 00 A0 50 20 17

01010100 00000000 00000000 00000000 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 11000111 00011011 00000000 10100000 01010000 00100000 00010111 00110000 00110000 00100000 00110110

84 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 199 27 0 160 80 32 23 48 48 32 54

3A 3B 3C

3D 3E 3F 40

Vert. Active pixels:Vert. Blanking (Upper4:4 bits)

30 30 20

Vert. Sync. Offset=xx lines, Sync Width=xx lines Horz. Ver. Sync/Width (upper 2 bits) Hori. Image size (Lower 8 bits) AU Optronics

36

41 42

00 30

00000000 00110000

0 48

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43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 (C) Copyright

Vert. Image size (Lower 8 bits) Hori. Image size : Vert. Image size (Upper 4 bits)

BE 10 00 00 18

10111110 00010000 00000000 00000000 00011000 00000000 00000000 00000000 00001111 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00100000 00000000 00000000 00000000 11111110 00000000 01000001 01010101 01001111 00001010 00100000 00100000 00100000 00100000 00100000

190 16 0 0 24 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 32 0 0 0 254 0 65 85 79 10 32 32 32 32 32

Detailed timing/monitor descriptor #2

00 00 00 0F 00 00 00 00 00 00 00 00 00 00 00 00 00 20

Flag Flag Flag

00 00 00 FE 00

Manufacture Manufacture Manufacture

41 55 4F 0A 20 20 20 20 20

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68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Extension Flag Checksum Flag Flag Flag Data type tag:ASCII string Flag Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N Manufacture P/N

20 20 20 20 00 00 00 FE 00 42 31 34 31 45 57 30 32 20 56 31 20 0A 00 DD

00100000 00100000 00100000 00100000 00000000 00000000 00000000 11111110 00000000 01000010 00110001 00110100 00110001 01000101 01010111 00110000 00110010 00100000 01010110 00110001 00100000 00001010 00000000 11011101

32 32 32 32 0 0 0 254 0 66 49 52 49 69 87 48 50 32 86 49 32 10 0 221

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