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MANUAL

Analog System Lab Kit PRO

Table of contents

Introduction
Analog System Lab Organization of the Analog System Lab Course Lab Setup System Lab Kit ASLK PRO - An overview Hardware Software

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10 11 12 13 13 13 14 16

2.2

2.1.1 2.1.2 2.1.3

Inverting Regenerative Comparator Astable Multivibrator Monostable Multivibrator (Timer)

24 24 25 26

Exercise Set 2

Experiment 3:
Study the characteristics of integrators and differentiator circuits 3.1 3.2 3.3 3.4 Brief theory and motivation 3.1.1 3.1.2 Integrators Differentiators

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28 28 28 28 28 29 30

Getting to know ASLK PRO Organization of the Manual

Experiment 1:
Study the characteristics of negative feedback amplifiers and design of an instrumentation amplifier 1.1 1.2 1.3 1.4 1.5 Brief theory and motivation 1.1.1 1.1.2 1.1.3 Unity Gain Amplifier Non-inverting Amplifier Inverting Amplifier

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Specifications Measurements to be taken What should you submit of Integrator and Differentiator

18 18 19 19 20 20 21 21

3.5  Exercise Set 3 - Grounded Capacitor Topologies

Exercise Set 1 Measurements to be taken What should you submit Other related ICs

Experiment 4:
Design of Analog Filters 4.1 4.2 4.3 4.4 4.5 Brief theory and motivation Specification Measurements to be taken What should you submit Exercise Set 4

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32 33 33 33 34

Experiment 2:
Study the characteristics of regenerative feedback system with extension to design an astable and monostable multivibrator 2.1 Brief theory and motivation

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Analog System Lab Kit PRO

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Table of contents
Experiment 5:
Design of a self-tuned filter 5.1 5.2 5.3 5.4 Brief theory and motivation 5.1.1 Multiplier as a Phase Detector Specification Measurements to be taken 5.3.1 5.4.1 Transient response Exercise Set 5 What should you submit 36 36 37 37 37 37 38

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Experiment 8:
Automatic Gain Control (AGC) Automatic Volume Control (AVC) 8.1 8.2 8.3 8.4 8.5 Brief theory and motivation Specifications Measurements to be taken What should you submit Exercise Set 8

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48 48 48 48 49

Experiment 9: 39
40 40 40 41 41 DC-DC Converter 9.1 9.2 9.3 9.4 9.5 Brief theory and motivation Specification Measurements to be taken 9.3.1 9.3.2 Time response Transfer function

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52 52 52 52 52 53 53

Experiment 6:
Design a function generator and convert it to Voltage-Controlled Oscillator/FM Generator 6.1 6.2 6.3 6.4 6.5 Brief theory and motivation Specifications Measurements to be taken What should you submit Exercise Set 6

What should you submit Exercise Set 9

Experiment 7:
Design of a Phase Lock Loop (PLL) 7.1 7.2 7.3 7.4 7.5 Brief theory and motivation Specifications Measurements to be taken What should you submit Exercise Set 7

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44 44 45 45 45

Experiment 10:
Design a Low Dropout (LDO) regulator 10.1 10.2 10.3 10.4 10.5 Brief theory and motivation Specifications Measurements to be taken What should you submit Exercise Set 10

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56 56 56 57 57

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Analog System Lab Kit PRO

Table of contents
Experiment 11:
To study the parameters of an LDO integrated circuit 11.1 11.2 11.3 11.4 Brief theory and motivation Specifications Measurements to be taken What should you submit 60 60 60 61

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14.2 14.3 14.4 14.5

Specifications Measurements to be taken What should you submit Exercise Set 14

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A ICs used in ASLK PRO


A.1 TL082: JFET-Input Operational Amplifier A.1.1 A.1.2 A.1.3 A.1.4 A.2.1 A.2.2 A.2.3 A.2.4 A.3.1 A.3.2 A.3.3 A.3.4 Features Applications Description Download Datasheet Features Applications Description Download Datasheet Features Applications Description Download Datasheet

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76 76 76 76 76 77 77 77 77 77 78 78 78 78 78 79 79 79 79 79

Experiment 12:
To study the parameters of a DC-DC Converter using on-board Evaluation module 12.1 12.2 12.3 12.4 Brief theory and motivation Specifications Measurements to be taken What should you submit

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64 65 65 65

A.2 A.3

MPY634: Wide Bandwidth Analog Precision Multiplier

Experiment 13:
Design of a Digitally Controlled Gain Stage Amplifier 13.1 13.2 13.3 13.4 13.5 Brief theory and motivation Specifications Measurements to be taken What should you submit Exercise Set 13

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68 68 68 68 69

DAC 7821: 12 Bit, Parallel, Multiplying DAC

A.4  TPS40200: Wide-Input, Non-Synchronous Buck DC/DC Controller A.4.1 A.4.2 A.4.3 A.4.4 Features Applications Description Download Datasheet

Experiment 14:
Design of a Digitally Programmable Square and Triangular wave generator/oscillator 14.1 Brief theory and motivation

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Analog System Lab Kit PRO

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Table of contents
A.5  TLV7250: Micropower Low-Dropout Voltage Regulator 80 A.6 A.7 A.5.1 A.5.2 A.5.3 A.5.4 A.6.1 A.6.3 A.6.5 A.7.1 A.7.2 Features Applications Description Download Datasheet 80 80 80 80 81

List of figures
Signal Chain in an Electronic System Analog System Lab Kit PRO Picture of ASLK PRO characteristic 1.2 1.3 1.4 1.5 1.6 1.7 A Unity Gain System Time Response of an Amplifier for  a step input of size Vp (a) Non-inverting amplifier of gain 2,  (b) Inverting amplifier of gain 2 Negative Feedback Amplifiers 19 19 19 10 13 15 18 18

1.1  An ideal Dual-Input, Single-Output OP-Amp and its I-O

Transistors: 2N3906, 2N3904, BS250

2N3906 Features, A.6.2 Download Datasheet 81 2N3904 Features, A.6.4 Download Datasheet 81 BS250 Features, A.6.6 Download Datasheet Features Download Datasheet 81 82 82 82

Magnitude and Phase response of a Unity Gain System 19

Diode: 1N4448 Small Signal Diode

Frequency Response of Negative Feedback Amplifiers 20 Amplifiers of Figure 2.6 for Square-wave Input VG1 20 20 24 24 24 25 25 25 28 28 29 30

B Introduction to Macromodels
B.1 B.2 Micromodels Macromodels

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84 84

1.8  Outputs VF1 , VF2 and VF3 of Negative Feedback 1.9 Instrumentation Amplifiers with (a) three and (b) two  operational amplifiers 2.1  Inverting Schmitt-Trigger and its Hysteresis Characteristic

C  Activity - Convert your PC/laptop into an Oscilloscope


C.1 C.2 Introduction Limitations

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88 88

2.2

Symbol for an Inverting Schmitt Trigger and its Hysteresis Curve

2.3  Non-inverting Schmitt Trigger 2.4 2.5 2.6 3.1 3.2 3.3 3.4 Astable Multivibrator and its characteristics Trigger waveform Monostable Multivibrator and its outputs Integrator Differentiator Frequency Response of integrator and differentiator Outputs of integrator and differentiator for  square-wave and triangular-wave inputs

D  Analog System Lab Kit PRO Connection Diagrams Bibliography


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Analog System Lab Kit PRO

List of figures
3.5 4.1 Circuits for Exercise 3 A Second-order Universal Active Filter LPF, BPF, BSF, and HPF filters 5.1 Analog Multiplier Filter or Voltage Controlled Phase Generator 5.3  Output of the Self-Tuned Filter based on simulation 6.1 6.2 6.3 7.1 Function Generator Function Generator Output Voltage-Controlled Oscillator (VCO) Phase Locked Loop (PLL) and its characterisitics the Phase Locked Loop (PLL) Experiment 7.3 Block Diagram of Frequency Optimizer Automatic Volume Control (AVC) 8.2 8.3 9.1 9.2 10.1 Input-Output Characteristics of AGC/AVC AGC circuit and its output DC-DC Converter and PWM waveform (a) SMPS Circuit (b) Ouptut Waveforms Low Dropout Regulator (LDO) regulation and load regulation 11.1 Schematic diagram of on-board evaluation module 11.2(a) Line regulation 11.2(b) Load regulation 12.1 Schematic of the on-board EVM 8.1  Automatic Gain Control (AGC)/ 48 48 49 52 53 56 56 60 61 61 64 D.5 D.1 D.2 37 40 40 41 44 44 45 5.2  A Self-Tuned Filter based on a Voltage Controlled 36 14.1 14.2 14.3 A.1 A.2 A.3 A.4 A.6 A.7 A.8 A.9 C.1 30 32 13.1 32 36 13.2 12.2  Simulation waveforms - TP3 is the PWM waveform and TP4 is the switching waveform Circuit for Digital Controlled Gain Stage Amplifier Equivalent Circuit for simulation the input pattern for the DAC  was selected to be 0x800 Circuit for Digital Controlled Oscillator Circuit for Simulation Simulation Results TL082 - JFET-Input Operational Amplifier MPY634 - Analog Multiplier DAC 7821 - Digital to Analog Converter TPS40200 - DC/DC Controller 2N3906 PNP General Purpose Amplifier 2N3906 NPN General Purpose Amplifier BS250 P-Channel Enh. Mode Vertical DMOS FET 1N4448 Small Signal Diode Buffer circuit needed to interface an Analog Signal to  Oscilloscope OP-Amp 1A connected in Inverting Configuration OP-Amp 1B connected in inverting configuration and non-inverting configuration D.4  OP-Amp 2B can be used in both inverting and non-inverting configuration OP-Amp 3A can be used in unity gain configuration  or any other custom configuration 92 91 88 90 90 91 72 73 73 76 77 78 79 81 81 81 82 65 68 69 69

4.2  Magnitude and Phase Response of

13.3  Simulation output of digitally controlled Oscillator when

7.2  Sample output waveform for

A.5  TPS7250 -Micropower Low-Dropout Voltage Regulator 80

10.2  A regulator circuit and its simulated outputs - line

D.3  OP-Amp 2A can be used in both inverting 

Analog System Lab Kit PRO

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introduction

List of figures
D.6 D.7 D.8 D.9 OP-Amp 3B can be used in unity gain configuration  or any other custom configuration Connections for analog multiplier MPY634 - SET I Connections for analog multiplier MPY634 - SET II Connections for analog multiplier MPY634 - SET III 92 92 93 93 94 95 96 97 97 98 98 98 4.1 4.2 4.3 5.1 3.1 3.2

= 2 V s 2 s 0i $ a- H k V i s s 12+ b V 02 2l +0 ~ s+ ~ b1 + ~0 Q ~ l ~0 Q 0 = 2 b1 + 0 2 l $ H0 Vi s s ~ 2 0 V 204 + b1 + ~0s 2l = 1 + ss2 l $ H0s 2 Q ~0 b V b1 + V 2i l $ H0 ~0 04 1 ~ 2 0 b V04 2l s =$ H 2 + ~0 Q + ~ = b1 + V i 2l 0 s s2 0 V i s s + l V04 b1 + ~0 + b12+ 2 l ~ 10 Q ~0 ~0 2 1 ~0 ~ -2 Vi = sQ s0 Q2 + b1 +1 2l 1 0Q 1~ 0 ~ 0 ~0 1 - ~ H 0 Q 2Q 2 2 2Q 1 ~0 H1 H Q 12 1 00 Q 2Q 2 4 1Q 1 0 Q1 1H z- 4Q 2 d 2 4Q 1 - 1 2 dd z~ dz 4Q ~ = ~0 d~ ~ d dz ~~0 29 Plot of Magnitude and Phase w.r.t. ~ Input Frequency = 2Q 0 =~ d~ ~ 0 - 2Q ~ 0 = Plot of Magnitude and Phase w.r.t. Input Frequency 29 2 Q~
w.r.t. Peak value of Input 29 H 0Q ~ 0 = 1 kHz Transfer Functions of Active Filters 32 0 = H00 Q 1kHz =1 ~ = 1 kHz ~Q 1 10 kHz = 33 Frequency Response of a BPF with Q ~0= =11 kHz , Q~ 0 = kHz 10 ~ 0 = Q0 = Frequency Response of a BSF with ~ 10 kHz , Q = 10  33 =1
~~ 0 0 ~ 0Q H0 ~ ~0 0 ~H 0 0Q

~ 20Q 3.3  Variation of Peak to Peak value of output

D.10  Connections for A/D converter DAC7821 - DAC I D.11  Connections for A/D converter DAC7821 - DAC II D.12  Connections for TPS40200 Evaluation step-down DC/DC converter D.14 D.15 D.16 D.17 D.18 D.19 MOSFET socket Bipolar Junction Transistor socket Diode sockets Trimmer-potentiometers Main power supply

D.13  Connections for TP7250 low-dropout linear voltage reg.97

General purpose area (2.54mm / 100mills pad spacing) 98

kHz Q f= 10 ~ 1 kHz 0= =10 =10 Variation of output amplitude with Q input frequency 37 f kHz 1 = Q 10 f kHz = = 10 f= 1 kHz Voltage 6.1 Change in frequency as a function of Control 41 f =410 kHz 1 kHz $ Vp f kHz 10 = 7.1 Output Phase as a function of Input Frequency r $ H $ Q 45 0 f= 4 $ 10 Vp kHz 4 $ Vp V 7.2 Control Voltage as a function of Input Frequency pH0 $ Q 45 $ r $H r4 V$p Q $0 Vp ~0 = 2 $ r $ 10 4 rad/s V p $ H0 $ Q 8.1 Transfer characteristic of the AGC circuit 48 r 2 $ r $ 10 4 rad/s ~4 0 rad = Vp0 = 2 $ r H 10 0 = /s ~ $ 10 9.1  Variation of output voltage with reference voltage 4 H 0 rad = s sin _100rt i + 0.1 sin 2 $ r $ 10 /= ~ 0 = 10 H0 _ t i10 y in a DC-DC converter 53 H 10 _ i t ti + sin y r _100 0 = = _ i 200 t t t i sin _ sin 100 0.1 sin _ y r r0.1 _ i = + 9.2  Variation of duty cycle with reference voltage y _ t i = sin _100rt i + 0.1 sin _200rt i in a DC-DC converter 53
10.1  Variation of Load Regulation with Load Current in an LDO 56 57 61 61 66 66 66 68 72

List of tables
1.1  Plot of Peak to Peak amplitude of output Vpp w.r.t. Input Frequency 1.2  Plot of Magnitude and Phase variation w.r.t. Input Frequency 1.3  Plot of DC output voltage and phase variation w.r.t. DC input voltage 2.1 Plot of Hysteresis w.r.t. Regenerative Feedback 21 25 21 21

10.2  Variation of Line Regulation with Input Voltage in an LDO 11.1 11.2 Line regulation Load regulation with input voltage 12.2 12.3 13.1 14.1 B.1 Line regulation Load regulation Variation in output amplitude with bit pattern Varying the bit pattern input to the DAC

12.1  Variation of the duty cycle of PWM waveform

Operational Amplifiers available from Texas Instruments85

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Analog System Lab Kit PRO

Introduction
What you need to know before you get started

Analog System Lab Kit PRO

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introduction

Analog System Lab


Although digital signal processing is the most common form of processing signals, analog signal processing cannot be completely avoided since the real world is analog in nature. Consider a typical signal chain (Figure below).

Typical signal chain


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A sensor converts the real-world signal into an analog electrical signal. This analog signal is often weak and noisy. Amplifiers are needed to strengthen the signal. Analog filtering may be  necessary to remove noise from the signal. This front end processing improves the signal-to-noise ratio. Three of the most important building blocks used in this stage are (a) Operational Amplifiers, (b) Analog multipliers and (c) Analog Comparators.  n analog-to-digital converter transforms the analog signal into a A stream of 0s and 1s.  he digital data is processed by a CPU, such as a DSP, a microprocessor, T or a microcontroller. The choice of the processor depends on how intensive the computation is. A DSP may be necessary when realtime signal processing is needed and the computations are complex. Microprocessors and microcontrollers may suffice in other applications.  igital-to-analog conversion (DAC) is necessary to convert the stream of D 0s and 1s back into analog form.  he output of the DAC has to be amplified before the analog signal can T drive an external actuator.

3 4

5
Figure: Signal Chain in an Electronic System

It is evident that analog circuits play a crucial role in the implementation of an electronic system. The goal of the Analog System Lab Course is to provide students an exposure to the fascinating world of analog and mixed-signal signal processing. The course can be adapted page 10

for an undergraduate or a postgraduate curriculum. As part of the lab course, the student will build analog systems using analog ICs and study their macro models, characteristics and limitations. Our philosophy in designing this lab course has been to focus on system design rather than circuit design. We feel that many Analog Design classes

in the colleges focus on the circuit design aspect, ignoring the issues encountered in system design. In the real world, a system designer uses the analog ICs as building blocks. The focus of the system designer are to optimize system-level cost, power, and performance. IC manufacturers such as Texas Instruments offer a large number

of choices of integrated circuits keeping in mind the diverse requirements of system designers. As a student, you must be aware of these diverse offerings of semiconductors and select the right IC for the right application. We have tried to emphasize this aspect in designing the experiments in this manual.

Analog System Lab Kit PRO

In designing the lab course, we have assumed that there are about 12 during a semester. We have designed 14 experiments which can be carried out either individually or by groups of two students. The experiments in Analog System Lab can be categorized as follows.

Part I - Learning the basics


In the first part, the student will be exposed to the operation of the basic building blocks of analog systems. Most of the experiments in the Analog System Lab Course are centered around the following two components.  The OP-amp TL082, a general purpose JFETinput operational amplifier, made by Texas Instruments.  Wide-bandwidth, precision analog multiplier MPY634 from Texas Instruments. Using these components, the student will build gain stages, buffers, instrumentation amplifiers and voltage regulators. These experiments bring out several important issues, such as measurement of gain- bandwidth product, slew-rate, and saturation limits of the operational amplifiers.

Part II - Building analog systems


Part-II concentrates on building analog systems using the blocks mentioned above. First, we introduce integrators and differentiators which are essential for implementing filters that can bandlimit a signal prior to the sampling process to avoid aliasing errors. We then introduce the analog comparator, which is a mixed-mode device - its input is analog and output is digital. In a comparator, the rise time, fall time, and delay time are important apart from input offset. A function generator is also a mixed-mode system that uses an integrator and a regenerative comparator as building blocks. The function generator is capable of producing a triangular waveform and square waveform as outputs. It is also useful in Pulse Width Modulation in DC-to-DC converters, switched-mode power supplies, and Class-D power amplifiers. The analog multiplier, which is a voltage or current controlled amplifier, finds applications in communication circuits in the form of mixer, modulator, demodulator and phase detector. We use the multiplier in building Voltage Controlled Oscillators, Frequency Modulated waveform generators, or Frequency Shift Key waveform generators in modems, Automatic Gain Controllers, Amplitude Stabilized Oscillators, Self-tuned Filters and Frequency Locked Loop using voltage controlled phase generators and VCOs and multiplier as phase detector are built and their lock range and capture range. In the Analog System Lab, the frequency range of all applications has been restricted to 1-10 kHz, with the following in mind - (a) The macromodels for the ideal device can be used in simulation, (b) A PC can be used in place of an oscilloscope. We have also included an experiment that can help the student use a PC as an oscilloscope. We also suggest an experiment on the development of macromodels for an OP-Amp.

What is our goal?

At the end of Analog System Lab, we believe you will have the following knowhow about analog system design. 1.  You will learn about the characteristics and specification of analog ICs used in electronic systems.

2.  You will learn how to develop a macromodel for an IC based on its terminal characteristics, I/O characteristics, DC-transfer characteristics, frequency response, stability characteristic and sensitivity characteristic. 3. You will be able to make the right choice for an IC for a given application. 4. You will be able to perform basic fault diagnosis of an electronic system.

Analog System Lab Kit PRO

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introduction

Organization of the Course

introduction

Lab Setup
The setup for the Analog System Lab is very simple and requires the following. In all the experiments of Analog System Lab, please note the following.

ASLK PRO and the associated Lab Manual from Texas Instruments India - the lab kit comes with required connectors. Refer to Chapter 1.4 for an overview of the kit. Oscilloscope. We provide an experiment that helps you build a circuit to directly interface analog outputs to an oscilloscope (See Chapter C). Dual power supply with the operating voltages of 10V. Function generators which can operate in the range on 1 to 10 MHz and capable of generating sine, square and triangular waves. A computer with installed circuit simulation software.

When we do not explicitly mention the magnitude and frequency of the input waveform, please use 0 to 1V as the amplitude of the input and 1 kHz as the frequency. Always use sinusoidal input when you plot the frequency response and use square wave input when you plot the transient response. Precaution! Please note that TL082 is a dual OP-Amp. This means that the IC has two OP-Amp circuits. If your experiment requires only one of the two ICs, do not leave the inputs and output of the other OP- Amp open; instead, place the second OP-Amp in unity-gain mode and ground the inputs. Advisory to Students and Instructors. We strongly advise that the student performs the simulation experiments outside the lab hours. The student must bring a copy of the simulation results to the class and show it to the instructor at the beginning of the class. The lab hours must be utilized only for the hardware experiment and comparing the actual outputs with simulation results.

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Analog System Lab Kit PRO

Hardware
ASLK PRO has been developed at Texas Instruments India. This kit is designed for undergraduate engineering students to perform analog lab experiments. The main idea behind ASLK PRO is to provide a cost efficient platform or test bed for students to realize almost any analog system using general purpose ICs such as OP-Amps and analog multipliers. The kit has a provision to connect 10V DC power supply. The kit comes with the necessary short and long connectors. This comprehensive user manual included with the kit gives complete insight of how to use ASLK PRO. The manual covers exercises of analog system design along with brief theory and simulation results. Refer to Appendix A for the details of the integrated circuits that are included in ASLK PRO. Refer to Appendix D for additional details of ASLK PRO.

Software
The following software is necessary to carry out the experiments suggested in this manual. 1. TINA or PSpice or any powerful simulator based on the SPICE Simulation Engine 2. FilterPro - A software program for designing analog filters 3. SwitcherPro - A software program for designing power supplies We will assume that you are familiar with the concept of simulation and are able to simulate a given circuit. ASLK PRO comes with three general-purpose operational amplifiers (TL082) and three wide-bandwidth precision analog multipliers (MPY634) from Texas Instruments. We have also included two 12-bit parallel-input multiplying digital-to-analog converters DAC7821, a wide-input non-synchronous buck-type DC/DC controller TPS40200, and a low dropout regulator TPS7250 from Texas Instruments. A portion of ASLK PRO is left for general-purpose prototyping which can be used for carrying out mini-projects. FilterPro is a program for designing active filters. At the time of writing this manual, FilterPro Version 3.1 is the latest. It supports the design of different types of filters, namely Bessel, Butterworth, Chebychev, Gaussian, and linear-phase filters. The software can be used to design low-pass filters, high-pass filters, band-stop filters, and band-pass filters with up to 10 poles. The software can be downloaded from [9].

Analog System Lab Kit PRO

Analog System Lab Kit PRO

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introduction

System Lab Kit overview

introduction

Getting to know ASLK PRO


The Analog System Lab kit ASLK PRO is divided into many sections. Refer to the photo of ASLK PRO when you read the following description.

There are three TL082 OP-Amp ICs labelled 1, 2, 3 on ASLK PRO. Each of these ICs has two amplifiers, which are labelled A and B. Thus 1A and 1B are the two OP-AMps on OP-AMP IC 1, etc. The six OP-amps are categorized as below.

LDO or DC/DC converter located on the board. Using Tri-state switches you can set 12-bits of input data for each DAC to desired value. Click the Latch Data button to trigger Digital-to-analog conversion.

4
OP-Amp 1A 1B 2A 2B 3A 3B Type TYPE I TYPE I TYPE II TYPE II TYPE III TYPE III Purpose Inverting Configuration only Inverting Configuration only Full Configuration Full Configuration Basic Configuration Basic Configuration

 e have included a wide-input non-synchronous DC/DC buck W converter TPS40200 from Texas Instruments on ASLK PRO. The converter provides an output of 3.3V over a wide input range of 5.5-15V at output currents ranging from 0.125A to 2.5A. Using Vout SEL jumper you can select output voltage to be either 5V or 3.3V. Another jumper allows you to select whether input voltage is provided from the board (+10V), or externally using screw terminals.  e have included two transistor sockets on the board, which are needed in W designing an LDO regulator (Experiment 10), or custom experiments.  specialized LDO regulator IC (TPS7250) has been included on the A board, which can provide a constant output voltage for input voltage ranging from 5.5V to 11V. Ground connection is internally provided to the IC. Using ON/OFF jumper you can enable or disable LDO IC. Another jumper allows you to select whether input voltage is provided from the board (+10V), or externally using screw terminals.  here are two 1kX trimmers (potentiometer) in the kit to enable the designer T to obtain a variable voltage if needed for a circuit. The potentiometers are labeled P1 and P2. These operate respectively in the range 0V to +10V, and -10V to 0V. The kit has a screw terminals to connect 10V power supply. All the ICs on the board are internally connected to power supply. Please refer to Appendix D for schematics of ASLK PRO.  have included two diode sockets on the board, which can be used as We rectifiers in custom laboratory experiments. The top right portion of the kit is a general-purpose area which can be used as a proto-board. 10V points and GND are provided for this area.

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Thus, the OP-amps are marked TYPE I, TYPE II and TYPE III on the board. The OP-Amps marked TYPE I can be connected in the inverting configuration only. With the help of connectors, either resistors or capacitors can be used in the feedback loop of the amplifier. There are two such TYPE I amplifiers. There are two TYPE II amplifiers which can be configured to act as inverting or noninverting. Finally, we have two TYPE III amplifiers which can be used as voltage buffers.

Three analog multipliers are included in the kit. These are wide-bandwidth precision analog multipliers from Texas Instruments (MPY634). Each multiplier is a 14-pin IC and operates on internally provided 10V supply.  here are two digital-to-analog converters (DAC) provided in the T kit, labeled DAC I and DAC II. Both the DACs are DAC7821 from Texas Instruments. They are 12-bit, parallel-input multiplying DACs which can be used in place of analog multipliers in circuits like AGC/AVC. Ground and power supplies are provided internally to the DAC. DAC Logic Supply Jumper can be used to connect logic power supplies of both DAC I and DAC II to either

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Analog System Lab Kit PRO

5
introduction

6 10 9 8 7

1
Analog System Lab Kit PRO

Photo of ASLK PRO

1
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introduction

Organization of the Manual


There are 14 experiments in this manual and the next 14 chapters are devoted to them, We recommend that in the first cycle of experiments, the instructor introduces the ASLK PRO and ensure that all the students are familiar with a simulation software. A warm-up exercise can be included, where the students are asked to use the simulation software. For each of the experiments, we have clarified the goal of the experiment and provided the theoretical background. The Analog System Lab can be conducted parallel to a theory course on Analog Design or as a separate lab that follows a theory course.

The student should have the following skills to pursue Analog System Lab:

1.  Basic understanding of electronic circuits 2.  Basic computer skills required to run the simulation tools 3.  Ability to use the oscilloscope 4.  Concepts of gain, bandwidth, transfer function, filters, regulators and wave shaping

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Analog System Lab Kit PRO

Experiment 1
Study the characteristics of negative feedback amplifiers and design of an instrumentation amplifier

Chapter 1

Analog System Lab Kit PRO

page 17

(1.1) V0 =A0 $ (V1 - V2) (1.2) V1 - V2 = V0 The goal of this experiment is two-fold. In the first part, we will understand A 0 the application of negative feedback in designing amplifiers. In the second $( V A V V )for real amplifiers, A0 is in the 0 A 0= 01 In the above equations, A0 is open-loop gain; part, we will build an instrumentation amplifier. Vthe A0 V2 0 = 0 $ (V 12) = range 10 to 10 and hence V1V c V . A unity feedback circuit is shown in the Figure s 2 1 + A0 V $ (V V =A V $= AV)- V ) (V 0 V 1.2. It is easy to see that, V - V2 = 0 0- V V1 1 2 = A0 V V 1 as A0 " V-V V0 " 3 =V = A A V0 s V A V motivation V A A 1.1 Brief theory and (1.3) V0 = A0 0 =A A0 V =V 1+ 1+A V s = 1 + A0 A = V 1 A s + 0 V V 1 as 1 as 3" 3 "A "A _1 + s ~d1i_1 + s ~d2i V 0 1.1.1 Unity Gain Amplifier V " V V0 " 1 as A 0 " 3 A A (1.4) V s " 1 as 1 A0 " 3 A=A= V s T = s1 ~ s1 ~ ~+ i_1 i_ _1 + _ +s + si ~ i An OP-Amp [8] can be used in negative feedback mode unity gain amplifiers, V0 =A0 $ (V V2+ ) 1 A A 1-1 1 to build 1 A0 0 A = T = While T= non-inverting amplifiers and inverting amplifiers. an ideal OP-Amp is assumed In OP-amps, closed loop gain A is frequency A = _1 + 1 + 11 A +1 A s ~ d1i_1 + s ~d2i 1+s ~d1i_1 + s ~d2i1 V 0 _ = to have infinite open-loop gain and infinite bandwidth, real OP-Amps1have dependent, as shown in the equation below, where 1 finite 2 V = = 1- V 2 = A A0 ~ 1 _1 of 0 + s A0 ~d1 + s A0 ~d2 + s 1 sto+ A understand s A s + A~ s some A+ s + As~ A ~ ~ ~i ~ iare called the dominant ~ ~ _1 A +1 +1 +A + numbers for these parameters. Therefore, it is_1 important and the OPA 0 poles+ 1 V T = $ V A V V ( 0 = 0transfer 12) T 1 (GB 1). Similarly, = limitations of real OP-Amps, such as finite Gain-Bandwidth Product amp. This function is typical OP-Amp that V 11+ 1 = = V0 V0 = A A ) 0 0 $ (1 -1 A 1V2A + =V s+ GB GB s equally A~ s A+ s GB s $~ GB $ ~ has ~ ij ij internal frequency _1 _s+ `1 amplifier +` + + = compensation . Please view the slew rate and saturation limits of an operational are important. 2 1 1+A VV 0 `1 + _ s GB + s A0 ~d2 + 0s GB = GB A= ~A~ 1 s GB $ ~d22ij the lecture [17] to get to know more about Given an OP-amp, how do we measure these parameters? Figure 1.2: = V1recorded V - V2 = 0 V1 - V2= AV =_ 00 A0 ~ s A0 ~d2 + s 2 A 1 ~ d1 + + +s frequency compensation. A Unity Gain System GB GB A0 A0 1 d1 A 1 A _1 0 + s A0 ~d1 + s A0 ~d2 + s 0~ + 00 ~ GB A A0 = 3 " 1 as " V0 A0 Vs 1 1 1 T= T= V0 GB A0 1 = 1 + s1 ~ Q~ Q+ ~s ~ +s +s Vs = 1 + A0 = A = 0 2 V 1 A s 1 s GB s A 0 + _ +V ` 1 1 A 0 ~d2 +s 2 GB $ ~d2ij + + = (1.5) Q=Q= 1 s GB s A s GB $ ~d2ij ~ _ ` 0 2 d + + + V 0 1 GB ~ ~ 1 GB _1 + s ~d1i_1 + s 1~d2i V 1 as A 3 " " + + V 0 0 T V = A [V -V ] ~ ~ GB GB GB A ~ A A $ V A V V ( ) = 0 1 d = = 1 as 3 " "d~ Vs 2 GB A00 s ~ 1 = V 1A ~02 0Q + s + Vs 1 GB $ ~ ~ =~ GB = $~ V T = -V V-V = A0+ 1 GB A 1 A T for aA Q Q Acan = now write the 01 GB We transfer function unity-gain amplifier as, Q = A = V A 1 s s ~ ~ 1 i i _ _ 1 2 d d + + 1 1 = 1 1 GB ~ 2 d p=p= V _1 + s ~d1i+ _11 1+A + s ~d2i 2Q 2 Q = 1 T = 2 2 d2 2 1 V " ~ GB A T = A s A s A0 ~d1 ~d2i 1 ~ ~ 1 _ ~ ~ 0 0 00 d1 + + +s 1 1 as A 3 " s ~ ~ 2 A 2 d2 + s 0Q + + T= V 1 1 s Q s ~ ~ 0 0 + + (1.6) T = A 1 1 + Figure 1.1: An ideal Dual-Input, Single-Output OP-Amp and its I-O characteristic ~ ~ ~ ~ A GB $ ~1 ~ 0+ 2 d = 1 A 1 1 A= 1 Q = s ~ ~ i_1 + Q i _1 + s= 1 d2 V V = GB ~ Q = 1 s GB s+ A01 s2 1 GB $ ~d2ij ~d2 + _ ` + + 1 1 GB ~ d2 2 V GB V GB $ 1 $ 1 T = = A s A s A s 1 ~ ~ 1 _ Since the frequency and transient response of an amplifier are impacted by these 0+ 0 0 A d1 + GB + d2 + ~d2A0 ~d1 ~d2i +1 + 1 A 2 A0 ~~ A0 ~d1 ~ _1 0+s A d1 + +1 A GB d2 s A0 ~d2 + s 121 GB = A0p ~ d1 1 1 parameters, we can measure the parameters if have the frequency and transient Qwe 2Q 1 = = 2 2 d2~ ~ 1 = response of the amplifier; you can obtain these response characteristics by applying s2A s~ ~ +$ ~0 i _1 + 1 A + s A~ (1.7) = QGB GB $2 ~ ~A 0+ d2 = p11 p11 = GB 1 s GB s A s GB $ ~ ~ 1 _ sinusoidal and square wave inputs respectively. We invite the reader to view the ` = 0 d2 + d2ij + +~ 2 Q 0 + _ s GB + s A0 ~d2 +s GB $ ~d2ij `1 ~ ~ A ~ +s GB $ ~ ij `1 + _ s GB + s Q recorded lecture [16]. 1 1 i4Q i Q _1 - 1 _1 4 GB A ~ 1 =GB0= AdT The term , also known as the bandwidth product of the operational ~= 1 GB A ~ ~ 0~ d1 gain 2 = 0 2 dV dV 1 p = 1 s s ~ ~ 0 in OP-Amp negative feedback 0Q + + An OP-Amp can be considered as a Voltage Controlled Voltage Source (VCVS) with amplifier, is one of the most important parameters p = 2Q dt dt GB GB 2 GB V the voltage gain tending towards infinity. V For finite output voltage, the input circuit. The above transfer function can be rewritten as p 1Q V 1 ~ 0 Q T= = voltage is practically zero. This is the basic theory of OP-Amp in the negative ~ 0 1 + s ~1 Q+s ~ ~ 11 1GB d2 T= V feedback configuration. Figure 1.1 shows a differential-input, single-ended-output 2 p $ GB 2 + 1 T ~ ~ Q = = s ~0 Q + 1 s ~ 00 A + GB d2 2 ~ ~0 ~0 Q~ 1 GB ~ OP-Amp which uses dual supply !Vss for biasing. s ~02 + + A ~1 + s 1 GB 1 Qp 2 V $ ~d2 1 ~0$ ~ = GB Q = ~ = GB V p 2 Q = 1 GB ~ d2 System Lab Kit PRO page 18 Q Q 1 GB ~ + d2 1 Analog V GB $ p1 p 1 ~ GB A + 2 GB 1 V pd$ 1 GB A ~d2

experiment 1

Goal of the experiment

0 0

10

2 1

2 1

0 2 0

0 s

0 s

0 s

0 s

d1

d1

d2

d2

d1 0

d1

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2 d2

d1 0 d2 d1

d2

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2 d2

d2

d2

d1 0

d1

22 0

2 0

SS

d2

d2

d2

d2

d2

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SS

0 s

0 s

p p

p p

d1

d2

d1

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d1

d2

d2

d2

d1

2 0

d2

d2

d2

0 0 0 1 d1 d2 d2 d2 1 2 A0 ~ sd A = _1 + 1 A0 + s A0 ~ 2 0 ~d1 ~d 2i d1 + s GB d2A + 1 0 1 = = 1 s GB s A$0~ $ ~d2ij ~ _~ `~ s A0 GB + +s GB ij 2 `1 + _ s GB 22 d2 dd +s+ + 1 = = 2 1 s GB s A s GB $ ~ ~ i _ ` j 0 2 2 d d + + + ~ ~ 0 1 s GB s A GB $ ~d2ij _ ` 2 2 0 ~d2 +s + + = GB 1 s _ s` GB GB A GB $ $ ~ ~ i `1 + _ s GB + s A0 ~d `21+ j 0 ~d2 +s 2ij GB GB d2s + + 2 d A ~ = GB A ~ 0 1 d = 0 $ 1 d2ij d~ = GB 10+ s GB + s A0 ~d2 +s GB = A ~d_ 2 1 GB A 0 ~d1 = 1 s GB s A GB $ ~ _ ` j 0 ~d2 +s d2i + + GB = A0 ~d1 GB A0 ~d1 A ~ Vp =GB GB = 0 d1 1 GB T =GB GB 1 GB = A0 ~d1 T= 1 + s ~0 Q + s 2 ~02 GB GB GB 2 21 1 1 s Q s ~ ~ 1 T 0 0 + + T = 2 1 = GB 1 2 ~02 2 V GB p $T = 1 1 s Q 1 s s ~ ~ 1 1 + 2 2 0 ~0 Q + s 0Q + = + T = A2 non-inverting amplifier with a gain of 2 is shown in Figure 1.5 (a). ~0 +s 1 T= T = T 1 + s ~0 Q 1s1 ~ GB ~d2 1 + ~02 2 2 0Q + s = 1 + s ~0 Q + s 2 ~02 1 + s 1 s ~0 Qs+~ ~ 0 + 1 2 11 2 Q s ~ 1 T 0 0 + + Q = ~ GB Q A = Figure 1.3: Magnitude and Phase response of Gain System d2 =Unity 2 a 2 Q 1 Q= 1= s ~ 0Q + s 1 1 d2 1 + 1 Q GB ~d2 =~d2 + 1 GB 1 GB ~ Q= Q Q=2 1 ~0 GB ~ d2 $dGB ~0+ ~d2 ~d2A 1 =A GB Q~ + ~d2 GB = ~ GB 2 1 1 GB 1 GB ~d2 2 d +A + 2 GB A 1 ~GB 2 d Q ~ = d2 + + ~d2 GB Q and ~ ~ GB A ~d2 GB GB GB A + A d 2 d2 d2 $ ~~ GB ~ GB $ ~d2 GB ~ 0 = d2 0 = ~d1 2 + ~0 1 = GB $ ~d2 A GB $ ~ ~ 0 = d2 p 1 ~ GB A 2 d GB $ ~GB ~0 = GB $ ~d2 ~0 = ~ d2 Q1 $ ~d2 $ ~d2 Q 0 = p= Q ~ 0 = GB $ ~d2 ~0 = GB 2QQ An inverting amplifier with a gain of 2 is shown in Figure 1.5 (b). Q Q 1 ~ p= 1 Q~1 0 Q p = 0 1 p = 2 Q 2 Q Q 1 1 p = 1 2 p= p = p 2Q 2Q ~ ~ =2 11 4 Qis i 2Q 2 Q ~00 is the Q is the quality factor _ and the factor, and natural 1 damping ~ 0 ~ Q 0 p= ~ 0 2 Q ~0 ~0 When 1 frequency of the system. the frequency response is plotted with magnitude Vp ~ ~0 ~ ~ ~ 0 0 d1 0 02 d 0 d2 0 d 21 d2 0

GB = A= 0 ~d1 Vs 1 + A0 GB V0 " 1 as A0 " 3 Vs 1 V =A $ (V - V ) T= 2 2 A 0 where called slew rate. It can therefore be determined by applying a square wave of Vp at 1 s ~0 Q + s V ~ 0 $ (V - V + $ (V - V ) VV AV )= =A A V$ (V - V ) V = A= = V = A A $ (V - V ) certain high frequency and increasing the magnitude of the input. $ (V A V =A $ (V - V ) V =A V V ) 1 s s ~ ~ 1 i i _ _ V 1 2 d d + + V V - V1 ) = $ (V V = V V -A V =A $ (V - V ) V - V = A Q= V-V A V =1VV= A V AV = A V V-V = V V -VV + = 1 GB d2 1 V V~ = A A V A V A 2R R V T = A AV+ VV " = A V1A = 1 GB V 1= AA Vd2= 1 + A as 3 +" V A V VVA AA ~ = A 1 1 +A + V = = V 1 A + V V V 1+A 1V A 1V A A V " 1 as A " 3 += V " 1 as A " R R + "3 A as " 1 GB A= V3 V VA= V 1 A 1s" ~ $ ~" ~ + V " 1 as A " 3 V V 0 = d2 1 as 1 A " 3 V 1V as " A= 3 " 1 s ~ i i _ _ V + + V V 1V as A " 3 V V A A 2 A As =1 = A0 ~d1A+ as1 A " " V d2i As A3 s A s~ A0 ~d1 ~ ~ 11 _ 0+ 0~ 2 d + + AV = Q V A A 1 s 1 i i _ _ A 1 s s ~ ~ 1 + + i i _ _ = + + T = A= A = A _1 + s ~ i_A 1+s ~ i 1 + 1 A_1 + s ~ i_1 + s ~ i = 1+ s _1 ~ ~ i sA~ i _1 + s ~ i_1 + s ~ _i _ + si_1 1 1 1T= A = s1 ~ i= + + 1 T 1 1 T= ~+i1 A _1 + s ~ i_1 + s 1 1= 1 11 +1 A = T 1= + 11 A T= T ==T = p 2+ A 1 1 A s A s A 1 ~ 1 _ + + + A 1 +1 A 1 +2 1Q 1 _ s GB1+ s A0 ~d2 +s GB 1 $ ~d2i 1 ` j 1 ~ 1+ s A ~ ~ i A+ 1+ T1 = = = 1 = Figure 1.5: (a) Non-inverting 1 +1 A 1 1 A s A A ~ ~ i amplifier of gain 2, (b) Inverting amplifier of gain 2 1 ~ 1 _ A s A s A s 1 ~ ~~~ ~ 1 + + + + is _ = + + sA A A ~ ~ _1 i+ _1 + 1 A + s A ~ + s 1A ~ ++ s= + = = AA s A A~ 1s +~ + s $~ = 1+ GB s GB ij + s A ~ ~ i _s 1 +~ + 1A ~ ` GB A ~ A A s s A A s A s 1_ ~ ~ ~ ~ ~ 0+ ~ 0 1~ d+ i i _1 + 1 A + s A ~ _1s+ = + + + 1 A~ ~ i 1 A + s A1 ~ +s 1 += =A ~ +s =
0 0 1 2 0 0 1 2 0 0 0 1 2 0 0 1 0 1 2 0 2 0 0 1 1 0 2 2 0 0 0 1 0 0 2 1 2 1 2 0 1 2 0 1 0 2 0 1 2 1 2 0 1 0 02 0 0 0 0 0 s 0 0 s 1 2 0 0 1 0 2 0 0 0 1 02 0 0 s 0 0 s 0 0 0 s 0 0 s s 0 0 00 0 0 s 0 0 0 0 0 s 0 0 0 0 0 s 0 s 0 0 s 0 0 s s 0 s s 0 0 0 0 s 0 0 0 0
I

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1.1.2 Non-inverting Amplifier

1.1.3 Inverting Amplifier

~0 ~ ~0 vs ~ ~0 and phase vs ~ ~0, ~ it appears as shown in Figure 1.3.Vp $ GB 2Q Vp 1 Vp Vp ~0 ~ ~0 dt Vp Vp Vp Vp1 $ GB 1 Vp $ GB 1 Q 2 Vp~0 V p $ GB 1 V V p p to the unity gain amplifier, and if If one voltage 2 Vp $ GB 1 slew Vp $ applies GB 1 a step of peak Vp $ GB 1$ GB 1 1 1 p1 V p 1 Q 2 Q 2 1 rate, then the output appears as shown in Figure 2.4 if or . 2 1 Vp 0 $ GB 1 ~2 1~ Q 2 2 1 1 Q 2 Q2 Q2 Q2 2 0 1 2 2112 p~ 1 p11 p Q21 p 1 2 1 1 1 4 Q V 2 _ i Q is equal the step response and papproximately p to 11 1 the 1 p total p number of visible peaks ~0 ~in 1 1 0 ~ 0 p 1 1 ~2 0 dV 2 0 the frequency of ringing is ~0 . ~0 1 1 4 Q _ i 1 1 4 Q _ i 2 ~ 1 40Q i _1 dt _1 1 4Q 2i V 2 $ GB 1 Qp _1 - 1 4Q 2i _1 - 1 _4 i 2 ~0 dV0 dV0 1 dV 0 - 1 4Q i V p 2 1 - 1 4Q i _rate dt dV0 dt dV0 dV0maximum Slew-rate is known as the dt dV0 dt 1 dt V V p dV p 0is at which the output ofdt theVOP-Amps Q2 p dt Vp dt Vp Vp 2 Vp capable of rising; in other words, slew Vp rate is the maximum value that dVo/dt p11 can attain. In this experiment, as we go ~0 on increasing the amplitude of the step input, at some amplitude the rate at 4Q 2i _1 - 1 which the output starts rising remains dV0 with Figure 1.4: Time Response of an constant and no longer increases dt the peak voltage of input; this rate is Amplifier for a step input of size Vp
0

~ = dV0~ p
0

Unity gain

Non-inverting amp R2 R1 R3 VF2 U2

Inverting amplifier R4

VG1 + U1

VF1

VF3 U3

Figure 1.6: Negative Feedback Amplifiers

Figure 1.6 shows all the three negative feedback amplifier configurations. Figure 1.7 illustrates the frequency response (magnitude and phase) of the three different negative feedback amplifier topologies. Figure 1.8 shows the output of the three types of amplifiers for a square-wave input, illustrating the limitations due to slew-rate. page 19

Vp
Analog System Lab Kit PRO

experiment 1

experiment 1

1.2 Exercise Set 1


1
Design the following amplifiers - (a) a unity gain amplifier, (b) a non-inverting amplifier with a gain of 2 (Figure 1.5(a)) and an inverting amplifier with the gain of 2.2 (Figure 1.5(b)). Design an instrumentation amplifier using three OP-Amps with a controllable differential-mode gain of 3. Refer to Figure 1.9(a) for the circuit diagram. Assume that the resistors have 1% tolerance and determine the Common Mode Rejection Ratio (CMRR) of the setup and estimate its bandwidth. We invite the reader to view the recorded lecture [18]. Design an instrumentation amplifier using two OP-Amps with a controllable differential-mode gain of 5. Refer to Figure 1.9 for the circuit diagrams of the instrumentation amplifiers and determine the values of the resistors. Assume that the resistors have 1% tolerance and determine the CMRR of the setup and estimate its bandwidth.

1.3 Measurements to be taken


1 2
Transient response - Apply a square wave of fixed magnitude and study the effect of slew rate on unity gain, inverting and non-inverting amplifiers. Frequency Response - Obtain the gain bandwidth product of the unity gain amplifier, the inverting amplifier and the non-inverting amplifier from the frequency response. DC Transfer Characteristics - Study the saturation limits for an OP-Amp.

Figure 1.8: Outputs VF1, VF2 and VF3 of Negative Feedback Amplifiers of Figure 1.6 for Square-wave Input VG1

Determine the second pole of an OP-Amp and develop the macromodel for the given OP-Amp IC TL082. See Appendix B for an introduction to the topic of analog macromodels.

Figure 1.7: Frequency Response of Negative Feedback Amplifiers page 20

Analog System Lab Kit PRO

1 2

Submit the simulation results for Transient response, Frequency response and DC transfer characteristics. Take the plots of Transient response, Frequency response and DC transfer characteristics from the oscilloscope and compare it with your simulation results. Apply square wave of amplitude 1V at the input. Change the input frequency and study the peak to peak amplitude of the output. Take the readings in Table 1.1 and compute the slew-rate.
nR R R nR VO R R R R V1 R

Specific ICs from Texas Instruments which can be used as instrumentation Amplifiers are INA114, INA118 and INA128. Additional ICs from Texas Instruments which can be used as general purpose OP-Amps are OPA703, OPA357, etc. See CHAPTER 2, EXPERIMENT 1.

S. No. 1 2

Input Frequency

Magnitude Variation

Phase Variation

V1

3
R R V2 VO

4 Table 1.2: Plot of Magnitude and Phase variation w.r.t. Input Frequency

V2

S. No. 1 2 3 4

DC Input Voltage

DC Output Voltage

Phase Variation

Figure 1.9: Instrumentation Amplifiers with (a) three and (b) two operational amplifiers S. No. 1 2 3 4 Table 1.1: Plot of Peak to Peak amplitude of output Vpp w.r.t. Input frequency Input Frequency Peak to Peak Amplitude of output (Vpp)

Table 1.3: Plot of DC output voltage and phase variation w.r.t. DC input voltage

Further Reading
Datasheets of all these ICs are available at http://www.ti.com. An excellent reference about operational amplifiers is the Handbook of Operational Amplifier Applications by Carter and Brown [5].

4 5

Frequency Response - Apply sine wave input to the system and study the magnitude and phase response. Take your readings in Table 1.2. DC transfer Characteristics - Vary the DC input voltage and study its effect on the output voltage. Take your readings in Table 1.3.

Analog System Lab Kit PRO

page 21

experiment 1

1.4 What should you submit

1.5 Other related ICs

experiment 1

Notes on Experiment 1:

page 22

Analog System Lab Kit PRO

Experiment 2
Study the characteristics of regenerative feedback system with extension to design an astable and monostable multivibrator

Chapter 2

Analog System Lab Kit PRO

page 23

V0b V0 = A i V0 i 0 $ _V V0A0 i$ _Vib = 1 V0 V0 A $ 0 A $ V 1 bV V0 = i 0i A 0$ _A0 Vi =b0 $ b Vi =- 101 -$ A R1bR 1 V $_ V0 V V0 = -b A0 i 0i 1 = =bV = R R2A0 $ 1 A0 V i1+ b= - A0 $ _Vi - bV0 i $0 R 1 + R2 1 V0 V0 = - A0 $ _Vi - bV0 i A00 $ b = 1 R1 =1 V V However, when 1, it becomes $ 0b A 1 $b 0 0V b V0 = -i A b iA0= 0 $ _V i = A0 $ =R1 + R2 1 V 00 $ b V i 1 A 1 $ A b 1 R 0 1 unstable as amplifier as output satu=- A0 $ $_ b1 V0 i V0 = - A 00 $V A bi 1 1 V0 b = V i 1 A0 $ b A 0$ b = 1 $ 1+ R A0 R =R 2 Vi When rates. of 1 b= b 11the b 0 $& 0 $A The goal of this experiment is to understand the basics of hysteresis and V0 1A 1 region A 0$ b & R1 + R2 b = R1 $ A A 0 =1 A 0$ b 1 1 0$ b = R V is0 $regenerative i1 this b R1 + R2 b VV V0operation 0 $ _V iof 0i =ss circuit + the need of hysteresis in the switching circuits. bA = Vss1 - A A0 $ b = 1 + R R 10+ 21 1 A0 $ b & 1 $b A R 1is the comparator. This A0 $ b = 1 V0 =mixed-mode - A0 $ _Vi - bV0 i 1 V0 V b ss = VR A0 $ b 1 1 ss 2 $ A0= 0b =1& AA R1is 0$ + V ss + 1 $b Vicircuit. Output stable in two 1Ab 0$ b A0 $ b 1 1 1 V0 only $V ss $ A 0 =1 $ A b $ V b 0 = A0 $A b &1 ss 1 AR 1 0$ b V Vi the 1 input ss and - Vss . When - 0$b b stages = R 1+ A0 $ b & 1 ss 1 + R2 A0 $V 1 V ss 1 R1 + Vss 1b & A 0$ b is large negative value $ Vss output b V ss b = saturates Vss 2.2: Symbol for an Inverting + Figure A R R 0$ b = 1 $$in V 1+ 2 V ss 1ss$ increased & $2 Ainput b$ b 2 b Vss at + Vss bas output V $ Vss0 ss Vss Schmitt Trigger 1 $ A b 0 = 1 A 0 $ b 1 at 1 +1b remain input reaches b$ Vss + - Vss Vss + VssTuntil 2 $ssln RC d nb = $ $V 2 $$ b 2 $ T RC ln d n = b $ Vss 11 state b 1 0 $ stable & 1 - Vss A 0$ b 1b b at this it changes A to V b $ Vpoint ss 2 $ b $ Vss 11+ssb 1 V ss & $ A b 0 1 V the input is decreased it $d $ ln n 2 $ b + ss . Now when =RC x $2 RC ln = b$V ss xT $RC ln = d bd n b n $ Vss Vss 1 1 b 1 1 b + V 2 can change state only at hysteresis of $ b $ Vss is seen around 0. This kind - Vss $ RC $ ln d + ss .nThus T= 1 Vss2 t 1+b +tx 2$b$V b ss x1 x $ RC ln + = d 2 MOSFET $ RC $ ln d as a switch Tn= a n In the earlier experiment we had discussed the use of only negative feedback. Let b of comparator is a must while driving in ON-OFF controllers - Vss 1 - b $ Vss 1= b$ RC $ ln d 1 + b n -2 2 b $ Vss 1 + b $ 1 T b 1 + b 1 + x $ RC ln = d n us now introduce the case of regenerative positive feedback as shown in Figure 2.1. SMPS (Switched Mode Power Supply), pulse width modulators and 1b class-D audio RC $ ln n n = ln d nd x + $ Vd ss xt $ ln 1 RC Vss T = 2 $ RC $x 1= bb x $ ln d 1type = RC bb 1 +b n Schmitt The reader will benefit by listening to the recorded lecture at [20]. power amplifiers. The symbol for this inverting trigger is shown in 1b RC $ ln d 1 n 21$V Tx RC $ ln V d ss n =! x= + 2 $ b $x Vss t 1 1 ln d b1 + b n ! 1V x 1 b = $ ln d non-inverting RC The =2.2. n RC $ Figure Schmitt trigger is as shown in Figure 2.3. t+x 1b -b b 1R + $1 b $ Vss b 1 2 1n 1b + t+x R RC x $= ln xd $n RC ln d = = d n V ! 1 b 2 $ $ T RC ln = = 1+b R R 1 2 + (2.1) t+x V0 = - A0 $ _Vi - bV0 i b 11 R R2 +b 1-b x =1RC $ ln d n +b b = RC $ ln d 1 + b n TR R1 n = 1 !1 1 2 $ RC $ ln d x tV + Rb 1b + 1x 1-b = RC x $ ln x $ RC ln d n = = d n R1 + R2 ! 1V 1 V0 bV i b A0 $ _Vi 2 1b 1 -R b R 1 + b V0 = - 1 R$R 2 ! 1V 0 A0 $ b= =1 d RC x ln x $ RC ln n = = d n RR 1 + R2 Vi t + x ! 1V b 1= - b R1 1 - A0 $ b b RR2 R R1 + R2 b 1 R1 ! R 2 V 0 = R 1R V 1 t+x R+ 1 b 1 1 1 1,5 1+ 2 $ A 0 =b= R R 1 1 x = RC $ ln d n f kHz = = 1,5 R21 +b R2 =f R R kHz = V i 1 T b R 1 R b 1 1 A0 $ b +V SS + T +V= SS b= x = RC $ ln d n R2 R1 + R2 R ms 4 1+ 2 1 = ! 1V R1 R R1 xR b VI 4 ms xf = R2 kHz 1,5 = = VI R 1 T ! 1Vb = R R2R1 R1 1 RC V O 1 A 0 $ b =VO RC b= f = = 1,5 kHz R1 + R2 R 4 ms x= + R R1 + R2 R2T R1 f = 1 = 1,5 kHz b = T R1 4 ms RC -VSS R x= 1 + R2 f = 1 = 1,5 kHz A 11 A 1 R 1,5 kHz 0$ b = 1 -V0 SS $ b T ms 4 x f = = = R1 R2 RC T 1 4 ms x = $ _kHz Vi - bV0 i A fV 1,5 R2 $ b & 1 0 == RC x = 4 ms A 0 T = 0 R 2 A 0$ b 1 1 R RC R1 1 0 4 ms xV = RC A $ Vi =- 0 1 R b $b & 1 - A0 $A f = 1 =Figure 1,5 kHz + Vss Schmitt Trigger and its Hysteresis Curve RC 2.3: Non-inverting T 1 0 1,5 R 1 f kHz = = b= x = 4 ms T R1 + R2 - Vss V ss + RC A0 $ b = 1 x = 4 ms Figure 2.1:  Inverting Schmitt-Trigger and its Hysteresis Characteristic b $ Vss A0 $ b 1 1 RC V

experiment 2

Goal of the experiment

2.1 Brief theory and motivation

2.1.1 Inverting Regenerative Comparator

page 24

Vss V0 i = - A0 $ _Vii bV V0 0 = - A0 $ _V 0i -b $ Vss 2V $b 1 V 1 V0 0 =- A0 $ b 1 + $ A 0 =V i 2 $ RC $ ln 1 A 0$ b T= d n Vi 1A 0$ b b 1 R R1 1 b b= =R 1 + R2 1 R1$ + R2 x = RC ln d 1 - bn A 0$ b = 1 A0 $ b = 1 t+x $b 1 1 A A0 0$ b 1 1 1+b

(2.2)

(2.3)

- ss 2.1.2 Astable Multivibrator A $b & 1 b $ Vss V + An astable multivibrator is shown in Figure 2.4. The square and the triangular -V waveforms shown in the figure Vss are both generated using the astable multivibrator. We refer to b $ as V the regenerative feedback. The time period of the multivibrator is 2 $ b $ Vss given by V 2$b$V 1+b (2.4) 1T 2 $ RC $ ln d +b n = T = 2 $ RC $ ln d n 1-b 1-b 1 x = RC $ ln d n 1 1 -x b = RC $ ln d n 1-b t+x Analog System Lab Kit PRO b 1+t +x x = RC $ ln d n
0 ss ss ss ss ss

V0 = - A0 $ _Vi - bV0 i 2.1.3 Monostable (Timer) V0 i V00Multivibrator 1b 0 $ _V i -A = A 0$ =Vi 1-1 A0 $ b V 0 The circuit diagram for a monostable multivibrator is shown in 2.6. The trigger $ A 0 =R1 1 the V i= 0$ b -A waveform shown in Figure b 2.5 is applied to monostable. The negative edge R1 + R 2 triggers the monostable, which produces the square waveform shown in Figure V = - A $ _ V - bV i V = - 2.6. A $ _ V - bV i R1 b = 1 A0 $ b 1 = 1 V V R1 + R2 V =- A $ A $ 1 - A $ b V =1-A $b R +V R A0 $ b = 11 b= b= R +R R +R R V A $b = 1 A $b = 1 A0 $ b V & 11 V = - A $ _ V - bV i V = - A $ _ V - b V i A $b 1 1 A $b 1 1 V + 1 & $ A b C 0 ss 1 -V 1 V V 1 & $ A b A $b & 1 A $ =- A $ V =1-A $b V 1-A $b +V +V ss + VR R R b b
0 0 i 0 0 0 i 0 0 i 0 0 i 0 0 0
SS

0 0

0 0

0 i

SS 2

0 i

ss

ss

= RR1 1 R = R 1R - Vss - Vss 1+ 2 1+ 2 $= V b ss ss 1 $ bV A0 $ b = 1 A0 b $ Vss b $ Vss A0 $ b 1 1 A0 $ b 1 1 Vss Vss bss$ Vss V & 1 2.4: Astable &1 A0 $ b Figure A0 $ b Multivibrator $ 2 b $ V 2 $ b $ Vss ss and its characteristics ss + Vss +V Vss$ b $ Vss 2 1+b 1+b T = 2 $ RC $ ln d n T = 2 $ RC $ ln d n 1 b V V ss ss The monostable remains in the on state until it is triggered; at this time, the circuit 1 - b $ Vss equal to 1 2 $b bequation + b $ Vss b$V ss $n RC ln d 1 for x= $ ln d 1 n switches to the off state for a period The is RC shown 2 $ RC $ ln d x .= T = 1 - bn 1-b b 1 Vss Vss below. 1 t+ x b t+x + 2 $ RC $ ln d1 n 1 b = 2 $ b $ Vss 2$T b$V ss 1+b 1 RC x= n x = RC(2.5) $ ln d n $+ ln nb$ ln d + bd 1 + b x = RC 1 b b T = 2 $ RC $ ln d T n = 2 $ RC $ ln d n1 - b 1-b 1-b 1 ! 1V x+ =xRC1$ ln d ! 1V n R1 1 t R1 x = RC $ ln d n x = RC $ ln d n 1bb = = applied 1 -monostable 1-b b After triggering the at time t, the next trigger pulse mustb be R1 + R R1 + R2 2 t +tx+ after t + x . The formula for is x given below. 1 + R1b R1 x = RC ln d R2 n 1+b 1 +$ b R2 x = RC $ ln d n x = RC $ ln d n 1 bb + b b R n R x = V 1 ! 1V ! 1! V RC $ ln d b 1 f = = 1,5 kHz f = 1 = 1,5 kHz R1 R1 T T b= b= ! 1 R1 + R2 R 1V + R2 R1 ms 4 x 4 ms x = = b =R R R1 R1 1+ 2 RC RC R1 S. No. Regenerative Feedback Hysteresis R2 R2 b

Figure 2.5: Trigger waveform

+VSS C Trigger V -VSS R R R VC C D

R1 = R1 + R2 1 R1 1 2 f = 1 = 1,5 kHz f= 1,5 kHz T T = 2 x = 4 ms x= R4 2 ms RC RC 3 R f = 1 = 1,5 kHz T 4 1 1,5 kHz f= = x 4 ms =T Table 2.1: Plot of Hysteresis w.r.t. Regenerative Feedback x RC = 4 ms Analog System Lab Kit PRO RC
R R

Figure 2.6: Monostable Multivibrator and its outputs page 25

experiment 2

experiment 2

2.2 Exercise Set 2


1

1+b 2 $ b $ Vss 1 + b Vss T = 2 $ RC1$ + ln d n T = 2 $ RC $ ln d b n 1n- b 1 b 2 $ $ T RC ln d = 1+b $ 2 b $ V 1 b ss T = 2 $ RC $ ln d n 1 1 x = RC $ ln x = RC $ 1 lndb n 1 d1 - b n 1+b 1 b x RC $ ln = d n T = 2 $ RC $ ln d n 1 1-b x = RC $ ln 1-b t+x t+ x d1 - b n t x + 1 1+b t+x 1 + b x = RC $ ln d 1 - b n x = RC1$ + ln d x = RC $ ln d b b n n b RC x $ ln d n = 1+b b + x the hysteresis of ! 1V . Obtain x = RC $V lnfeedback d n circuitt with Design a regenerative the !1 b 1 + b ! 1V DC transfer characteristics of the system. and R see how 1 ! 1V b RC $ ln d the hysteresis x =Estimate R1 n b= = varying b R1 R1 .+ R2 R1 + R2 the regenerative feedback it can be controlled by b= R 1 R 1 + R2 V ! 1 b = R1 R 1 R1 + R2 R1 R1 the triangular R 2 . Apply waveform with Vary either R1 or R2 in order to vary b = 3 R2 R1 + R2 the peak voltage of 10V at a given frequency to both circuits and observe the R R2 R R1 R output waveform. 1 1,5 kHz R 1 R 2 f = = 1,5 kHz 1f = 1,5 T = T f kHz = = 1 1,5 kHz T R for DC transfer characteristics. x = 4 ms = T x= ms =4 a)  Sfubmit the simulation results x = 4 ms ms x = 4RC f = 1 = 1,5 kHz RC RC T b)  T ake the plots of DC transfer characteristics from oscilloscope and RC x = 4 ms compare it with simulation results. RC

T = 2 $ RC $ ln d 1-b 1n+ b b T = 2 $ RC1$ ln d n 1 1 b x = RC $ ln d 1 x = RC $ ln d 1 - bn n b 1 n x = RC1$ ln d t+x 1-b t+x t+x 1+b 1+b x = RC $ ln d n x = RC $ ln d n b b d1 + b n x = RC $ ln ! 1V b ! 1V c)  Vary the regenerative feedback ! 1V and see the variation in R1 the b= R1 R1 + R2 hysteresis, hysteresis b is=directly proportional to regenerative R R + R2 1 b1 = R1 feedback. R1 + R2 R1 R1 R2 R2 Design an astable multivibrator using charging and discharging R2 R of capacitor R C through resistance R between input and output of the Schmitt trigger. See R 1 1,5 f kHz = = Figure 2.4. Assume that frequency f = 1 = 1,5 T kHz . Tf = 1 = 1,5 kHz x = 4 ms x = 4 ms T ms 4 x and estimate RC using the Design a monostable multivibrator for = RC formula 2.5. RC

Notes on Experiment 2:

page 26

Analog System Lab Kit PRO

Experiment 3
Study the characteristics of integrators and differentiator circuits

Chapter 3

Analog System Lab Kit PRO

page 27

A = GB s
experiment 3

Goal of the experiment


The goal of the experiment is to understand the advantages and disadvantages of using integrators or differentiators as a building block in solving N th order differential equations or building an N th order filter.

- 1 V 0 sCR 3.1.2 Differentiators Vi = a1 + 1 + s k GB $ RC GB A differentiator circuit that uses an OP-Amp is shown in Figure 3.2. C V0 Vi = - sRC s s 2 $ RC b1 + GB + GB l - sRC = s s2 b1 + ~0 Q + ~02 l

N th

A = GB s - 1 V0 sCR = s Vi a1 + GB 1 $ RC + GB k

A = GB s - 1 V0 sCR = s Vi a1 + GB 1 $ RC + GB k

3.1 Brief theory and motivation

C C V0 V0 sRC - sRC = = differentiators Integrators V and can be used as a building for sfilters. 2 Vi block i s 2 $ Filters RC s s RC $ 1 + signal b l + b1 + l + form the essential block in analog signal processing to improve to noise GB GB GB GB sRC sRC ratio. An OP-Amp can be used to construct an integrator or a differentiator. This = = 2 s s s s 2 advantage of integrators as building experiment is to understand blocks instead +~ b1 + ~ b1 + ~0 Q + the l 2l ~02 0Q 0 of differentiators. Differentiators are rejected because of their poor high-frequency ~0 ~0 noise response. ~ GB ~ GB Vpp Vpp Vp Vp Vpp = Vp $ T 2 $ RC T =1 f VI f
C R

- sRC ~0 = s s2 b1 + ~0 Q + ~0 The output of the differentiator remains at input offset (approximately 0). However, ~at GB any sudden disturbance the input causes it to ring at natural frequency ~0 .

C (3.2) V0 - sRC = 2 Vi s $ b1 + GB + s GB

A = GB s (3.1) - 1 V0 sCR = Vi a1 + GB 1 $ RC +

Vpp Vp
C
I

~ GB
R

Vpp Vp Vpp = Vp $ T 2 $ RC T =1 f f

Vpp = Vp $ T 2 $ RC T =1 f f I/SCR VO = -V

Vp $ T V V pp = 2 $ RC T =1 f f

VO = -SCRVI

Figure 3.2: Differentiator Figure 3.1: Integrator

3.2 Specifications
Fix the RC time constant of the integrator or differentiator so that the phase shift and magnitude variation of the ideal block remains unaffected by the active device parameters.

3.1.1 Integrators
N circuit that uses an OP-Amp is shown in Figure 3.1. An integrator Assuming A = GB s , A = GB s
th

N th

- 1 V0 sCR = - 1 s N th Vi V a1 + GB 1 k 0 + sCR $ RC =GB A= Vi 1 + s CGB s 1+ 1 GB $ RC GB V0 sRC V0 Vi = - sCR 2 s s RC $ = b1 + 1 l + s Vi GBC GB a1 + k practice. The output goes to saturation For making it work a high valued resistance GB $ RC + GBin - sRC in order to bring the OP-Amp to the active region where it across C must =be added 2 V - sRC s 0 s 1 + sRC + b = 2l can act V as an integrator. 0 - ~0 Q V i ~0 s s 2 $ RC 2 Vi = ~0b1 + s + s $ RC l 1 + + GB GB GB GB page 28 ~ GB - sRC = - sRC Vpp 1 s s2 + 2 l= b + 2

3.3 Measurements to be taken


1
Transient Response - Apply the step input and square wave input to the integrator and study the output response. Apply the triangular and square input to the differentiator and study the output response. Frequency Response - Apply the sine wave input and study the phase error and magnitude error for integrator and differentiator.

Analog System Lab Kit PRO

1 2

Simulate the integrator and differentiator and obtain the transient response and phase response. Take the plots of transient response and phase response on an oscilloscope and compare it with simulation results. S. No. 1 2 3 4 5 Table 3.1: Plot of Magnitude and Phase w.r.t. Input Frequency S. No. 1 2 3 4 Input Frequency Magnitude Phase Input Frequency Magnitude Phase

N th A = GB s

Figure 3.3: Frequency Response of integrator and differentiator

- 1 V0 sCR = s Vi a1 + GB 1 $ RC + GB k 5 C Table 3.2: Plot of Magnitude and Input Frequency V0 Phase w.r.t. - sRC 2 Vi = s $ RC b1 + GB + s GB l Frequency Response - Apply a sine wave to the integrator (similarly to the - sRC = to obtain 2 differentiator) and vary the input frequency phase and magnitude 1 + s + s 2l b Q ~ error. Prepare a Table of the form 3.1. Figure 3.3 ~ shows the typical frequency 0 0 ~0 response for integrators and differentiators. For an integrator, the plot shows a phase lag which is proportional to ~ GB . The magnitude decreases with increasing frequency. For the differentiator, the phase will change rapidly at Vpp natural frequency in direct proportion V to quality factor. The magnitude peaks p at natural frequency and is directly proportional to the quality factor. Vpp = Vp $ T 2 $ RC

S. No. 1 2 3 4

Peak Value of input Vp

Peak to Peak value of output

Table 3.3: Variation of Peak to Peak value of output w.r.t. Peak value of Input page 29

Analog System Lab Kit PRO

T =1 f f

experiment 3

3.4 What should you submit

b1 + GB + GB l - sRC C - sRC2 = V0 - sRC s s2 s s RC $ 2 - sRC b1 + ~0 Q + ~02 l b1 + l Vi = s $R V0 GB + GB sRC = 2 1 b + GB + s GB s s 2 Vi = 1 s s RC $ + + b l ~l 0 - sRC b1 + GB ~0 Q ~02 + = - sRC s s 2 ~0 GB ~ GB = b1 + ~0 Q + ~ l s s2 2 0 sRC b1 + ~0 Q + ~0 = 2 s s V GB ~ ~0 b1 + ~0 Q + ~02 l pp ~0 Vp Vpp ~ GB ~0 ~ GB Transient response - Apply the wave Vpas $ T an input to integrator, vary Vp square Vpp V pp = GB ~ Vpp value the peak amplitude of the square wave and the peak to peak RC 2 $obtain Vp $ T Vp pp = T f 1 = of output wave. Vpp is directlyVproportional to peak voltage of input Vp and is 2 $ RC $pT , where T = 1 f , f being the input frequency. given by Vpp = VpV 2 $ RC Vpp = Vp $ T 2 $ RC V T $ f p T = 1 f Vpp = T 1 = RC $ 2 Figure 3.4 shows sample output waveforms obtained through simulation. f f T =1 f f f
V0 Vi =

C1 R1 + U1 VF1 C2

R2

VF2 U2

3.5 Exercise Set 3 - Grounded Capacitor Topologies of Integrator and Differentiator


Determine the function of the circuits shown in Figure 3.5. What are the advantages and disadvantages of these circuits when compared to their conventional counterparts?
C R R R R VO = 2VI/SCR C VI R R R VO = sCRVI/2 R

experiment 3

VI

Figure 3.5: Circuit for Exercise 3

Notes on Experiment 3:

Figure 3.4: Outputs of integrator and differentiator for square-wave and triangular-wave inputs page 30

Analog System Lab Kit PRO

Experiment 4
Design of Analog Filters

Chapter 4

Analog System Lab Kit PRO

page 31

0 0 0 0 2 V02 i s ~0 s 2 Vi s 20$ H as k Vi = 1 a~ -s -0H02$ ~ k s s 2 V02 = V02 ++ b1 + 2l 2l V ~ 02 0 0 Vi = b1 + ~0sQ + ~ + + b l H $ 1 s 0 b l 2 Q ~ ~ 0 0 V 0 2 i C l s s = = Q ~ ~ 0 0 + ~ b1 + ~0 Q 2 0 V 1i + 04Vi +~ bV 2 2 s C 2s s 02 l s 2 ~02 = Q ~ s 2 s 0 1 1 + + + + b l b l s V i + s ~02 0 0 b1 + ~ b1 2 l $ Hs ~0 Q ~02 0Q b1 + ~02 l $ H0R s02 l $$ H + b1 ~ 0+ V04 2l V04 s2 ~ 1 0 + Q ~ 2 2 b ~ V 0 0 04 2 l H2 H $ 1 = = b + ~02 l s0 2 s R = V04 i s~0 s Vi s b1s+ b1 + ~02 l $ H0 s s 2 V04 = V04 + +1~ 2 l~02 l $ H0 Vi b1 2l R V 1 Vi = b1 + ~0sQ + ~ + + b s 1 ~ Q 2l ~ 0 04 0 0 V 0 i s s2 2 = = ~ ~ 0Q 0 2 b1 + ~0 Q + ~02 l 2 Q 1 R + +~ b V V 2l i i s s s s2 Q ~ 0 + 1 1 1+ b1 + ~0 Q + ~02 l b0 2l 1 H Q BPF ~0 1 1 0 ~ 0 Q ~ ~ 0 0 2 2 1~ 0 1 LPF 2 2Q 1HPF 2 Q ~0 1 - 2Q 2 1 ~ 1 0 1 10- 1 H0 Q 2Q H0 Q ~ 1 2- 1 2 ~0 2Q H0 Q 4Q 2 2Q 2 2Q H0 Q1 H 0Q 1 1 - 12 1 - dz2 H0 Q H0 Q 1- 1 2 4 Q 4 Q 4Q 1d~ 1- 1 2 1 1 R 4Q 2 dz 4Q dz 1 12 dz R ~ ~ 0 4Q = 4Q 2 z d dz ~ d d~ ~ d z z d d d~ 2Q d~ ~ ~ = ~0= ~0 QR ~ = ~0 d0~ d~ ~ ~ = ~0 ~ = ~0 - 2Q - 2Q ~0~ = ~0 ~ = ~0 2Q -BSF 2 ~ ~0 0Q - 2Q ~0 VI ~0 H0Q2Q ~0 - 2Q ~0 ~0 0

2 N 2 N 20 = 1 RC ~ 20 = 1 RC ~ ~ 0 = 1 RC H 0 = 1 RC ~ H0 0 H 0 Goal of the experiment V03 +H H 0 V H0 03 = 0 + 2 V i s Low Pass Filter V H0+ s 03 = + 2 1 V + i b s s = V H0+ ~0 03 + 2l To understand the working of four types of second order filters, namely, Low 2 Q V i = b1 + ~0 s s 2l 2 Q+ Pass, High Pass, Band Pass, and Band Stop filters, and study their frequency Vi 1 + ~0 0 s s b 2l 2 ~ ~0 Qs+ b1 + 2 ~0 characteristics (phase and magnitude). ~00 $Qs 22 l~02 l bH 0$ ~ bH s0 V01 2l 2 H0 $ ~ s0 b V 01 = 2l 2 V H $ ~ i = 02 l s 2 b 0s ~ V High Pass Filter 01 1 V + + 0 i b sQ ~ s 22 l V 01 = V + i = b1 + ~0 s s0 2l 2 Q+ ~ Vi 1 + ~0 02 l s s b 4.1 Brief theory and motivation s ~02 l ~ 0Q + b1 + H N 0$ s ~ ak0 ~ 0Q V H 02 0$ ~ a k s0 N22 = V ~ N 02 H $ N 0 0 a ks 2 s N Second order filters (or biquard filters) are important since they are the building V i = s V H 02 0 $ ~0 k a N N N 1 V N 2 2 in the construction +0 ~ N 2 2of N order filters, for N 2 2 . When N is odd, the N order i = b + sQ ~ s2 V 02 2l Band Pass Filter 2 blocks V + i = b1 + ~0 s s0 N22 2l N 2 2 2 1 second -2 N Q ~ ~ V 1 0 0 filter can be realizedN using N N order filters When i + ~sQ b N2 2 2 N and one first order filter. 2 + s 2l 2 N 1 ~ s + + 0 0 b N 2l 2 Nis 1 even, we need N - 1 second order filters. Please H $ 1 Q ~ ~ N lecture 0 + 0s N - 1listen to the recorded 0 b l NN 2 2 1 for a detailed explanation N2 2 ~ N-1 b1 s0 V04 at [19] 2 l $ H0 2 N - 1of active filters. 2 2 ~ 1+ 02 l $ H0 + s b V N2 2 N-1 N 04 = N 1 RC ~ =2 V 1+s 2 ~02 l $ H i = s02 b+ V N 04 2 2 N 2 1 ~ V + 0 i b s s2 = V 04 2l N N Second order filter can used types of filters. 2 = 1 RC H 2 ~ 2 The transfer RC to construct four different ~ be =1 Q ~ ~ 1 V 0 0 + + 1 RC b l i ~ = s s Band Stop Filter = 2 2 types are shown in Table 4.1, where ~ = 1 2RC and ~ = 1 RCfor the different filter Q ~ ~ V 1 functions i + ~0 sQ + ~ s 02 b V ~ 1 RC +H 2l H H ~ = 1 RC = = H 1 + ~02 l 0 b +1 V of the transfer s s function. The filter names H is the low frequency gain H are often ~ 0Q 0 ~0 1 - 1 b1 V V H+ ~ Q + ~ lV +H + 2 HFilter), H Filter), H (Band Pass + = = 2 Q 1 ~ abbreviated as LPF (Low-pass HPF (High-pass Filter), BPF 0 1 = V H s V + 2 s s s V H + V s s ~0 1 - 2Q +~ b1 + b1 + lsHl we 12 V~ V = + ~ Q +a~ b1 describe l s l bH ~ sQ + Q+ ~ $+ and BSF (Band Stop Filter). In this experiment, will universal V = V active sH = = s ++ 1 ~0 H Q Q -2 ~ 0 Active b1 + l Table 4.1: Transfer functions of Filters V 1 2 + b l V V s s s s Q ~ provides ~ all the four = Q ~ s ~ s 2 Q H Q 1 1 0 + + + + b l b l filter, which filter functionalities. Figure 4.1 shows a second s V bH $ s~ bH $ ~ l l s Q Q ~ ~ ~ H $ b l s 1 H Q + + b l ~ 0 V 1 s ~ there are different ~ Qintegrators. b H $ ~filter l V realized ~ V order using two Note that = bH $ ~ l s 1H 0 Q1 2 V = universal s s V s s H $ ss l V = V b bH $ ~ l s s = 1 1 + + 4Q 1 b l + + b l = ~ 12 outputs of the circuit that realize LPF, HPF, BPF and BSF functions. V ~ Q aV H $ 1 k V + + b l s s Q ~ ~ ~ V s s = V V = ~ ~ Q ~ 4 Q 1 b1 + ~ Q + ~ l 12 1+ + bV l s s s s = s s ~ 1 4 Q z d Va- H $b1 + + + ~~ +~ l s s~ l b1Q s H $ a k k Q Q 1 ~ H $ + + b l a k s V ~~ Q ~ V 4Q 2 dz s ~ a- H $ ~ k V = = a- H $ k s s
th th th th th th th th 0 0 0 0 0 0 0 0 03 i 0 0 0 0 03 2 0 0 0 03 i 03 i i 0 2 0 0 0 2 2 0 0 03 i 0 0 2 2 0 0 0 0 2 2 0 2 0 03 i 0 03 0 01 i i 0 2 00 2 2 0 0 2 0 2 0 03 i 2 0 01 01 i i 2 0 2 0 2 01 i 2 0 0 2 0 2 2 2 0 2 0 2 0 2 0 2 0 01 i 2 0 2 0 2 0 0 0 0 2 0 2 0 0 02 i 01 0 i 2 00 2 0 2 01 i 2 0 0 2 0 2 0 2 0 01 i 2 2 0 0 0 02 0 02 0 2 2 0 0 02 2 0 2 0 2 0 0 2 0

experiment 4

z d~ z d~ d~ ~ 0 =~ d~ ~ ~0 = ~ 0 = Q~ -2 ~ ~0 = 2 Q -~ 20Q -~ 20Q -~ ~0 0 ~~ 0 0 ~ 0 H 0Q ~ H0 Q
0

H0 0Q kHz ~ =1 H 0Q ~0 1 kHz = ~ 1 kHz =1 Q0 ~ 1 kHz =1 Q0= =

H0 Q H0 Q ~0 = 1 kHz ~0 = 1 kHz Q=1 Q=1 ~0 = 10 kHz ~ 0 = 10 kHz page 32 Q = 10 Q = 10 f = 1 kHz

~0

H0 Q

H0 Q QH 1 =0 Q ~0 = 1 kHz H0 Q ~0 = 1 kHz ~0 = 1 kHz kHz 10 0 = Figure 4.1: A Second-order Universal Active Filter Q= 1 ~ kHz ~ ~ 1 0 = 0 = 1 kHz Q=1 Q=1 QkHz 10 = ~0 = 10 Q=1 Q=1 ~0 = 10 kHz ~0 = 10 kHz 1 kHz Q = 10 f = ~0 = 10 kHz ~0 = 10 kHz Q = 10 f = 10 kHz f = 1 kHz Q = 10

R/H 0 ~ 0 ~0 = 1 kHz ~0

~0

H0 Q

~0

~0 ~0

= 10 Q =1 f kHz = Q 10 = Figure 4.2: Magnitude and Phase response of LPF, BPF, BSF, and HPF filters f= kHz 1 f kHz 1 f= kHz 10 kHz =1 f Analog kHz 10 System Lab Kit PRO f= 10 = 4 $10 Vp kHz f= kHz

Q0= ~ 10 kHz =1 Q0= 1 ~ 10 kHz = ~ 0 = 10 kHz Q0= 10 ~ 10 kHz Q =10

00$ 0 b1 + ~0+ l 02 = + b1s+ l a- H k0 Q ~ Q 02~ 00 00 = Q ~ ~ ~ 1~ 2 + ~sN l N V02 Q 2 ~ s 2 ~02 02 Vi Vi b1 s + s Vi = ~0 Q N s ~ N22 N th ~ 0Q 0 s0 2 2 2 N 1$ + + b 1 H + + s s 2l 0 l V H 2l b l + 2 03 = 0 + 2 s b1 + 2 2 s $ V H 0 k 03 0 + V s i = 2 a- H Q ~ s s ~ s 0 0 2 Q H $ ~ ~ 0 a k 0 ~ 0 H $ 1 ~ 00Q V 0 0 + b l 01 H $ V 0 2 l ~ b l 1 N 2 = 02 2 0 s H $ 1 2 0 a k H $ 1 + + b 2 0 + l ~ V02 b Vi = 2 0 04 s s0 ~0~0 = N N22 Vi V02 s0 $1s 2s V01 0N ~ 2V b ls Q+~ 0 RC ~02 s 22 b10 + sH 10 ~ 2= Vi =~ 2Vi V01 sQ s 22 l V04 = + = b ~ = 0 $ H + 11 RC ~1 22 ~ 0b = 2 l2 Vi = s 1 0 + Hs l20lQ 2 + ~02 l + b10 + 2 0$ 2V ii b l ss ss 22~ V ~ b1 + ~ V 0s 2 i s = 1 V s + + i b l s s 2 Q N-1 2 ~ N Q ~ ~ 0 2 ~ 0 0 1 V 0 ~0 Q2 ~00 + V 04 V01b1 + ~0+ 1+ N 2$ H +~ l H b l i2 s 2l b1 + 2 + l 02 bb1+ sl 2~ 00Q 00 = = ~0 Q Q 1s RC ~ Q +~ ~ ~ 0 = Q ~ ~02 s 0 2 0 + + b1 l 2 0 2 V04 H0 b H0~ 2 $ V H i 0 Q~0 Q s s V 2 ~0 s i s 2 2l H $ s 0 b l ~ 0 2 N-1 2 s + a01 k+ ~ ~l 1H 0 $ H0 +0 $ ~Q b V 2 ++ 01 = b1 l 2 b1 + s 1 H0 $ Vs 0l s V V H i sH V03 02 02 k b1 0 N ~ 1 2l$ 000 b H 0 0 l $ H0 ~~ ~ 0Q V H ~02 + + ~ 03= 1~ RC ~ 0 0 1 - a-2 1 s V 2 l 0 =1 + 04 = b1 + 2 = 2 = 0 2 1 ~ V 2 04 V 2 i = ~ s s 20 V 1 02 = H a iV 20 $ s k s s ~0 s s 2 Vi 0 022 VV 04 sQ 2 l 0Q + ~ s s 2 0 Q2 1i + ~ = 2Q bV i 4 Vi 1 2 + 0 l s0 +~ +~ b1 l = 1Q + 2H b1 + ++ N b0s l Vi = 2 2 s0$ s V s V 2 Q + ~ 03+ 0 + s 0 Vs a- H ki2 l 0 Q1 1 1~0= H b ~ b1 + 1 2l Vi0 0 2s 0 s 2 Q ~ ~ 2l ~~ ~02 H 0 0Q V02 + ~ = ~0 2H 0 = 1 RC + + b l Q ~ V ~ 0 Q b1 + 0 2 Q 0 i 2d s s 2 z ~ ~ 0Q 0 1 + ~2 l b l s 2 ~0 Q ~02 ~0 1 i + s s2 ~0 Q ~0 b1 + s 2 V 2 s2 +s ~02 0Q 1 and Vi = 1 H s BPF, s 2 Q + ~2l 0 $ and ak phase b0 V03 H0~shown ~ The magnitude response of LPF, BSF, HPF filters are in 0Q H 0$ + s 1 H Q a k 0+ 2 ~ d 1 1 H $ 1 H 0 H 1 + V 1 RC ~ ~ b l Q ~ b l 0 + + 02 0 00 $ = b l 0 2 0 = si V 1~0 Q ~02 4Q1 V V02 1 0 $ ~0 l 2 bH 1V ~0 = 2 ~02 s ~02 1 2 04 $H ~ 01 s~ s2 0 0 41 2 b + peaks = ~02 21 Q 2 Simulate the circuits and obtain the Steady-State response and Frequency 2l V 2 011 2 Q ~ Vi H0 Q Figure 4.2. Note that the low-pass filter frequency response at 0+ 1 = 0 s s = = 1 s ~ 2 2 Q + V b l 0 i H s s $ 1 V 2 2 0 + 2 2 04 b l = 1 2 V03 1i + H0 z = + H0 Vi V042 + s 2 l sdz bV s2 b1 s d Q ~V ~ b H0s$22l 0 0 s2Q + + ~ 2l 0 iQ s 4 ~ 0 Q1 0Q 0 + H $V + + b12 l ~ + ~~ b1 Q V 20 H0 Q b1 + ~02 l d 2l 0 2 1H i0 01+~ s s 1 +~ b l0 response. = Vi = Q ~s 2 s s2 2 Q H ~ 02 0 ~ 0 Q~ 0Q 0 V = 1 04 2 + + 4Q b l ~ V ~ 0Q 0 i 2 s s 2 1 ~ d V H 2 + + ~2l z d 03 0 + b s 1 V H = i + s l s s ~ 0$ ~ l 0Q 0 b 1 2 + 2 b 1 ~ Q = ~ 0 0 0 2 H $ 1 . The phase is 1 maximum at and hasb a value equal s to 10 + l H 1 i1 ~~ s ~ s +$ ~ ~0 sensitivity b H0Q + ~ 2 l 0 0Q =l +~ V01~0 d1 b1 1 z d04 Vi s s2 2 ~ 0$ ak~ =V 0 4 Q 2 ~02 V 2 +~ b1 0 H002$l s 0 k = ~ 2 2~ 4 Q+ 1 1 04 2 1 - 2 a+ + b V ~ s ~ 02 0 2l 0V = ~ 4 Q 2 Q V 0Q 0 ~ V 02 0 i s s 2 Take the plots of the Steady-State response and Frequency response from the ~2 = 0 ~0 Q ~0 b H0 $ 2 l ~ d 1 = 22 s V i s 2 z d Q 1 - 2Q 2 ~ = 0 1 =1~ + ~ 2 l ss a- s V b i 2$ z V ~ 0 + 2d Q ~0 s s V01s 2 1i + bs H V +~ 0l k b0 i z b s2 Q d H Q0 ~ 2l 0 0H 1 + + 1Q 2 Q 21 Q0 + +~ ~ V and is given . This information phase variation can be used ~ =~ ~0 2 l~0 02+ 0 oscilloscope and compare it with simulation results. 1 0 by ~ + 0 about b l d~ 1 Q ~ ~ 2 0 0 H Q H $i = 2 ~0 Q 0 0V ~ 0 b d~ 0 = s s2 2l Q ~ ~ -2 0Q 0 s 2 2 Q ~ d 1 ~0 b1 + H Vi 1 V01 0Q s s + ~2l H $ kHz 2 a desired frequency ~0 . This is demonstrated 0 in a k 1 filter s 1to tune to the next ~ ~ = 2 th 0 = Q~ 2 1 1 -02 = ~ 1 + + ~ 0Q 0 b l ~ ~ 0 ~ =H V ~ 0 0 02 2 2 10 0 ~ s - the N 0Q 1~01 ~= ~0 Vi 1~0 Q ~0 s s 2 = 1 4Q 2Q 2 b1 + ~02 l $ H0 + b 21 2 l $ H0 2 Q 1 s 4Q 2 Vi d +input + b Frequency Response Apply a sine wave input and vary its frequency experiment. s s 2l ~ H ~ 0 0Q 0Q 2 2 20Q V04 = V 3 1 04 -~ th = z H $ 1 Q ~ ~ 0 a k H Q 0 0 2Q 0 4Q + b1 + ~ N2 2 N = H0 Q 2 V02 H Q~02 l s b1 + ss2 2 l $ H Vi 0Q ~~ s s 2 -~1 - 4Q 2 dz Q 0 0 0 0V i to obtain the phase and magnitude error. Use Table 4.2 and 4.3 to= note your ~0 2 s d~dH ~2 b1 + ~0 Q + ~ 0 0l ~0 = 1 kHz Q V z0~ 2l 04+ 1 + b 0 = 10 2 V ~0kHz H 1 s s ~ 0i $ a k 00 = 1 kHz 1 N N 2 2 = ~ d s ~0 0Q ~ ~0 b1 + - 4Q + 02 d H0 Qthe 2 01 10 Vi0 2 ~by ~ H 1 ~ The nature of graphs should be as shown V above. For bandpass filter, the magnitude response peaks at ~ = and is given 0 + s2 0z b l $4 ~ d~ 2 = ~0 Q ~02 l ~ 2 Q 1 Q 1 b1 + s + readings. kHz 1~ = 0Q = 0 1 10 V = ~ ~ 04 2l 0 = V i s s Q 1 = N - 1 + 2l s2 N d~ ~0 Q ~0 1~ 0 = H ~ ~ 0Q b1 + 2 0 The bandstop response .s0 1 kHz ~ dz 0 =. 1 2 2 Q= ~d H0 Q a null magnitude 2Q 2 filter shows Vi at ~ H 0 Q s 2Q ~ 2 0 Q ~0b1 + ~02 l $ H0 Q 1z 02 = = f= kHz 1 1+ ~ 10 ~ Q10 kHz + 0 = b 1 kHz ~ 2l 0 = 1 N V ~ ~ d 04 0 2 Q ~ ~ 1H0 Q ~ 0 d~ ~ 1 kHz 00 2 Q =1 Q0= 2 s H Q 0 ~0 = 1 kHz N ~kHz 0 kHz = 1 kHz 2Q b1 + ~ l $ H0 Q~ Vi02 = 2 10 =0 10 0f s s2 = 10 2Q ~0 ~ ~ = ~0 Q 10 ~ = ~ ~ 0 = 1 1 0 1 = V04 2 b1 + ~0 Q + ~02 l Q0= ~0 1 H ~0 kHz 10 1 ~ 0Q - 4Q 2 =1 Q~ 2 1 = =0 1 N 2 2 Q 1 2Q f = 1 kHz Q 10 Vi 0 = s 1 RC s 4 VQ $2 p = 4Q H0 ~ Q ~0 = - 2Q f = 1 kHz 1 + ~2l 1 2 b1 + kHz 10 ~ 0= = ~ H0 Q Q~ 10 H0 Q 1kHz dz ~ ~~ - 4Q 2 00 = 10 kHz 0Q 0 $H $ 0Q r1 0 1 z d 0 0 10 ~ = ~ f kHz 10 0 H Q f kHz = 0 = ~0 = 1 kHz H0 Stop - 2Q 2 ~0 = 1 RC Band f = 10 kHz Band Pass d~ 1 Q 10 1 V =1 p H Q ~ kHz ~ 1 ~ d f0 kHz 0 0 = = Q = 10 ~ 0Q 1dz H0 Q + H0 = 10 4 $ Vp kHz ~4 f kHz 10 01 =2 1 Q= Q V03 H0 ~0 1 - 2 Q2 ~ = ~0 4 $ Vp ~2 ~d 0 = = Phase Magnitude f0 kHz $r ~0 H $ 10 ~ 4 rad/s S.No. Input Frequency Phase Magnitude = = kHz ~ 1 H Q1 Q kHz 10 0 = = H Q $ $ r f kHz 1 01 1s Q = 0 V i s2 dz r $ H0 $ Q H0 Q 41 $V p f = 1 kHz kHz 10 ~0 Q V03 == +4~ + H0 1 b12Q 2Q ~ = ~0 Q02Q + ~02 l V p 0 = 10 kHz d~ = f kHz 10 H 10 = 0~ = Q 1 kHz ~ 1 ~ 4 V $ 2 = 0 = p V H Q $ $ r p f kHz 10 0 kHz 1 1 = Design ~ a0 Band Pass and a Band Stop filter. For the BPF, assume and Vi f= 10 kHz 1 = kHz ~0 = 100 ~ 2 1+ - 4s 0 z ds 2 b1 4 Q = 10 $H r4 2Q rt i 0.1 sin _200rt i 0$ Q Q 4 0p =~ rad 2 $ .r $ 10~ /s V 0 = = 10 Q + ~02 l b H0 $ s 2 l ~0 p For kHz 10 ~4 Q 1.~ Q 0 i= =$ V t~ sin 100 y_ Q the BSF, assume and _ =4 + rad 2= /s ~ ~0 = r $ $V 0 1 p $ 10 0 ~ d ~ V $ p~ 0 Vs Q1 10 012 = 0 V p $ H0 $ Q f= kHz dz r 4 = H010 $Q r H 10 20 r $= r $ 10 =1 Q$10 ~0 = 10 f0= kHz - 2Q ~0 =~ Qrad/s $H b H0 $ V l = ~0 s = 0 $kHz H0 = H0 kHz Q i 2~ s2 2 ~ 0 H 0 Q 10 ~ d ~ 0 Vp0 = 2 1 V f kHz 1 + + 01 = b $ r $ 10 4 rad/s ~ ~f 2l 0 = 10 kHz Vp = Q ~ ~ V 0 0 p200rt i 2 H0.1 10 0 = sin ti y rt i + _100 _ = _sin f= 1 kHz Q = 10 f_= kHz 10 = sin Vi ~ = ~0 s 2 Q ~ s 0 = 1 kHz Q 10 4 _ i 200 t t t 100 0.1 sin y r r _ i i = H + 0Q kHz ~ 1 0 = ~ 0 4 rad s 2 10 / $ ~ r $ b1 + ~ Q + ~ H0 0 = 10 4f $= Vp 10 kHz 4 ~0 = 2 $ r $ 10 rad/s H $ s ~2 l rad 2$r 10 /s _ ~ 0 = 3 if 200rt i sin sin y0_$tQ rt$1 _100 i = + 0.1 f = 10 kHz f = 1 kHz 4 $ Vp Q=1 - 2Q 0 V02 s= 00 a- 0 ~0 k kHz 11 = kHz ~0 = r$H Q = H 0Q H_ 10 0t 4 V = $ p ~ i= 200 t sin _100rt i + 0.1 sin _H y r 0 i 10 0 = r $ H0 $ Q $i k 1 ~0 a- H0 V s s2 H0 = 10 V 4 $ Vp f = 10 p r $ H0 $fQ V02 ~kHz ~0 b + + ~2l 0 = 10 kHz kHz 10 = Q 1 = kHz 10 ~ 0 = kHz ~ 1 0 = = Q ~ 200 t isin _100rt iV y _ t i = sin _100rt i + 0.1 sin _ r 0 0 p 0.1 sin _200rt i Hs 2 0Q 4 _t y = + H $i r 0$ Q Vi ~0 s _ t4i p 2 $ r $y = sin rad 10 /s _100rt i + 0.1 sin _200rt i ~0 V 4 $ VQ = p = 10 b1 + ~0 Q + ~02 l 4 $V p ~0 = 10 kHz s2 $ H 4 = 1 Q 10 = Q V ~ p 0 = 2 $ r $ 10 rad/s 1 kHz ~ 0 H Q + b l 0 = 0 2 4 r $ H0 $ Q H $Q r$ $r ~0 2 /s $ 010 0 = 204 H0 ~ 10 = f = 1 kHz Q rad sV Steady State Response -2 Apply a4 rad square wave ~ input (Try and = 10 f = 1 kHz = kHz 0 = 10 /s $ r $ 10 ~0 = V1 H p 0 = 10 $ H= 11 Table 4-2: Frequency Response of a BPF with ~0 = ,Q kHz 0 1 + b V V s s2 p 2il H ~0 0 = 10 V04 b1 + ~0 Q + ~02 l i t t= 100 0.1 sin _200rt i y _10 r _ i+ f = 10 kHz to both BPF and BSF circuits and observe the outputs. = sin f kHz 1 4 f kHz 10 = = Q = 4 2 H0 = 10 ~0 = 2 $ r $ 10 rad/s 10 kHz sin y _ t i = sin _100rt i + 0.1 rt _200 Vi Q = 1 s ~0 2$r 10 rad/s ~ $i 0 = s= 100 0.1 sin _200rt i y _ t i = sin rt10 i+ b1 + ~0 Q + ~02 l 1 4 $ Vp kHz Vpf = f= kHz H 4 $_10 1 1 ~ 0 H0 = 10 Q 10 _ i 200 t t t sin 100 0.1 sin y r r kHz _ i _ i 10 ~ = = + 0 = 0 = 2Q 2 r $ H0 $ Q Band Pass output will output the fundamental frequency  of the $ H0 $ Q4 r 1 $V p f kHz 10 = 1 ~ 0 H Q1 kHz f0 Vpsin _100r t i + 0.1 sin _200 Q =2 y_ t i = rt i 10 = _pt i = r sin V _100 square wave multiplied by the gain at the centre y frequency. The Q2 $H $ Qrt i + 0.1 sin _200rt i 0 1 kHz 4 H Q f f kHz ~0 = 2 $ ramplitude $ 10 4 rad/s at this frequency is given by 4 $ Vp , where 1 0 = = 1 is therad/s V$p r - 410 ~0 = 2 $ 10 Q2 r $ H0 $ Q Band Pass Band Stop 110 kHz 4 $ Vp H0 = 10 peak amplitude of the input square wave. Vp f= 1~0 = 2 $ r $ 10 4 rad/s H0 = 10 dz 4Q 2 S.No. Input Frequency Phase Magnitude Phase Magnitude  ~ r $ H0 $ Q d 4 4 V $ p y _ t i = sin _100rt i + 0.1 sin _200rt i H 10 0 = dz /s ~0 = 2 $ r $ 10 i= sin _100rt i + 0.1 sin _200rt i y _ trad Vp H $ r 0 $ Q ~ = ~0 The Band Stop filters output will carry all the harmonics of the  d~ 1 t i + 0.1 sin _200rt i y _ t i = sin _100r H0 = 10 4 p square wave, other than fundamental. This illustrates the application Q0 = 2 $ r $ 10 rad/s ~=V ~ - 2~ 0 y _ t i = sin _100rt i + 0.1 sin _200rt i ~0H40 rad /s = 10 of BSF as a distortion analyzer. - 2Q~0 = 2 $ r $ 10 2 ~ 0 ~0 H0 = 10 y _ t i = sin _100rt i + 0.1 si H0 Q ~0 2 Frequency Response - Apply the sine wave input and obtain the magnitude y _ t i = sin _100rt i + 0.1 sin _200rt i 3 and the phase response. ~0 = 1 kHz H0 Q

4.2 Specification

4.3 Measurements to be taken

~0 = 1 kHz

Q=1
~0 = 10 kHz

Q=1 Q = 10 f = 1 kHz f = 10 kHz

Table 4-3: Frequency Response of a BSF with ~0 = 10 kHz , Q = 10

Analog System Lab Kit PRO

f = 1 kHz page 33 f = 10 kHz 4 $ Vp

experiment 4

Frequency Response of Filters

4.4 What you should submit

experiment 4

4.5 Exercise Set 4


1

Q=1 H0 Q Q=1 ~0 = 10 kHz ~0 = 1 kHz ~0 = 10 kHz Q = 10 Q=1 Q = 10 f = 1 kHz ~0 = 10 kHz f = 1 kHz f = 10 kHz Q = 10 Higher order filters are normally f = 10 kHz 4 $ Vp designed by cascading second order filters f = 1 kHz $ Q Design a third order Butterworth Lowpass r $ H0 and, ifp needed, one first- order filter. 4$V f= kHz 10 V p Q $H $ r Filter using FilterPro and obtain the frequency response as well as the 0 4 Vp 4 $ Vp response of the ~ rad/s $ r $ 10 0 = 2The transient filter. specifications are bandwidth of the filter r $ H0 $ Q ~0 = 2 $ r $ 10 4 rad/s and H0 = 10. Vp H0 = 10 y _ t i = sin _100rt i + 0.1 sin _200rt i ~0 = 2 $ r $ 10 4 rad/s Design a notch filter (band-stop _ i t t sin 100 0.1 sin y r i+ _ _200rt i filter) to eliminate the 50Hz power = H0 = frequency. 10 life In order to test this circuit, synthesize a waveform y _ t i = sin _100rt i + 0.1 sin _200rt i Volts and use it as the input to the filter. What output did you obtain?

~0 ~0 = 1 kHz

H0 Q

~0 = 1 kHz

Related Circuits
The circuit described in Figure 4.1 is a universal active filter circuit. While this circuit can be built with OP-Amps, a specialized IC called UAF42 from Texas Instruments provides the functionality of the Universal Active Filter. We encourage you to use this circuit and understand its function. Datasheet of UAF42 is available from http://www.ti.com. Also refer to the application notes [7], [11], and [12].

Notes on Experiment 4:

page 34

Analog System Lab Kit PRO

Experiment 5
Design of a self-tuned filter

Chapter 5

Analog System Lab Kit PRO

page 35

Vyy l V = V V cos z 2V V y r # Vx RC V y V r dV r # Vx x RC # V #K V+ =p V =RC V + KV#= VV V# K+ V# V+ p #K #K #V + K+ +V +K d V V r x V # y# r =V V V # V K Vz+ K # V + K # V # V + p r x # + K V p K p K #V +K #V + # VV # V y r p V =V + y# r + V through the low-pass Vy Vrrp the z # filter, V p passing c r # = 90 V V After high frequency component gets y Goal of the experiment V r V r V only the average value of V V out and filtered output V remains. V RC r 0 = V x # Vy Vr V r V #V V0 Vyy ~ Vrr V #V V x = VV The goal of this experiment is to learn the concept of tuning a filter. The idea x#K V =V 0 +K #V V+ # V #V +K #V #V +p is to adjust the RC time constants of the filter so that in phase response of V V V V V #VV# V V # V # 0 x y = l V V V Vy ~ Vrr = V 0 = Vxp #p (5.3) p l p V V #p 0 = V pV pV cos z V $ RC V V # a lowpass filter, the output phase w.r.t. input is exactly 90 at the incoming V V V cos z 0 = 2 V r 0 V l d~ ~ 1 V p p 2 V frequency. This principle is utilized in distortion analyzers and spectrum V r p Vr pl cos z= V =VV # V VV = V # V V V 0 V RC = V dV V cos z dV 0 = = av V V V V #V r analyzers, such self tuned filters are used to lock on to the fundamental = dV Kpd 2 V pd = 2 V =V V V Vl r av dzV av l #V = cos z K V = V V cosV z (5.4) pd = dz V V # frequency and harmonics of the input. 2 V l V V dV 2V V V l dV av z d= V cos z dV av V = cos z dV V # V K pd = 2 V z z d d K dV pd = ~ d 2 V K = pd K = d dz dV dV = d~ $ dV K pd z dz dz pd K = V K = dV K K is called + H in Volts/radians. dz K the sensitivity of the phase detector and is measured pd c dzV 90 zVpd = K V =Vz V 90 # Kc V = s s 5.1 Brief theory and motivation = c K 90 z = z = 90c b1 + ~ Q + ~ l l V V c c 90used zc = is 90 z = Vav av cos 0.= This to tune the voltage controlled For 90 =z V z = 90c , V becomes V ~ 2z Vinformation V av b~ Q l V In order to design self-tuned filters and filter (VCF) automatically. The voltage-controlled filter, along with phase detector, is ~ ~ V z = tan V av K = dV ~ 0 V av ~ ~ other analog systems in subsequent called a self-tuned filter. See Figure 5.2. of the VCF is given by z0 d ~ ~ 0 d1 - b ~ ln ~ = V K ~ = V V $ RC experiments, we need to introduce V V $ RCV ~ 0 VccV $ RC ~ = ~ dz ~ d~~ 1 V ~0 0 = one more building block, the Analog c d~ ~ = 1 90~ = c V $ RC - 2Q ~ = V RCz = = = 0 = $ V RC d~ = ~ r V dV 0 ~ d 1 dV d~ V RC 1 V ~ V multiplier. The reader will benefit $ c V RC = = r V V r c = = V dV 1 V RC dz dz ~ ~ 0 dz dV V V RC ~ ~ d~ 0 = = 0 V $ RC Q V - 20 =~ from viewing the recorded lecture at Therefore, ~ dV z$ RC dr dV d 1 0 0 V = r dV dz 0 = 0 Figure 5.1: Analog Multiplier = = V V RC dV c RC PRO, we have used to [21]. In ASLK r dV V =0 dz dz d~ dz dV dz d~ ~cc ~ d 1 V Vcc0 0 Vrr 1 RC dV = d~ $ ~ ~ ~ c 0 = = Vd = d~ $ dV = dV dV z z d d MPY634 analog Texas d~ 0 V = V multiplier V +K #V #V +p $ RC + K # V from +K # RC dV z z d d = = 1 kHz z d ~ d RC $ = V RC dV r c z d Vc Vr RC dV dV d~ dV V c + ~ ~ dH 1 c Instruments. the symbol of an analog multiplier. V dV = d+ H$ = ~V dV V = V +p K Refer V +to K Figure K # which V # V shows p # RC # V + 5.1, + RC = = Q = V V K V K V K V V p # # # # = + + + + dV V c s s H RC V V RC dV + V V s s z d H 1 + dV b + dlz c +~ Q+ +~ l ~d b1 c = V V = V +K #V + Q p V = K #V V KV V+ #V+ #K += V s $sQ $+ z ~ dz V + K # V + Kp# V # V + p RC #p s VCFsis +H b1Now z dz The V sensitivity of radians/sec/Volts. ~ d 1 + + l b dV c ~ Q0 ~ l ~ z d d ~ dV dV (5.1) V V K V K V K V V p V ~ Q ~ c # # # # 0 offset x x y y 0 x y = + + + + V ~ d $ p 0 = b~ Ql RC V = V p+ K # V + K # V + K # V # V + p 0 b~ Ql ~ dV d c d= 0 $ dV c~ l z dz d ~ ~ d tan z= z z d d b~ z = tan VV# V ~ d V 0 Q ~ dV dV $ b l z z d d c 0 c = V = K #V +K #V + K # VV# V + p + V p ~ d c 0 c ~ 0 ~Q ~ ~ dV dV dn p = z = tan$ dV d1 - b ~ ln d1 - b ~ ldV z = tan V H 0 c = d~0 $ + 0 ~ V a#non-linear V # V p is V c term in V and V . For a precision multiplier, V # V and where V H d~0 + ~ V H + dV dV 0 0 c c = d1 ln 2 0 1 = d n l b dz ~ V i = s H00b ~ s s2 V s s dz VxV V # V #V,V where isVthe reference ofVthe multiplier. Hence, for 2 V# V precision #V V voltage Q ~ 2 1 V = + + l b 0 + i s 1 Q ~ 2 +~ =V i ~ Q bd~ V H 0 0+ + 2l d~ z d ~ = d z 1 + + b Q ~ 2 0 0 Q ~ 2 amplifiers, . V# 2 = = #V V V 2l V V =V 2 Q ~ 2 V V #V V #V = V i s s d ~ ~ Q ~ ~ d z 0 0 V d z i s s d ~ 0 0 V y b l Q V 2 1 = + + l b - 2Q V V V l cos z 1 ~b Q V =V # V= V + dV dz+ ~0 Q~ r ~02 VV #V 2l V = V # V V dV = V #V V dz z = tan Q V 2 ~ = ~ Q ~ r 0 0 b l 2 V r Q V In Experiment 4, if we replace the integrator with a multiplier followed by integrator, ~ dV l# 0 = - 2V = 0 V Vx b~ ~ dV = V #V V 0 Ql VV Vz V r # V = V #V V V l cos z V = V d1 - b ~ l n1 V =V cos dV ~ V =V r 0 0 V = then the a Voltage Controlled Filter (or a Voltage Controlled Phase tan z K =becomes 2V circuit ~ = 0Q r 0 V 1 kHz = 2 V 1 -1 1 kHz l 2 b l V V tan z z d l V = V V V V V V = # b l d z ~ V cos z = dV 2 ~ Generator). This forms the basic circuit for self-tuned filter. See Figure 5.2. The Q V = cos z 0Qr 1 kHz dV 2 V # r 1 ~ 2V K = VyK Q ~ 2 0 = 1 kHz Q ~ 1 2 V r K d n ln b = 1 Q r tan z= d~ z = tan V V self-tuned z= # V V dV filter for a square-wave V V l cos zinput, including the control voltage 1 dz d outputdof the l ~ b 0 2 V = Q dV 2 K ~ Q = H Q V $ $ r 2 V c 0 K 90 z d z = K = ~r0 ln H $Q$V ~ V shown V l cos z dz r is waveform, in Figure 5.3. The figure brings automatic 12Q V H $ Q $ d dz out the aspect ofK VV = -b d ln b~ V1 dV = - dz H $Q$V 2VK 0 K = dV z = 90candV ~ c K 90 z control self-tuning. = dz V = 0 dz = - 2Q ~0 0 dV V V V V x # y r =z= = - 2Q ~00 K 0= d ~ ~ V V K z = 90c d z dz 90c d~ z00 1 kHz d 0 = V ~ Q ~ ~0 2Q 0 -2 =K ~ =V ~ d~ z0 z = 90cV Detector V p$ V pl Q 5.1.1 Multiplier as a Phase d ~ V RC z 0 Q V 2 V cos z c = 0 =c ~ V 90 z ~ V = ~ = dV ~ 1 c = - 2Q Vc r c H $Q$V ~ = V d z V $ RCd~ =2V dV V $ RC d z c c V RCV= V dV V V ~ Q V 2 c = =V d~ 1 of ~ ~ = 0 V - 2Q Vc =0 dV av = av ~ d~ 1 In the circuit Figure 5.1, multiplier $ RC the output of the = dV dz c V $ RC is = V RC = V V K av = dV pd = V RC dV = V ~ av c V dV ~ ~ d 1 ~ = dV ~ ~ 1 zV RC = V d= V $d RC dz V = dz 1 kHz dV 0 Vav av =0 V V dV = V RC = V p pl d~ dz V dz ~ (5.2) = 1 kHz ~ ~ d 1 dV $ V $ cos z cos ~ t z = _ i dV B 8 0pd = + $ V RC Figure 5.2: A Self-Tuned Filter based on a Voltage Controlled Filter K z d = = z d ~ dV d dV V V RC dV 2 V z dz dd d~ dV 1 kHz dz dz d~ ~$ V ~ 1 r+ Q 1 kHz Phase Generator or Voltage Controlled dV H = = V = d~ $ dV dz Q dV = d~ dV = V RC dV dV c z z d d 90 z = V ~ d z z d d s s ~ d dV $ = d~ + b1 + V = d~ $ dV dz + H dV Q V +H H00 $$ Q Q $$ V Vii Analog System Lab Kit PRO ~ Q dV ~ l Q = page z d~ dz ddV V = 36 H s s V dV s s 0 i + V~ $ V H l b1 + ~ = + av 1 V H + + + l b Q ~ dV d~ =dV ~Q ~ dz dz H d~ b ~ Q V = sl s V s s H0 $$ Q Q $$ V Vi
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2 0

x y

offset

x y y

0r

2 0

x offset x r y

-1

-1

c 0 c

2 0

xx y

-1

2 r 0 0

2 r 0

-1

x r

x y

x r

2 r 0

0 i

2 r 0

x y

x r

yx

y r

2 0

x r

r y

r 0x r

rp

-1

py

pd

av

av

av

2 rc

pd

r av 0

rp

av

0 av

R11

pd x

pd

pd

av

pd

av

C2

C1

R5

VF3

U1U2
0

r pd av pd

av

pd

R1 0

R2 i

U1U2

C3

R3
c

R10

VF1

av

pd

pd

U1U2

R4

V3

av

pd

av

U1

Uav 2

U3

U4

pd

av

R8

R6

R9

pd

av

av

r 0

R7

av

av

0 0

VG1

VF2

r0

U5

0c

0 i

c r 0

0 i

c 2

2 0 2 c0 0

0 i

0 i

2 0 -1

0 0 i

2 0

Vr # Vx V zK = 90c Vy # Vr c 90 z ~ V = Vy # Vr V Vr # Vx ~ ~ = V V $ RC Vr ~ V ~voltage = V $ RC ~ d~ 1 Input = V0 # Vrx # Vy Vr y = V dV = V RC = V ~ = V0 = Vx # Vy Vr ~ ~ d 1 S.No. Input Frequency Output Amplitude = V $ RC = V dz Vr Vp Vpl dV ~ d~ V RC 1 V0 = Vp Vpl cos z dV = = z d V 1 V RC dV V V0 z dz dz d~ V dV #rr Vcos 0 = xV y Vr = V2 $ dz 2 dV = d~ dV dV av z ddV dz d~ K pd = 2 $ = V +H dV l av Vp V dV p dz d~ dz dV ~ z d K V = = s s V cos z $d 0pd = = 1 + V H b + dV d~ dV z d 2 V r ~ Q+~ l = 3 VV K pd s H s +~ l b1 + ~ + ~ Q dV K b~ Ql av RC pd V = s s K 1 + + pd = l b ~ ~ z = tan cz V = V + K # V + K # V + K # V # V + p 4 ~ Q z = 90 b~ d ~ Ql c d1 - b ~ ln z = 90 ~ RC z = tan b ~~ l p Q ln K V pd av tan d1 - bwith z= V = V +K #V +K #V +K #V #V +p dz Table 5.1: Variation of output amplitude input frequency ~ Vav ~ 2Q ~ V 1 d n l b d ~ =dz ~ z ~0= 90c V p 2Q ~ = dz d~ ~0 dz 2Q V V dV = = - 2Q ~ V V # d z d ~ V V av c V Q V 2 5.2 Specification =V =0 ~0 = Vc V # V dV dz V r $ RC V # V 2Q V = ~ 0 = 1 kHz 0 V = ~ dV 0 the Self-Tuned Figure 5.3: Output of based on simulation Vr $ RC ~ ~ d 1V VFilter 0 0 #V 0 = Q and design a highBand pass filter Assume that the input frequency is 1 V kHz V == V #~ V 0V ~c0 = V d 1 V c V RC dV c r whose centre frequency gets tuned to . V= 1 kHz H $Q$V Q ~ 0 == V V lV RC dV c z $ rRC V = cos V = Q$ Q $ V H zc Vr V d 2VV # V V z dV ~ d~ 1K V V V0l cos z H $Q$V 0 = dV c = = = dz 2 V 5.3 Measurements to be taken Vc Vz dV dV r RC cc K d z d d If we consider the low-pass output, then 0 dV K~ = = dz $ = dz ~ 0 dz 90c dV dV c = d~0z $d K c 5.3.1 Transient response dVc d~0V dV c V 0 + zH =090c z= dz ~+ d V H s2 V0 i = s V~0 Apply a square wave input and observe the amplitude of the Band Pass output for $d + + V s 22 l Vi c =b1 s ~ dV d dV 0~ c ~0 = Q ~ ~ 0 fundamental and its harmonics. $ RC 2 l V+ b1 + ~0 Q ~ 0 ~ d~ 1 V0 H 0 r V + ~ = V ~== VV RC dVb 2 $ RC ~ Vi = - 1 d r l s s ~ Q 0 z d~ + l 1 2l ~ b 1 + b = V z = tan - 1 ~ ~0= Q 5.4 What should you submit Q 0 dV 0 V~ RC 2 ~ z = tan dV r z d z z d d 2 d~ d1 b~ r $ r ln =~ ~ 0 dV ~ dV d dV 1b l d ln b ~0 Q ~ 0 H d~ z dz d+ 1 Simulate the circuits and obtain the transient response of the system. -1 V = $ z dz = tan V dV = d~ s s dV 2 b10+ Q V~ ~ rQ+~ l d~ z0 = - 2d ~ d 1nH l+ b then ~ 2Q = 0 2 Take the plots of transient response from oscilloscope and compare it with = ~ V 0 ~ s d ~ 0 b ~sQ l 1+ + l b simulation results. dz ~ tan z= Q V 2 d z c = dz ~~ d1 - bb~ nl dV c = QV ~ 2 =Q 2 c 0 ~l Q 3 Measure the output amplitude of the fundamental (Band Pass output) at d ~ tan z = 0 dV c ~ Vav = 0 dz varying input frequency at fixed input amplitude. d1 - b ~ ln 2Q ~ V dav z= 0 d~ = c = - 2Q dz 1 kHz dz V dV Hence, sensitivity of VCF(KVCF) Output amplitude should remain constant for varying input frequency within -2 cis equal to VQ. ~ 2Q = ~-= 1 kHz dV d the lock range of the system. V 0 V = dz Qav = 0 Q V 2 = For varying input frequencyQ the output phasedV will always lock to the input phase 1 kHz with 90 phase difference between 1 HkHz $ VitwoQif V = 0. 0 $ Q the H0 $ Q $ Vi 1 kHz H $Q$V Q Q
pd av av 0 0av 0 c 0 r 0 c r 0 0 0 0 c c r c r 0 c 0 r c 0 c c r c c 0 c 0 c c 0 c 0 c 0 i 0 0 2 0 i c 0 0c 2 0 2 0 0 i 0 0 2 0 2 r 0 r 2 0 -1 0 0 offset x x y y 0 x y -1 0 2 r 0 r 0 offset x x y y 0 x y -1 2 0 r x y 0 2 r 0 0 0 0 x y 0 c r x r 0 c 0 c y c av r x r av c r c y av 0 x y r r 0 i p p 0 0 r x y r 0 i pd av p p 0 i 0 r pd pd av pd av 0 av 0 c 0 r 0 c 0 c 0 r r c 0 0 c c r c 0 c c 0 c 0 i 0 0 c 0 c 2 0 i 0 2 0 0 r 2 -1 0 0 2 0 2 r r 0 0 -1 2 r 0 0 0 c 0 c 0 av c c av

Analog System Lab Kit PRO

H0 $ Q $ Vi

page 37

H0 $ Q $ Vi

experiment 5

experiment 5

5.4.1 Exercise Set 5


1

dz 2Q ~0 d~0 = dz 2Q Vc dVc = Vav = 0 kHz Determine the lock range of1 the self-tuned filter you designed. The lock range Q frequencies where the amplitude of the output is defined as the range of input voltage remains constant at H0 $ Q $ Vi

~2 d1 - b ~r ln
0

Related Circuits
Texas Instruments also manufactures the following related ICs - Voltagecontrolled amplifiers (e.g. VCA820) and multiplying DAC (e.g. DAC7821). Refer to http://www.ti.com for application notes.

Notes on Experiment 5:

page 38

Analog System Lab Kit PRO

Experiment 6
Design a function generator and convert it to Voltage-Controlled Oscillator/FM Generator

Chapter 6

Analog System Lab Kit PRO

page 39

f = _1 4RC i $ _ R2 R1i 1kHz 1 ! Vss _R R i 4RC # 2 1 Vc f = _1 4RC i $ _ R2 R1i Sensitivity of the VCO is the important parameter and is given as KVCO , where it is Vc $ R2 given as df ! Vss f l = dVc 4 RC V $ $ r $ R1 To understand a classic mixed mode circuit that uses two-bit A to D Converter f = _1 4RC i $ _ R2 R1i 1V along with an analog integrator block. The architecture of the circuit is similar df l f R2 Vc $ R2 (6.1) l 1kHz f = K Hz Volts VCO = = Vc to that of a sigma delta converter. 4 $ RC $ Vr $ R1dVc = 4RC $ Vr V 1 10kHz df l f R2 KVCO = Hz Volts =_ = Vc RC4 4 $V dV _R 1 f RC 1 i $ rV c 2 R1i = where f = _1 4RC i $ _ R2 R1i 1kHz 1kHz VCO is an1important analog circuit as it is used in FSK/FM generation and constitutes 1 _R 2 R1i 4RC # part _R # 2 R1i As a VCO, it can be used in Phase Locked Loop the modulator of the MODEM. 4 RC Vcis a basic building block forming sigma delta converter. It can also be used The feedback loop is made up of a two-bit A/D converter (at ! Vss levels), also (PLL). It Vc KVCO oscillator for a Class D amplifier. called Schmitt trigger, and an integrator. The circuit is also known function _1 a i $ _ R2 R1i as reference 4RC f = as df generator and is shown in Figure 6.1. The output of the function generator is Vc $ R2 fl = dVc KVCO 4 $ RC $ Vr $ R1 shown in Figure 6.2. 1 df l f V R KVCO = = 4RC $2V V = Vc Hz Volts df dV c 1kHz The function generator produces a square wave at the Schmitt Trigger output and r 1 f = _1 4RC i $ _ R2 R1i ! Vss 10kHz dVc a triangular wave at the integrator output with the frequency of oscillation equal 1 kHz 1V to f = _1 4RC i $ _ R2 R1i . The function generator circuit can be converted as a linear 1 VCO by using the multiplier integrator combination as shown in Figure 6.3. Vc $ R2 _R R i fl = 4RC # 2 1 1kHz 4 $ RC $ Vr $ R1 V c df l f R2 KVCO = Hz Volts 10kHz dVc = 4RC $ Vr V1 = Vc KVCO f = _1 4RC i $ _ R2 R1i df VG dVc 1kHz 1V 1 C _R R i 4RC # 2 1 1kHz Vc 10kHz R KVCO U 1U2 VF1 10 df VF2 dVc Figure 6.2: Function Generator Output R1 U1 R2 1V U2 1kHz 10kHz

experiment 6

Goal of the experiment

6.1 Brief theory and motivation

6.2 Specifications

Figure 6.1: Function Generator

Design of a function generator which can generate square and triangular wave for a frequency of 1 kHz. ! Vss

! Vss

The frequency of oscillation of the VCO becomes

page 40

f = _1 4RC i $ _ R2 R1i Vc $ R2 fl = 4 $ RC $ Vr $ R1 df l f R2 KVCO = Hz Volts = = dVc 4RC $ Vr V1 Vc

6.3 Measurements to be taken

f = _1 4RC i $ _ R2 R1i Vc $ R2 fl = 4 $ RC $ Vr $ R1 df l f R2 KVCO = Hz Volts Determine the frequency of oscillations Vc triangular wave. Frequency of RCsquare $ Vr V1 =and dVc = 4of = _1 4RC i $ _ R2 R1i . Convert the function generator into a oscillation should be equalfto 1kHz Voltage Controlled Oscillator (VCO) or FM/FSK generator also called mod of modem. 1 _R R i 4RC # 2 1 Analog System Lab Kit PRO Vc KVCO

Notes on Experiment 6:

Simulate the circuits and obtain the Transient response of the system.
C R2 VC R1 R1

2 3

f = _1 4RC i $ _ R2 R1i Vc $ R2 fl = 4 $ RC $ Vr $ R1 df l f R2 K Hz Oscillator Volts VCO = 6.3: Figure Voltage-Controlled (VCO) 4RC $ Vr V1 = Vc dVc = f = _1 4RC i $ _ R2 R1i 1 kHzof time response from oscilloscope and compare it with Take the plots 1 simulation results. _R R i 4RC # 2 1 Vc Vary the control voltage of the VCO and see the effect on the frequency of KVCO the output waveform also measure the sensitivity (KVCO) of the VCO which is nothing but df . Use Table 6.1 to note your readings. dVc 1V 1kHz S.No. Control Voltage (Vc) Change in Frequency 10kHz
1 2 3 4 Table 6.1: Change in frequency as a function of Control Voltage

! Vss

6.5 Exercise Set 6


Apply 1V, 1kHz square wave over 2V DC and observe the FSK for a VCO which is designed for 10kHz frequency.

Analog System Lab Kit PRO

page 41

experiment 6

6.4 What should you submit

experiment 6

Notes on Experiment 6:

page 42

Analog System Lab Kit PRO

Experiment 7
Design of a Phase Lock Loop (PLL)

Chapter 7

Analog System Lab Kit PRO

page 43

experiment 7

Goal of the experiment


The goal of this experiment is to make you aware of the functionality of the Phase Lock Loop commonly referred to as PLL which is primarily used for a frequency synthesizer in high frequency stable clock generators. From a crystal of some kHz range, it is possible to generate waveform of GHz frequency range using a PLL.

7.1 Brief theory and motivation

KVCO in experiment number 5 if we replace the In the loop of self-tuned filter studied Vi Voltage Control Filter (VCF) with Voltage Control Oscillator (VCO) (discussed in KVCO d~ Vref Kwill VCO experiment 6) then it becomes PLL as K shown in Figure 7.1. The reader benefit Design a PLL to get locked to frequency of 1 kHz. d~ dV c VCO K pd # r # A0 # KVCO from viewing the recorded lecture at [22]. d~ dVc U4 2 d~ VF3 K VCO Vc dVc ~ = Vc C2 R4 ~ =dVc U 4 4 V RC $ r C 2 d ~ + V c C1 R4 VF3 4 V RC ~ The sensitivity of the PLL is given by K and is , VCO r $V c equal to VG1 d~ ~ dVc , where = 4V= =4 r $ RCVc V r $ RC + Vc d~ dVc VV C1 c r $ RC d~ dd~ V c ~= V ~ =V c VG1 = c = U3 4Vr $ RC dV cr $ RC , which is nothing but frequency of oscillation of VCO. Hence dV c~ V R5 RC r $c$RC dVc dVc VrVV R1 d~ Vc ~ V c U3 R5 ~ K VCO = ~ Vc = V $ RC Vc4Vr $ RC ~= R 1 dV r c + ~ Vc KVCO ~ Vc = V2 ~ Q 0 + d V ~ K V ~ c c VCO = ~ Vc U1 + dVc = Vr $ RC ~0Q VCQ (7.1) V2 ~ KVCO V ~ 0Q K c = VCO = ~ Vc ~ Vc VCQ V0 VCQ U1 ~0Q VCO = ~ Vc ~0Q K V 0 V i V0 VCQ ~0Q Voltage Vc Control Vi Vref V i V0 V CQ V CQ Vref (Output) Vref Vi R K pd # r # A0 # KVCO VO V 0 2 V0 VCO K pd # r # A0 # KVCO r K A0 # KVCO Vref 2 # V i pd # 2
ref VI Input Frequency r ref K pd # 2 W(Input)

Vc Vc V dVc ~= d~ dVc ~ = Vc c 4Vr $ RC 4Vr $ RC 4 V $ RC r RC V V $ dV c r c V ~= d V ~ c ~ = 4V $ cRC d~ Vc 4Vr $ RC Vc ~ ~ dV c r = dVc = Vr $ RC dVc = Vr $ RC dVc Vr $ RC d~ Vc d~ Vc KVCO Vc ~$ RC Vc Vc ~ Vc ~ Vc ~ = dVc = V r ~= dVc = Vr $ RC 4Vr $ RC ~0Q ~ Vc KVCO = ~ Vc KVCO = no ~ Vc ~ c Vc system oscillates VCO = ~ the When voltage is applied to the K system, atVthe free d~ Vinput c = V ~ CQ Q 0 K VCO = ~ Vc ~ 0Q V RC $ dV K r c VCO c =~ V ~ Q 0 with corresponding control voltage of running frequency of the VCO, given by Vc ~ VCQ to the system ~0applied KVCO V0V Q V CQ . If the input is ~ Q 0 with the same frequency as , the PLL CQ K VCO continue = ~ Vc to run Vi V V0 free running VCQ at the d~frequency will and the phase difference V 0 VCQ between 0 dVc ~ 0Q two signals V the 5 i as 90 since Vref is 0 (already explained in Experiment 0 and V V i V0 Vi Vc ~ =4 of Chapter 6 ). As the frequency of input signal voltage will Vref CQ r is changed, the control V Vref Vi V RC $ V r i KV # 2 # A0 # KVCO pdref change correspondingly, so as the output frequency. d~ Vc frequency to the input V0 rto lock Vref r V = ref r K A K # # # pd VCO 0 K pd a A0 # KVCO is a change # result, # V RC $ dV r c K A K # # # pd VCO 0 As there of phase difference between the two signals away 2 2 Vi 2 r r K pd # A0 # KVCO ~ Vc for which output frequenciesK # A K pd # locked from 90. The range of input frequencies gets 2 2 # 0 # VCO Vref KVCO Vc ~ system. to the input is called the lock range of= the The lock range is defined as K pd # r # A0 # KVCO on either side of ~0Q . 2 VCQ V0
~ = KVCO

7.2 Specifications

V1
+
+ V1

VF2

VF2

R2

R2
+

U2

U2 R3 R3

VF1

VF1

Vi V

K pd # r # A0 # KVCO 2

10.00

Vref=0 KVCO # A0 #

5.00

Output

K pd #

A K 2 # 0 # VCO

0.00

-5.00

-10.00 0.00 10.00m Time (s) 20.00m 30.00m

Figure 7.1: Phase Locked Loop (PLL) and its characteristics page 44

Figure 7.2: Sample output waveform for the Phase Locked Loop (PLL) Experiment

Analog System Lab Kit PRO

1 2

Measure the lock range of the system and measure the change in the phase of the output signal as input frequency is varied within the lock range. Vary the input frequency and obtain the change in the control voltage and plot the output. A sample output characteristic of the PLL is shown in Figure 7.2.

Design a Frequency Synthesizer to generate a waveform of 1MHz frequency from a 100kHz crystal as shown in Figure 7.3.

7.4 What you should submit


1 2 3 4
Simulate the circuits and obtain the characteristics of the system. Take the plots of characteristics from oscilloscope and compare it with simulation results. Measure the change in the phase of the output signal as input frequency is varied within the lock range. Vary the input frequency and obtain the change in the control voltage. Use Table 7.2 to record your readings. Figure 7.3: Block Diagram of Frequency Optimizer

Notes on Experiment 7:

S.No. 1 2 3 4

Input Frequency

Output Phase

Table 7.2: Control Voltage as a function of Input Frequency S.No. 1 2 3 4 Table 7.1: Output Phase as a function of Input Frequency Input Frequency Control Voltage

Analog System Lab Kit PRO

page 45

experiment 7

7.3 Measurements to be taken

7.5 Exercise Set 7

experiment 7

Notes on Experiment 7:

page 46

Analog System Lab Kit PRO

Experiment 8
Automatic Gain Control (AGC) Automatic Volume Control (AVC)

Chapter 8

Analog System Lab Kit PRO

page 47

experiment 8

Goal of the experiment


In the front-end electronics of a system, we may require that the gain of the amplifier be adjustable, since the amplitude of the input keeps varying. Such a system can be designed using feedback. This experiment demonstrates one such system.

8.3 Measurements to be taken


Transfer Characteristics - Plot the input versus output characteristics for the AGC/AVC.

8.4 What you should submit


1
Simulate the circuit of Figure 8.1 and obtain the Transfer Characteristic of the system. Assume that the input comes from a function generator; use a sine wave input of a single frequency. Build the circuit shown on Figure 8.1. Plot/print the transfer characteristic using the oscilloscope and compare it with simulation results.

8.1 Brief theory and motivation


The reader will benefit from the recorded lectures at [25]. Another useful reference is the application note on Automatic Level Controller for Speech Signals using PID Controllers [2]. In the signal chain of an electronic system, the output of the sensor can vary depending on the strength of the input. To adapt to wide variations in the magnitude of the input, we can design an amplifier whose gain can be adjusted dynamically. This is possible when the input signal has a narrow bandwidth and the control system is called Automatic Gain Control or AGC. Since we may wish to maintain the output voltage of the amplifier at a constant level, we also use the term Automatic Volume Control (AVC). Figure 8.1 shows an AGC circuit. The typical I/O characteristics Vr Voutput ref of AGC/AVC circuit is shown in Figure 8.2. As shown in Figure 8.2, 2 the value of the system remains constant at 2Vr Vref beyond input voltage Vpi = 2Vr Vref . Vpi = 2Vr Vref

Figure 8.2: Input-Output Characteristics of AGC/AVC S.No. Input Voltage Output Voltage

VI =Vpisint VC

Figure 8.1: Automatic Gain Control (AGC)/Automatic Volume Control (AVC)

8.2 Specification
Design AGC/AVC system to maintain the peak amplitude of the sine wave at 2V. page 48

VC Vpisint VR

VCVpi 1 VR VR C Vref= VOP 2VR


2

1 2 3 4 Table 8.1: Transfer characteristic of the AGC circuit

Plot the output as a function of input voltage. Enter sufficient number of readings in Table 8.2. Does the output remain constant as the magnitude of the input is increased? Beyond what value of the input voltage does the gain begin to stabilize? We have included sample output waveform for the AGC circuit in Figure 8.3.

Analog System Lab Kit PRO

R3 +

VF2

R4 C1 U1 VXVY 10 U2 VXVY 10 + R1 R2 V1

Notes on Experiment 8:

V2 VF1

+ VG1

Figure 8.3: AGC circuit and its output

8.5 Exercise Set 8


Determine the lock range for the AGC, which is defined as the range of input values for which output voltage remains constant.

Analog System Lab Kit PRO

page 49

experiment 8

experiment 8

Notes on Experiment 8:

page 50

Analog System Lab Kit PRO

Experiment 9
DC-DC Converter

Chapter 9

Analog System Lab Kit PRO

page 51

VpiVpi _1 _1 V ref Vref T = 2 2T = T T T= f f Vp T1 =1 Vav Vav f ! V ss V ! V ss between depending upon the value of ref . Hence circuit becomes SMPS system Vp where Vav V $ ref Vss$ V V ref V = 1 _1 V V i x av ssp . Vp =V ref p = f T 2 x x The goal of the experiment is to design a high-efficient DC-DC converter using Vref Vref T T V T If we replace LC filter with MOSFET, and apply audio input as ref to the comparator a general purpose OP-Amp and a comparator and study its characteristics. T T of the MOSFET amplified audio xoutput x T = 1 output f then at is obtained, 1 this is Class D x We also aim to study the characteristics of a DC-DC converter IC, and for = 2 _1 - Vref Vpi T V av Power Amplifier operation. this purpose we selected the wide-input non synchronous buck DC/DC T ! Vss controller TPS40200 from Texas Instruments. This IC is included in ASLK T =1 f PRO as evaluation module. Vav = - Vref $ Vss Vp Vav x Vref ! Vss T x T Vp Vav = - Vref $ Vss Vp Design a DC-DC converter which has 10 kHz oscillator whose f triangular wave output x Vref is connected to with peak amplitude Vp is fed to a comparator whose other input VrefT x T Vref (reference voltage). 1 1 V V x T = 2 _ - ref pi T The reader will benefit from viewing the recorded lecture at [24]. Also refer to the application note, Design Considerations for Class-D Audio Power Amplifiers [15]. T =1 f Vp Vav Vp p Vp Function generator is the basic block for DC-DC converter. V The triangular output f Vp ! Vss Vp f f f is fed to the of the function Vref f generator with peak amplitude Vp and frequency Vav = - Vref $ Vss Vp f comparator input is connected to the reference voltage Vref. Vref Vref Vref The output f 1 _1 other x whose V ref x V V i ref p of this comparator is the PWM (Pulse width modulation) waveform whose duty cycle Obtain the time response the system and plot Vref versus T Vref . T =2 1 x 1_ x of 1 x - Vref Vref V_1 V 1 pi Vref Vpi = ref Vpi = 1 _ 1 x = T T 2 T wave T 2 1 V V 2 and is is given by period of triangular 1 1 x x T = 2 _ - ref pi , where T is time x 1 _1 V TV V V T p ref Vpi T = T T = 2 _ - ref pi 1 f . This duty cycle is directly proportional equal to T =T T 2 to reference voltage Vref. T f T = 1offT T =1 f f T at the output =1 If we connect low-pass filter (LC filter) the comparator Vav Tthe f = 1lossless T =1 f V V ref as shown ! in Figure 9.1, it is possible to get stable DC voltage Obtain the high efficiency versus Vav characteristics. av withV T =1 f av VssVav Vav 1 1 ! x ! Vss ! Vss Vav Vav = VVss V !VssVref $ Vss Vp T = 2 _ - ref pi ! Vss $ VVav = - Vref Vav = - Vref $ Vss Vp ss Vref p $ Vss Vp ! Vss av = x Vav = - Vref $ Vss Vp T V Vav = - Vref $ Vss Vp T ref x x x Vav = - Vref $ V ss Vp V V T =1 f x Tx Vref T ref T Vref T ref x T x Vref Vav Vref x T x T x T T T x T T x ! Vss x T Vav = - Vref $ Vss Vp

experiment 9

Goal of the experiment

9.2 Specifications

9.1 Brief theory and motivation

9.3 Measurements to be taken

9.3.1 Time response

9.3.2 Transfer function

Function Generator

+VSS Vg -VSS Vref VO L Vav C RL

Vref

x T

Figure 9.1: DC-DC Converter and PWM waveform page 52

Analog System Lab Kit PRO

+ VG1 U2

VF1

R1

VF2

1 2 3 4

f time response and transfer characteristics Simulate the circuits and obtain the of the system. Vref 1 1 V Vi x - ref p T = 2 _ and Take the plots of transfer characteristics time response from oscilloscope Vp T and compare it with simulation results. f T =1 f
Plot the average output voltage Vav as a function of reference voltage Vref and Vp Vp obtain the plot; the plot will be linear. 1 1 V V x ! Vss f T = 2 _ - ref pi f Vav = - Vref $ Vss Vp T the Plot the duty cycle Vref as a function of reference voltage Vref and obtain x Vref T = 1off 1 _1 plot, the plot will be x linear. We have included the typical output waveform T Vpi 1 1 V x - Vref ref Vpi T = 29.2 T = 2_ - V x T av the SMPS circuit in Figure T T ! Vss T =1 f TVoltage = 1Vp f S.No. Reference Voltage Output Vav = - Vref $ Vss Vp Vav Vav f x V 1 ! Vss T ref ! Vss Vref x Vav = - Vref $ Vss Vp $ Vss T Vav = Vp x Vref 1 _1 - Vref Vpi = 2 T 2 x x V V T ref T ref T 3 x T x T T =1 f Vav 4 ! Vss
x

R3

R4

C1

R2

U1 V2

Figure 9.2: (a) SMPS Circuit (b) Output Waveforms

Vav =converter - Vref $ Vss Vp Table 9.1: Variation of output voltage with reference voltage in a DC-DC
S.No. 1 2 3 4 Table 9.2: Variation of duty cycle with reference voltage in a DC-DC converter Reference Voltage Duty Cycle x T

Vref

9.5 Exercise Set 9


Perform the same experiment with the specialized IC for DC-DC converter from Texas Instrument TPS40200 and compare the characteristics of both systems.

Analog System Lab Kit PRO

page 53

experiment 9

9.4 What should Vyou submit

experiment 9

Notes on Experiment 9:

page 54

Analog System Lab Kit PRO

Experiment 10
Design a Low Dropout (LDO) regulator

Chapter 10

Analog System Lab Kit PRO

page 55

experiment 10

Goal of the experiment


The goal of this experiment is to design a Low Dropout regulator using general purpose OP-Amp and PMOS and study its characteristics with extension to study characteristics of TPS7250 IC. We aim to design a linear voltage regulator with high efficiency which is used in low noise high efficiency applications.

10.3 Measurements to be taken


1 2 3
V0 = Vref _1 + R2 R1i the load regulation of the system. Load regulation Output Characteristics - Measure is given by dV0 V0 when Io is varying from minimum to maximum value. V0 = Vref _1 + R2 R1i V0 dV V 0 1 V V _ 0 20 R 1i ref = + Transfer Characteristics -R Measure the line regulation of the system. Line regulation dV0 V V is given by dV when is varying from minimum to maximum value. dI0 0 0 V0 dV0 V0 = Vref _1 + R2 R1i dI0 by applying the ripple input voltage and measuring Measure the ripple rejection dV 0 dV0 V0 dI0 voltage. the output ripple V0 dV Measure the output impedance of the LDO, which is given by dI 0 . We have shown 0 the sample output of load regulation and line regulation in Figure 10.2.

10.1 Brief theory and motivation


LDO is used to produce regulated voltage for high efficiency low noise applications. Please view the recorded lectures at [23] for a detailed description of voltage regulators. In case of DC-DC converter switching takes place (as shown by PWM waveform) and switching is a source of noise but in LDO no switching takes place hence it is used as voltage regulator in low noise high efficient systems. As shown in the circuit below LDO uses PMOS along with OP-Amp so that power dissipation in OP-Amp is minimal and efficiency is high. The regulated output voltage is given by V0 = Vref _1 + R2 R1i. VUN dV0 V0

S.No. 1 2 3 4

Reference Voltage

Output Voltage

V0 dV0 dI0
R Vref

Table 10.1: Variation of Load Regulation with Load Current in an LDO

R2 10k

VF1

R2

R 10k R2 VO = Vref [1+ ] R1 RL Z1 +

R6 10k R4 10k V1 D1 R5 2k

R1

Figure 10.1: Low Dropout Regulator (LDO)

R3 10k

10.2 Specifications
Generate 3V output when input voltage is varying from 4V to 5V. page 56 Figure 10.2: A regulator circuit and its simulated outputs - line regulation and load regulation

Analog System Lab Kit PRO

2 3

Take the plots of output characteristics, transfer characteristics and ripple rejection from the Oscilloscope and compare it with simulation results. Obtain the Load Regulation - Vary the load such that load current varies and obtain the output voltage, see the point till where output voltage remains constant. After that output will fall as the load current increases. Obtain the Ripple Rejection - Apply the input ripple voltage and see the output ripple voltage, with the input ripple voltage output ripple voltage will rise. Obtain the Line Regulation - Vary the input voltage and plot the output voltage as a function of the input voltage. Until the input reaches a certain value, the output voltage remains constant; after this point, the output voltage will rise as the input voltage is increased. Calculate the output impedance. S.No. 1 2 3 4 S.No. 1 2 3 4 Ripple Input Voltage Ripple Output Voltage Input Voltage Line Regulation

4 5

6
Input resistance (ohms)

Input voltage (V)

Figure 10.3: Variation of Line Regulation with Input Voltage in an LDO

10.4 What should you submit


1
Simulate the circuits and compute the output characteristics, transfer characteristics, and ripple rejection.

10.5 Exercise Set 10


Perform the same experiment with the specialized IC for LDO from Texas Instrument TPS7250 and compare the characteristics of both systems. page 57

Analog System Lab Kit PRO

experiment 10

experiment 10

Notes on Experiment 10:

page 58

Analog System Lab Kit PRO

Experiment 11
To study the parameters of an LDO integrated circuit

Chapter 11

Analog System Lab Kit PRO

page 59

experiment 11

Goal of the experiment


The ASLK Pro kit includes an on-board voltage regulator evaluation module TPS7250. The goal of this experiment is to study the parameters of the Low Dropout Regulator (LDO) IC TPS7250 from Texas Instruments using the on-board evaluation module.

The regulator can be enabled/disabled using the ON/OFF jumper JP7. The Enable pin (EN) must never be left floating. Connecting a shorting jumper wire between pins 1 (GND) and pin 2 (EN) of JP7 enables the regulator. Connecting a jumper wire between pins 2 (EN) and pin 3 (VIN) disables the regulator. Output voltage is available on screw terminal CN4, or Vout pin header, and the typical load current is 200mA.

11.1 Brief theory and motivation


TPS7250 evaluation module helps us evaluate the operation and performance of the TPS7250 family of linear regulators. The linear regulator TPS7250 from Texas Instruments is capable of 200mA output current at 5V fixed output voltage level. It is a low quiescent current, low noise, high PSRR, fast start-up LDO with excellent line and transient response. See Figure 11.1 for the schematic diagram of the evaluation module. The input supply voltage VIN is fed at screw terminal CN3 and falls in the range 5.5V to 11V. The leads to the input supply must be as short as possible and must be twisted to reduce EMI transmission. The capacitor C102 improves the transient response of the regulator. The capacitor C101 helps to reduce the ringing on input when supply wires are too long.

11.2 Specifications
To study the parameters (Line regulation, Load regulation) of LDO TPS7250 using the on-board evaluation module.

11.3 Measurements to be taken


1
Obtain the Line Regulation: Vary the input voltage (from 5.5V to 11V in steps of 0.5V) and plot the output voltage as the function of the input voltage for a fixed output load. Obtain the Load Regulation: Vary the load (within the permissible limits) such that load current varies and obtain the output voltage for a fixed input voltage. Plot the output voltage as function of the load current.

HD118 CN4 OUT R4 4K7 R101 247K LD4 IC1 1 2 3 4 C103 10uF JP6 IN C101 1u F C102 100nF HD116 JP7 OFF ON REG IN OUT

VOUT

VOUT GND

TPS7250

SENSE PG GND EN

OUT OUT IN IN

8 7 6 5

VCC+10

HD117 CN3

VIN

VIN GND

GND

ENABLE

Figure 11.1: Schematic diagram of on-board evaluation module page 60

Analog System Lab Kit PRO

VIN 5.5 -10 V

VOUT 5 V @250mA

Simulate the circuit using a simulator such as PSPICE Capture (version 15.7 or higher) or Cadence 16.0. The typical characteristics will be of the form as shown in Figure 11-2(a) and Figure 11-2(b).
1.8032V

Vary the input voltage for constant load and observe the output voltage. Use Table 11-1 for taking the readings for line regulation. S.No. 1 2 Input voltage (VIN) Output voltage (VOUT)

1.8028V

3 4 Table 11.1: Line regulation

VOUT
1.8024V

3
1.8020V

Vary the load so that load current varies; observe the output voltage for constant input voltage. Use Table 11-2 for taking the readings for load regulation. S.No. 1 2 3 4 Load current (IOUT) Output voltage(VOUT)

3.0V

3.5V

4.0V

4.5V

5.0V

5.5V

VIN

Figure 11.2(a): Line regulation


1.8040V

VOUT
1.8035V

Table 11-.2: Load regulation

1.8030V 21.5mA

30.0mA

40.0mA

50.0mA

60.0mA

70.0mA

IOUT

Figure 11.2(b): Load regulation

Analog System Lab Kit PRO

page 61

experiment 11

11.4 What should you submit?

experiment 11

Notes on Experiment 11:

page 62

Analog System Lab Kit PRO

Experiment 12
To study the parameters of a DC-DC Converter using on-board Evaluation module

Chapter 12

Analog System Lab Kit PRO

page 63

experiment 12

Goal of the experiment


The goal of the experiment is to configure the on-board evaluation module TPS40200 on the ASLK PRO Kit as a switched mode power supply that can provide a regulated output voltage of 5V or 3.3V for an input whose range is 6V-15V.

Pchannel Power FET and Schottky diode to produce a low cost buck converter. The regulated output of the EVM is resistance-selected and can be adjusted within the limited range by making the changes in the feedback loop, as shown below.

Vout = Vref
b

12.1 Brief theory and motivation


The TPS40200 evaluation module included on ASLK PRO. Kit uses the TPS40200 non synchronous buck converter to provide a resistor-selected, 3.3V or 5V output that delivers up to 2.5A from up to 16V input bus. See Figure 12-1 for a schematic diagram of the EVM. The evaluation module operates from a single supply and uses the single

HD142 Vin

VCC+10 JP9 DC/DC IN VIN C201 220uF

TP1 HD122

VIN 6 15V

CN5

HD120 VIN TP2

R201 100K

TP3 HD121 RC SS

C203 220nF U4

C204 220nF

C205 470pF ISNS DRV R204 0E C208 100nF

TPS40200

1 2

SS COMP FB

ISNS DRV GND

7 6 5

RC

VDD

COMP 3 C213 470pF R 205 100K C207 33pF C206 4.7nF R210 1M C214 470nF 4

GATE

Vref = 0.7V R209 V =V b = b R209 + R207 V = 0.7V Vout = Vin $ duty cycle R The feedback factor b = can be by changing feedback resistance R209 to R +changed R TP 205 adjust the output. ButVin = ASLK PRO, we do V $ duty cycle not have the provision of changing R209. We can therefore achieve this task by connecting an external resistance of suitable TP TP207 the ground. value between the terminals TP8 and TP 1MX 1MX R R209 TP TP208 J TP J201 TP TP203 R C TP204 R201 C213
ref out ref 209 209 in 207 out 205 207 209 208 201 203

R203 1K

R202 0.03

204

201

SRC

213

Q101 FDC5614P

1 2 5 6

DRAIN

TP4 HD126

TP5 HD128

HD143 CN6

VOUT

L201 33uH D201 MBRS340 C202 68pF R 206 25.5E TP7 HD127

VOUT R3 4K7 LD3

TP6 HD124
FB

C209 330uF

C210 330uF

C211 10uF

C212 10uF

VOUT

TP8 HD123 JP8 3.3V 5V R211 41K2 R209 27K4 R207 100K R208 49.9

TP9 HD125

Figure 12.1: Schematic of the on-board EVM page 64

Analog System Lab Kit PRO

VOUT 3.3V or 5V @ 0.125 2.5A

The unregulated input is connected at screw terminal CN5. Output load is connected to screw terminal at CN6.The switching Vout = Vref waveform can be observed at the terminal TP4.The evaluation module has a switching frequency of 200 kHz. This frequency b is decided by the combination of R201 and C213. The duty cycle of thisV waveform Vref = 0.7V Vout = ref varies linearly with the input voltage for a constant output voltage, b as shown V ref = 0.7V below. R209

What should be the value of the external resistance to be connected between TP8 and Ground to configure the evaluation module to generate regulated output voltage of 5V? Simulate the configured circuit using a simulator. The typical waveforms will be of the form shown in Figure 12.2.
1.00

TP205 TP207 The output ripple voltage can be measured across terminals TP5 and TP7 by simply M X impedance, 1 placing the oscilloscope probes. The oscilloscope must be set for TP207 AC coupling. The same terminals can be used for the measurement R of 209the regulated 1MX output DC voltage using a voltmeter. TP208 J201 R209 TP203 TP208 TP204 R201 J201 C213 In this experiment, we wish to study the line and load regulation for the TPS40200 203 integrated circuit when it isTP configured to generate a 5V DC output.

R209 + R207 Vout = Vin $ duty cycle TP205

b=

R209 R209 + R207 Vout = Vin $ duty cycle


b=
TP3

0.00 20.00 TP4 -10.00 10.00 Vin 10.00 5.01 Vout 4.98 10.00m 10.02m 10.05m 10.07m 10.10m

12.2 Specifications

12.3
1

TP204 R201 Measurements C213

to be taken
3

Configure the on board evaluation module to generate constant 5V DC output by making the changes in the feedback path using the available terminals. Obtain the Line Regulation: Vary the input voltage from 10V to 15V in steps of 0.5V and plot the output voltage as the function of the input voltage for a constant output load. Obtain the Load Regulation: Vary the load (within the permissible limits) such that load current varies and obtain the output voltage for constant input voltage. Plot the output voltage as a function of the load current.

Figure 12.2: Simulation waveforms - TP3 is the PWM waveform and TP4 is the switching waveform Configure the on board evaluation module to generate a regulated output voltage of 5V, and observe the waveforms mentioned in Figure 12.2 and compare with the simulation results. Vary the input voltage for a regulated output voltage of 5V and observe the change in the duty cycle of the PWM waveform. Use Table 12.1 to record the readings. Compare the readings with simulation results and plot the graph between the input voltage and duty cycle. Is the plot linear?

Analog System Lab Kit PRO

page 65

experiment 12

What should be the value of the external resistance for the regulated output of 5V?

12.4 What should you submit?

experiment 12

S.No. 1 2 3 4

Input voltage (Vin)

Duty cycle

Notes on Experiment 12:

Table 12.1: Variation of the duty cycle of PWM waveform with input voltage

Vary the input voltage for a fixed load and observe the output voltage. Use Table 12.2 for taking the readings for line regulation S.No. 1 2 3 4 Table 12.2: Line regulation Input voltage (Vin) Output voltage (Vout)

Vary the load so that load current varies; observe the output voltage for a fixed input voltage. Use Table 12.3 for taking the readings. S.No. 1 2 3 4 Table 12.3: Load regulation Load current Output voltage (Vout)

page 66

Analog System Lab Kit PRO

Experiment 13
Design of a Digitally Controlled Gain Stage Amplifier

Chapter 13

Analog System Lab Kit PRO

page 67

experiment 13

Goal of the experiment


The goal of the experiment is to design a negative feedback amplifier whose gain is digitally controlled using a multiplying DAC.

13.2 Specifications
To study the variation in gain when the bit pattern applied to the input of the DAC is changed.

13.1 Brief theory and motivation


More and more, we see the trend of using Digital Signal Processors and/or Microcontrollers to control the behavior of the front-end signal conditioning circuits in an instrumentation or RF system. Examples of such systems are Automatic Gain Control system and Automatic Voltage Control systems. In this experiment, we will demonstrate the use of a multiplying DAC to control the gain of a programmable gain amplifier; we include an exercise at the end of this chapter to illustrate the use of a microcontroller for controlling the gain of a programmable gain amplifier. See Figure 13.1 for the circuit of an inverting amplifier; the gain of this amplifier can be digitally controlled by changing the bit pattern presented to the input of the multiplying DAC, DAC7821.

13.3 Measurements to be taken


0 0

_ A11 A10 ... A0i 4096 Vout = Vin $ R2 $ 11 R1 / An 2 n

_ A11 A10 ... A0i 4096 Vout = Vin $ R2 $ 11 R1 / An 2 n

Vin Apply a 100 Hz sine wave of 100mV peak amplitude at Vin and measure the output _ A11 A10 ... A0i and voltage amplitude. Select R2 R1 to be 2.2. Vary the input bit R2 pattern R1 measure the amplitude of the output voltage. 4096 Vout = Vin $ R2 $ 11 R1 / An 2 n

13.4 What should you submit?


1

Vin R2 R1

The circuit of Figure 13.1 cannot be directly simulated, since the macro-model for DAC7821 is not available at the time of writing. For the purpose of simulation, we will use the macro model of a different 12-bit DAC, the MV95308. Simulate the circuit schematic shown in Figure 13.2, which is equivalent to the circuit of Figure 13.1. Observe the output waveforms for different bit patterns. The typical simulation waveforms are of the form shown in Figure 13.3. Use the circuit shown in Figure 13.1 for practical implementation of the Digital programmable gain stage amplifier. Apply the sine wave of fixed amplitude and vary the bit pattern, as shown in Table 13.1. Note the Peak to Peak amplitude of the output. Compare the simulation results with the practical results.

VDD C1 R2 IOUT1 TL082 IOUT2 RFB VDD GND

2 3

DAC7821 VREF

VIN

R1 TL082 VOUT

Figure 13.1: Circuit for Digital Controlled Gain Stage Amplifier Let the 12-bit input pattern to DAC be given by _ A11 A10 ... A0i. The expression for the output voltage of the negative feedback amplifier 4096 $ 11 V is given V $ R2 by _ A11 A10 ... A0i out = in R1 / An 2 n

S.No. 1 2 3 4

BIT Pattern 100000000000 010000000000 001000000000 000100000000

Peak to Peak Amplitude of the output

4096 V Vout = Vin $ R2 $ 11 R1 R R n / An 2


in 2 1

Table 13.1: Variation in output amplitude with bit pattern

page 68

Vin R2 R1

Analog System Lab Kit PRO

J1 + V2 10V E 0 1 2 A 3 RO 4 5 RI 6 7 8 GND 9 10 11 MV95308

R2 R1 + VIN

J1 TL082 J2 R3 1k

J2 TL082 J1 VOUT

+ V3 10V J2

Figure 13.2: Equivalent Circuit for simulation

500.00m

Output

Amplitude(volts)

Notes on Experiment 13:

-500.00m 100.00m

Input

Amplitude(volts)

-100.00m

0.00

5.00m

10.00m Time(s)

15.00m

20.00m

Figure 13.3: Simulation output of digitally controlled gain stage amplifier when the input pattern for the DAC was selected to be 0x800

13.5 Exercise Set 13


Design a digitally programmable non-inverting amplifier whose gain varies from 6.4 and above.

Analog System Lab Kit PRO

page 69

experiment 13

+ V1 5V

R4 1k

experiment 13

Notes on Experiment 13:

page 70

Analog System Lab Kit PRO

Experiment 14
Design of a Digitally Programmable Square and Triangular wave generator/oscillator

Chapter 14

Analog System Lab Kit PRO

page 71

experiment 14

Goal of the experiment


To design a digitally controlled oscillators where the oscillation frequency of the output square and triangular wave forms is controlled by a binary pattern. Such systems are useful in digital PLL and in FSK generation in a MODEM.

14.2 Specifications
Design a Digitally Programmable Oscillator that can generate square and triangular waveforms with a maximum frequency of 400 Hz.

14.1 Brief theory and motivation


In Experiment 6, we used an analog multiplier in conjunction with an integrator to build a VCO. In this experiment, we will use a multiplying DAC7821 (instead of a multiplier) and an integrator to implement a digitally controlled square and triangular wave generator. See Figure 14.1 for the circuit schematic of a digitally programmable square and triangular wave generator. VOUT is the square wave output and the output of the integrator is the triangular waveform.
C 1u C1 R 1k TL082 IOUT1 TL082 IOUT2 RFB VDD VDD GND

14.3 Measurements to be taken


Implement the Digitally programmable Square and Triangular wave generator using the circuit as shown in Figure 14.1.Observe the frequency of Oscillations of system and vary it by varying bit pattern input to the DAC.

14.4 What Should you Submit


1
Simulate the circuit using any simulator and observe the frequency of oscillation of the square and triangular waveforms. See Figure 14.2 for the result of simulation. The typical simulation waveforms are of the form shown in Figure 14.3. For this simulation, we used the macro-model of MV95308 since the macro-model for the DAC is not available at the time of writing. Vary the bit pattern input to the DAC in manner specified in Table 14.1 and note down the change in the frequency of oscillations and compare the practical results with the simulation results. Plot a graph where the x-axis shows the analog equivalent of the bit pattern and the y-axis shows the frequency of oscillations. Note that the 12-bit input to the DAC is interpreted as an unsigned number.

DAC7821 VREF

TL082 R2

VOUT

R1

S.No. 1 Figure 14.1: Circuit for Digital Controlled Oscillator Frequency of oscillations of digital programmable oscillator is given by 2 3 4

BIT Pattern 100000000000 010000000000 001000000000 000100000000

Peak to Peak Amplitude of the output

1 $ 1 R2 $ 0 4RC b + R1 l 4096 Q = 10
n

f=

/A 2

11

Table 14.1: Varying the bit pattern input to the DAC

page 72

Analog System Lab Kit PRO

J1 + V2 0 E 1 2 A 3 4 RO 5 6 RI 7 8 GND 9 10 11 MV95308

+ V1 10V

V tri R4 1k J2 TL082 J1 R2 R1 R3 1k J2 TL082 V squ J1

5V R 1k

J2 TL082 J1

+ V3

10V

J2

Figure 14.2: Circuit for Simulation

10.00 V squ

Notes on Experiment 14:

-10.00 3.00 V tri

-3.00

0.00

25.00m

50.00m Time(s)

75.00m

100.00m

Figure 14.3: Simulation Results

14.5 Exercise Set 14


Analog System Lab Kit PRO

f = 1 $ b1 + R2 l $ 0 R1 4096 4RC Design a digitally programmable band-pass filter with Q = 10 and gain of 1 at the centre frequency.
n

/A 2

11

page 73

experiment 13

C 1u

experiment 14

Notes on Experiment 14:

page 74

Analog System Lab Kit PRO

ICs used in ASLK PRO


Texas Instruments Analog ICs used in ASLK PRO
Analog System Lab Kit PRO
page 75

Appendix A

appendix A

JFET-Input Operational Amplifier A.1.1 Features


Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion...0.003% Typ High Input Impedance...JFET-Input Stage Latch-Up-Free Operation High Slew Rate...13 V/s Typ Common-Mode Input Voltage Range Includes VCC+

TL082
A.1.2 Applications
Input Buffer High-Speed Integrators D/A Converters Sample And Hold Circuits

A.1.4 Download Datasheet


http://www.ti.com/lit/gpn/tl082

Figure A.1: TL082 - JFET-Input Operational Amplifier

A.1.3 Description
The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset adjustment and external compensation options are available within the TL08x family. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from -40C to 85C. The Q-suffix devices are characterized for operation from -40C to 125C.

page 76

Analog System Lab Kit PRO

A.2.1 Features
Wide Bandwidth: 10MHz Typ 0.5% Max Four-Quadrant Accuracy Internal Wide-Bandwidth Op Amp Easy To Use Low Cost

A.2.2 Applications
Precision Analog Signal Processing Modulation And Demodulation Voltage-Controlled Amplifiers Video Signal Processing Voltage-Controlled Filters And Oscillators

A.2.4 Download Datasheet


http://www.ti.com/lit/gpn/mpy634

X Input 10V FS 12V PK +15V 50k 470k 1k

X1 X2 SF

+VS O ut =

+15V

VO UT, 12V PK (X1 X2) (Y1 Y2) 10V + Z2

MPY634 Z1 Z2 VS

15V O ptional O ffset Trim C ircuit

Y1 Y2

Y Input 10V FS 12V PK

15V

O ptional S umming Input, Z, 10V PK

Figure A.2: MPY634 - Analog Multiplier

A.2.3 Description
The MPY634 is a wide bandwidth, high accuracy, four-quadrant analog multiplier. Its accurately laser-trimmed multiplier characteristics make it easy to use in a wide variety of applications with a minimum of external parts, often eliminating all external trimming. Its differential X, Y, and Z inputs allow configuration as a multiplier, squarer, divider, square-rooter, and other functions while maintaining high accuracy. The wide bandwidth of this new design allows signal processing at IF, RF, and video frequencies. The internal output amplifier of the MPY634 reduces design complexity compared to other high frequency multipliers and balanced modulator circuits. It is capable of performing frequency mixing, balanced modulation, and demodulation with excellent carrier rejection. An accurate internal voltage reference provides precise setting of the scale factor. The differential Z input allows user-selected scale factors from 0.1 to 10 using external feedback resistors.

Analog System Lab Kit PRO

page 77

appendix A

MPY634

Wide Bandwidth Analog Precision Multiplier

appendix A

12 Bit, Parallel, Multiplying DAC A.3.1 Features


2.5V to 5.5V supply operation Fast Parallel Interface: 17ns Write Cycle Update Rate of 20.4MSPS 10MHz Multiplying Bandwidth 10V input Low Glitch Energy: 5nV-s Extended Temperature Range: -40C to +125C 20-Lead TSSOP Packages 12-Bit Monotonic 1LSB INL Read back Function Power-On Reset with Brownout Detection Industry-Standard Pin Configuration 4-Quadrant Multiplication

DAC 7821
A.3.4 Download Datasheet
http://www.ti.com/lit/gpn/dac7821

A.3.2 Applications
Portable Battery-Powered Instruments Analog Processing Waveform Generators Programmable Amplifiers and Attenuators Digitally Controlled Calibration Programmable Filters and Oscillators Composite Video Ultrasound

Figure A.3: DAC 7821 - Digital to Analog Converter

A.3.3 Description
The DAC7821 is a CMOS 12-bit current output digital-to-analog converter (DAC). This device operates from a single 2.5V to 5.5V power supply, making it suitable for battery-powered and many other applications. This DAC operates with a fast parallel interface. Data read back allows the user to read the contents of the DAC register via the DB pins. On power-up, the internal register and latches are filled with zeroes and the DAC outputs are at zero scale. The DAC7821 offers excellent 4-quadrant multiplication characteristics, with a large signal multiplying and width of 10MHz. The applied external reference input voltage (VREF) determines the full-scale output current. An integrated feedback resistor (RFB) provides temperature tracking and full-scale voltage output when combined with an external current-to-voltage precision amplifier. The DAC7821 is available in a 20-lead TSSOP package.

page 78

Analog System Lab Kit PRO

A.4.1 Features
Input Voltage Range 4.5 to 52 V Output Voltage (700 mV to 90% VIN) 200 mA Internal P-Channel FET Driver Voltage Feed-Forward Compensation Undervoltage Lockout  Programmable Fixed Frequency (35-500 kHz) Operation Programmable Short Circuit Protection Hiccup Overcurrent Fault Recovery Programmable Closed Loop Soft Start

700 mV 1% Reference Voltage External Synchronization Small 8-Pin SOIC (D) and QFN (DRB) Packages

A.4.4 Download Datasheet


http://www.ti.com/lit/gpn/tps40200

A.4.2 Applications
Industrial Control DSL/Cable Modems Distributed Power Systems Scanners Telecom

Figure A.4: TPS40200 - DC/DC Controller

A.4.3 Description
The TPS40200 is a flexible non-synchronous controller with a built in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52V with a power-saving feature that turns off driver current once the external FET has been fully turned on. This feature extends the flexibility of the device, allowing it to operate with an input voltage up to 52V without dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward input-voltage compensation that responds instantly to input voltage change. The internal 700mV reference is trimmed to 1%, providing the means to accurately control low voltages. The TPS40200 is available in an 8-pin SOIC, and supports many of the features of more complex controllers.

Analog System Lab Kit PRO

page 79

appendix A

TPS40200

Wide-Input, Non-Synchronous Buck DC/DC Controller

appendix A

Micropower Low-Dropout (LDO) Voltage Regulator A.5.1 Features


 Available in 5-V, 4.85-V, 3.3-V, 3.0-V, and 2.5-V Fixed-Output and Adjustable Versions  Dropout Voltage <85 mV Max at IO = 100 mA (TPS7250)  Low Quiescent Current, Independent of Load, 180 mA Typ 8-Pin SOIC and 8-Pin TSSOP Package  Output Regulated to 2% Over Full Operating Range for Fixed-Output Versions Extremely Low Sleep-State Current, 0.5 mA Max Power-Good (PG) Status Output

TPS7250
A.5.4 Download Datasheet
http://www.ti.com/lit/gpn/tps7250

A.5.2 Applications
Wireless Handsets Smart Phones, PDAs MP3 Players ZigBeeTM Networks BluetoothTM Devices Li-Ion Operated Handheld Products WLAN and Other PC Add-on Cards

TPS7250 VI 5 6 IN IN PG SENSE OUT EN GND 3 OUT 2 1 7 8 + PG 250 k VO CO 10 F

0.1 F

CSR = 1

Figure A.5: TPS7250 -Micropower Low-Dropout (LDO) Voltage Regulator

A.5.3 Description
The TPS72xx family of low-dropout (LDO) voltage regulators offers the benefits of low-dropout voltage, micropower operation, and miniaturized packaging. These regulators feature extremely low dropout voltages and quiescent currents compared to conventional LDO regulators. Offered in small-outline integrated-circuit (SOIC) packages and 8-terminal thin shrink small-outline (TSSOP), the TPS72xx series devices are ideal for cost-sensitive designs and for designs where board space is at a premium. A combination of new circuit design and process innovation has enabled the usual pnp pass transistor to be replaced by a PMOS device. Because the PMOS pass element behaves as a ue resistor, the dropout voltage is very low maximum of 85 mV at 100 mA of load current (TPS7250) and is directly proportional to the load current. Since the PMOS pass element is a voltage-driven device, the quiescent current is very low (300 mA maximum) and is stable over the entire range of output load current (0 mA to 250 mA). Intended for use in portable systems such as laptops and cellular phones, the low-dropout voltage and micropower operation result in a significant increase in system battery operating life.

page 80

Analog System Lab Kit PRO

2N3906, 2N3904, BS250 A.6.1 2N3906 Features


 PNP General Purpose Transistor  Collector-Emiter Breakdown Voltage: V(BR)CEO = 40V  Collector-Base Breakdown Voltage: V(BR)CBO = 40V  hFE: 100 @ IC = 10mA DC, VCE = 1V DC  Transition Frequency: f = 100MHz @ VCE = 20V DC, IC = 10mA DC

Transistors
A.6.3 2N3904 Features
 NPN General Purpose Transistor  Collector-Emiter Breakdown Voltage: V(BR)CEO = 40V  Collector-Base Breakdown Voltage: V(BR)CBO = 60V  hFE: 100 @ IC = 10mA DC, VCE = 1V DC  Transition Frequency: f = 100MHz @ VCE = 20V DC, IC = 10mA DC

A.6.5 BS250 Features


P-CHANNEL ENHANCEMENT MODE VERTICAL  DMOS FET  Drain-Source Voltage: VDS = -45V  Continuous Drain Current ID = -230 mA @ TAMB = 25C  Gate-Source Voltage: VGS = 20 V  Static Drain-Source on-State Resistance: RDS(ON) = 14 @ VGS = -10V, ID = -200mA  Gate-Source Threshold Voltage: VGS(TH) Min -1V; Max: -3.5V @ ID=-1mA, VDS=VGS

E B

E B

DGS
Figure A.8: BS250 P-Channel Enhancement Mode Vertical DMOS FET

Figure A.6: 2N3906 PNP General Purpose Amplifier

Figure A.7: 2N3906 NPN General Purpose Amplifier

A.6.2 Download Datasheet


http://61.222.192.61/mccsemi/ up_pdf/2N3906(TO-92).pdf

A.6.4 Download Datasheet


http://61.222.192.61/mccsemi/ up_pdf/2N3904(TO-92).pdf

A.6.6 Download Datasheet


http://www.diodes.com/datasheets/BS250P.pdf

Analog System Lab Kit PRO

page 81

DIODE

1N4448 Small Signal Diode

Figure A.9: 1N4448 Small Signal Diode

A.7.1 Features
Breakdown Voltage: VR = 100V @ IR = 100A Forward Voltage: VF = 620-720mV @ IF = 5mA Reverse Leakage: IR = 25uA @ VR = 20V Total Capacitance: CT = 4pF, VR = 0, f = 1MHz Reverse Recovery Time: tRR = 4nS @ IF = 10mA, VR = 6.0V, RL = 100

A.7.2 Download Datasheet


http://www.fairchildsemi.com/ds/1N/1N914.pdf

page 82

Analog System Lab Kit PRO

Introduction to Macromodels
Analog System Lab Kit PRO
page 83

Appendix B

Simulation models are very useful in the design phase of an electronic system. Before a system is actually built using real components, it is necessary to perform a software breadboarding exercise through simulation to verify the functionality of the system and to measure its performance. If the system consists of several building blocks B1, B2, ..., Bn, the simulator requires a mathematical representation of each of these building blocks in order to predict the system performance. Let us consider a very simple example of a passive component such as a resistor. Ohms law can be used to model the resistor if we intend to use the resistor in a DC circuit. But if the resistor is used in a high frequency application, we may have to think about the parasitic inductances and capacitances associated with the resistor. Similarly, the voltage and current may not have a strict linear relation due to the dependence of the resistivity on temperature of operation, skin effect, and so on. This example illustrates that there is no single model for an electronic component. Depending on the application and the accuracy desired, we may have to use simpler or more complex mathematical models. We will use another example to illustrate the above point. The MOS transistor, which is the building block of most integrated circuits today, is introduced at the beginning of the course on VLSI design. In a digital circuit, the transistor may be simply modeled as an ideal switch that can be turned on or off by controlling the gate voltage. This model is sufficient if we are only interested in understanding the functionality of the circuit. If we wish to analyze the speed of operation of the circuit or the power dissipation in the circuit, we will need to model the parasitics associated with the transistors. If the same transistor is used in an analog circuit, the model that we use in the analysis would depend on the accuracy which we want in the analysis. We may perform different kinds of analysis for an analog circuit DC analysis, transient analysis, and steady-state analysis. Simulators such as SPICE require the user to specify the model for the transistor. There are many different models available today for the MOS transistor, depending on the desired accuracy. The level-1 model captures the dependence of the drain-to-source current on the gate-to-source and drain-to-source voltages, the mobility of the majority carrier, the width and length of the channel, and the gate oxide thickness. It also considers non-idealities such as channel length modulation in the saturation region, and the dependence of the threshold voltage on the source-to-bulk voltage. More complex models for the transistor are available, which have more than 50 parameters.

appendix B

intensive. As the number of nodes in the circuit increases, the memory requirement will be higher and the convergence of the simulation can take longer. A macromodel is a way to address the problem of space-time complexity mentioned above. In todays electronic systems we make use of analog circuits such as operational amplifiers, data converters, PLL, VCO, voltage regulators, and so on. The goal of the system designer is not only to get a functionally correct design, but also to optimize the cost and performance of the system. The system-level cost and performance depend on the way the building blocks B1, B2,..., Bn have been implemented. For example, if B1 is an OP-Amp, we may have several choices of operational amplifiers. Texas Instruments offers a large number of operational amplifiers that a system designer can choose from. Refer to Table B.1. As you will see, there are close to 2000 types of operational amplifiers available! These are categorized into 17 different bins to make the selection simpler. However, you will notice that 240 varieties are available in the category of Standard Linear amplifers! How does a system designer select from this large collection? To understand this, you must look at the characteristics of a standard linear amplifier - these include the number of operational amplifiers in a single package, the Gain Bandwidth Product of the amplifier, the CMRR, Vs (min), Vs (max), and so on. See http://tinyurl.com/ti-std-linear. The website allows you to specify these parameters and narrow your choices. But how does one specify the parameters for the components? The overall system performance will depend on the way the parameters for the individual components have been selected. For example, the gain-bandwidth product of an operational amplifier B1 will influence a system-level parameter such as the noise immunity or stability. If one has n components in the system, and there are m choices for each component, there are mn possible system configurations. Even if we are able to narrow the choices through some other considerations, we may still have to evaluate several system configurations. Performing simulations using micromodels will be a painstaking and non-productive way of selecting system configurations.

B.2 Macromodels
A macromodel is a mathematical convenience that helps to reduce simulation complexity. The idea is to replace the actual circuit by something that is simpler, but is nearly equivalent in terms of input characteristics, output characteristics, and feedforward characteristics. Simulation of a complete system becomes much more simple when we use macromodels for the blocks. Manufacturers of semiconductors provide macromodels for their products to help system designers in the process of system configuration selection. The macromodels can be loaded into a simulator.

B.1 Micromodels
If you have built an operational amplifier using transistors, a straight-forward way to analyze the performance of the OP-Amp is to come up with the micromodel of the OPAMAP, where each transistor is simply replaced with its corresponding simulation model. Micromodels will lead to accurate simulation, but will prove computationally page 84

Analog System Lab Kit PRO

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Standard Linear Amplifier Fully Differential Amplifier Voltage Feedback Current Feedback Rail to Rail JFET/CMOS DSL/Power Line Precision Amplifier Low Power High Speed Amplifier (50MHz) Low Input Bias Current/FET Input Low Noise Wide Bandwidth Low Offset Voltage High Voltage High Output Current LCD Gamma Buffer

240 28 68 47 14 23 19 641 144 182 38 69 175 121 4 54 22

Notes on Appendix B:

Table B.1: Operational Amplifiers available from Texas Instruments As you can guess, there is no single macromodel for an IC. A number of macromodels can be derived, based on the level of accuracy desired and the computational complexity that one can afford. A recommended design methodology is to start with a simple macromodel for the system components and simulate the system. A stepwise refinement procedure may be adopted and more accurate models can be used for selected components when the results are not satisfactory.

Analog System Lab Kit PRO

page 85

appendix B

Characteristic

Number of Varieties

appendix B

Notes on Appendix B:

page 86

Analog System Lab Kit PRO

Activity
Convert your PC/laptop into an Oscilloscope

Appendix C

Analog System Lab Kit PRO

page 87

appendix C

C.1 Introduction
In any analog lab, an oscilloscope is required to display waveforms at different points in the circuit under construction in order to verify circuit operation and, if necessary, redesign the circuit. High-end oscilloscopes are needed for measurements and characterization in labs. Today, solutions are available to students for converting a PC into an oscilloscope. These solutions require some additional hardware to route the analog signals to the PC for observation; they also require software that provides the graphical user interface to convert a PC display into an oscilloscope. Since most students have access to a PC or laptop today, we have designed the Analog System Lab such that a PC-based oscilloscope solution can be used along with ASLK PRO. We believe this will reduce the dependence of the student on a full-edged lab. In this chapter, we will review a solution for a PC-based oscilloscope. The components on the ASLK PRO can be used to build the interface circuit needed to convert the PC into an oscilloscope. One of the solutions for a PC oscilloscope is Zelscope [33] which works on personal computers running Microsoft Windows XP. The hardware requirements for the PC are modest (300+ MHz clock, 64+ MB memory). It uses the sound card in the PC for converting the analog signals into digital form. The Zelscope software, which requires about 1 MB space, is capable of using the digitized signal to display waveforms as well as the frequency spectrum of the analog signal. At the line in jack of the sound card, the typical voltage should be about 1 volt AC; hence it is essential to protect the sound card from over voltages. A buffer amplifier circuit is required to protect the sound card from overvoltages. Two copies of such a circuit are needed to implement a dual-channel oscilloscope. The buffer amplifier circuit is shown in Figure C.1 and has been borrowed from [32].

Limitations
 Not possible to display DC voltages (due to input capacitor of sound card blocks DC) Low frequency range (10 Hz-20 kHz) Measurement is not very accurate

+12V R2 47k 1/2W C3 100pF R1 1M C2 20pF D2 1N914 R4 3k D3 1N914 -12V D1 1N914

BNC

C1 0.1uF

TI082 RS 27k R6 100k

IVoutl<12V

RCA

Zin=1M IVinl<150V

R3 4.7k

S1

Figure C.1: Buffer circuit needed to interface an Analog Signal to Oscilloscope

page 88

Analog System Lab Kit PRO

Connection diagrams
Analog System Lab Kit PRO
page 89

Appendix D

appendix D

OP AMP TYPE I - A - INVERTING

OP AMP TYPE I - B - INVERTING

HD21 R15 HD19 R14 HD17 R13 HD15 R12 HD13 R11

R15 10K

HD21 R15 HD19 C14 R14 1uF

R15 10K R14HD20 4K7 C14 R13HD18 2K2 C13 R12HD16 1K C12 C14 1uF C13 0.1uF C12 0.1uF C11 0.01uF VCC+10 HD10 +10V OPAMP1A 1 OP1 HD12 -10V C10 0.1uF 2 HD23 3 OP1A OUT C20 0.1uF VCC-10 HD10 +10V OPAMP1A HD26 1 OP1 HD119 +10V OPAMP1B HD23 7 OP1 6 HD26 5 OP1B OUT HD20 C14 HD18 C13 HD16 C12 HD14 C11 HD8 C24 HD6 C23 HD4 C22 HD2 C21 VCC+10 HD119 +10V C24 1uF C23 0.1uF C22 0.1uF C21 0.01uF

R25 10K HD8 R24 C24 4K7 HD6 R23 C23 2K2 HD4 R22 C22 1K HD2 R21 C21 1K VCC+10 C24 1uF C23

HD25 R25 HD7 R24 HD5

R25 10K

HD25 R25 HD7 R24 HD5 R23 HD3 R22 HD1 R21

R14 4K7

R24 4K7

R13 2K2

HD17 C13 R13 0.1uF

R23 2K2

0.1uF R23 C22 HD3

R12 1K

HD15 C12 R12 0.1uF

R22 1K

0.1uF R22 C21 HD1

R11 1K

HD13 C11 R11 0.01uF

R11HD14 1K C11

R21 1K

0.01uFR21

VCC+10 C10 0.1uF HD11 HD9 OP1A INGND HD11 HD9 2 OP1A IN3 GND C20 0.1uF VCC-10

OPAMP1B 7 OP1 HD181 -10V

HD24 6 HD22 5

OP1B INGND

HD24 HD22

OP1B INGND

OP1B OUT OP1A OUT HD12 -10V HD181 -10V

VCC-10

VCC-10

Figure D.1: OP-Amp 1A connected in Inverting Configuration

Figure D.2: OP-Amp 1B connected in inverting configuration

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Analog System Lab Kit PRO

HD41 R35 HD45 R34 HD44 R33 HD42 R32 HD40 R31

R35 1K

HD41 R35 HD45 R34 C33 HD44 R33 0.01uF C32 HD42 0.1uFR32 C31 HD40 1uF R31 VCC+10 C30 0.1uF HD43 C33 HD47 C32 HD46 C31

R35 1K

R45 1K

HD63 R45 HD65 R44 HD64 C43 HD66 C42 HD58 C41 HD57 R43 HD56 R42 HD55 R41 VCC+10 C43 0.01uF C42 0.1uF C41 1uF

R45 1K

HD63 R45 HD65 R44 HD57 R43 HD56 R42 HD55 R41

R34 2K2

R34 2K2 C33 0.01uF C32 0.1uF C31 1uF VCC+10 HD37 +10V HD52 OP2A OUT C30 0.1uF 2 HD62 HD183HD37 +10V +10V OPAMP2B OPAMP2A 1 7 6 HD52 HD62 HD43 HD64 C33 C43 HD47 HD66 C32 C42 HD46 HD58 C31 C41 VCC+10 C43 0.01uF C42 0.1uF C41 1uF

R44 2K2

R44 2K2

R33 10K

R33 10K

R43 10K

R43 10K

R32 4K7

R32 4K7

R42 4K7

R42 4K7

R31 1K

R31 1K

R41 1K

R41 1K

HD183 +10V HD53 OPAMP2B 6 OP2B IN7 HD51 5 OP2B OUT OP2 OP2B IN+ HD180 -10V VCC-10 HD54 C44 GND 1uF C45 0.1uF C46 0.1uF R46 1K HD60 C44 HD48 C45 HD50 C46 VCC-10 HD61 R46 HD59 R47 HD49 R48 C44 1uF C45 0.1uF C46 0.1uF R46 1K HD61 R46 HD59 R47 HD49 R48 HD53 HD51 OP2B INOP2B IN+

HD38 HD36

2 OP2A INOP2A IN+ C40 3

OPAMP2A HD38 1 OP2A INHD36 OP2 OP2A IN+ HD39 -10V

3 OP2B OUT OP2 C40 0.1uF HD54 VCC-10

5 OP2 OP2A OUT

HD180HD39 -10V -10V

0.1uF VCC-10 HD35 R36 HD31 R37 HD32 R38 R36 1K C34 HD35 1uF R36 C35 HD31 0.1uFR37 C36 HD32 0.1uFR38 HD33 C34 HD30 C35 HD34 C36

R36 1K

C34 GND 1uF C35 0.1uF C36 0.1uF

HD33 HD60 C34 C44 HD30 HD48 C35 C45 HD34 HD50 C36 C46

R37 10K

R37 10K

R47 10K

R47 10K

R38 2K2

R38 2K2

R48 2K2

R48 2K2

Figure D.3: OP-Amp 2A can be used in both inverting and non-inverting configuration

Figure D.4: OP-Amp 2B can be used in both inverting and non-inverting configuration

Analog System Lab Kit PRO

page 91

appendix D

OP AMP TYPE II - A - FULL

OP AMP TYPE II - B - FULL

appendix D

OP AMP TYPE III - A - BASIC


VCC+10 C59 0.1uF HD70 HD69 2 OP3A INOP3A IN+ C58 0.1uF VCC-10 3 HD67 +10V OPAMP3A 1 OP3 HD68 -10V HD75 GND HD67 HD179 C71 100nF VCC+10 HD72 OP3A OUT

ANALOG MULTIPLIER - SET I

VCC+10 HD90 U1 1 2 3 SF HD82 4 5 HD85 -10V Y1 Y2 HD81 HD80 6 7 X1 X2 NC SF NC Y1 Y2 +VS NC OUT 14 13 12 11 10 9 8 HD89 HD88 HD87 OUT Z1 Z2

VCC

VCC+10 VCC+10 C59

+10V HD86 GND

X1 X2

HD84 HD83

+10V +10V gain configuration Figure D.5: OP-Amp 3A can be used in unity 0.1uF or any other custom configuration 2 OPAMP3A 6 OPAMP3B HD70 HD73 HD69 HD71 OP3A INOP3B INOP3A IN+ OP3B IN+ 3 5 C58 1 7 HD72 HD74 OP3 OP3 OP3A OUT OP3B OUT

C81 100nF

MPY634

Z1 Z2 NC -VS

HD68 OP AMP TYPE III - HD182 B - BASIC 0.1uF VCC-10 VCC-10 -10V -10V HD75 GND HD179 +10V HD73 HD71 6 OP3B INOP3B IN+ 5 OPAMP3B 7 OP3 HD182 -10V VCC-10 HD74 OP3B OUT

VCC-10

VC

C72 100nF

C82 100nF VCC-10

VCC+10

Figure D.6: OP-Amp 3B can be used in unity gain configuration or any other custom configuration

Figure D.7: Connections for analog multiplier MPY634 - SET I

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Analog System Lab Kit PRO

VCC+10 VCC+10 HD106 HD106 +10V +10V C81 C81 100nF 100nF OUT OUT Z1 Z1 Z2 Z2 VCC-10 VCC-10 HD97 HD97 -10V -10V C82 C82 100nF 100nF HD92 HD92 Y1 Y1 HD91 HD91 Y2 Y2 HD93 HD93 GND GND HD96 HD96 X1 X1 HD95 HD95 X2 X2 HD94 HD94 SF SF U2 U2 1 1 2 2 3 3 4 4 5 5 6 6 7 7 X1 X1 X2 X2 NC NC SF SF +VS +VS NC NC OUT OUT

VCC+10 VCC+10

VCC+10 VCC+10 HD112 HD112 U3 U3 1 1 2 2 3 3 HD102 HD102 SF SF HD99 HD99 Y1 Y1 HD98 HD98 Y2 Y2 4 4 5 5 6 6 7 7 X1 X1 X2 X2 NC NC SF SF +VS +VS NC NC OUT OUT

VCC+10 VCC+10

14 14 13 13 12 12 HD103 HD103 OUT OUT HD101 HD101 Z1 Z1 HD100 HD100 Z2 Z2

+10V +10V C91 C91 100nF 100nF HD108 HD108 GND GND

89 HD89

HD105 HD105 X1 X1 HD104 HD104 X2 X2

14 14 13 13 12 12 HD111 HD111 OUT OUT HD110 HD110 Z1 Z1 HD109 HD109 Z2 Z2

88 HD88

87 HD87

11 11 MPY634 MPY634 Z1 Z1 Z2 Z2 NC NC -VS-VS 10 10 9 9 8 8

11 11 MPY634 MPY634 Z1 Z1 Z2 Z2 NC NC -VS-VS 10 10 9 9 8 8

NC NC Y1 Y1 Y2 Y2

VCC-10 VCC-10 HD107 HD107 -10V -10V C92 C92 100nF 100nF

NC NC Y1 Y1 Y2 Y2

VCC-10 VCC-10

VCC-10 VCC-10

Figure D.8: Connections for analog multiplier MPY634 - SET II

Figure D.9: Connections for analog multiplier MPY634 - SET III

Analog System Lab Kit PRO

page 93

appendix D

ANALOG MULTIPLIER - SET II

ANALOG MULTIPLIER - SET III

appendix D

DAC I

VCC+5

VCC+5 R51 10K CS A T1 C51 100nF IOUT1 IOUT2 DA1 HD153 HD151 1 2 3 DBA11 DBA10
DBA11 DBA10 DBA9 DBA8 DBA7 DBA6 DBA5 DBA4 DBA3 DBA2 DBA1 DBA0

LDO

OUT JP3 HD137 CS

VCC+5 20 19 18 17 16 15 14 13 12 11 CS A DBA0 DBA1 DBA2 DBA3 DBA4 VCC+10 R54 10k HD171 HD169

VCC+5

DC/DC VOUT

IOUT1 IOUT2 GND DB11 DB10 DB9 DB8 DB7 DB6 DB5

RFB VREF VDD R/W

RFB VREF HD184 R/W

C52 100nF

HD138 CS

4 5 6 7 8 9 10

DBA8 DBA7 DBA6 DBA5

DB1 DB2 DB3 DB4

HD144

DBA11 DBA10 DBA9 DBA8 DBA7 DBA6 DBA5 DBA4 DBA3 DBA2 DBA1 DBA0

HD176 +10V HD136

+ 1 2 3 4 5 6 7 8 9 10 11 12

VCC+5 R52 220R

SW1

VCC-10 R53 220R

GND HD175 -10V

VCC+5 R62 220R

Figure D.10: connections for analog-to-digital converter DAC7821 - DAC I

page 94

Analog System Lab Kit PRO

DBB11 DBB10 DBB9 DBB8


_

DBB11 DBB10 DBB9 DBB8

DBA9

DAC7821

CS DB0

HD145

+1 2 3 4

SW2

VCC+5 VCC+5 HD138 CS T2 R61 10K CS B C61 100nF IOUT1 IOUT2 DA2 HD154 HD152 1 2 3 DBB11 DBB10
DBB11 DBB10 DBB9 DBB8 DBB7 DBB6 DBB5 DBB4 DBB3 DBB2 DBB1 DBB0

VCC+5 20 19 18 17 16 15 14 13 12 11 CS B DBB0 DBB1 DBB2 DBB3 DBB4 VCC+10 R64 10k HD172 HD170

VCC+5

RFB VREF HD184 R/W R54 10k

C52 100nF

IOUT1 IOUT2 GND DB11 DB10 DB9 DB8 DB7 DB6 DB5

RFB VREF VDD R/W

RFB VREF HD185 R/W

C62 100nF

4 5 6 7 8 9 10

DBB9 DBB8 DBB7 DBB6 DBB5

DAC7821

CS DB0 DB1 DB2 DB3 DB4

HD145

VCC+10

DBB11 DBB10 DBB9 DBB8 DBB7 DBB6 DBB5 DBB4 DBB3 DBB2 DBB1 DBB0

HD176 +10V HD136

HD178 +10V HD135

+ 1 2 3 4 5 6 7 8 9 10 11 12

VCC-10

GND HD175 -10V

VCC+5 R62 220R

SW2

VCC-10 R63 220R

GND HD177 -10V

Figure D.11: connections for analog-to-digital converter DAC7821 - DAC II

Analog System Lab Kit PRO

page 95

appendix D

DAC II

appendix D

DC/DC CONVERTER

HD142 Vin

VCC+10 JP9 DC/DC IN VIN C201 220uF

TP1 HD122

VIN 6 15V

CN5

HD120 VIN TP2

R201 100K

TP3 HD121 RC SS

C203 220nF U4

C204 220nF

C205 470pF ISNS DRV R204 0E C208 100nF GATE

R203
SRC 4

R202 0.03

1K

TPS40200

RC SS COMP FB

VDD ISNS DRV GND

8 7 6 5

COMP 3 C213 470pF R205 100K C207 33pF C206 4.7nF R210 1M C214 470nF 4

3
1 2 5 6

Q101 FDC5614P

DRAIN

TP4 HD126 L201 33uH D201 MBRS340 C202 68pF R206 25.5E TP7 HD127

TP5 HD128 VOUT R3 4K7 LD3

HD143 CN6

VOUT

TP6 HD124
FB

C209 330uF

C210 330uF

C211 10uF

C212 10uF

VOUT

TP8 HD123 JP8 3.3V 5V R211 41K2 R209 27K4 R207 100K R208 49.9

TP9 HD125

Figure D.12: Connections for TPS40200 Evaluation step-down DC/DC converter

page 96

Analog System Lab Kit PRO

VOUT 3.3V or 5V @ 0.125 2.5A

HD118 CN4 OUT R4 4K7 R101 247K LD4 IC1 1 2 3 4 C103 10uF JP6 IN C101 1uF C102 100nF HD116 JP7 OFF ON REG IN OUT

VOUT

VOUT GND

TPS7250

SENSE PG GND EN

OUT OUT IN IN

8 7 6 5

VCC+10

HD117 CN3

VIN

VIN GND

GND

ENABLE

Figure D.13: Connections for TP7250 low-dropout linear voltage regulator

TRANSISTOR SOCKET (MOSFET)

TRANSISTOR SOCKET (BJT)

HD115B DRAIN

HD141B HD115B COLLECTOR DRAIN

HD141B COLLECTOR

C D

2 2

G GATE

1
3

MOSFET SOCKET

BG 11 BASE GATE
3 3

TRANSISTOR SOCKET MOSFET SOCKET

HD114B

HD140B HD114B

HD140B B BASE 1

TRANSISTOR SOCKET

E S

HD113B SOURCE

HD139B HD113B EMITTER SOURCE

HD139B EMITTER

Figure D.14: MOSFET socket

Figure D.15: Bipolar Junction Transistor socket

Analog System Lab Kit PRO

VIN 5.5 -10 V

VOUT 5 V @250mA

page 97

appendix D

LDO REGULATOR

appendix D

DIODES

TRIMMERS

VCC+10 HD76B D2 HD78B HD131 +10V D2A HD77B D2K HD79B HD132 S1 HD129 D1K GND P1 1K

VCC-10 HD133 -10V P2 1K HD134 S2 HD130 GND

D1

D1A

Figure D.16: Diode sockets

Figure D.17: Trimmer-potentiometers

POWER SUPPLY
CN1 VCC+10 VCC+10

GENERAL PURPOSE AREA

HD29 +10V HD28 GND HD27 -10V

+10V CN2

VCC-10 -10V VCC+10 R1 6K8

VCC-10

LD1

VCC-10

R2 6K8 LD2

Figure D.18: Main power supply

Figure D.19: General purpose area (2.54mm / 100mills pad spacing)

page 98

Analog System Lab Kit PRO

Bibliography
List of references and related articles for further reading

Analog System Lab Kit PRO

page 99

Bibliography 1 of 2
[01]  ADCPro (TM) - Analog to Digital Conversion Evaluation Software. Free. Available from http://focus.ti.com/docs/toolsw/folders/print/adcpro.html [02]  F. Archibald. Automatic Level Controller for Speech Signals Using PID Controllers. Application Notes from Texas Instruments. Available from http://focus.ti.com/lit/wp/spraaj4/spraaj4.pdf [03] High-Performance Analog. Available from www.ti.com/analog

[04]  Wide Bandwidth Precision Analog Multiplier MPY634, Burr Brown Products from Texas Instruments, Available from http://focus.ti.com/lit/ds/sbfs017a/sbfs017a.pdf [05] B. Carter and T. Brown. Handbook Of Operational Amplifier Applications. Texas Instruments Application Report. 2001.  Available from http://focus.ti.com/lit/an/sboa092a/sboa092a.pdf [06] B. Carter. Op Amp and Comparators - Dont Confuse Them! Texas Instruments Application Report, 2001.  Available from http://tinyurl.com/carteropamp-comp [07] [08] B. Carter. Filter Design in Thirty Seconds. Application Report from Texas Instruments. Downloadable from http://focus.ti.com/lit/an/sloa093/sloa093.pdf B. Carter and R. Mancini. OPAMPS For Everyone. Elsevier Science Publishers, 2009.

[09]  FilterPro (TM) - Active Filter Design Application. Free software. Available from http://tinyurl.com/lterpro-download [10]  Thomas Kuehl and Faisal Ali. Active Filter Synthesis Made Easy With FilterPro V3.0. Tutorial presented in TI Technology Days 2010 (May), USA. Available from http://www.ti.com/ww/en/techdays/2010/index.shtml. [11]  J. Molina. DESIGN A 60Hz NOTCH FILTER WITH THE UAF42. Application note from Burr-Brown (Texas Instruments), 2000. Available from http://focus.ti.com/lit/an/sbfa012/sbfa012.pdf [12]  J. Molina. DIGITALLY PROGRAMMABLE, TIME-CONTINUOUS ACTIVE FILTER, 2000. Application note from Burr-Brown (Texas Instruments), http://focus.ti.com/lit/an/sbfa005/sbfa005.pdf [13] [14] [15] George S. Moschytz. From Printed Circuit Boards to Systems-on-a-chip. IEEE Circuits and Systems magazine, Vol 10, Number 2, 2010. Phase-locked loop. Wikipedia entry. http://en.wikipedia.org/wiki/Phaselocked loop R. Palmer. Design Considerations for Class-D Audio Amplifiers. Application Note from Texas Instruments.  Available from http://focus.ti.com/lit/an/sloa031/sloa031.pdf [16]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. OPAmp in Negative Feedback. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec7 and http://tinyurl.com/krkrao-nptel-lec8

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Analog System Lab Kit PRO

Bibliography 2 of 2
[17]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Frequency Compensation in Negative Feedback. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec16 and http://tinyurl.com/krkraonptel-lec17 [18] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Instrumentation Amplifier.  Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec11 [19]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Active Filters. Recorded lecture available through NPTEL. http://tinyurl.com/krkraonptel-lec12 [20]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Positive Feedback (Regenerative). Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-lec9 [21] K.R.K. Rao. Analog ICs. Self-Tuned Filter. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-ic-lec23

[22]  K.R.K. Rao. Analog ICs. Phase Locked Loop. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptelic-lec24, http://tinyurl.com/krkrao-nptel-ic-lec25, http://tinyurl.com/krkraonptel-ic-lec26, and http:// tinyurl.com/krkrao-nptel-ic-lec27 [23]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Voltage Regulators. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-26, http://tinyurl.com/krkrao-nptel-27, and http:// tinyurl.com/krkrao-nptel-28 [24] K.R.K. Rao. Electronics for Analog Signal Processing - Part II. Converters. Recorded lecture available through NPTEL. http://tinyurl.com/krkrao-nptel-28,

[25]  K.R.K. Rao. Electronics for Analog Signal Processing - Part II. AGC/AVC. http://tinyurl.com/krkrao-nptel-33, http://tinyurl.com/krkrao-nptel-34, http://tinyurl.com/krkrao-nptel-35, http://tinyurl.com/krkrao-nptel-36 [26]  K.R.K.Rao. Analog Ics Voltage Controlled Oscillator. Recorded lectures available from links: http://tinyurl.com/krkrao-vco-1, http://tinyurl.com/krkrao-vco-2 [27] [28] [29] [30] [31] [32] [33] Thomas Kugesstadt. Active Filter Design Techniques. Texas Instruments. Available from http://focus.ti.com/lit/ml/sloa088/sloa088.pdf Oscilloscope Solutions from Texas Instruments - Available from http://focus.ti.com/docs/solution/folders/ print/437.html PC Based Test and Instrumentation. Available from http://www.pctestinstruments.com/ SwitcherPro (TM) - Switching Power Supply Design Tool. http://focus.ti.com/docs/toolsw/folders/print/switcherpro.html Texas Intruments Analog eLAB - SPICE Model Resources. Macromodels for TI analog ICs are downloadable from http://tinyurl.com/ti-macromodels How to use PC as Oscilloscope. Available from http://www.trickswindows.com Zelscope: Oscilloscope and Spectrum Analyzer. Available from http://www.zelscope.com

Analog System Lab Kit PRO

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These materials are for academic and training usage: for teaching and learning purposes only. The materials are not warranted in any way for production use. Copyright Texas Instruments 2012.

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Analog System Lab Kit PRO

MANUAL
Authors K.R.K. Rao and C.P. Ravikumar Editor in Chief Zoran Risti Assistant Editor Miodrag Veljkovi Cover Design Danijela Krajnovi Graphic Design/DTP Aleksandar Nikoli Special Thanks to Harmanpreet Singh for his help in performing the additional experiments (Experiments 11-14) included in the new release of ASLK Pro. Publisher MikroElektronika Ltd. www.mikroe.com June 2012.

Analog System Lab Kit PRO

Analog System Lab Kit PRO Manual ver. 1.03b

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