IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

8, AUGUST 2013

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A High-Performance SPWM Controller for Three-Phase UPS Systems Operating Under Highly Nonlinear Loads
JEEVAN GUPTHA T E 1VA10EE015, 8th Semester Dept. of EEE SVIT, BANGALORE- 560064
AbstractThis paper presents the design of a high-performance sinusoidal pulsewidth modulation (SPWM) controller for three-phase uninterruptible power supply (UPS) systems that are oper-ating under highly nonlinear loads. The classical SPWM method is quite effective in controlling the RMS magnitude of the UPS output voltages. However, it is not good enough in compensating the harmonics and the distortion caused specifically by the nonlin-ear currents drawn by the rectifier loads. The distortion becomes more severe at high power where the switching frequency has to be reduced due to the efficiency concerns. This study proposes a new design strategy that overcomes the limitations of the classical RMS control. It adds inner loops to the closed-loop control system effectively that enables successful reduction of harmonics and com-pensation of distortion at the outputs. Simulink is used to analyze, develop, and design the controller using the statespace model of the inverter. The controller is implemented in the TMS320F2808 DSP by Texas Instruments, and the performance is evaluated ex-perimentally using a three-phase 10 kVA transformer isolated UPS under all types of load conditions. In conclusion, the experimental results demonstrate that the controller successfully achieves the steady-state RMS voltage regulation specifications as well as the total harmonic distortion and the dynamic response requirements of major UPS standards.

Index TermsInverter, nonlinear load, sinusoidal pulsewidth modulation (PWM) control, uninterruptible power supply (UPS).

I. INTRODUCTION THE increased use of rectifiers in critical loads employed by the information technologies, and medical and military equipment mandate the design of uninterruptible power supplies (UPS) with high-quality outputs [1][3]. The highly nonlinear currents drawn especially by high-power single-phase rectifier loads greatly distort the UPS outputs. The distorted UPS volt-ages cause generation of low dc voltage at the output of the rectifier loads, which causes high current flow, increased power losses, and possibly the malfunction of the critical load or the UPS. The distortion is resulted mainly by the voltage drop across

Manuscript received June 18, 2012; revised September 8, 2012; accepted October 22, 2012. Date of current version January 18, 2013. This work was supported in part by Kaynak Electronic Machine Industry and Trade Co. Ltd. (KEMSAN), Eskisehir, Turkey. Recommended for publication by Associate Editor Q.-C. Zhong. The author is with the Department of Electrical and Electronics Engineering, Eskisehir Osmangazi University, Eskisehir 26480, Turkey (e-mail: btamyurek@ogu.edu.tr). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2012.2227817

the inductive element of the LC filter due to the nonsinusoidal current at the output of the inverter [4] [6]. In a UPS system, the inverter is responsible for synthesizing sinusoidal voltages from a dc source through the pulse width modulation (PWM) of the dc voltage. The inductive element here is needed to remove the switching frequency harmonics from the current waveform that are gen-erated by the PWM operation of the inverter. The inductance value can be reduced if the switching frequency is increased. But, in practice, it has an upper limit at high power inverters due to the efficiency concerns and the switching device limita-tions. So, for the selected switching frequency and the power level, an optimum filter with a smallest inductance can be de-signed, but the distortion cannot be completely avoided, and the regulations and the customer specifications may not be satis-fied. The solution to this problem is to design a proper inverter controller such that it generates a control signal with multiple functionalities. This signal must carry information to produce sinusoidal voltages with small steady-state RMS error, to pro-vide fast transient response and corrective actions to reduce distortion even under highly nonlinear loads. Therefore, a ma-jor research has been conducted to design such controllers for the highperformance UPS systems [2][5], [7][36]. The high-performance controllers in general employed multiloop state feedback control strategies to achieve the regulation specifi-cations [9][12]. Moreover, the dead-beat control method [13] and the predictive and repetitive control methods [14][21] have been widely investigated and proposed among researchers. In addition, the iterative [22] and adaptive learning control meth-ods [23], the H-infinity control method [24], [25], the feedback linearization method [26], and recently the multisampled con-trol approach to improve the control performance [27] have been studied and evaluated. High-quality output voltages with sub-stantially low total harmonic distortion (THD) and fast dynamic response have been demonstrated with these methods. However, the disadvantages such as implementation complexity and the problems caused by highly unbalanced loading ma y limit some of the benefits of these methods. The stationary or synchronous-frame space-vector PWM (SVPWM)-based controllers are the primary choice of many researchers and the applications currently used in industry, to-day [4], [7]. However, the classical sinusoidal PWM (SPWM) method is still preferred by many manufacturers because of its implementation simplicity, easy tuning even under load, flexi-bility, and most importantly the advantages of controlling each phase independently. The independent regulation of each phase

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provides easy balancing of three-phase voltages which makes heavily unbalanced loading possible. Also, it avoids problems such as transformer saturation. Although the classical SPWM method is quite effective in controlling the RMS magnitude of the UPS output voltages, it is not good enough in compensat-ing the harmonics and the distortion caused specifically by the nonlinear loads [28], [29]. For example, the total harmonic dis-tortion (THD) is greater than 5% limit even with good filtering. It becomes more severe at high-power UPSs where the switch-ing frequency has to be reduced due to the efficiency and heating problems. This study proposes a multiloop high-performance SPWM control strategy and a design that overcome the limitations of the classical RMS control. It adds inner loops to the closed-loop feedback control system effectively that enables successful reduction of harmonics and compensation of distortion at the voltages. The experimental setup using the proposed controller achieves 3.8% THD under the nonlinear load having a crest factor of 3 and absorbing power equal to the rated power of the UPS. Recently, the proportional plus resonant (PR) controller has gained popularity because of its simple structure and high performance. The PR controller method basically provides a high gain only at the desired frequencies (mostly at the fundamental frequency of an input or an output) and therefore very effective in correcting the steady-state error and obtaining a good tracking of the reference at the reference frequency [30][32]. According to the recent literature, it is a very popular control method for grid tied inverters and PFC rectifiers where the current is con-trolled in such a way that it tracks the grid voltage for high power quality [33]. Because of its popularity, we evaluated the method for our UPS application. According to our simulation studies, the proposed multiloop controller performs better than the PR controller and achieves 20% less THD. However, when the PR controller is combined into the proposed controller, the result changes in the favor of the combined controller and it achieves 2.5% THD. The details of the controller and some simulation results are given in Section VII. One limitation of the PR method is the possible shifting of frequencies caused by the calculation errors when digitally implemented. For example, if 50 Hz or other harmonic components change frequency, the controller coefficients may need to be re-calculated. And online calculation is not practical. In addition, the gain at the desired frequency may go to infinity. Therefore, a filter that has a little wider bandwidth must be designed. This reduces the gain. But, then there might be an interference of other frequencies. The harmonic droop method is another technique that has ap-peared also recently [34], [35]. If it is implemented effectively, it can eliminate all the harmonic distortions from the wave-form. The harmonic droop method determines each harmonic component of the current through a fast Fourier transform and then applies a droop strategy to cancel the effect of these har-monics. In other words, harmonic droop method reduces the harmonics at the output by injecting harmonics into the voltage reference. This method is based on modeling the inverter as a source delivering real and reactive power to a load through

an impedance. It extends the model including all the harmonic components of the power transferred through this impedance. In other words, it treats each harmonic in an inverter system in-dividually. It uses a droop strategy to cancel the power transfer at the harmonic frequencies and therefore eliminate the distor-tion at the output voltage caused by the voltage drop across the inverter impedance due to the harmonic currents. The major disadvantage of the method is that it requires heavy computa-tion involved in calculating the real power and reactive power at each frequency. Therefore, the switching frequency is limited to a low level [34]. In [30], the authors state, The deciding criterion when select -ing the appropriate control scheme usually involves an optimal tradeoff between cost, complexity and waveform quality needed for meeting waveform quality standards . . .. In other words, if you believe that the controller you selected for your application satisfies the waveform quality requirements, then you would naturally look for the one that is the lowest in cost and the simplest one so that your implementation effort is reduced. In practice, the low cost and simplicity contribute to a product that is very competitive in the market. As far as the steady-state regulations, the THD, and the dy-namic response performances, the proposed method yields similar results compared to the other classical methods, and success-fully satisfies the waveform quality requirements of the major UPS standards. So, from the point of view of performance, the proposed controller does not seem to have a prominent significance over the others. However, the significance of the proposed multiloop controller compared to other methods is as follows: 1) The execution time is less and allows higher switching frequencies. The complex control algorithms take longer execution times and may limit the upper boundary of the switching frequency where you have actually some al-lowance for higher switching frequency operation [36]. Examples to the complex controllers are the repetitive, predictive, and harmonic droop controllers. 2) The cost is low. Some control algorithms require precise floating point calculations either because they depend on a precise model or they use frequency-dependent sensi-tive controller gains. In brief, the precision dictates use of high-performance floating point expensive microcon-trollers. The current implementation of the proposed con-troller is using a low-cost fixedpoint 32-bit DSP controller (TMS320F2808), but it can also be implemented using any 32- or 16-bit microcontroller for further cost reduction. 3) The easy tuning even under load: Some are robust to this kind of tuning and some may not. This feature is pre-ferred by some manufacturers. The easy tuning of the proposed method under load is verified during the experi-mental studies. 4) The flexibility: It means that you can modify your con-troller and optimize it according to the customer speci-fications at the time of installation or later in use. The optimization may include obtaining the lowest THD or the best tracking of the RMS value or the fastest dynamic response. So, the controller should be flexible anytime to

TAMYUREK: HIGH-PERFORMANCE SPWM CONTROLLER FOR THREE-PHASE UPS SYSTEMS OPERATING

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Fig. 1. Single-line diagram of a typical three-phase four-wire transformer isolated UPS system.

do any of the aforementioned optimizations without sig-nificantly affecting the others. We have also verified this feature experimentally. 5) The scalability: It means that the controller is easy to design and tunable for any power level. Consequently, this paper favors the proposed multiloop con-troller and presents the work according to the following organi-zation. Section II provides a short description of a typical three-phase UPS system. Then, Section III presents the analysis of the inverter power stage and obtains the state-space model of the inverter. The modeling is followed by the inverter power stage design in Section IV. The control system design is presented in Sections V and VI. Section VII presents the simulation results where the whole design is verified. Finally, the experimental results are presented in Section VIII and the conclusions are given in Section IX. II. SYSTEM DESCRIPTION
The single-line diagram of a typical three-phase four-wire transformer isolated UPS system is given in Fig. 1. The three-phase thyristor-based controlled rectifier converts the mains voltages into a constant dc and also provides standalone charge to the batteries. Then, a six-switch PWM voltage source inverter (VSI) creates balanced three-phase sinusoidal voltages across the load terminals at the utilization frequency and magnitude. The LC low-pass filter removes the harmonics generated by the PWM switching. The -winding of the transformer blocks the third harmonic currents at the inverter side, and the zigzag wind-ing provides a neutral point and zero phase difference for the load-side voltages. The load can be a three-phase or a single-phase load ranging from linear to nonlinear load with a crest

factor up to 3. The UPS uses a digital controller implemented in a fixed-point DSP controller. III. ANALYSIS OF THE UPS INVERTER POWER STAGE
This section obtains the state-space model of the inverter stage of a three-phase UPS in order to design the controller for the in-verter. The developed model is also used to study the controller performance for the lowest THD of the output voltage while maintaining the stability and a good dynamic response under all load conditions. The model is developed based on the circuit schematic given in Fig. 2. As shown in Fig. 2, an insulated gate bipolar transistor (IGBT)-based three-phase inverter is used to produce pulse-width modulated voltages across the terminals labeled as 1, 2, and 3. Moreover, L is the external filter inductor used to reduce ripple at the line current, Llk 1 is the primary side leakage, and L is the magnetizing inductance of the trans_ _ _ former; then L lk 2 is the secondary side leakage inductance, C is the filter capacitor, and finally R is the load resistance (the prime symbol represents the parameters referred to the -side of the transformer).

Writing the voltage equations at the -side of the transformer yields the following sets of equations for the line-to-line voltages across the inverter terminals, (1) as shown at the bottom of the page. Similarly, writing the current equations yields the following sets of equations for the derivative of the transformer secondary currents:

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 8, AUGUST

Fig. 2. UPS inverter stage including the -zigzag transformer equivalent circuit and the resistive load.

In addition, the inverter terminal voltages given in (1) can also be written in terms of the moving average of the switching Likewise, the following sets of equations are obtained for the state variables and the control signals as the inputs derivative of the referred output voltages based on the output parameters: functions, the modulation ratio ma , and the dc bus voltage Vdc . The moving average of the switching functions is actually equal to the control signals that are applied to the comparators to generate the PWM signals for the inverter switches. Consequently,
the following sets of equations give the averaged model of the

PWM generator and the three-phase inverter operation [37]:

where ucont a bc represents the control signals produced by the controller for each inverter leg. The modulation ratio ma is equal
_

to the peak of the control signal U cont divided by the peak of to the peak of the control signal U cont divided by the peak of
_

the triangular carrier waveform V tri . Although the parameter

_

V tri is always constant, Vdc may be changing depending on the grid conditions. It is relatively constant when grid is okay due to the controlled rectifier, but it is varying when grid is gone and the inverter works from the battery pack. These conditions are studied during the performance testing of the controller. Deriving the derivative of the delta winding currents from (1) first, then using them in (2), and also using (4) for the inverter terminal voltages, the following sets of the state-space equations are obtained. These equations are based on selecting the referred transformer secondary currents and the output voltages as the
TAMYUREK: HIGH-PERFORMANCE SPWM CONTROLLER FOR THREE-PHASE UPS SYSTEMS OPERATING

Defining the parameters L1 , L2 , and L3 as given next allows compact entries of the matrices A and B

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TABLE I MAJOR UPS DESIGN SPECIFICATIONS

Using the aforementioned definitions together with L, the

a resistive load and used the classical methods and the rule of thumbs suggested in the power electronics literature. However, this design did not give a good performance under nonlinear loads. Then, it is improved via simulation studies until the desired performance is achieved for all load cases. The improvements included determination of the proper dc bus voltage, switching frequency, transformer parameters, and the element values of the LC filter. Our preliminary design goal is to maintain the THD always below 4% under the worst case. The worst case is defined as

terms Aij

and Bij

Become

the instant dc bus voltage is at the minimum while the UPS is

We also need to determine the current through the external

filter inductors at the inverter output (ia , ib , and ic ) since they are used as the feedback in the closed-loop control system. These

currents are the transformer delta winding currents converted into the line currents. The following sets of equations yield the derivatives of the delta winding currents: The entries Oij and Gij in the aforementioned matrices are found using The state-space model of the proposed inverter design is given in the next section after the design parameters are determined based on the given specifications.

a resistive load and used the classical methods and the rule of thumbs suggested in the power electronics literature. However, this design did not give a good performance under nonlinear loads. Then, it is improved via simulation studies until the desired performance is achieved for all load cases. The improvements included determination of the proper dc bus voltage, switching frequency, transformer parameters, and the element values of the LC filter. Our preliminary design goal is to maintain the THD always below 4% under the worst case. The worst case is defined as the instant dc bus voltage is at the minimum while the UPS is delivering the rated nonlinear load. For that reason, selecting the nominal modulation ratio around 0.7 is considered optimum since it guarantees the linear PWM operation under the worst case. The simulation studies have shown that if the controller goes into overmodulation region, the THD specification cannot be satisfied. Therefore, the nominal dc bus voltage is maintained at 405 V when grid is okay and it is allowed to reduce down to 300 V when grid is gone and the UPS operates from the battery pack. One string of the battery pack consists of 30 pieces of 12 V lead-acid batteries connected in series. Thus, the controller achieves 3.54% THD at the worst case where the modulation ratio is almost 1.0. The switching frequency is selected as 10.05 KHz. The inverter uses CM100DU-12F Powerex IGBTs that allow re

liable operation at the selected frequency. A 10 kVA, 3

(170/220)V, -zigzag connected transformer having a total series leakage reactance of 3.33%, which corresponds to 920 H,

is used for galvanic isolation and step-up purposes. Based on the results of the previous research, as presented in [4][6], and based on our simulation studies, it has been realized that the output impedance of an inverter plays an important role in reducing the THD of the output voltage. And the results show that the THD of the voltage can be improved if the output impedance is reduced [5] or the impedance is modified to become even more capacitive in nature [6]. Our approach to design

the LC filter is to start first with finding practically the smallest inductance value, and then finding the capacitance value based on filtering requirement of the switching frequency ripple at the output voltage. Generally, the inductance is selected based on the current ripple, size, and dynamic response criteria. Since we want the smallest inductance, we base our inductor design on the ripple requirement. The current through the inductor also flows through the IGBTs of the three-phase inverter at every switching cycle. So, based on our experience, allowing 30% ripple at the current is considered a good compromise between the size

and the efficiency requirements. More than 30% ripple allows smaller inductance but causes larger turn-off switching losses. Hence, the inductance is calculated based on the aforementioned ripple specification, and then the capacitance value is calculated in such a way that the LC filter produces 30 dB attenuation at the switching frequency. So, using the aforementioned criteria,
the filter inductance is found as 1010 H at the inverter side and the capacitor is 120 F placed at the load side. The calculated

inductance yields around 30% current ripple at the inverter line currents at the full linear load and a corner frequency of 352 Hz for the LC filter. As shown in Fig. 3, an external inductor equal
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x 10

Step Response

4 2

Kp2=3 Kd=0
Kp3=0

Amplitude

0 2 4 6 0 0.01 0.02 0.03 0.04

Time (sec)

(a)
Step Response
0.5 0.45 0.4 0.35

Kp3=0 Kp3=0.75 Kp3=1

Amplit ude

0.3 0.25 0.2 0.15 0.1 0.05 0 0 1 2 3 4 5 6 7 x 10 8

3

For Kp2=3 and Kd=3

Time (sec)

(b)

Fig. 6. Step response analysis of the closed-loop control system: (a) for Kp2 = 3, Kd = 0, and Kp3 = 0; (b) for Kp2 = 3, Kd = 3, Kp3 = 0 (blue), Kp3 = 0.75 (green), and Kp3 = 1.0 (red).

impulse response, pole/zero, Nyquist, and so on. To use this tool, we need to select linearization input and output points in the Simulink model. As shown in Fig. 4, one input and two out-put points are placed to determine the loop gain and to analyze the dynamics of the main control loop and the dynamics from the control to the output. The controller parameters are determined as follows. Based on the steady-state voltage regulation and transient response specifications given in Table I, first the gains of the main volt-age loop are determined as Kp1 = 2 and Ki = 0.05, as shown in Fig. 5. Then, the Kp2 = 3 is determined for the practical lowest THD while Kd and Kp3 are adjusted to maintain a sta-ble operation. The

proper gains for Kd and Kp3 are obtained using the control design tool for the lightly loaded case in the model shown in Fig. 4. The lightly loaded case is the worst case in terms of the stability. Fig. 6 shows the results of the step response analysis and also illustrates the steps of the process

how the controller parameters are determined. When only the ac inner voltage loop is active, that is, Kp2 = 3, Kd = 0, and Kp3 = 0, as mentioned before, the system is unstable as seen in Fig. 6(a). On the other hand, the derivative control where Kp2 = 3, Kd = 3, and Kp3 = 0 stabilizes the system, but not very effectively [the blue waveform in Fig. 6(b)]. However, a more effective stable operation is obtained when the third loop (the inner ac current loop) is activated. Fig. 6(b) shows the results for Kp2 = 3, Kd = 3, and Kp3 = 0.75 as the green waveform, and for Kp2 = 3, Kd = 3, and Kp3 = 1 as the red waveform. Consequently, Fig. 7 shows the complete con-trol system schematic implemented in the Texas Instruments TMS320F2808 fixed -point DSP controller. The controller uses signed 32-bit fixed-point IQ numbers with fraction length set to 10 for all calculations. Finally, the selection of the switching frequency is critically important in the elimination of the harmonics and the distortion at the voltages. The high switching frequency allows a larger voltage loop bandwidth which enables the controller to produce corrective actions to compensate for the fast changing oscilla-tions at the voltage waveform effectively. In other words, the right control action can only be constructed if the controller acts quicker than the fastest change within the distortion. There-fore, the switching frequency should be optimized based on the acceptable THD versus the switching losses and the efficiency. Based on the simulation results, it is found that 10.05 KHz is the optimum switching frequency for the given application (10 kVA three-phase UPS using the SPWM switching method). From the datasheet of the selected DSP, the peak of the carrier waveform is determined as 2487 for the symmetrical carrier and for the selected switching period. VII. SIMULATION RESULTS A. Proposed Multiloop Controller
The simulations are done in the MATLAB/Simulink environ-ment using the Simulink and PLECS model of the inverter and the controller as shown in Fig. 8. The results are evaluated based on steady-state error, transient response, and the THD of the out-put voltage. Fig. 9 shows the RMS value and the percent THD of the output voltage versus three different loads. According to Fig. 9, when the linear load at 8.5 kW is applied, the controller achieves 0.3% THD, and similarly when the nonlinear load at 10 kVA is applied, the controller achieves 3.1% THD. In addition, the RMS voltages are very well regulated at 220 V for each phase with an excellent transient response for the linear load but a fair response for the nonlinear load case. The transient response from no-load to the rated nonlinear load is oscillatory and it takes 1.1 s; however, the maximum fluctuation in the RMS voltage is less than 10% of the nominal (198242 V). We con-sider this as an expected behavior for the nonlinear load case since the capacitor of the rectifier is made fairly large to get the desired crest in current; additionally, it is all empty before the load is applied. At the instant, the rectifier loads are switched in, a very large inrush current flows into these capacitors. So, it is this current that causes the oscillatory behavior. As mentioned before, the nonlinear load is a full-bridge diode rectifier load

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Fig. 7. Proposed multiloop inverter controller implemented in the Texas Instruments TMS320F2808 fixed -point DSP controller.

Fig. 8. Simulink model of the inverter system.

RMS Volta ge (V)
240

220

200 0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.1

1.2

% THD

2 0 0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.1

1.2

15000

Power (VA)

10000 5000 0 0.2 0.3

Nonlinear 8500 W Linear

0.4 0.5 0.6 0.7 0.8 0.9 1

Nonlinear

1.1

1.2

Fig. 10. Inner loops of the control system: the PR controller is combined with the derivative controller.
Time (s)

Fig. 9. RMS fluctuations (top trace) and the profile of the percent THD of the output voltages (second trace) versus the load delivered by the inverter (bottom trace). The simulated load consists of a light load, the linear full load, and the nonlinear full load.

placed between each phase and the neutral as shown in Fig. 3. In conclusion, the simulation results demonstrate the effectiveness of the proposed multiloop controller system and also verify the design.

Fig. 11. Inner loops of the control system: the PR controller is combined into the proposed multiloop controller.

B. Comparison of the Proposed Controller and the PR Controller

In order to judge the performance of the proposed controller, we selected the PR controller as the bench mark and compared the results of each. The PR controller has gained very good popularity in many inverter applications especially where an

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Fig. 12. Measured three-phase output voltages and the load current of one phase for the following four cases: (a) the case where only the single-loop controller is used with the linear full load, (b) the same controller with the nonlinear full load, (c) the case where the proposed multiloop controller system is used with the linear load, and (d) the same multiloop controller with the nonlinear full load. The scale of the vertical axis is 100 V/div for the purple, orange, and blue waveforms, and 20 A/div for the green waveforms. The scale of the horizontal axis is 2.5 ms/div.

excellent reference tracking is desired. Fig. 10 shows the details of the inner loops of the control system for the PR controlled UPS. Note that the controller includes a derivative controller that compensates Error1. Without the derivative, the PR con-troller alone achieves a THD of 4.65%, and with the derivative the THD becomes 3.88%. The gains of the PR are adjusted to get the best THD with enough phase margins. So, combining the PR with the derivative improves the performance for this case. Nevertheless, the proposed multiloop controller with 3.1% THD performs better than the PR controller given in Fig. 10 achiev-ing 20% less THD. On the other hand, when the PR controller is combined into the proposed controller as shown in Fig. 11, the result changes in the favor of the combined controller and it achieves 2.5% THD. The results confirm two points: our multiloop strategy is good for this application and the PR con-troller performs very well within a multiloop strategy. However, according to the reasons that are discussed in Section I, the proposed method is preferred and implemented for this UPS application.

VIII. EXPERIMENTAL RESULTS

A UPS system rated at 10 kVA, 50 Hz, 380 V was built and tested to evaluate the performance of the controller and the de-sign. The implemented system uses the component values given in the PLECS simulation model of the converter shown in Fig. 3 (in Section IV) for the inverter part and the values given in Fig. 7 (in Section VI) for the controller part. In Fig. 12, we compare

the results of the multiloop design against the single-loop (only the RMS control) design in order to demonstrate the performance of the proposed multiloop controller. Fig. 12 compares the measured three-phase output voltages and the current of one phase for two loading conditions: the linear full load and the nonlinear full load. Fig. 12(a) and (b) show the results when only the RMS control is used (single-loop), for this case the control achieves 1.96% THD for the linear and 9.68% THD for the nonlinear load. It is clear that the RMS control alone cannot achieve an acceptable THD under nonlinear loading at the rated UPS output power. The waveforms in Fig. 12(c) and (d) show the results when the proposed multiloop controller is used for the same loading conditions. In this case, the controller achieves 1.11% THD for the linear load and 3.8% THD for the nonlinear load. The crest factor of the current in Fig. 12(d) is measured as 2.8. The THD measurements given previously and also shown in Fig. 13 were taken by the 3196 HIOKI power quality an-alyzer. The upper trace in Fig. 13 shows the profile of the % THD of the output voltage of one phase versus the three dif-ferent loading conditions: nonlinear full load, linear full load, and no load. The lower trace shows the total output apparent power delivered into these loads. The test was set up to supply each load approximately over a one-min interval. As shown in the lower trace of Fig. 13, the UPS was initially loaded with the rated single-phase rectifier load, then no load, 1 min later a resistive load at 8.5 kW, and finally the same rectifier load is applied again. According to Fig. 13, the test results show that the

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Fig. 13. Upper trace is the profile of the %THD of the output voltage of one phase measured for three different loading conditions. The lower trace is the total output apparent power delivered by the UPS into these loads.

Fig. 15. Measured transient response of output voltages (upper trace) and currents (lower trace) when the load changes from no load to the full linear load. The scale of the vertical axis of upper trace is 100 V/div, and the lower trace is 25 A/div. The scale of the horizontal axis is 2 cycle/div.

Fig. 16. Measured transient response of the output voltages (upper trace) and the currents (lower trace) when the load changes from no load to the rated singlephase rectifier load placed at each phase. The scale of the vertical axis of upper trace is 100 V/div, and the lower trace is 25 A/div. The scale of the horizontal axis is 2 cycle/div.

Fig. 14. Records of events occurred during dynamic response tests (a) when the linear full load is switched in and out and (b) when the nonlinear full load is switched in. The scale of the vertical axis is percent of nominal voltage. The horizontal axis is in seconds.

proposed multiloop controller corrects the distortion at the volt-ages successfully and achieves a THD below the specifications for loading conditions that a typical UPS is subjected to. We can confidently say that the experimental results closely follow the simulation results except a minor (0.7%) increase in the overall THD readings. But, it is also clear from Fig. 13 that this increase is measured for all load conditions. And it is not specific to the nonlinear case only. So, in brief, the implications are that this overall increase is due to the unpredicted parasitic effects. The dynamic response test results are presented in Figs. 14 and 16. Fig. 14(a) shows the records of events occurred when the linear full load is switched in and out, and Fig. 14(b) shows the events when the nonlinear load is switched in. According to these results, the transient voltage magnitude regulation for lin-ear loads is less than 10% of the nominal, but for the nonlinear loads, the regulation slightly exceeds the 90% limit. However, the dip stays within the ITIC curve limits. The dip is due to the charging of large capacitors at the rectifier side with large inrush

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currents. The maximum regulation time for all the load cases is 60 ms, which satisfies the specifications. The measured transient response of output voltages and cur-rents when the load changes from no load to the full linear load is given in Fig. 15, and that of output voltages and currents when the load changes from no load to the rated single-phase rectifier load at each phase is given in Fig. 16. Both measurements were taken by the 3196 HIOKI power quality analyzer. The magnitude of the inrush current in Fig. 16 goes as high as 400 A. Also the current waveforms have unsymmetrical magnitudes because of the dc offset, which lasts around 0.5 s due to the time constant of the RC part of the rectifier load. In conclusion, the over-all results demonstrate that the proposed multiloop controller achieves good transient behavior under all loading conditions and complies with the ITIC standards. IX. CONCLUSION
This paper presents the analysis and design of a high-performance SPWM controller for three-phase UPS systems powering highly nonlinear loads. Although the classical SPWM method is very successful in controlling the RMS magnitude of the UPS output voltages, it cannot effectively compensate for the harmonics and the distortion caused by the nonlinear cur-rents drawn by the rectifier loads. Therefore, this paper proposes a new strategy with a new design that overcomes the limitations of the classical RMS control. It adds inner loops to the closed-loop control system effectively that enables successful reduction of harmonics and compensation of distortion at the voltages. The controller performance is evaluated experimentally using a three-phase 10 kVA transformer isolated UPS. A THD equal to 3.8% at the output voltage is achieved even under the worst nonlinear load. The load consists of three singlephase recti-fiers connected between each line and the neutral and absorbing power equal to the rated power of the UPS with a crest factor up to 3. In conclusion, the experimental results demonstrate that the proposed controller successfully achieves the steady-state RMS voltage regulation specification as well as the THD and the dynamic response requirements of major UPS standards.

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[29] Y.-W. Tzou and S.-L. Jung, Full control of a PWM DC-AC converter for AC voltage regulation, IEEE Trans. Aerosp. Electron. Syst., vol. 34, no. 4, pp. 12181226, Oct. 1998. [30] R. Teodorescu, F. Blaabjerg, M. Liserre, and P. C. Loh, Proportional reso -nant controllers and filters for grid-connected voltage-source converters, in Proc. Inst. Elect. Eng., Elect. Power Appl., vol. 153, no. 5, pp. 750762, Sep. 2006. [31] S. A. Khajehoddin, M. Karimi-Ghartemani, P. K. Jain, and A. Bakhshai, A resonant controller with high structural robustness for fixed -point digital implementations, IEEE Trans. Power Electron., vol. 27, no. 7, pp. 33523362, Jul. 2012. [32] R. Cardenas, C. Juri, R. Pena, P. Wheeler, and J. Clare, The application of resonant controllers to four -leg matrix converters feeding unbalanced or nonlinear loads, IEEE Trans. Power Electron., vol. 27, no. 3, pp. 1120 1129, Mar. 2012. [33] M. X. Xu, D. Xu, P. Lin, M. Chen, J. Ni, and T. Zhang, Understanding repetitive control and resonant control, in Proc. 3rd IEEE Inter. Symp. Power Electron. Distrib. Gen. Syst., 2012, pp. 621627. [34] Q.-C. Zhong, Harmonic droop controller to reduce the voltage harmonics of inverters, IEEE Trans. Ind. Electron., vol. 60, no. 3, pp. 936945, Mar. 2013. [35] J. Rocabert, A. Luna, F. Blaabjerg, and P. Rodriguez, Control of power converters in AC microgrids, IEEE Trans. Power Electron., vol. 27, no. 11, pp. 47344749, Nov. 2012. [36] H. Deng, R. Oruganti, and D. Srinivasan, A simple control method for high performance UPS inverter through output impedance reduction, IEEE Trans. Ind. Electron., vol. 55, no. 2, pp. 888898, Feb. 2008.

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Bunyamin Tamyurek (M99) was born in Artvin, Turkey, in 1970. He received the B.S. degree in elec-trical engineering from Yildiz Technical University, Istanbul, Turkey, in 1991, and the M.S. and Ph.D. de-grees in electric power engineering from Rensselaer Polytechnic Institute, Troy, NY, in 1996 and 2001, respectively.
From 2001 to 2003, he was with the American Electric Power, Corporate Technology Development Department, Groveport, OH, where he was involved in the evaluation and testing of the sodium sulfur (NAS) battery systems. While at the AEP Dolan Technology Center, he was a System Expert for the battery and associated interface during the installation of the first U.S. NAS battery energy storage system demonstration project. In 2004, he joined as a Faculty in the Department of Electrical and Electronics Engineer-ing, Eskisehir Osmangazi University, Eskisehir, Turkey. His current research interests include high-power-quality switch-mode rectifiers, energy storage sys-tems, UPS systems, frequency converters, and photovoltaic inverters.

Dr. Tamyurek was an Associate Editor for Letters of the IEEE TRANSACTIONS ON POWER ELECTRONICS between 2006 and 2010. 3694 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 8, AUGUST 2013

Fig. 3. PLECS model of the designed inverter power stage including deltazigzag transformer, the LC filter, the measurements, and the linear and nonlinear loads.

to 30H is added at each line to arrive at the required filter inductance value. Finally, the test loads are designed as three different Y-connected loads: the first one represents a linear light load at 338 W, the second one is the linear load at 8.5 kW, and the last one is the nonlinear rectifier load at 10 kVA. The nonlinear load, which consists of three full-bridge rectifiers connected between each phase and the neutral, is constructed according to Interna-tional Standard IEC
62040-3 [1]. The rectifier load resistor is selected as 33 to dissipate total 6.6 kW equal to 66% of the rated three-phase output power, and the series input resistor is selected as 0.58 to dissipate total 400 W equal to 4% of the rated output power. Additionally, the selected rectifier parame-ters generate a current waveform with a crest factor of 3 when tested with good mains voltages. The value of crest is important since the specification of products requested by many customers today require the UPS to handle loads up to 3 crest factor while allowing a THD no more than 5%.

Finally, the schematic of the inverter with the parameter values optimized for all load conditions is shown in Fig. 3. The inverter circuit is modeled in the piecewise linear electri-cal circuit simulation (PLECS) which is a Simulink toolbox for system-level simulations of electrical circuits developed by Plexim. V. STATE-SPACE MODEL OF THE INVERTER POWER STAGE The state-space model of the plant (three-phase inverter) is needed to develop and test the controller performance.
So, using L = 30 H, L = 1 H, Llk 1 _

100 H, C = 202 F, Vdc = 405 V, Vtri = 2487, R = 10 for full load and R = 255 for the light load case in (5) through (13), the state-space model of the plant is obtained as shown in Fig. 4. The peak of the carrier waveform is obtained based on the type of the selected DSP and the switching frequency. The details of the controller are discussed in the next section.

VI. CONTROLLER DESIGN

This section presents the design of the proposed inverter con-troller. The controller is based on the multiloop SPWM method as shown in Fig. 5, which is also shown as a block in Fig. 4. The controller topology is very similar to the classical state-feedback multiloop controllers [8], [9], except that all the loops are com-bined (instead of cascade connection) before they are applied to the PWM generator. This feature basically adds the relative benefits of each loop and creates a more effective multiloop strategy. In order to facilitate the understanding of the proposed controller, the reasoning behind the selected control topology can be explained as follows. The control system shown in Fig. 5 consists of one outer voltage loop and three inner loops. The outer loop is the main voltage loop, which regulates the fun-damental frequency component of the output voltage and its steady-state RMS value using a PI compensator; for that reason, it has slower dynamics. The first of the inner loops is the voltage reference feed-forward loop which provides fast transient response but less benefit to the compensation of the harmonic distortions. The second inner loop is the voltage loop where the measured ac output voltages are instantaneously compared to the reference ac voltages created by the main loop and the error (Error1) is found; then the loop is compensated using a PD controller. This loop is responsible for correcting the phase shift and improv-ing the waveform quality of the output voltages. The simula-tion results confirm that the gain Kp2 controls the THD of the voltages effectively and improves the waveform quality. The dynamic characteristic of this loop is relatively fast since there is no integrator. Actually, the fast dynamic with high gain is desired since it generates the corrective control actions to com-pensate for the distortion caused by the nonlinear currents, but this feature easily pushes the system into instability. One so-lution to this problem is to add a derivative control; however, it provides a minor help to stabilizing the system. The more effective solution is to add an ac current inner loop which pro-vides the feedback about the voltage drop across the inductive

TAMYUREK: HIGH-PERFORMANCE SPWM CONTROLLER FOR THREE-PHASE UPS SYSTEMS OPERATING

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Fig. 4. State-space model of the inverter power stage (the plant) including the closed-loop control system and the controller built in Simulink.

Fig. 5. Simulink model of the proposed multiloop controller.

element of the LC filter, which makes the part of the compen-sation against the harmonic distortions at the voltage. In this loop, the measured inductor currents are instantaneously com-pared to the reference currents created by the main loop and the resulted error (Error2) is combined to the main control out-put after it is multiplied by the gain Kp3, as shown in Fig. 5. Our studies have shown that the ac current loop with the gain Kp3 stabilizes the control system effectively. In addition, the inductor currents that are measured for the closed-loop control are also used for overload protection and current limiting pur-poses. So, the cost of the current transformers is justified in this design.

The advantage of the multiloop control system proposed here is that the loops can be optimized for the best performance relatively independent of each other. For example, the outer voltage loop is tuned first for the best voltage regulation, and then the inner loops can be optimized relatively independently for the best THD of the output voltage while effectively managing and maintaining the stability. The design and the analysis of the proposed controller have been done using the Simulink Control Design Linear Analysis tool which performs linearization and steady-state operating point analysis of a model built in the Simulink, and also gen-erates various small-signal plots including Bode, step response,