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SAMSUNG GROUP
CTV Training Manual K1 Chassis 13 Inch: TCD1372, TCD1373, TCD1382 TXD1372, TXD1373, TXD1382 TXE1386,TXE1370 TXD1972, TXD1973,TXD1982 TXD2022

19 Inch: 20 Inch:

Samsung Electronics America Product Support Department.

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Contents

SAMSUNG GROUP
Chroma & OSD Block Circuit Troubleshooting Guide Horizontal Deflection Chart Horizontal Deflection Drive Block Circuit Troubleshooting Guide Vertical Deflection Circuit IC Description & Operation Vertical Deflection Drive Block Circuit Troubleshooting Guide Sound Circuit IC Port Voltage & Waveforms ICK01 Port Voltage & Waveform IC601 Port Voltage & Waveform Troubleshooting Guide CRT Drive Circuit Alignment and Adjustments Service Mode Adjustments Alignment and Adjustment

Block Diagrams Power Circuit IC Block Diagram & Pin Description Voltage Regulation Circuit Power Supply Description Troubleshooting Guide Micom Circuit IC Pin Description MICOM (IC901) Port Description E-PROM (IC902) Port Description IC Pin Voltage & Waveforms Tuner Circuit IF/Chroma/Video Circuit IC Pin Description IC Port Voltage & Waveforms TA1201 (IC201) Port Voltage & Waveform Picture IF Block Circuit Sound IF Block Circuit Video Block Circuit

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SAMSUNG GROUP
K1 Chassis

Block Diagrams

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K1 Chassis

Power Circuit

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SAMSUNG GROUP
K1 Chassis
IC802 Multi Regulator
Pin No Description 1 5V Input for Pin 9 2 9V Input for Pin 8 3 Reset Noise Filter 4 Power Control Input 5 GND 6 Micom Reset Output 7 Feedback 8 9V Vcc Output 9 5V Vcc Output Stand-by Voltage 13V 13 V 2.5 V 0V 0V 4.3 V 0V 0V 5V Power-On Voltage 12.5 V 12 V 2.5V 4.7 V 0V 4.3 V 2.3 V 8.7 V 5V

IC Block Diagram & Pin Description

IC802 (SMR-40100)

IIC801

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SAMSUNG GROUP
K1 Chassis

(STAND-BY) IC801 PIN 1 HC801 PIN 4

(STAND-BY) IC801 PIN 2 HC801 PIN 6

(STAND-BY) 1C801 PIN 3

ACQUISITION MODE: PEAK DETECT

(POWER ON) 1C801 PIN 1 HC801 PIN 4

(POWER ON) IC801 PIN 2 HC801 PIN 6

(POWER ON) 1C801 PIN 3

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SAMSUNG GROUP
K1 Chassis

(STAND-BY) IC801 PIN 4

(STAND-BY) IC801 PIN 3

(STAND-BY) 1C801 PIN 8

(POWER ON) 1C801 PIN 4

(POWER ON) IC801 PIN 3

(POWER ON) 1C801 PIN 8

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SAMSUNG GROUP
K1 Chassis

(POWER ON) T801 PIN 4 CONT.BR: Min

(STAND-BY) T801 PIN 12

(POWER ON) T801 PIN 4 CONT: Max.BR: Center

(POWER ON) T801 PIN 12

(POWER ON) T801 PIN 4 CONT.BR: Max

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K1 Chassis

(STAND-BY) T801 PIN 9

(POWER ON) T801 PIN 9

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K1 Chassis

Voltage Regulation Circuit

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1. Initial Start

SAMSUNG GROUP
K1 Chassis

Power Supply Description

AC In -> D801 -> NT801 -> HC801 Pin 1 -> HC801 Pin 6 -> IC801 Pin 2 -> S/TR(Q1) base -> S/TR(Q1) On

2. S/TR On-time control

Once S/TR turns on. the an induced voltage in D winding supplies the base current to base of S/TR to keep it turned on. Charged cap.(C 1) inside HC801 during S/TR OFF starts to discharge through: HC801 Pin 6 -> IC801 Pin 2 -> S/TR (Q1) Base <Load increases or AC Input decreases> Output voltage(S Winding) Down -> D Winding Voltage Down -> C851 Down -> Error Amp Al output current Down & Current through IC801 Pin 1 to base of Q3 Down Cap. C2 between Base and Emitter of Q3 charges slowly, and On-time increases. <Load decreases or AC Input increases> Output voltage(S Winding) Up -> D Winding Voltage Up -> C851 Up -> Error Amp Al output current Up & Current through IC801 Pin 1 to base of Q3 Up -> Cap. C2 between Base and Emitter of Q3 charges faster, and On-time decreases. CONTINUED

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SAMSUNG GROUP
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Power Supply Description

3. S/TR Off-time control
As base-engineer of Q3 reaches about 0.6V. the Q3 turns on, and S/TR Q1 turns off, and reverse voltages are induced in all windings. The reverse voltage. induced in D winding mm to discharge cap. C1 between Pin 3 and 6 of HC801 and Cap. C2 between base and emitter of Q3, then charges them in reverse direction through zenor diode inside IC801 between C-E of Q3 and through R5.D1 between base of Q3 and nondotted terminal of D winding. Off-time is time duration from the moment the load current starts to flow and to the moment it decreases to zero. How fast the current decreases to zero depends on peak- current in primary winding during S/TR on. If output is to be regulated then the load current slope should remain same, thus the bigger the peak current the longer Off-time is. After the load current decreases to zero, the charged cap. C 1 supplies base current to S/TR Q I to turn it on again.

CONTINUED

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SAMSUNG GROUP
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Power Supply Description

4. Output Regulation

Typical Switching On/Off time AC Voltage: 120 Vrms Condition Contrast.Bright:Max Cont:Max, Bright: Center Contrast,Bright:Min Stand-By T on 5 uS 4.5 uS 3 uS 2 uS T off Switching Freq. 13 uS 55.6 KHz 11 uS 64.5 KHz 10 uS 76.9 KHz 7 uS 111.1 KHz

Any voltage change in output is reflected through D winding, and then turn-on time is controlled by voltage of charged cap. C851 during S/TR off, and voltage of D winding. By controlling On-time, the peak current can be controlled, and in turn the output can be regulated.

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Troubleshooting Guide

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Micom Circuit

SAMSUNG GROUP
K1 Chassis

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Pin No 6 9, 10 11 12 14 15 17 18 19 20 22~24 25 26 27 28,29 31,32 33 34 36 39 40 42

SAMSUNG GROUP
K1 Chassis
In/Out OUTPUT IN/OUT INPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT INPUT OUTPUT OUTPUT OUTPUT INPUT INPUT IN/OUT IN/OUT INPUT INPUT INPUT OUTPUT IN/OUT OUTPUT Description SOUND MUTING VOLTAGE CONTROLLED KEY INPUT FINE TUNING POWER-OUT DETECTION STAND-BY: RED, TIMER:GREEN LED FLASHING W/REMOTE KEY PRESSED DEGAUSSING CONTROL POWER ON/OFF CONTROL VIDEO JACK PRESENCE DETECTION CRT SPOT CONTROL OSD,TEXT RGB OUTPUT BLANKING HORIZONTAL SYNC VERTICAL SYNC VIDEO IN FOR CAPTION DECODING OSCILLATION RESET MAIN B+ REMOTE SIGNAL DETECTION SERIAL CLOCK SERIAL DATA OSD ???

IC Pin Description
1. Micom (IC901) Port Description
Pin Name SOUND MUTE KEY IN AFT HOLD LED 1 LED2 D-COIL POWER A/V IN1 SPOT R,G,B OUT BLK H-SYNC V-SYNC OSC IN/OUT X-TAL 1,2 RESET VDD IR-IN SCL1 SDA1 CCD

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Pin No 1~3 4 5 6 7 Pin Name A0~A2 VSS SDA SCL WC

SAMSUNG GROUP
K1 Chassis
In/Out INPUT INPUT IN/OUT INPUT INPUT Description ADDRESS INPUTS GND SERIAL DATA SERIAL CLOCK WRITE CONTROL

IC Pin Description
2. E-Prom (IC902) Port Description

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Pin No 6 9 10 11 12 14,15 17 18 19 20 22,23,24 25 26 27 28 29 31,32 33 34 36 38 39,40 42

SAMSUNG GROUP
K1 Chassis

IC Pin Voltage & Waveforms

1. IC901 Port Voltages & Waveforms
Voltage & Waveform Mute On: 0.65 V Volume Min: 0.65 V Mute Off: 0.1 V See print-out See print-out No signal: 1.2 V Tuned: 1.2 V Detuned: See print-out 3.7 V 0.2 V (LED off) When Reset Pin changes from 0V to 5V, Pin 17 Voltage becomes 0.7 V for about 2 seconds, then goes down to 0 V. Power On: 5 V Power Off: 0 V Video Jack In:5 V Video Jack Out: 0.4 V Power On: 0 V Power Off: 5 V OSD On (MENU): 0.6 Vp-p No OSD: 0.2 Vp-p ? See print-out See print-out See print-out 1.6 V See print-out 4.9 V 4.9 V No Remote key pressed: 4.9 V Any key pressed: 4.9 Vp-p 4.9 V 0.2 Vp-p OSD On: 0V ?

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K1 Chassis

MICOM PIN 9

MICOM PIN 10

MICOM PIN 11

MICOM PIN 26

MICOM PIN 27

MICOM PIN 28

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MICOM PIN 31

MICOM PIN 32

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Tuner Circuit

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POINT 1

POINT 2

POINT 4

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IF/Chroma/Video Circuit

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Pin No Pin Name
1,2 3 4 5 6 7,8 9 10 11 12 13 14 15~17 18 19~21 22 23 24 25 26 27,28 29 30 31 32

SAMSUNG GROUP
K1 Chassis
In/Out
OUTPUT OUTPUT IN/OUT IN/OUT INPUT INPUT IN/OUT IN/OUT IN/OUT INPUT INPUT INPUT OUTPUT OUTPUT INPUT INPUT IN/OUT INPUT IN/OUT INPUT INPUT OUTPUT OUTPUT

IC Pin Description
TA1201 (IC201) Port Description
Description
Volume controlled sound output Detected RF AGC goes to Tuner 4.5 Mhz SIF Tank for FM detection To reduce noise on RF AGC output Input for Saw Filter Output 0 Filter to stabilize PLL circuit Filter to stabilize APC circuit Oscillation for chroma processing OSD blanking signal input from Micom OSD RGB input from Micom Analog RGB output Vertical deflection drive pulse output Negative Feedback input for Amplitude adjustment Ramp pulse input for vertical position control Vertical sync separation filter Micom bus line data clock Monitor abnormal HV increase Flyback pulse input for AFC control Composite sync output Horizontal deflection drive pulse output SOUND OUTPUT RF AGC OUT SIF TANK COIL AGC FILTER PIF GND PIF INPUT PIF VCC PLL LOOP FILTER APC FILTER 3.58 MHZ VCXO V/C/D gnd BLANKING IN (OSD) OSD RGB INPUT DIGITAL VCC RGB OUTPUT VERTICAL OUTPUT NFB VERT RAMP VERT SYNC FILTER H-DRIVE CKT B+ I2C BUS IN/OUT X-RAY FBP INPUT SYNC OUT H-OUT

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Pin No Pin Name
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49,50 51 52 53 54 55,56

SAMSUNG GROUP
K1 Chassis
In/Out
IN/OUT IN/OUT INPUT INPUT INPUT INPUT IN/OUT OUTPUT IN/OUT INPUT OUTPUT INPUT INPUT OUTPUT INPUT IN/OUT INPUT INPUT IN/OUT INPUT

TA1201 (IC201) Port Description (continued)

Description
Filter to stabilize AFC output Oscillation to make Hor. & Vertical drive pulse Beam current feedback input for limiting Brightness Composite video input Beam current feedback input for limiting Contrast External video input Peak black level detection Selected video output Detects average peak level of Y signal Y signal input AFT out for fine tuning C signal input Detected video signal output PIF tank for video detection & AFT detection Limits amplitude of SIF signal and sets reference level Detected FM signal output Deamphasizes the detected FM signal External audio input AFC FILTER 32FH VCO DIGITAL GND ABL TV INPUT ACL EXT VIDEO INPUT BLACK PEAK VIDEO S/W OUTPUT DC RESTORATION Y INPUT AFT C INPUT V/C/D VCC TV DET OUT SIF VCC PIF TANK COIL SIF GND LIMITER INPUT TV AUDIO INPUT DE-AMPHASIS EXT AUDIO INPUT

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Pin No 1 3

SAMSUNG GROUP
K1 Chassis

IC Port Voltage & Waveforms

1.TA1201 (IC201) Port Voltage & Waveforms
Voltage & Waveform Pin No 32 33 34 36, 38 Voltage & Waveform See print-out TV See print-out Contrast Bright Max Max Max Center Min Min See print-out 5 V (Color Bar) Same as pin 37 See print-out See print-out Detuned: See print-out See print-out 8.6 V See print-out 8.5 V See print-out

No Picture: 7.8 V Picture (Color Bar): 4.8 V 4 See print-out 5 No Picture: 4.6 V Picture (Color Bar): 4.1 V 7, 8 See print-out 9 8.6 V 10 When CH is changed, voltage swings from 3.6 V to 4.2 V 11 5.8 V 12 See print-out 18 3.2 V 19,20,21 See print-out 22 See print-out 24 See print-out 25 See print-out 26 See print-out 29 30 See print-out 31 See print-out

Pin 36 3.0 V 2.7 V 2.3 V

Pin 38 3.0 V 3.4 V 2.8 V

37 40 41 42 43 44 45 46 47 48 49, 50 52

Tuned: 0.6 V

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ACQUISITION MODE: PEAK DETECT

IC201 PIN 4

IC201 PIN 7, 8

IC201 PIN 12

IC201 PIN 19, 20, 21

IC201 PIN 37

IC201 PIN 43

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IC201 PIN 45

IC201 PIN 49, 50

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PIF Process Description
The IF signal from the tuner enters the SAW filter after being amplified through the IF pre AMP lo compensate the insert loss of file SAW filter. The output of like SAW filler is sent to pin 7,8 of IC201. The amplified IF signal through the PIF AMP enters Q-DET and I-DET circuits. The Q-DET circuit generates error voltage by the phase difference between 90 degree shifted VCO output signal and PlF carrier signal. The error voltage is smoothed by the loop filter, and controls the VCO circuit for synchronization with the PHF carrier and also enters the AFT circuit. The AFT circuit amplifies the DC component of VCO Control voltage, and outputs AFT voltage through pin 44. The VCO free-run frequency is controlled by the bus. The I-DET circuit detects TV signal from VCO output signal and PIF signal. The detected TV signal is output from pin 47, and to the Lock and AGC detection circuits. The Lock detection circuit determines whether the AFT tuning is complete. When completed, it mutes the AFT circuit. The AGC detection circuit detects file sync level of TV signal and controls file gains of tuner RF-AMP and PIF-AMP to maintain the constant sync level. The reference voltage level to RF AOC AMP can be controlled by the bus.

Picture IF Block Circuit

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SIF Process Description
The 4.5MHz SIF signal from Pin 6 of ICK01 goes through the BPF to eliminate any remaining video component, and is input to the limiter circuit. The limiter circuit limits the 4.5 MHz SIF signal amplitude, and send the signal to the FM detection circuit. The FM is detected by the use of quadrature detection method with the VCO controlled phase shifted oscillation by the tank coil connected to Pin 4. The detected FM signal goes to the audio switching circuit via the Deamphasis circuit. The external audio signal enters the switching circuit via pin 55,56. The TV audio or external audio can be selected by the bus control. The selected audio signal enters the audio AMP and is outputted through pin 1,2 with volume controlled by the bus.

Sound IF Block Circuit

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Video Block Circuit

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Video Block Circuit

Video Process Description
The TV signal output from pin 47 is applied to pin 37 TV In through 4.5MHz Trap circuit to remove any remaining audio signal, still sent to switching circuit. The selected signal is amplified twice for sync separation. Meanwhile, the external video signal enters through pin 39. The output signal of pin 41 is reduced to half by like resistor divider circuit and Q202 to the original amplitude and enters pin 43 video clamp amp circuit and pin 45 chroma circuit. The clamp circuit limits, and establishes the reference amplitude of Y signal. The video signal through clamp circuit enters black stretch circuit after a color signal is removed by 3.58 MHz Trap, which is turned on/off by the bus. The black stretch circuit extends Y signal toward more black level, emphasizes contrast, and limits amplitude of Y signal. The black level detecting filter is connected to pin 40. Then the Y signal enters the DC restoration circuit, which detects the average peak level of the Y signal and controls the clamp circuit by the difference between the reference set by the clamp circuit and pedestal level of the Y signal. The Y signal passed through the DC restoration circuit adjusts the timing to the chroma signal at the Y-DL circuit. The Y signal passes through brightness, contrast circuit, and WPL circuit where the amplitude is limited. ACL, and ABL circuit limits peak amplitude of contrast and brightness level.

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Chroma & OSD Block Circuit

Chroma Block Circuit

OSD Block Circuit

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burst signal and reference carrier. If there is no color burst signal (B&W signal) at low level burst signal caused by poor reception, the mute signal is output by the killer circuit. The tint circuit through the Micom bus controls the phase of the reference carrier. This controlled signal enters the demodulation circuit. The demodulation circuit demodulates color difference signal from the chroma signal and reference carrier. Next the LPF removes unnecessary harmonic waves. The matrix demodulates RGB signal from the Y and color difference signal.

Chroma & OSD Block Circuit

Chroma Process Description
The chroma signal is defected from the input video signal of pin 41 through 3.58 MHz BPF after DC component is cut out by the coupling cap. C235 and noise filter. The detected chroma signal enters ACC circuit where the color burst signal is detected. With detected burst signal's amplitude, the color signal level is controlled through the Micom bus.

The gain-controlled chroma signal enters the color circuit, and OSD Process Description the burst signal enters the APC slid killer circuit. The color circuit controls the output of color/B & W signals by the mute The OSD Signal is converted by the timing between the RGB signal of the killer circuit. The color/B&W signal enters the signal and fast blanking signal, and goes to the cut-off/drive demodulation circuit. circuit, which mixes OSD RGB with picture RGB signals. The APC circuit outputs an error signal caused by the phase difference between reference carrier of the VCXO circuit and color burst signal. The error signal is smoothed by the filter connected to pin 11 and Controls the VCXO Circuit. The 3.58 MHz reference carrier synchronized to the color burst signal enters the APC circuit, killer circuit, and tint circuit. The killer circuit compares oscillations between color The out of mixed RGB signal is applied to CRT pre-drive amp.

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Troubleshooting Guide

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Horizontal Deflection Chart

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SAMSUNG GROUP
K1 Chassis

IC201 PIN 30

IC201 PIN 32

IC201 PIN 31

IC201 PIN 34

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K1 Chassis

GND

ACQUISITION MODE: PEAK DETECT

POINT 1

POINT 2

POINT 3

ACQUISITION MODE: PEAK DETECT

POINT 4

POINT 5

POINT 6

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SAMSUNG GROUP
K1 Chassis

GND

ACQUISITION MODE: PEAK DETECT

POINT 7

POINT 8

POINT 9

IC201 PIN 31, 32 (HS:31)

IC201 PIN 31, 32 (HS:0)

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Horizontal Deflection Drive Block Circuit

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Horizontal Deflection Drive Block Circuit

Horizontal Deflection Drive Process Description
The video signal input to the horizontal sync separation circuit becomes a composite sync signal and enters AFC-1 circuit and vertical sync separation circuit. Immediately it is output from the pin 31. The AFC-1 circuit outputs the error voltage caused by the phase difference between the composite sync signal and H count down output signal, and this error voltage is smoothed by the filter connected to the pin 33. The error voltage also controls the 32fH VCO circuit, which controls the frequency of the ceramic oscillator connected to the pin 34 and outputs the 32fH signal synchronized to the horizontal sync signal. This synchronized signal enters the H count down circuit, which outputs signals divided from the 32fH signal. This divided signals enter AFC-1, AFC-2, V count down, and H-Ramp circuits. The AFC-2 circuit, which outputs error voltage caused by the phase difference between the H countdown output signal and flyback pulse signal, controls the horizontal output circuit. At this time, the H-Out signal is generated to set the horizontal signal and flyback pulse phase through the bus. The horizontal signal is output from the pin 32. The horizontal position of the picture is controlled by the bus which sets the phase between the synch signal and flyback pulse. The horizontal circuit can be cut off by the X-ray circuit if the input voltage of the pin 29 goes above the critical limit (about 0.5 V).

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Troubleshooting Guide

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Vertical Deflection Circuit

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IC301 KA2131

SAMSUNG GROUP
K1 Chassis

IC Description & Operation

Deflection Current Flow Pin Description

Pin No 1 2 4 6 7 8 9 Description GND Vertical Drive Output Pump Up Cap. Connection Vertical Drive Input Sawtooth Input Blanking Pulse Output B1 Remarks 50 Vp-p 424 V(48 Vp-p) Vertical Oscillation Sawtooth Input Blanking Pulse 424 V 1. During First Half Deflection Cycle 24 V Line --> D301 --> Pin 4 --> Q1 --> Pin 2 --> C306 --> DY --> R304 * Q1 On, Q2 Off During Second Half Deflection Cycle Q3061 --> Pin 2 --> Q2 --> R304 --> DY --> C306 * Q1 Off, Q2 On During Vertical Retrace Period Q309--> Pin 4--> Q1--> Pin 2--> C306--> DY--> R304 * Q1 On, Q2 Off

2.

3.

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Vertical Deflection Drive Process Description
The video signal input to the horizontal sync separation circuit becomes a composite sync signal and enters AFC-1 circuit and V-sync separation circuits. The vertical sync separation circuits separates the vertical sync from the composite sync signal by the filler connected to the pin 25. The vertical sync signal enters the vertical count down circuit where the vertical drive signal is obtained after counting down with the H CID circuit output as the reset signal. This vertical drive signal enters vertical ramp circuit, which outputs a compensated drive signal through the pin 22. The NFB signal from the pin 23 compensates the drive signal for correct phase and amplitude. Also the filter connected to the pin 24 is controlled by the bus. By controlling the charging/discharging current the vertical size of the picture is determined. Also by changing timing the vertical position can be adjusted.

Vertical Deflection Drive Block Circuit

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K1 Chassis

ACQUISITION MODE: PEAK DETECT

IC201 PIN 22

IC201 PIN 23

IC201 PIN 24

IC201 PIN 25

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46

SAMSUNG GROUP
K1 Chassis

POINT 1

POINT 2

POINT 3

POINT 4

POINT 5

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47

SAMSUNG GROUP
K1 Chassis

POINT 6

POINT 7

POINT 8

POINT 9

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K1 Chassis

ACQUISITION MODE: PEAK DETECT

IC201 PIN 22 (VA:0)

IC301 PIN 2 (VA:0)

IC201 PIN 22 (VA:63)

IC301 PIN 2 (VA:63)

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Troubleshooting Guide

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Sound Circuit

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Pin No 1 2 3 6 7 9

SAMSUNG GROUP
K1 Chassis

IC Port Voltage & Waveforms

1. ICK01 Port Voltage & Waveform
Voltage & Waveform See printout See printout 6.6 V See printout 8.7 V 6.7 V

1. IC601 Port Voltage & Waveform

Pin No 1 2 3 6 8 Voltage & Waveform 11.8 V 11.8 V See printout See printout See printout

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ACQUISITION MODE: PEAK DETECT

IC201 PIN 1 (VOL:Max)

IC201 PIN 52

ICK01 PIN 1, 2

ACQUISITION MODE: PEAK DETECT

ACQUISITION MODE: PEAK DETECT

IC201 PIN 53 (VOL:Max)

IC201 PIN 54

ICK01 PIN 6

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ACQUISITION MODE: PEAK DETECT

IC601 PIN 3 (VOL:Max)

IC601 PIN 6 (VOL:Max)

IC601 PIN 8 (VOL:Max)

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Troubleshooting Guide

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K1 Chassis

CRT Drive Circuit

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IC201 PIN 20 (Green Raster Inp. SB: 0)

IC201 PIN 20 (Green Raster Inp. GG: 0)

ACQUISITION MODE: PEAK DETECT

IC201 PIN 20 (Green Raster Inp. SB: 63)

IC201 PIN 20 (Green Raster Inp. GG: 255)

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POINT 1

POINT 2

POINT 3

POINT 4

POINT 5

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Q502 C (Red Raster Inp. RC: 0)

Q502 C (Green Raster Inp. GG: 0)

Q502 C (Red Raster Inp. RC: 255)

Q502 C (Green Raster Inp. GG: 255)

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Service Mode Menu:
Age VCO SCT SCR STT RC GC BC XX XX XX XX XX XXX XXX XXX GG BG SB VA VS HS SS SVC XXX XXX XX XX XX XX XX MUTE

4. Alignment and Adjustments

4-1 Service Mode Adjustments
4-1-1 Service Mode Menus Since there are no VCRs in the K1 chassis, all adjustments after parts replacement must be done in the Service Mode. Service Mode adjustments are necessary when either the EEPROM (IC902) or the CRT is replaced. 4-1-2 Entering the Service Mode Press the following transmitter keys while in Stand-by mode: MUTE > 1 > 8 > 2 > POWER "Factory Mode Menu" is displayed. Adjustment Test Pattern Set Option Byte Factory Reset Enter Service Mode using the Volume +, keys.

Select a mode to be adjusted, using the channel down key. Example: VCO.
Age VCO SCT SCR STT RC GC BC XX XX XX XX XX XXX XXX XXX GG BG SB VA VS HS SS SVC XXX XXX XX XX XX XX XX MUTE

Change the data with the Volume +, keys. VCO 71 CONTINUED

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Age VCO SCT SCR STT RC GC BC XX XX XX XX XX XXX XXX XXX

SAMSUNG GROUP
K1 Chassis
GG BG SB VA VS HS SS SVC XXX XXX XX XX XX XX XX MUTE

Return to the Service mode by pressing MENU

Return to the Factory mode via the MENU key. Adjustment Test Pattern Set Option Byte Factory Reset Press POWER to enter the Stand-by mode.

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Adjustment Test Pattern Set Option Byte Factory Reset Adjustment Test Pattern Set Option Byte Factory Reset

SAMSUNG GROUP
K1 Chassis
Set each bit to "0" or "1" via the Direct Access Keys (0-7) of the transmitter. Example: To set Byte ) to 2, press the Direct Access Key "1". See below: BYTE 0 765432 1 0 BYTE 0 0 0 0 0 0 0 1 0 Press MENU to go back to the factory mode. Adjustment Test Pattern Set Option Byte Factory Reset Select RESET with the the Channel z key. Adjustment Test Pattern Set Option Byte Factory Reset Press volume + key. POWER OFF

4-1-3 Adjustment in Option Mode This adjustment is necessary whenever the EEPROM is replaced. Input data (as marked on the back cabinet).

Select SET OPTION by pressing the Channel z key twice.

Press the Volume +, keys to enter the set Option mode. BYTE 0 765432 1 0 BYTE 0 0 0 0 0 0 0 0 0

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Adjustment Test Pattern Set Option Byte Factory Reset 1. 2. 3

SAMSUNG GROUP
K1 Chassis
4-1-5 Service Mode Adjustment Ratings Initialized MICOM Range data 0-63 43 0-127 63 0-63 39 0-27 4 0-27 19 0-255 0 0-255 0 0-255 0 90 140 16 25 0 15 25

4-1-4 Service Mode Adjustments

The Pattern Adjustment is done only in the factory. Do not attempt to readjust it. Refer to 4-2 for other adjustments Set OPTION data (as marked on the back-cabinet label).

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Item AGC VCO SCT SCR STT RC GC BC SVC GG BG SC VA VS HS SS

Function RF AGC Adjustment PIF VCO Adjustment Sub-contrast Adjustment Sub-color Adjustment Sub-tint Adjustment Red-cut off Adjustment Green-cut off Adjustment Blue-cut off Adjustment Input a Horiz. line pattern Green gain Adjustment 0-255 Blue gain Adjustment 0-255 Sub-brightness Adjustment 0-63 Vertical Phase Size Adjustment 0-63 Vertical Center Adjustment 0 Horizontal Phase Adjustment 0-31 Sub-sharpness Adjustment 0-31

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1. 2.

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4-2-4 Fail Safe Circuit Check (FS) 1. 2. The failsafe check must be the final step in servicing. Turn the power switch ON and adjust customer controls for normal operation. Temporarily short pin X to pin R on the main board (RX05, RX04) with a jumper wire. Raster will disappear. The TV must remain in this state even after removing the jumper wire. This show that the failsafe circuit is working properly. To recover picture and sound, temporarily turn off the TV and allow the failsafe circuit more than 30 seconds to reset. Then switch power ON to produce normal picture and sound.

4-2 Alignment and Adjustment

4-2-1 General Alignment Instruction

3.

Usually, a color TV needs only slight touch-up adjustment upon installation. Check the basic characteristics such as picture height, focus and a horizontal and verti- 3. cal sync. Observe the picture and check for good black and white details. There should be no objectionable color shading: 4. If color shading is present, demagnetize the receiver. If color shading persists, perform purity and convergence 5. adjustments described below. To protect against shock hazard, use an isolation transformer.

4-2-2 Power Supply Check Check the following: A:Power plug is connected; "Stand-by" mode B:Power On when "Power ON" button is pressed C: power On by FBT. Each supply is marked on its lead-in wire. 4-2-3 Focus Adjustment Adjust the focus control on the FBT for well defined scanning lines.

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SAMSUNG GROUP
K1 Chassis
4-2-8 Sub-Contrast Adjustment 1. 2. 3. 4. 5 Input a gray scale pattern. Use a pattern generator (PM5518). Short D208 to switch off the ABL feed-back. Check CN201 R-OUT with an oscilloscope. Set RC, BC, GC data to 0 in the Service Mode. Adjust SCT to 2.40 +/ 0.1Vp-p.

4-2-5 IC902 Replacement When IC902 is replaced, all values are reset to "Initialized MICOM Data" and readjustment is necessary. Press POWER button 10 seconds after plug-in. To enter the service mode, refer to 4-1 (Service Mode Adjustment).

4-2-6 PIF VCO Adjustment 1. 2. 3. Use a Pattern Generator or an off-air signal. Open pin 11 of micom (IC901) or one side of lead pin for R237. Adjust VCO in the service mode to set IC101 Pin 44 (AFT) to 2.5V +/ 0.4 V.

4-2-7 RF-AGC Adjustment 1. 2. 3. 4. Input a PHILLIPS pattern (CH40) Set the input signal to 60dB. Enter into the AGC in the service mode. Adjust AGC until color bar noise disappears.

6.

Remove the short across D208 and restore ABL.

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SAMSUNG GROUP
K1 Chassis
4-2-10 Sub-Color Adjustment Do sub-color adjustments after the Sub-Contrast and Sub-Tint adjustments. D208 should still be shorted. The ABL should still be switched OFF. Input a color barpattern. Use a pattern generator (PM5518). Check CN201 R-OUT (use and oscilloscope). Ensure that the RC, GC, and BC data are 0, BG are 140 and GG should be 90. Adjust SCR to 2.4 +/ 0.1Vp-p (black and red levels). Remove the short across D208 and restore ABL.

4-2-9 Sub-Tint Adjustment

Input a rainbow pattern. 1. Check CN201 B-OUT with an oscilloscope. Adjust STT in the service mode until the 6th peak is the 2. highest and the 5th and 7th peaks have equal heights. 3. 4. 5. 6. 7.

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SAMSUNG GROUP
K1 Chassis
4-2-12 Sub-Brightness Adjustment 1. 2. 3. Input a Toshiba pattern. Warm up the receiver for 10 minutes. Enter the SErvice Mode and set SB to the point where the 5th point is brighter in the gray scale.

4-2-11 White Balance Adjustment (a) Low-light adjustments 1. Input either a lion head or "pure white" color pattern. 2. Operate the receiver for 30 minutes. 3. Check the data in the service mode: RC, GC, BC are 0 and SB is 16; Steps BG are 90 and GG are 140. 4. Enter the horizontal line mode by pressing the MUTE key. 5. Adjust the screen VR on the FBT until a dim colored line (red, green or blue) appears on the screen. 6. After pressing the MUTE key, go to RC, BC, or GC with channel z, y keys. After putting a dim colored line (red, green or blue) in the horizontal line with the MUTE key, adjust color with volume z, y keys. (b) High-light adjustments 1. Input a high-light pattern. 2. Adjust GG, BG in the Service Mode. 3. Recheck in low light.

4-2-13 Vertical Size Adjustment 1. 2. 3. Input a lion head pattern. After the vertical center adjustment, enter into the service mode. Adjust VA so that the each top and bottom of the screen is 4.0. If the top and bottom values are different, adjust VA so that the sum of the two values is 8.0.

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K1 Chassis

4-2-14 Horizontal Size Adjustment Receive a lion head pattern. Enter into the service mode. Adjust HS to symmetrize right and left.

4-2-15 When CRT is Replaced Do the following adjustments after the basic purity and convergence adjustments. 1. 2. 3. 4. 5. White balance Sub-brightness Vertical Size Horizontal Size Fail safe (should be the final step).

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