ONGC GET QUESTIONS

tech ques. are very basic ques....u can refer to these....i dont know the exact year,,but i think they are
from gt2011: $$$$$$$$$$$$$$$$$ 1. Call location for TRAP is-------0024H
2. In 8085 name the 16 bit registers-----both Stack pointer & Program counter
3. Which stack is used in 8085----------- LIFO
4. an RC circuit be used as clock source for 8085 when an accurate clock frequency is not required. Also,
the component cost is low
5. DIAC 3 terminal biderctional
6. DIODE ----softeness factor
7. in low level AM System modulation stage is ----------linear devices
8. radiated power 10 KW modulation index 0.6 carier power is ----8.47 KW
9. the RMS noise voltage at 27'c is------------18.2 microvolt
10. the noise figure of amplifier is 3 dB. the noise temp is--------290 K
11. in PCM, amplitude level 7 unit code, sampling done at 10 hZ, the BW should be-------35 Khz
12. Find channel capcity if BW is 4 MHz and SNR is 31--------20Mbps
13. four voice channel BWc 4 khz,256 quantizaion level, BTR is--------256 Kbps
14. the carrier modulated phase are 0, 90,180,270 degree, the modulation is ----QPSK
15. in TV colour burst is used to-----ensure I & Q phase correctly
16. in Pt(Peak transmitted power ) is 81, the max range is---------3
17. the anteena diameter is 9, The Rmax increse by---9
18. seconday breakdown occure in------BJT not in mOSFET
19. quasi saturation in power Tx------heavely doped emitter drift region
20. not a level sensitive interrupt-----TRAP
21. a rectifier made Wide Band gap ---at high temp
22. energy band gap of Ge-----------0.72eV
23. the forbidden energy gap of Ge & Si is-----0.72,1.1 ev
24. Ripple factor of HWR-----1.21
25. voltahe controlled capacitor------------tunning
26. Flip flop[ required for F---------------4
27. excess 3 code for 29-------------01011100
28. latch-------------edge trigger D FF
29. gray code of 10------------------1111
30. very smooth O/p is obtained using--------pi filter
31. page of memory----------------1024 Byte
32. (231.3)4 to base 7 is-----------(63.5151)7 {not sure}
33. sequential ckt design using------------------Flip flop
34. RET is---------implied addressing mode
35. in RC LPF output is ----------downward by 1.414
36. For better Band pass & band reject------------more pole & zeros are required
37. the state of clk of DFF after clk pulse is-------equal to i/p before clk pulse
38. I/O mapped I/O------64,64
39. zener diode-------negative temp cofficiant
40. to regulate voltage diode is---------------ZENER
41. to get max voltage regulate--------1 ZENER diode is sufficiant
42. buffering in Zener diode provided by emitter folloewr is ----------impedance matching
43. all diode & transistor exhibit some degree of----------rectification
44. DFF has set up time=5 ns, hold time=10 ns & propagation time=15 ns. how far ahead
of trigger clk edge must data applied
ANS: 15 ns
45. thin base region of transistor-------for better amplification.
46. current amplification facor of transistor is---------0.96