CSC-211 Multifunction Protection IED Technical Application Manual - V1.01

CSC-211
Multifunction Protection IED

Technical Application Manual

CSC-211 Multifunction
Protection IED
Technical Application Manual

Compiled: Jin Rui
Checked: Hou Changsong
Standardized: Li Lianchang
Inspected: Cui Chenfan

Version V1.01
Doc.Code0SF.451.085(E)
Issued Date2012.8.31

VersionV1.01
Doc. Code: 0SF.451.085(E)
Issued Date2012.8
Copyright owner: Beijing Sifang Automation Co., Ltd

Note: the company keeps the right to perfect the instruction. If equipment does not agree with
the instruction at anywhere, please contact our company in time. We will provide you with
corresponding service.

is registered trademark of Beijing Sifang Automation Co., Ltd.

We reserve all rights to this document, even in the event that a patent is issued and a different
commercial proprietary right is registered. Improper use, in particular reproduction and
dissemination to third parties, is not permitted.

This document has been carefully checked. If the user nevertheless detects any errors, he is
asked to notify us as soon as possible.

The data contained in this manual is intended solely for the IED description and is not to be
deemed to be a statement of guaranteed properties. In the interests of our customers, we
constantly seek to ensure that our products are developed to the latest technological standards
as a result it is possible that there may be some differences between the hardware/software
product and this information product.

Manufacturer:
Beijing Sifang Automation Co., Ltd.

Tel: +86 10 62962554, +86 10 62961515 ext. 8998
Fax: +86 10 82783625
Email: sf_sales@sf-auto.com
Website: http://www.sf-auto.com
Add: No.9, Shangdi 4th Street, Haidian District, Beijing, P.R.C.100085

Preface
Purpose of this manual
This manual describes the functions, operation, installation, and placing into
service of IED CSC-211. In particular, one will find:
Information on how to configure the IED scope and a description of the
IED functions and setting options;
Instructions for mounting and commissioning;
Compilation of the technical specifications;
A compilation of the most significant data for experienced users in the
Appendix.
Target audience
This manual mainly face to installation engineer, commissioning engineer and
operation engineer with perfessional electric and electrical knowledge, rich
experience in protection function, using protection IED, test IED, responsible
for the installation, commissioning, maintenance and taking the protection
IED in and out of normal service.
Applicability of this manual
This manual is valid for CSC-211 multifunction protection IED.
Technical support
In case of further questions concerning the CSC family, please contact
SiFang compay or your local SiFang representative.
Safety information
Strictly follow the company and international safety regulations.
Working in a high voltage environment requires serious approch to
aviod human injuries and damage to equipment
Do not touch any circuitry during operation. Potentially lethal

voltages and currents are present
Avoid to touching the circuitry when covers are removed. The IED
contains electirc circuits which can be damaged if exposed to static
electricity. Lethal high voltage circuits are also exposed when covers
are removed
Using the isolated test pins when measuring signals in open circuitry.
Potentially lethal voltages and currents are present
Never connect or disconnect wire and/or linker to or from IED during
normal operation. Dangerous voltages and currents are present.
Operation may be interrupted and IED and measuring circuitry may
be damaged
Always connect the IED to protective earth regardless of the
operating conditions. Operating the IED without proper earthing may
damage both IED and measuring circuitry and may cause injuries in
case of an accident.
Do not disconnect the secondary connection of current transformer
without short-circuiting the transformers secondary winding.
Operating a current transformer with the secondary winding open will
cause a high voltage that may damage the transformer and may
cause injuries to humans.
Do not remove the screw from a powered IED or from an IED
connected to power circuitry. Potentially lethal voltages and currents
are present
Using the certified conductive bags to transport PCBs (modules).
Handling modules with a conductive wrist strap connected to
protective earth and on an antistatic surface. Electrostatic discharge
may cause damage to the module due to electronic circuits are
sensitive to this phenomenon

Do not connect live wires to the IED, internal circuitry may be
damaged
When replacing modules using a conductive wrist strap connected to
protective earth. Electrostatic discharge may damage the modules
and IED circuitry
When installing and commissioning, take care to avoid electrical
shock if accessing wiring and connection IEDs
Changing the setting value group will inevitably change the IEDs
operation. Be careful and check regulations before making the
change

Contents
Chapter 1 Introduction .................................................................................................................. 1
1 Overview ..................................................................................................................................... 2
2 Features ...................................................................................................................................... 3
3 Functions..................................................................................................................................... 5
3.1 Protection functions ..................................................................................................... 5
3.2 Control functions .......................................................................................................... 6
3.3 Monitoring functions ..................................................................................................... 6
3.4 Station communication ................................................................................................ 6
3.5 IED software tools ........................................................................................................ 7
Chapter 2 General IED application ............................................................................................... 9
1 Display on LCD screen ............................................................................................................. 10
1.1 LCD screen display function ...................................................................................... 10
1.2 Analog display function .............................................................................................. 10
1.3 Report display function .............................................................................................. 10
1.4 Menu dispaly function ................................................................................................ 10
2 Report record ............................................................................................................................ 11
3 Disturbance recorder ................................................................................................................ 12
3.1 Introduction ................................................................................................................ 12
3.2 Fault recording ........................................................................................................... 12
3.3 Wave recording .......................................................................................................... 12
3.4 Sequence of event record.......................................................................................... 13
3.5 Operation record ........................................................................................................ 13
4 Self-supervision function ........................................................................................................... 14
4.1 Introduction ................................................................................................................ 14
4.2 Self-supervision principle ........................................................................................... 14
4.3 Self-supervision report ............................................................................................... 14
5 Time synchroniation function .................................................................................................... 16
5.1 Introduction ................................................................................................................ 16
5.2 Synchronization principle ........................................................................................... 16
5.2.1 Synchronization from IRIG......................................................................................... 17
5.2.2 Synchronization via PPS or PPM .............................................................................. 17
5.2.3 Synchronization via SNTP ......................................................................................... 17
6 Setting ....................................................................................................................................... 18
6.1 Introduction ................................................................................................................ 18
6.2 Operation principle ..................................................................................................... 18
7 Authorization ............................................................................................................................. 19
7.1 Introduction ................................................................................................................ 19
Chapter 3 Overcurrent protection ............................................................................................... 21
1 Overcurrent protection .............................................................................................................. 22
1.1 Introduction ................................................................................................................ 22
1.2 Protection principle .................................................................................................... 22

1.2.1 Time characteristics ........................................................................................... 22
1.2.2 Inrush restraint function ..................................................................................... 24
1.2.3 Low voltage component ..................................................................................... 24
1.2.4 Direction determination feature .......................................................................... 25
1.2.5 Logic diagram..................................................................................................... 26
1.3 Input and output signals ............................................................................................ 28
1.4 Setting parameters .................................................................................................... 29
1.4.1 Setting list ........................................................................................................... 29
1.5 Reports ...................................................................................................................... 30
1.6 Technical data ........................................................................................................... 31
Approx. 0.95 at I/In 0.5 ................................................................................................... 31
Chapter 4 Earth fault protection ................................................................................................. 33
1 Earth fault protection ................................................................................................................. 34
1.1 Introduction ................................................................................................................ 34
1.2.1 Time characteristic ............................................................................................. 35
1.2.2 Inrush restraint ................................................................................................... 36
1.2.4 Logic diagram..................................................................................................... 39
1.4.1 Setting list ........................................................................................................... 42
1.5 IED reports ................................................................................................................. 44
1.6 Technical data ........................................................................................................... 44
Approx. 0.95 at I/Ir 0.5 .................................................................................................... 44
Chapter 5 Sensitive earth fault protection .................................................................................. 47
1 Sensitive overcurrent protection ............................................................................................... 48
1.1 Introduction ................................................................................................................ 48
1.2.1 Time characteristic ............................................................................................. 48
1.2.3 Logic diagram..................................................................................................... 52
1.4.1 Setting list ........................................................................................................... 54
1.5 IED reports ................................................................................................................. 56
1.6 Technical data ........................................................................................................... 56
Chapter 6 Negative-sequence overcurrent protection ............................................................... 59
1 Negative-sequence overcurrent protection ............................................................................... 60
1.1 Introduction ................................................................................................................ 60
1.2.1 Protection function description ........................................................................... 60
1.2.2 Logic diagram..................................................................................................... 61

1.4.1 Setting list ........................................................................................................... 63
1.5 IED reports ................................................................................................................. 64
1.6 Technical data ........................................................................................................... 64
Chapter 7 Thermal overload protection ...................................................................................... 67
1 Thermal overload protection ..................................................................................................... 68
1.1 Introduction ................................................................................................................ 68
1.2.1 Function description ........................................................................................... 68
1.3 Input and output signals............................................................................................. 70
1.4.1 Setting list ........................................................................................................... 70
1.5 IED reports ................................................................................................................. 71
1.6 Technical data ........................................................................................................... 71
Chapter 8 Current overload protection ....................................................................................... 73
1 Current overload protection ...................................................................................................... 74
1.1 Function description ................................................................................................... 74
1.1.1 Logic diagram ..................................................................................................... 74
1.3 Setting parameter ...................................................................................................... 75
1.3.1 Setting list ........................................................................................................... 75
1.4 IED reports ................................................................................................................. 75
Chapter 9 Overvoltage protection ............................................................................................... 77
1 Overvoltage protection .............................................................................................................. 78
1.1 Introduction ................................................................................................................ 78
1.2.1 Overvoltage protection principle ........................................................................ 78
1.2.2 Voltage connection ............................................................................................. 79
1.2.3 Logic diagram ..................................................................................................... 80
1.4.1 Setting list ........................................................................................................... 81
1.5 IED reports ................................................................................................................. 82
1.6 Technical data ........................................................................................................... 83
Chapter 10 Undervoltage protection............................................................................................. 85
1 Undervoltage protection ............................................................................................................ 86
1.1 Introduction ................................................................................................................ 86
1.2.1 Protection function description ........................................................................... 86
1.2.2 Voltage connection ............................................................................................. 87
1.2.3 Depending on the VT location ............................................................................ 88
1.2.4 Logic diagram ..................................................................................................... 89

1.4.1 Setting list ........................................................................................................... 92
1.5 IED reports ................................................................................................................. 93
1.6 Technical data ........................................................................................................... 93
Chapter 11 Displacement voltage protection ............................................................................... 95
1 Displacement voltage protection............................................................................................... 96
1.1 Introduction ................................................................................................................ 96
1.2.1 Displacement voltage input ................................................................................ 96
1.2.2 Protection description ........................................................................................ 96
1.2.3 Logic diagram..................................................................................................... 97
1.4.1 Setting list ........................................................................................................... 99
1.5 IED reports ............................................................................................................... 100
1.6 Technical data ......................................................................................................... 100
Chapter 12 Circuit breaker failure protection.............................................................................. 103
1 Circuit breaker failure protection ............................................................................................. 104
1.1 Introduction .............................................................................................................. 104
1.2 Protection principle .................................................................................................. 104
1.2.1 Protection description ...................................................................................... 104
1.2.2 Current criterion evaluation .............................................................................. 105
1.2.3 Circuit breaker auxiliary contact evaluation ..................................................... 105
1.2.4 Logic diagram................................................................................................... 106
1.3 Input and output signals .......................................................................................... 107
1.4 Setting parameter .................................................................................................... 108
1.4.1 Setting list ......................................................................................................... 108
1.5 IED reports ............................................................................................................... 108
1.6 Technical data ......................................................................................................... 109
Chapter 13 Dead zone protection ............................................................................................... 111
1 Dead zone protection ............................................................................................................... 112
1.1 Introduction ............................................................................................................... 112
1.2 Protection principle ................................................................................................... 112
1.2.1 Function description .......................................................................................... 112
1.2.2 Logic diagram.................................................................................................... 114
1.3 Input and output signals ........................................................................................... 114
1.4 Setting parameter ..................................................................................................... 115
1.4.1 Setting list .......................................................................................................... 115
1.5 IED reports ................................................................................................................ 116
1.6 Technical data .......................................................................................................... 116
Chapter 14 Synchro-check and energizing check function ......................................................... 117
1 Synchro-check and energizing check function ........................................................................ 118
1.1 Introduction ............................................................................................................... 118
1.2 Function principle ..................................................................................................... 118
1.2.1 Synchro-check mode ........................................................................................ 119

1.2.2 Energizing check mode .................................................................................... 120
1.2.3 Override mode ................................................................................................. 121
1.2.4 Logic diagram ................................................................................................... 121
1.3 Input and output signals........................................................................................... 122
1.4.1 Setting list ......................................................................................................... 123
1.5 IED reports ............................................................................................................... 124
1.6 Technical data ......................................................................................................... 125
Chapter 15 Autoreclosing function ............................................................................................. 127
1 Autoreclosing function ............................................................................................................. 128
1.1 Introduction .............................................................................................................. 128
1.2 Function principle ..................................................................................................... 128
1.2.1 Auto-reclosing initiation modules ..................................................................... 128
1.2.2 Autoreclosing logic ........................................................................................... 129
1.4.1 Setting list ......................................................................................................... 134
1.5 IED reports ............................................................................................................... 136
1.6 Technical data ......................................................................................................... 137
Chapter 16 Unbalance protection ............................................................................................... 139
1 Unbalance protection .............................................................................................................. 140
1.1 Introduction .............................................................................................................. 140
1.4.1 Setting list ......................................................................................................... 147
1.5 IED reports ............................................................................................................... 147
Chapter 17 Under current monitoring ......................................................................................... 149
1 Under current monitoring ........................................................................................................ 150
1.1 Introduction .............................................................................................................. 150
1.2.1 Function description ......................................................................................... 150
1.2.2 Logic diagram ................................................................................................... 150
1.4.1 Setting list ......................................................................................................... 151
1.5 IED reports ............................................................................................................... 152
Chapter 18 Load shedding protection ........................................................................................ 153
1 Low frequency load shedding protection ................................................................................ 154
1.1 Introduction .............................................................................................................. 154

1.4.1 Setting list ......................................................................................................... 156
1.5 IED reports ............................................................................................................... 157
2 Low voltage load shedding protection .................................................................................... 158
2.1 Introduction .............................................................................................................. 158
2.2.1 Funciton description ......................................................................................... 158
2.4.1 Setting list ......................................................................................................... 160
2.5 IED reports ............................................................................................................... 161
3 Overload load shedding protection ......................................................................................... 162
3.1 Introduction .............................................................................................................. 162
3.2.1 Fucntion description ......................................................................................... 162
3.4.1 Setting list ......................................................................................................... 164
3.5 IED reports ............................................................................................................... 164
3.6 Technical data ......................................................................................................... 165
Chapter 19 Fast busbar protection scheme ............................................................................... 167
1 Fast busbar protection scheme .............................................................................................. 168
1.1 Function description ................................................................................................ 168
1.3.1 Setting list ......................................................................................................... 170
1.4 IED reports ............................................................................................................... 170
Chapter 20 Secondary system supervision ................................................................................ 171
1 Current circuit supervision ...................................................................................................... 172
1.1 Function principle .................................................................................................... 172
1.1.2 Logic diagram................................................................................................... 172
1.3.1 Setting list ......................................................................................................... 173
1.4 IED reports ............................................................................................................... 173
2 Fuse failure supervision VT .................................................................................................... 174
2.1 Introduction .............................................................................................................. 174
2.2 Function principle .................................................................................................... 174
2.2.1 Three phases (symmetrical) VT Fail ................................................................ 174
2.2.2 Single/two phases (asymmetrical) VT Fail ....................................................... 175
2.2.3 The fourth voltage U4 VT fail ........................................................................... 175
2.2.4 Logic diagram................................................................................................... 175

2.4.1 Setting list ......................................................................................................... 177
2.5 IED reports ............................................................................................................... 178
2.6 Technical data ......................................................................................................... 178
Chapter 21 Monitoring function .................................................................................................. 181
1 Switching devices status monitoring ....................................................................................... 182
2 Self-supervision ...................................................................................................................... 182
Chapter 22 Station communication ............................................................................................ 183
1 Overview ................................................................................................................................. 184
1.1 Protocol .................................................................................................................... 184
1.1.1 IEC61850-8 communication protocol ............................................................... 184
1.1.2 IEC60870-5-103 communication protocol ........................................................ 184
1.2 Communication port ................................................................................................. 185
1.2.1 Front communication port ................................................................................ 185
1.2.2 RS485 communication ports ............................................................................ 185
1.2.3 Ethernet communication ports ......................................................................... 185
1.3 Technical data ......................................................................................................... 185
1.4 Typical substation communication scheme ............................................................. 188
1.5 Typical time synchronizing scheme ......................................................................... 188
Chapter 23 Hardware ................................................................................................................. 189
1 Introduction ............................................................................................................................. 190
1.1 IED structure ............................................................................................................ 190
1.2 IED module arrangement......................................................................................... 190
2 Local human-machine interface .............................................................................................. 192
2.1 Introduction .............................................................................................................. 192
2.2 Liquid crystal display (LCD) ..................................................................................... 192
2.3 LED .......................................................................................................................... 193
2.4 Keyboard ................................................................................................................. 193
2.5 IED menu ................................................................................................................. 194
2.5.1 Menu construction ............................................................................................ 194
2.5.2 Operation status ............................................................................................... 196
2.5.3 Operation status ............................................................................................... 197
2.5.4 Operation configuration .................................................................................... 197
2.5.5 Settings ............................................................................................................ 197
2.5.6 Report............................................................................................................... 197
2.5.7 Communication configuration .......................................................................... 198
2.5.8 Testing .............................................................................................................. 198
2.5.9 Device setup .................................................................................................... 199
2.5.10 Device information ........................................................................................... 200
3 Analog input module ............................................................................................................... 201
3.1 Introduction .............................................................................................................. 201
3.2 Terminals of analog input module ........................................................................... 202
3.3 Technical data ......................................................................................................... 206
4 Fast binary Input & Output module ......................................................................................... 208
4.1 Introduction .............................................................................................................. 208

4.2 Terminals of fast binary input & output module ....................................................... 208
4.3 Technical data ......................................................................................................... 210
5 Fast binary output module ...................................................................................................... 212
5.1 Introduction .............................................................................................................. 212
5.2 Terminals of fast binary output module ................................................................... 212
6 Binary input & output module .................................................................................................. 214
6.1 Introduction .............................................................................................................. 214
6.2 Terminals of binary & output module ....................................................................... 214
7 CPU module ............................................................................................................................ 217
7.1 Introduction .............................................................................................................. 217
7.2 Terminals of CPU module ....................................................................................... 217
7.3 Technical data ......................................................................................................... 219
8 Power supply module ............................................................................................................. 221
8.1 Introduction .............................................................................................................. 221
8.2 Terminals of power supply module .......................................................................... 221
8.3 Technical data ......................................................................................................... 223
9 Technical data ......................................................................................................................... 224
9.1 Type tests ................................................................................................................ 224
9.2 IED design ............................................................................................................... 227
9.3 CE certificate ........................................................................................................... 228
Chapter 24 Appendix .................................................................................................................. 229
1 General setting list .................................................................................................................. 230
1.1 Setting list for CSC-211 M01 ................................................................................... 230
1.5 Setting list for CSC-211 M6 ..................................................................................... 255
1.6 Setting list for CSC-211 V01 .................................................................................... 259
1.7 Setting list for CSC-211 C01 ................................................................................... 262
1.8 Setting list for CSC-211 C02 ................................................................................... 268
2 General report list ................................................................................................................... 275
2.1 Event report list ........................................................................................................ 275
2.2 Alarm report list ....................................................................................................... 277
3 Typical connection .................................................................................................................. 282
4 Time inverse characteristic ..................................................................................................... 304
4.1 11 kinds of IEC and ANSI inverse time characteristic curves ................................. 304
4.2 User defined characteristic ...................................................................................... 304
4.3 Typical inverse curves ............................................................................................. 305
5 CT Requirement ...................................................................................................................... 317
5.1 Overview .................................................................................................................. 317
5.2 Current transformer classification ............................................................................ 318
5.3 Abbreviations (according to IEC 60044-1, -6, as defined) ...................................... 319
5.4 General current transformer requirements .............................................................. 320
5.4.1 Protective checking current .............................................................................. 320

5.4.2 CT class ........................................................................................................... 320
5.4.3 Accuracy class ................................................................................................. 322
5.4.4 Ratio of CT ....................................................................................................... 322
5.4.5 Rated secondary current .................................................................................. 323
5.4.6 Secondary burden ............................................................................................ 323
5.5 Rated equivalent secondary e.m.f requirements ..................................................... 323
5.5.1 Definite time overcurrent protection and earth fault protection ........................ 324
5.5.2 Inverse time overcurrent protection and earth fault protection ........................ 325
Chapter 1 Introduction
1

About this chapter
This chapter gives an overview of SIFANG Multifunction
Protection IED CSC-211.

2
1 Overview
CSC-211 series are selective, reliable and high speed multifunction
protection IED (Intelligent Electronic Device), which are able to be applied
for protection, control and measurement for following applications:
Applicable in subtransmission network and distribution network with
solidly earthed (grounded), low-resistance earthed, isolated or
compensated neutral point
Protection of feeders, capacitors, distribution transformers, bus
coupler, etc.
Used as backup protection IED for lines, transformers, reactors and
busbar
Providing control and monitoring functions of the circuit breakers,
disconnector, etc.
Supporting all functionalities required for automation system

3
2 Features
Extensive multifunction IED including protection, control and
monitoring functions
Three pole tripping required in sub-transmission and distribution
network
A complete protection functions library, include:
Overcurrent protection (50, 51, 67)
Earth fault protection (50N, 51N, 67N)
Neutral earth fault protection (50G, 51G)
Sensitive earth fault protection (50Ns, 51Ns, 67Ns)
Negative-sequence overcurrent protection (46)
Thermal overload protection (49)
Overload protection (50OL)
Overvoltage protection (59)
Undervoltage protection (27)
Displacement voltage protection (64)
Circuit breaker failure protection (50BF)
Dead zone protection (50SH-Z)
Synchro-check and energizing check (25)
Auto-recloser function for three-phase reclosing (79)
Unbalanced current or voltage protection
Undercurrent protection (37)
load shedding function
4
Voltage transformer secondary circuit supervision (97FF)
Current transformer secondary circuit supervision
Fast overcurrent/busbar protection scheme using IEC61850
GOOSE-message
CB status supervision
Self-supervision to all modules in the IED
Complete and massive reports recording, trip reports, alarm reports,
startup reports and operation reports. Any kinds of reports can be
stored no less than 40 items, and be memorized in case of power
disconnection
Up to two electric /optical Ethernet ports can be selected to
communicate with substation automation system by IEC61850 or
IEC60870-5-103 protocols
One electric RS-485 port is able to communicate with substation
automation system by IEC60870-5-103 protocol
Time synchronization via network(SNTP), pulse and IRIG-B mode
Versatile human-machine interface
Multifunctional software tool CSmart for setting, monitoring, fault
recording analysis, configuration, etc.

5
3 Functions
3.1 Protection functions
Description ANSI Code
IEC 61850
Logical Node
Name
IEC 60617
graphical
symbol
Current protection
Overcurrent protection 50,51,67 PTOC
3I
INV
>
3I >>
3I >>>
Earth fault protection 50N, 51N, 67N PEFM
I
0INV
>
I
0
>>
I
0
>>>
Neutral earth fault protection 50G, 51G
Sensitive earth fault protection
50Ns, 51Ns,
67Ns

3I
NE
>
3I
NE
>>
Negative-sequence overcurrent
protection
46
Thermal overload protection 49 PTTR Ith
Overload protection 50OL PTOC 3I >OL
Voltage protection
Overvoltage protection 59 PTOV
3U>
3U>>
Undervoltage protection 27 PTUV
3U<
3U<<
Displacement voltage protection 64 V
E
>
Breaker protection and control function
Breaker failure protection 50BF RBRF
3I> BF
I
0
>BF
I
2
>BF
Dead zone protection 50SH-Z
Synchro-check and energizing check 25 RSYN
Auto-reclosing 79 RREC OI
Three-pole tripping 94-3 PTRC
Capacitor bank protection
Unbalanced current protection 46NI
6
Unbalanced voltage protection 46NU
Undercurrent protection 37 I<
Load shedding function
Low frequency load shedding function 81U
Low voltage load shedding function 27
Overload load shedding function
Secondary system supervision
CT secondary circuit supervision
VT secondary circuit supervision 97FF
Other functions
Fast busbar protection using reverse
interlocking

3.2 Control functions
Description ANSI Code
IEC 61850
Logical Node
Name
IEC 60617
graphical
symbol
Circuit breaker, disconnector and
other switching devices control

3.3 Monitoring functions
Description
Position of circuit breaker, disconnector and other switching device monitoring
Circuit breaker status supervision
Auxiliary contacts of circuit breaker supervision
Self-supervision
Fault recorder
3.4 Station communication
Description
7
Front communication port
Isolated RS232 port
Rear communication port
0-1 isolated electrical RS485 communication ports
0-2 Ethernet electrical/optical communication ports
Time synchronization port
Communication protocols
IEC 61850 protocol
IEC 60870-5-103 protocol
3.5 IED software tools
Functions
Reading measuring value
Reading IED report
Setting
IED testing
Disturbance recording analysis
IED configuration
Printing

8

Chapter 2 General IED application
9

About this chapter
This chapter describes the use of the included software
functions in the IED. The chapter discusses general application
possibilities.
10
1 Display on LCD screen
1.1 LCD screen display function
The LCD screen displays measured analog quantities, report ouputs, menu
and logic linker status.
1.2 Analog display function
The analog display includes measured Ia, Ib, Ic, 3I0, Is0, Ua, Ub, Uc, U4, Mea
Ia, Mea Ib, Mea Ic, Mea Ua, Mea Ub, Mea Uc, Mea Uab, Mea Ubc and Mea
Uca.
The Mea means that the measurement analogue quantity, for example, Mea
Ia, means the measurement current for phase A.
1.3 Report display function
The report display includes tripping, alarm and operation recording.
1.4 Menu dispaly function
The menu dispaly includes main menu and debugging menu, see chapter
Chapter 23 for detail.

11
2 Report record
The report record includes tripping, alarm and operation reports. See Chapter
24 general report list for detail.

12
3 Disturbance recorder
3.1 Introduction
To get fast, complete and reliable information about fault current, voltage,
binary signal and other disturbances in the power system is very important.
This is accomplished by the disturbance recorder function and facilitates a
better understanding of the behavior of the power system and related primary
and secondary equipment during and after a disturbance. An analysis of the
recorded data provides valuable information that can be used to explain a
disturbance, basis for change of IED setting plan, improvement of existing
equipment etc.
The disturbance recorder, always included in the IED, acquires sampled data
from measured analogue quantities, calculated analogue quantity, binary
input and output signals.
3.2 Fault recording
The IED can save the latest 40 fault records (be memorized in case of power
disconnection), which can be read via the IED operation interface or
communication port. The fault record consists of the following information:
Fault time: date and time
Event list: operative element and time
Running data: current, voltage, frequency and phase angle
Operation setting
IED operation mode
3.3 Wave recording
Wave recording function is used to record the analogue data and status with a
pre-defined length after and before disturbance occurs, reshow the operation
track of the protected IED. The recording wave includes at most 12 analogue
channels, 64 binary channels (32 binary input, 16 binary output and 16
GOOSE signal) and time sequence information. IED records the data as the
sample of 20 points in each cycle, accumulated length of each record is up to
13
8 seconds and 20 latest recording waves can be stored. Wave are searched
and called via dedicated software from the RS232 serial port on panel, and be
converted to COMTRADE format for being used by other recording wave
analysis software or fault simulation software.
3.4 Sequence of event record
The IED monitors and records the change of operation event, alarm event,
binary input, binary output and protection linker, records the event occurrence
time, reason and current status, and transfers the information to the station
control center via the communication port.
3.5 Operation record
The disturbance recorder information is saved for each of the recorded
disturbances in the IED and the user may use the local human machine
interface or dedicated tool to get some general information about the
recordings. The disturbance recording information is included in the
disturbance recorder files. The information is also available on a station bus
according to IEC 61850 and IEC 60870-5-103.
Fault wave recorder with great capacity, can record full process of any fault,
and can save the corresponding records. Optional data format or wave format
is provided, and can be exported through serial port or Ethernet port by
COMTRADE format.

14
4 Self-supervision function
4.1 Introduction
The IED may test all hardware components itself, including loop out of the
relay coil. Finding whether or not the IED is in fault through warning LED and
warning characters which shown in LCD and display reports to indicate fault
type.
The method of fault elimination is replacing fault board or eliminating external
fault.
4.2 Self-supervision principle
Measuring resistance between analog circuits and ground
Measuring the output voltage in every class
Checking zero drift and scale
Verifying alarm circuit
Verifying binary input
Checking actual live tripping including circuit breaker
Check setting values and parameters
4.3 Self-supervision report
Table 1 Self-supervision report list
Information Description
RAM Error RAM is abnormal
EPROM Error EPROM is abnormal
Flash Error Flash is abnormal
BO Abnormal Binary output is abnormal
AD Error AD is abnormal
Zero Offset Zero drift is out of limitation
Invalid SetGr Pointer of setting group is error
15
Setting Chk ERR Setting value is error
Logic Scheme ERR Logic file and CPU file do not cooperate

16
5 Time synchroniation function
5.1 Introduction
Use the time synchronization source selector to select a common source of
absolute time for the IED when it is a part of a protection system. This makes
comparison of events and disturbance data between all IEDs in a SA system
possible.
5.2 Synchronization principle
Time definitions
The error of a clock is the difference between the actual time of the clock, and
the time the clock is intended to have. The rate accuracy of a clock is
normally called the clock accuracy and means how much the error increases,
i.e. how much the clock gains or loses time. A disciplined clock is a clock that
knows its own faults and tries to compensate for them, i.e. a trained clock.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical
structure. A module is synchronized from a higher level and provides
synchronization to lower levels.

A module is said to be synchronized when it periodically receives
synchronization messages from a higher level. As the level decreases, the
accuracy of the synchronization decreases as well. A module can have
17
several potential sources of synchronization, with different maximum errors,
which gives the module the possibility to choose the source with the best
quality, and to adjust its internal clock from this source. The maximum error of
a clock can be defined as a function of:
The maximum error of the last used synchronization message
The time since the last used synchronization message
The rate accuracy of the internal clock in the module.
5.2.1 Synchronization from IRIG
The built in GPS clock module receives and decodes time information from
the global positioning system. The module is located on the CPU Module. The
GPS interfaces to the IED supply two possible synchronization methods,
IRIGB and PPS (or PPM).
5.2.2 Synchronization via PPS or PPM
The IED accepts PPS or PPM to the GPS interfaces on the CPU Module.
These pulses can be generated from e.g. station master clock. If the station
master clock is not synchronized from a world wide source, time will be a
relative time valid for the substation. Both positive and negative edges on the
signal can be accepted. This signal is also considered as a fine signal.
5.2.3 Synchronization via SNTP
SNTP provides a Ping-Pong method of synchronization. A message is sent
from an IED to an SNTP-server, and the SNTP-server returns the message
after filling in a reception time and a transmission time. SNTP operates via the
normal Ethernet network that connects IEDs together in an IEC61850
network. For SNTP to operate properly, there must be a SNTP-server present,
preferably in the same station. The SNTP synchronization provides an
accuracy that will give 1ms accuracy for binary inputs. The IED itself can be
set as a SNTP-time server.

18
6 Setting
6.1 Introduction
Settings are divided into separate lists according to different functions. The
setting consists of two parts -setting list and communication parameters.
6.2 Operation principle
The setting procedure can be ended at any the time by the key SET or
QUIT. If the key SET is pressed, the display shows the content of Select.
The range of setting zone is from 1 to 16. After confirming with the setting
zone-key SET, those new settings will be valid. If key QUIT is pressed
instead, all modifications which have been changed will be ignored.

19
7 Authorization
7.1 Introduction
To safeguard the interests of customers, both the IED and the tools that are
accessing the IED are protected, subject of authorization handling. The
concept of authorization, as it is implemented in the IED and the associated
tools is based on the following facts:
There are two types of points of access to the IED:
local, through the local HMI
remote, through the communication ports
There are different levels (or types) of guest, super user and protection
engineer that can access or operate different areas of the IED and tools
functionality.

20

Chapter 3 Overcurrent protection
21

About this chapter
This chapter describes the protection principle, input and
output signals, parameter, logic diagram, IED report and
technical data used for overcurrent protection.

22
1 Overcurrent protection
1.1 Introduction
The non-directional overcurrent elements can be applied as backup
protection functions in various applications including line and transformer
protection in systems with radial nature and those which are supplied from
a single source. The directional overcurrent protection allows the
application of the IED also in systems where protection coordination
depends on both the magnitude of the fault current and the direction of
power flow to the fault location, for instance in case of parallel lines or
transformers, or in a loop configuration. Main features of the overcurrent
protection are as follows:
Two definite time stages
One inverse time stage
11 kinds of IEC and ANSI inverse time characteristic curves as well as
optional user defined characteristic
Settable directional element characteristic angle to satisfy the different
network conditions and applications
Each stage can be set individually as directional/non-directional
Each stage can be set individually for inrush restraint
Cross blocking function for inrush detection
Settable maximum inrush current
First definite stage and inverse time stage can be set individually to
alarm or trip
VT secondary circuit supervision for directional protection. Once VT
failure happens, the directional stage can be set to be blocked or to be
non-directional
Undervoltage criteria checking (selectable), blocking of the definite
time stages is possible when the measured voltage exceeds the
threshold
1.2 Protection principle
1.2.1 Time characteristics
23
The time characteristic for each stage can be chosen as definite time stage
or some type of inverse time characteristic. 11 kinds of inverse time
characteristics are available. It is also possible to create a user defined
time characteristic. Each stage can operate in conjunction with the
integrated inrush restraint and directional functions and operate based on
measured phase current. In addition, an undervoltage control feature is
provided which can be used for definite overcurrent stages.
Furthermore, each stage is independent from each other and can be
combined as desired.
Pickup value for the definite stage can be set in setting value. Each phase
current is compared with the corresponding setting value with delay time. If
currents exceed the associated pickup value, after expiry of the time delay,
the trip command or alarm signal is issued. The dropout value of the
definite stages is approximately equal to 96% of the pickup value for I/I
n

0.5. The condition for delay time starting is expressed in the following
formula:

Equation 1
The delay time can be set for each definite stage individually in setting.
After the delay time elapsed, a trip command or alarm signal is issued.
For the delay time of inverse time characteristic, which is calculated here
based on the type of the set characteristic, the magnitude of the current
and a time multiplier, both ANSI and IEC based standard curves are
available, and any user-defined characteristic can be defined using
following formula:

K_OC
Equation 2
where:
A_OC: Time factor for inverse time stage
B_OC: Delay time for inverse time stage
P_OC: Index for inverse time stage
24
K_OC: Time multiplier
By applying setting of these coefficients, the IED calculates the tripping or
alarming time from the measured current in each phase separately. Once
the calculated time has been elapsed, the trip signal or alarm signal is
issued.
1.2.2 Inrush restraint function
The protection IED may detect large magnetizing inrush currents during
transformer energizing. In addition to considerable unbalance fundamental
current, inrush current comprises large second harmonic current which
does not appear in short circuit current. Therefore, the inrush current may
affect the protection functions which operate based on the fundamental
component of the measured current. Accordingly, inrush restraint logic is
provided to prevent overcurrent protection from maloperation.
The inrush restraint feature operates based on evaluation of the 2nd
harmonic content which is present in measured current. The inrush
condition is recognized when the ratio of second harmonic current to
fundamental component exceeds the corresponding setting value for each
phase. The setting value is applicable for both definite time stage and
inverse time stage. The inrush restraint feature will be performed as soon
as the ration exceeds the set threshold.
Furthermore, by recognition of the inrush current in one phase, it is
possible to set the protection in a way that not only the phase with the
considerable inrush current, but also the other phases of the overcurrent
protection are blocked for a certain time. This is achieved by
cross-blocking feature integrated in the IED.
The inrush restraint function has a maximum inrush current setting. Once
the measuring current exceeds the setting, the overcurrent protection will
not be blocked any longer.
1.2.3 Low voltage component
It is possible to set the protection in a way that the definite stages of
overcurrent element would operate only when at least one phase-to-phase
voltage falls below than the corresponding low voltage setting. This
component can be used to prevent any maloperation of the overcurrent
element during reverse charging of electric motors. The low voltage
25
component can be set for each definite stage by the dedicated binary
settings.
The voltages connected to IED may correspond to three phase to earth
voltages VA-N, VB-N, VC-N or any phase to earth voltage or phase to
phase voltage by using dedicated binary setting. In case of 3Ph V
Connect is enabled, three phase to phase voltages are measured, or any
one phase to phase voltage should be measured.
1.2.4 Direction determination feature
The direction detection is performed by determining the position of current
vector in directional characteristic. In other word, it is done by comparing
phase angle between the fault current and the reference voltage. Figure 1
illustrates the direction detection characteristic for phase A element.
Forward
UBC_Ref
Ph_Char
I A
I A
-
0
90
Bisector

Figure 1 Direction detection characteristic of overcurrent protection directional element
where:
Ph_Char
: The settable characteristic angle
The assignment of the applied measuring values used in direction
determination has been shown in Table 2 for different types of faults.
Table 2 Assignment of applied current and reference voltage for directional element
Phase Current Voltage
A
a
I

bc
U

B
b
I

ca
U

26
C
c
I

ab
U

As can be seen from Table 2, the healthy voltages are used in direction
determination. This guarantee corrects direction determination even if the
fault voltage has collapsed totally because of a single-phase short-circuit
fault. For three-phase short-circuit fault, without any healthy phase,
memory voltage values are used to determine direction clearly if the
measured voltage values are not sufficient. The detected direction is
based on the memory voltage of previous power cycles.
During direction detection, if VT fail happens (a short circuit or broken wire
in the voltage transformer's secondary circuit or operation of the voltage
transformer fuse), may result in maloperation by directional overcurrent
elements. In such situation, directional (if selected) overcurrent protection
will be blocked.
1.2.5 Logic diagram
OR
AND
Ia2/Ia1>
Ib2/Ib1>
Ic2/Ic1>
t<
CrossBLK

Figure 2 Logic diagram of cross-blocking for inrush restraint
OR
OC1_VBlkOn
OC2_VBlkOn
Uab<
Ubc<
Uca<
LVForOC1
LVForOC2

Figure 3 Logic diagram of low voltage component feature
27
VT Fail
Blk Fun_VTFail
UnBlk Fun_VTFail
Phase A Forward
LV For OC I
OC1 Dir On
OC1_V Blk On
Ia >
AND
OC1 Dir Off
OC1 V_Blk Off
1
1
OR
AND
DEF A OK
Func_OC1
Trip/Alarm
Ia2/Ia1> OC1 2H_Blk On
< I_2H_UnBlk
AND
OC1 2H_Blk Off
0
DEF A OK T
AND
Cross BLK
OC1 2H_Blk On
OC1 2H_Blk Off
0
AND
OR
OC1 Dir Off
1
OC1 V_Blk Off
1
AND

Figure 4 Logic diagram of definite overcurrent stage
28
Func_OC Inv
Trip/Alarm
Ia2/Ia1> OCInv 2H_Blk On
< I_2H_UnBlk
AND
OCInv 2H_Blk Off
0
INV A OK
AND
Cross BLK
OCInv 2H_Blk On
OCInv 2H_Blk Off
0
VT Fail
Blk Fun_VTFail
UnBlk Fun_VTFail
Phase A Forward
OC Inv Dir On
Ia Inverse
AND
OC Inv Dir Off
1
OR
INV A OK
AND
OR
OC Inv Dir Off
1

Figure 5 Logic diagram of inverse overcurrent stage
1.3 Input and output signals
IP1
IP2
IP3
OC1_Trip
OC2_Trip
OCInvTrip
UP1
UP2
UP3

Table 3 Analog input list
Signal Description
IP1 Signal for current input 1
UP1 Signal for voltage input 1
29
Table 4 Binary output list
Signal Description
OC1_Trip Overcurrent protection stage 1 trip
OC2_Trip Overcurrent protection stage 2 trip
OC Inv Trip Overcurrent protection inverse time stage trip
1.4 Setting parameters
1.4.1 Setting list
Table 5 Function setting list for overcurrent protection
NO. Default Abbr. Explanation Unit Min. Max.
1. In I_OC1 Current setting for stage 1 A 0.05In 20.00In
2. 0.4 T_OC1 Time setting for stage 1 S 0.00 60.00
3. 1.5In I_OC2 Current setting for stage 2 A 0.05In 20.00In
4. 0.1 T_OC2 Time setting for stage 2 S 0.00 60.00
5. 90.0 U_OC_UnBlk
Low voltage setting for
blocking overcurrent
protection (phase to phase)
V 1.00 120.0
6. 1 Curve_OC Inv Inverse time curve 1 12
7. 0.5In I_OC Inv
Current setting for inverse
time stage
A 0.05In 20.00In
8. 1 K_OC Inv Time multiplier 0.05 999.0
9. 0.056 A_OC Inv
Time factor for inverse time
stage
S 0.001 1000
10. 0.02 P_OC Inv Index for inverse time stage 0.01 10.00
11. 0 B_OC Inv
Delay time for inverse time
stage
S 0.00 60.00
12. 30 Angle_OC Direction characteristic angle degree 0.00 90.00
13. In I_2H_UnBlk
Maximum inrush current
setting
A 0.25In 20.00In
14. 0.15 Ratio_I2/I1
Ratio for second harmonic
current to fundamental
component
0.07 0.50
15. 0.2 T2h_Cross_Blk
Time setting for
cross-blocking function
S 0.00 60.00
Table 6 Logical linker list for overcurrent protection
30
NO. Abbr. Explanation
1. Func_OC1 Enable or disable the stage 1 of overcurrent protection
2. Func_OC2 Enable or disable the stage 2 of overcurrent protection
3. Func_OC Inv
Enable or disable the inverse time stage of overcurrent
protection
Table 7 Binary setting list for overcurrent protection
Bit 0 1 Explanation
1.0 OC1 Dir Off OC1 Dir On
Enable or disable the direction for
stage 1
1.1 OC1 V_Blk Off OC1_V Blk On
Enable or disable the low voltage
blocking for stage 1
1.2 OC1 2H_Blk Off OC1 2H_Blk On
Enable or disable the inrush
restraint for stage 1
1.3 OC2 Dir Off OC2 Dir On
stage 2
1.4 OC2 V_Blk Off OC2 V_Blk On
Enable or disable the low voltage
blocking for stage 2
1.5 OC2 2H_Blk Off C2 2H_Blk On
1.6 OC Inv Dir Off OC Inv Dir On
inverse stage
1.7 OCInv 2H_Blk Off OCInv 2H_Blk On
restraint for inverse stage
2.9 3Ph V Connect 1Ph V Connect
Select voltage connection way by
single phase or three phase
2.14 UnBlk Fun_VT Fail Blk Fun_VT Fail
Enable the function of VT fail
blocking
4.0 OC1 Alarm OC1 Trip
Stage 1 of overcurrent protection
alarm or trip
4.1 OC Inv Alarm OC Inv Trip
Inverse stage of overcurrent
protection alarm or trip
1.5 Reports
Table 8 Event information list
OC1 Trip Overcurrent protection stage 1 issues trip command
OC2 Trip Overcurrent protection stage 2 issues trip command
OC Inv Trip Overcurrent protection inverse time stage issues trip command
31
Inrush Blk Inrush is detected to block function.
Table 9 Alarm information list
OC1 Alarm Overcurrent protection stage 1 issues alarm signal
OC Inv Alarm Overcurrent protection inverse time stage issues alarm signal
1.6 Technical data
Table 10 Technical data for overcurrent protection
Item Rang or Value Tolerance
Definite time characteristics
Current 0.08 Ir to 20.00 Ir 3% setting or 0.02Ir
Time delay 0.00 to 60.00s, step 0.01s
1% setting or +40ms, at 200%
operating setting
Reset time approx. 40ms

Reset ratio Approx. 0.95 at I/In 0.5

Inverse time characteristics
IEC standard Normal inverse;
Very inverse;
Extremely inverse;
Long inverse
5% setting + 40ms, at 2
<I/ISETTING < 20, in accordance
with IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
<I/ISETTING < 20, in
accordance with ANSI/IEEE
C37.112,

user-defined characteristic
T=

with IEC60255-151
Time factor of inverse time, A 0.005 to 200.0s, step 0.001s
Delay of inverse time, B 0.000 to 60.00s, step 0.01s
Index of inverse time, P 0.005 to 10.00, step 0.005
set time Multiplier for step n: k 0.05 to 999.0, step 0.01
Minimum operating time 20ms

32
Maximum operating time 100s

Reset mode instantaneous
Reset time approx. 40ms,

Directional element
Operating area range 170
3, at phase to phase
voltage >1V
Characteristic angle 0 to 90, step 1

Chapter 4 Earth fault protection
33

About this chapter
This chapter presents the protection principle, input and output
signals, parameter, logic diagram, IED report and technical data
included in earth fault protection.

34
1 Earth fault protection
1.1 Introduction
The non-directional earth fault elements can be applied as backup protection
functions in various applications including line and transformer protection in
systems with radial nature and those which are supplied from a single source.
The directional earth fault protection allows the application of the IED also in
systems where protection coordination depends on both the magnitude of the
earth fault current and the direction of power flow to the fault location, for
instance, in case of parallel lines or transformers, or in a loop configuration.
Main features of the earth fault are as follows:
11 kinds of the IEC and ANSI inverse time characteristic curves as well
as optional user defined characteristic
Zero sequence directional element
Negative sequence directional element is applied as a complement to
zero sequence directional element. It can be enabled/disabled by setting
Each stage can be set individually as directional/non-directional
Each stage can be set individually for inrush restraint
Settable maximum inrush current
Inrush restraint function adopting 2
nd
harmonic measured phase or earth
current (settable)
First definite stage and inverse time stage can be set individually to alarm
or trip
VT secondary circuit supervision for directional protection function. Once
VT failure happens, the directional stage can be set to be blocked or to
be non-directional
35
Zero-sequence current is calculated by summation of 3 phase currents or
measured from earth phase CT selectable
1.2.1 Time characteristic
The time characteristic for each stage can be chosen as definite time stage or
some type of inverse time characteristic. 11 kinds of inverse time
characteristics are available. It is also possible to create a user defined time
characteristic. Each stage can operate in conjunction with the integrated
inrush restraint and directional functions and operate based on measured
phase current.
The earth fault protection can operate with the measured or calculated zero
sequence current (zero-sequence current I
N
measured from earth phase CT
or zero-sequence current 3I
0
calculated by the summation of three phase
currents, 3I
0
=I
A
+I
B
+I
C
). These two types of measured quantity can be enabled
or disabled via binary setting. If setting 3I0 Measured is enabled in the
binary setting, the function will operate based on the measured
zero-sequence current, whereas, the 3I0 Calculated is enabled, the
zero-sequence current is calculated from the summation of three phase
currents.
Pickup value for the definite stage can be set in setting value. The measured
or calculated zero-sequence current is compared with the corresponding
setting value with delay time. If zero-sequence current exceed the associated
pickup value, after expiry of the time delay, trip command is issued. The
condition for delay time start is expressed in the following formula

Equation 3
The time delay can be set for each definite stage individually in setting. After
the delay time elapsed, trip command or alarm signal is issued. The drop out
value of the definite stages is approximately equal to 96% of the pickup value
for 3I
0
/In0.5.
36
The time delay of inverse time characteristic is calculated based on the type
of the set characteristic, the magnitude of the current and a time multiplier.
For the inverse time characteristic, both ANSI and IEC based standard curves
are available, and any user-defined characteristic can be defined using the
following equation:

K_EF
Equation 4
where:
A_EF: Time factor for inverse time stage
B_EF: Delay time for inverse time stage
P_EF: index for inverse time stage
K_EF: Time multiplier
The time is set to count up for a user-defined time delay. The time delay can
be set for each definite stage individually through corresponding settings.
After the user-defined time delays elapsed, a trip command is issued.
1.2.2 Inrush restraint
The protection IED may detect large magnetizing inrush currents during
transformer energizing. In addition to considerable unbalance fundamental
current, inrush current comprises large second harmonic current which does
not appear in short circuit current. Therefore, the inrush current may affect the
protection functions which operate based on the fundamental component of
the measured current. Accordingly, inrush restraint logic is provided to
prevent earth fault protection from maloperation.
Generally, inrush restraint for earth fault protection is performed based on the
second harmonic contents of three phase currents. However, it is possible to
use the IED only for earth fault protection and therefore, the phase currents
may be not connected to the IED. In such cases, if the binary setting of EF
Chk I02/I01 is enabled, second harmonic content of zero sequence current is
considered if the zero sequence current is measured from neutral CT. As
mentioned previously, the binary setting of 3I0 Measured is enabled for this
situation. So, the inrush condition is recognized if the ratio of second
37
harmonic content of measured zero sequence current to its fundamental
component exceeds corresponding setting value.
Furthermore, if the fundamental component of zero sequence current
exceeds the upper limit value for unblocking, the earth fault protection will not
be blocked any longer.
On the contrary, if binary setting of EF Chk I2/I1 is set, the inrush condition is
recognized if the ratio of second harmonic content in each phase current to
their fundamental component exceeds setting value.
Furthermore, if the fundamental component of each phase current exceeds
the upper limit value for unblocking, the earth fault protection will not be
blocked any longer.
1.2.3.1 Zero-sequence directional element
In this method, the direction determination is performed by comparing the
zero sequence system quantities. In current path, the measured I
N
current is
valid, when the neutral current is connected to the IED and the binary setting
3I0 Measured is enabled. Otherwise, the IED calculates quantity 3I
0
from
the summation of the three phase currents when the binary setting 3I0
Calculated is enabled. In the voltage path, the displacement voltage V
N
is
used as reference voltage, if it is connected, and the binary setting 3U0
Measured is enabled. Otherwise, the IED calculates the zero sequence
voltage 3V
0
from the summation of three phase voltages if binary setting 3U0
Calculated is enabled. Direction determination can be performed by the IED
for 3V
0
quantity having a magnitude fall to 2V. Contrary to the directional
phase elements, which work based on the un-faulted voltage as reference
voltage, for the earth fault protection direction element, the zero sequence
voltage is used as the reference voltage. Depending on the connection of the
voltage transformer (setting 3U0 Measured/3U0 Calculated), V
N
or 3V
0

(3V0=VA+VB+VC) is applied.
In order to satisfy different network conditions and applications, the reference
voltage can be rotated by adjustable angle between 0 and 90 in clockwise
direction (negative sign). It should be noted that the settings are applied for all
the directional stages of earth fault element. In this way, the vector of rotated
reference voltage can be closely adjusted to the vector of fault current -3I
0
which lags the fault voltage 3V
0
by the fault angle
0
_Char. This will provide
the best detection result for the direction determination. The rotated reference
38
voltage defines the forward and reverse area. The forward area is in range of
80 around the rotated reference voltage. If the vector of the fault current -3I
0

is in this area, the fault condition is detected as forward direction. The
zero-sequence direction detection characteristic is shown in Figure 6.
Forward
0_Char
Bisector
0_Ref 3U
0
-3I 0
3I 0
90

Figure 6 Direction detection characteristic of zero sequence directional element
where:
0_Char
1.2.3.2 Negative-sequence directional element
In this method, direction determination is performed by comparing the
negative sequence system quantities. To do so, the calculated negative
sequence current 3I
2
is compared with the calculated negative sequence
voltage 3V
2
. This method is particularly suitable for the condition that the zero
sequence voltage is too low, for example, when a considerable zero
sequence mutual coupling exists between parallel lines or when there is an
unfavorable zero sequence impedance. In such cases it may be desirable to
determine direction of fault current by using negative sequence components.
If the binary setting for negative-sequence direction detection is enabled, the
default direction determination is performed by using the zero sequence
components, however, when the magnitude of zero sequence voltage falls
below permissible threshold of 2V, the negative-sequence directional element
is used to detect direction. On the contrary, if the negative-sequence direction
detection is disabled, the direction of earth fault current is only determined by
the zero sequence components. In this regard, if the magnitude of zero
sequence voltage magnitude is larger than 2V, proper direction determination
39
can be detected. However, for the condition that the zero sequence voltages
below 2V, no direction determination would be applied, thus, the fault is
considered as reverse direction.
The fault current -3I
2
is in phase opposition to the fault current 3I
2
and lags
from the voltage 3V
2
by the fault angle
2
_Char. To satisfy different
applications, the reference voltage can be rotated by adjustable angle
between 0 and 90 in clockwise direction (negative sign) to be closely
adjusted to the vector of fault current -3I2. This would provide the best
detection result for direction determination. The rotated reference voltage
defines the forward and reverse area. The forward area is in range of 80
around the rotated reference voltage. If the vector of fault current -3I2 is in this
area, the fault condition is detected as forward direction. The negative
sequence direction detection characteristic is shown in Figure 7.
Forward
2_Char
I 3 2
I -3 2
3 Ref U2_
0
90
Bisector

Figure 7 Direction detection characteristic of negative sequence directional element
where:
2_Char
1.2.4 Logic diagram
AND 1
EFChkI02/I01
I01>3I0_2H_UnBlk
I02/I01>
IrBLKEF

40
Figure 8 Logic diagram for inrush restraint based on measured zero sequence current
OR
AND
EFChkI2/I1
1
Max(Ia1,Ib1,Ic1)>I_2H_UnBlk
Ic2/Ic1>
Ib2/Ib1>
Ia2/Ia1>
IrBLKEF

Figure 9 Logic diagram for inrush restraint based on based on phase currents
AND
AND
OR
OR
AND
OR
UnBlkFun_VTFail
BlkFun_VTFail
BlkFun_VTFail
UnBlkFun_VTFail
3U0Calculated
AND
AND
OR
OR
AND
OR
UnBlkFun_VTFail
BlkFun_VTFail
BlkFun_VTFail
UnBlkFun_VTFail
3U0Meaured
VTFail
U0/I0-
3U0>2V
VTFail
U2/I2-
V1pVTFail
U0/I0-
3U0>2V
VTFail
U2/I2-
Forward
Forward
EFU2/I2Dir
EFU2/I2Dir

41
Figure 10 Logic diagram for direction determination
AND
0
EF12H_BlkOff
EF12H_BlkOn
1
EF1DirOff
EF1DirOn
Func_EF1
T
I0>
IrBLKEF
Forward
Trip/Alarm

Figure 11 Logic diagram for first definite stage of earth fault protection
AND
0
EFInv2H_BlkOff
EFInv2H_BlkOn
1
EFInvDirOff
EFInvDirOn
Func_EFInv
T
I0Inverse
IrBLKEF
Forward
Trip/Alarm

Figure 12 Logic diagram for inverse time stage of earth fault protection

IP1
IP2
IP3
UP1
UP2
UP3
EF1Trip
EF2Trip
EFInvTrip
IP0

42
Signal Description
Signal Description
EF1 Trip Earth fault protection stage 1 trip
EF2 Trip Earth fault protection stage 2 trip
EF Inv Trip Earth fault protection inverse time stage trip
1.4.1 Setting list
Table 13 Function setting list for earth fault protection
1. In 3I0_EF1
Zero-sequence current
setting for stage 1
A 0.05In 20.00In
2. 0.4 T_EF1 Time delay for stage 1 S 0.00 60.00
3. 1.5In 3I0_EF2
setting for stage 2
A 0.05In 20.00In
4. 0.1 T_EF2 Delay time for stage 2 S 0.00 60.00
5. 1 Curve_EF Inv Inverse time curve 1 12
6. 0.5In 3I0_EF Inv
setting for inverse time
stage
A 0.05In 20.00In
7. 1 K_EF Inv Time multiplier 0.05 999.0
8. 12 A_EF Inv
Time factor for inverse
time stage
S 0.001 1000
9. 1 P_EF Inv
Index for inverse time
stage
0.01 10.00
10. 0 B_EF Inv
Delay time for inverse
time stage
S 0.000 60.00
11. 30 Angle_EF Characteristic angle for degree 0.00 90.00
43
zero-sequence direction
12. 30 Angle_Neg
Characteristic angle for
negative-sequence
direction
degree 0.00 90.00
13. In I_2H_UnBlk
Maximum inrush phase
current setting
A 0.25In 20.00In
14. In 3I0_2H_UnBlk
Maximum inrush zero
sequence current
setting
A 0.25In 20.00In
15. 0.15 Ratio I2/I1
Ratio for second
harmonic current to
fundamental component
0.07 0.50
16. 0.15 Ratio I02/I01
Ratio for zero sequence
second harmonic
current to zero
sequence fundamental
component
0.07 0.50
Table 14 Logical linker list for earth fault protection
1. Func_EF1 Enable or disable the stage 1 of earth fault protection
2. Func_EF2 Enable or disable the stage 2 of earth fault protection
3. Func_EF Inv Enable or disable the inverse time stage of earth fault protection
Table 15 Binary setting list for earth fault protection
Bit Default 0 1 Explanation
1.8 1 EF1 Dir Off EF1 Dir On
Enable or disable the
direction for stage 1
1.9 1 EF1 2H_Blk Off EF1 2H_Blk On
1.10 1 EF2 Dir Off EF2 Dir On
direction for stage 2
1.11 1 EF2 2H_Blk Off EF2 2H_Blk On
1.12 1 EF Inv Dir Off EF Inv Dir On
direction for inverse stage
1.13 1 EFInv 2H_Blk Off EFInv 2H_Blk On
restraint for inverse stage
1.14 1 EF Chk I2/I1 EF Chk I02/I01
Enable or disable inrush
restraint by I2/I1 or I02/I01
44
1.15 0 EF U2/I2 Dir Off EF U2/I2 Dir On
negative sequence direction
2.7 0 3I0 Measured 3I0 Calculated 3I0 measured or calculated
2.8 1 3U0 Measured 3U0 Calculated 3U0 measured or calculated
2.11 0 Blk EF_CT Fail UnBlk EF_CT Fail
Enable or disable the function
of CT fail blocking
2.14 1 UnBlk Fun_VT Fail Blk Fun_VT Fail
of VT fail blocking
4.2 1 EF1 Alarm EF1 Trip
Stage 1 of overcurrent
4.3 1 EF Inv Alarm EF Inv Trip
Inverse stage of overcurrent
1.5 IED reports
EF1 Trip Earth fault protection stage 1 issues trip command
EF2 Trip Earth fault protection stage 2 issues trip command
EF Inv Trip Earth fault protection inverse stage issues trip command
Inrush Blk Inrush is detected to block function.
EF1 Alarm Earth fault protection stage 1 issues an alarm signal
EF Inv Alarm Earth fault protection inverse stage issues an alarm signal
1.6 Technical data
Table 18 Technical data for earth fault protection
Item Rang or value Tolerance
Definite time characteristic
Time delay 0.00 to 60.00s, step 0.01s
1% setting or +40ms, at 200%
operating setting

Reset ratio Approx. 0.95 at I/Ir 0.5

45
Very inverse;
Extremely inverse;
Long inverse
IEC60255-151
<I/ISETTING < 20
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
ANSI/IEEE C37.112,
<I/ISETTING < 20
T=

IEC60255-151
<I/ISETTING < 20
Time factor of inverse time, A 0.005 to 200.0s, step
0.001s

Directional element
Operating area range of zero
sequence directional element
160
3, at 3U01V
Operating area range of negative
sequence directional element
160
3, at 3U22V
46
Chapter 5 Sensitive earth fault protection
47
Chapter 5 Sensitive earth fault
protection

About this chapter
This chapter introduces the protection principle, input and output
used for sensitive earth fault protection.

48
1 Sensitive overcurrent protection
1.1 Introduction
In networks with high impedance earthing, the phase to earth fault current is
significantly smaller than load current and phase to phase short circuit
currents. Another difficulty for earth fault protection is that the magnitude of
the phase to earth fault current is almost independent of the fault location in
the network.
Sensitive earth fault protection can be used to detect and give selective trip of
phase to earth faults in isolated or compensated networks. The protection
function also can be applied to detect high impedance earth faults in solidly or
low-resistance earthed networks.
Sensitive earth fault protection integrated in the IED provides following
features:
Sensitive earth fault directional element with U
0
/I
0
- principle
Sensitive earth fault directional element with Cos principle
Each stage can be set to be directional, or non-directional independently
Each stage can be set individually to alarm or trip
Displacement voltage can be checked to increase function reliability
Dedicated sensitive CT
VT secondary circuit supervision for directional protection function
1.2.1 Time characteristic
49
The time characteristic for each stage can be chosen as definite time stage or
some type of inverse time characteristic. 11 kinds of inverse time
characteristics are available. It is also possible to create a user defined time
characteristic. Each stage can operate in conjunction with the integrated
directional functions and operate based on measured phase current which is
injected from the dedicated sensitive current transformer.
Pickup value for the definite stage can be set in setting value. The measured
current from sensitive CT input is compared with the corresponding setting
value with delay time. If the measured current exceeds the associated pickup
value, after expiry of the time delay, the trip command or alarm signal is
issued. The dropout value of the definite stages is approximately equal to 96%
of the pickup value.
following equation:

K_SEF
Equation 5
where:
A_SEF: Time factor for inverse time stage
B_SEF: Delay time for inverse time stage
P_SEF: index for inverse time stage
K_SEF: Time multiplier
By applying proper setting of the aforementioned parameters, the IED
calculates the tripping or alarming time from the measured current in each
phase separately. Once the calculated time has been elapsed, the trip signal
or alarm signal is issued.
50
The integrated directional function can be applied to each stage of sensitive
earth fault element via specified binary setting. In order to discriminate
forward or reverse short circuits, the IED provides two methods for sensitive
earth fault direction detection which should be utilized to cover all network
configurations according to the type of grounding. Based on U
0
/I
0
-
measurement and based on Cos measurement respectively.
When the U0/I0- or Cos elements used for directional sensitive earth fault
protection, the VT failure condition may result in false or undesired tripping or
alarming. In such situation, it is possible to set operation state for each stage
of sensitive earth fault protection which operates in conjunction with direction
feature by binary setting to block the function or operate without direction
detection. When binary setting is set to UnBlk Fun_VTFail, corresponding
sensitive earth fault stages would not consider direction in case of VT failure.
When it is set to Blk Fun_VTFail, the function will be blocked when VT
failure happens. It is noted that the binary setting affects all the stages of
sensitive earth fault element.
Pay attention to that direction determination based on measured
displacement voltage will not be blocked in case of failure detection in the
three-phase connected to voltage transformer. Similarly, if the direction
determination is based on the calculated displacement voltage, the protection
function will not be blocked as a result of failure detection in U
4
voltage
transformer. However, in case of a failure in U
4
voltage transformer, the
direction determination based on measured value of displacement voltage will
be blocked depend on the binary setting UnBlk Fun_VTFail/Blk Fun_VTFail
enabled or disabled.
1.2.2.1 U
0
/I
0
- measurement
In this method, the direction determination is performed by comparing the
displacement angle between zero sequence system quantities. In current
path, the measured current I
s
from the sensitive input is applied. In the
voltage path, the displacement voltage V
N
is used as reference voltage, if it is
connected, and the binary setting 3U0 Measured is enabled. Otherwise the
IED calculates the zero sequence voltage 3V
0
from the summation of the
three phase voltages if setting 3U0 Calculated is enabled. The condition for
direction determination with 3V
0
quantity is that the magnitude of 3V
0
is larger
than the setting U_3V0_SEF
Contrary to the directional phase elements, which work with the un-faulted
voltage as reference voltage, for the sensitive earth fault protection, the zero
sequence voltage is used as the reference voltage for direction determination.
Depending on the connection of voltage transformer (setting 3U0
51
Measured/3U0 Calculated), the corresponding reference voltage is V
N
or 3V
0

(3V
0
=V
A
+V
B
+V
C
).
Forward
Bisector
NS_Char
I
-
NS
INS
3 Ref U0_
0
90

Figure 13 Direction detection characteristic of the sensitive earth fault
directional element by U0/I0-
where:
NS
_Char: The settable characteristic angle
In order to satisfy different network conditions and applications, the reference
voltage can be rotated by adjustable angle between 0 and 90 in
anticlockwise direction (positive sign). It should be noted that the settings
affect all the directional stages of sensitive earth fault element. In this way, the
vector of rotated reference voltage can be closely adjusted to the vector of
fault current -I
s
which leads the fault voltage 3V
0
by the fault angle
NS
_Char.
This would provide the best possible result for the direction determination.
The rotated reference voltage defines the forward and reverse area. The
forward area is in range of 80 around the rotated reference voltage.
1.2.2.2 Cos measurement
Similar to U
0
/I
0
- method, the direction determination is performed in cos
method by using the measured current I
s
from sensitive current input together
with the measured or calculated displacement voltage. In this context, the
measured displacement voltage is used if it is connected, and the binary
setting 3U0 Measured is enabled. Otherwise the IED calculates the zero
sequence voltage 3V
0
from the summation of the three phase voltages if
setting 3U0 Calculated is enabled. The condition for direction determination
with 3V
0
quantity is that the magnitude of 3V
0
is larger than the setting
U_3V0_SEF.
52
Unlike to U
0
/I
0
- method, direction determination is performed in Cos
method by using those component of the residual current which is
perpendicular to the directional characteristic (axis of symmetry). Figure 14
shows how the IED adopts complex vector diagram for direction
determination. As can be seen, displacement voltage 3V
0
is the reference
magnitude quantity. The axis of symmetry is defined as a line perpendicular to
this quantity. The sensitive earth fault protection would issue a trip command
or an alarm signal if the active component of I
s
is in the opposite direction of
the reference voltage and has a magnitude exceeds setting IsCOS_SEF.
Forward
3 Ref U0_
I
-
S
IS
0
90

Figure 14 Direction detection characteristic of the sensitive earth fault
directional element by Cos
1.2.3 Logic diagram
AND
SEFChkU0/I0
U0/I0-
3U0>
Forward

Figure 15 Logic diagram for direction determination based on U0/I0- measurement
AND
SEFChkIscos
IsCOS
3U0>
Forward

Figure 16 Logic diagram for direction determination based on Cos measurement
53
AND
OR
OR
AND
OR
UnBlkFun_VTFail
BlkFun_VTFail
BlkFun_VTFail
UnBlkFun_VTFail
3U0Calculated
3U0Measured
VTFail
Forward
V1pVTFail
ForwardRelease

Figure 17 Influence of VT failure on direction determination of sensitive earth fault protection
AND
SFF1 Dir Off
1
SEF1 Dir On
Func_SEF1
T
Is >
Forward Release
Trip/Alarm

Figure 18 Logic diagram for the first definite stage of sensitive earth fault protection
AND
SFF Inv Dir Off
1
SEF Inv Dir On
Func_SEF Inv
T
Is Inverse
Forward Release
Trip/Alarm

Figure 19 Logic diagram for the inverse time stage of sensitive earth fault protection
54
IS
SEF1Trip
UP1
UP2
UP3
SEF1Alarm
SEF2Trip
SEF2Alarm
SEFInvTrip
SEFInvAlarm

Signal Description
Is Signal for sensitive current input
Signal Description
SEF1 Trip Sensitive earth fault protection stage 1 trip
SEF1 Alarm Sensitive earth fault protection stage 1 alarm
SEF2 Trip Sensitive earth fault protection stage 2 trip
SEF2 Alarm Sensitive earth fault protection stage 2 alarm
SEF Inv Trip
Sensitive earth fault protection inverse time
stage trip
SEF Inv Alarm
Sensitive earth fault protection inverse time
stage alarm
1.4.1 Setting list
Table 21 Function setting list for sensitive earth fault protection
1. In I_SEF1
Sensitive current
setting for stage 1
A
0.005
(SEF)
0.05In
(Normal)
1.00
(SEF)
20.00In
(Normal)
55
2. 0.4 T_SEF1 Time delay for stage 1 S 0.00 60.00
3. 1.5In I_SEF2
Sensitive current
setting for stage 2
A
0.005
(SEF)
0.05In
(Normal)
1.00
(SEF)
20.00In
(Normal)
4. 0.1 T_SEF2 Time delay for stage 2 S 0.00 60.00
5. 1
Curve_SEF
Inv
Inverse time curve 1 12
6. 0.5In I_SEF Inv
Sensitive current
setting for inverse
stage
A
0.005
(SEF)
0.05In
(Normal)
1.00
(SEF)
20.00In
(Normal)
7. 1 K_SEF Inv Time multiplier 0.05 999.0
8. 12 A_SEF Inv
time stage
S 0.001 1000
9. 1 P_SEF Inv
stage
0.01 10.00
10. 0 B_SEF Inv
time stage
S 0.000 60.00
11. 30 Angle_SEF
Characteristic angle
for U0/I0-
measurement
degree 0.00 90.00
12. 0.01 IsCOS_SEF
Sensitve current for
direction determination
of IsCos
measurement
A 0.005 1.00
13. 20 U_3V0_SEF
Voltage threshold for
direction determination
V 2.00 100.0
Table 22 Logical linker list for sensitive earth fault protection
1. Func_SEF1 Enable or disable the stage 1 of sensitive earth fault protection
2. Func_SEF2 Enable or disable the stage 2 of sensitive earth fault protection
3. Func_SEF Inv
Enable or disable the inverse time stage of sensitive earth
fault protection
Table 23 Binary setting list for sensitive earth fault protection
Bit 0 1 Explanation
2.1 SEF1 Dir Off SEF1 Dir On Enable or disable the direction for
56
Bit 0 1 Explanation
stage 1
2.2 SEF2 Dir Off SEF2 Dir On
stage 2
2.3 SEF Inv Dir Off SEF Inv Dir On
inverse stage
2.4 SEF Chk Iscos SEF Chk U0/I0
Direction determination by U0/I0-
measurement or IsCos measurement
2.8 3U0 Measured 3U0 Calculated 3U0 measured or calculated
2.14 UnBlk Fun_VT Fail Blk Fun_VT Fail
Enable or disable the function of VT fail
blocking
4.4 SEF1 Alarm SEF1 Trip
Stage 1 of sensitive earth fault
4.5 SEF2 Alarm SEF2 Trip
Stage 2 of sensitive earth fault
4.6 SEF Inv Alarm SEF Inv Trip
Inverse stage of sensitive earth fault
1.5 IED reports
SEF1 Trip Sensitive earth fault protection stage 1 issues trip command
SEF2 Trip Sensitive earth fault protection stage 2 issues trip command
SEF Inv Trip Sensitive earth fault protection inverse stage issues trip command
SEF1 Alarm Sensitive earth fault protection stage 1 issues an alarm signal
SEF2 Alarm Sensitive earth fault protection stage 2 issues an alarm signal
SEF Inv Alarm Sensitive earth fault protection inverse stage issues an alarm signal
1.6 Technical data
Table 26 Technical data for sensitive earth fault protection
Item Range or value Tolerance
Current from sensitive CT input 0.005 to 1.000 A , step 0.001 A 3 % setting value or 1 mA
57
Current from neutral CT input 0.08 Ir to 20.00 Ir 3 % setting value or 0.02 Ir
Time delay 0.00 to 60.00, step 0.01 s 1.5 % setting value or +40
ms, at 200% operating setting
Reset ratio Approx. 0.95 when I/In 0.5
Reset time Approx. 40 ms
Current from sensitive input 0.005 to 1.000 A , step 0.001 A 3 % setting value or 1 mA
Current from normal input 0.08 Ir to 20.00 Ir 3 % setting value or 0.02 Ir
Very inverse;
Extremely inverse;
Long inverse
with IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
C37.112,
T=
A
i
ISET
P
1
Bk
with IEC60255-151
Directional element for sensitive earth-fault protection
principles I cos
(V0 / I0)

Direction measurement IE and VE measured
or 3V0 calculated

3U0 Minimum voltage threshold 2.00 to 100.00 V, step 0.01 V 3 % setting for measured
voltage;
5 % setting for calculated
voltage
Characteristic angle _SEFChar 0.0 to 90.0, step 1 3
58
Operating area range 160 3
Chapter 6 Negative-sequence
overcurrent protection
59

About this chapter
used for negative-sequence overcurrent protection.

60
1 Negative-sequence overcurrent
protection
1.1 Introduction
Negative-sequence overcurrent protection detects unbalanced loads on the
system. It is especially useful to monitor the unbalanced load of motors. This
is due to the fact that unbalanced loads create counter-rotating fields in
three-phase induction motors, which cause overheating in rotor end zones. In
addition, the protection function may be used to detect interruptions, short
circuits and polarity problems with current transformers. Furthermore, it is
suitable for detecting single-phase and two-phase faults with fault currents
lower than load currents.
The protection provide following features:
The first definite stage and inverse stage can be set individually as alarm
or trip stage
1.2.1 Protection function description
The IED provides three negative-sequence overcurrent protection stages
from which two stages operate as definite time stages and the other one
operates with inverse time-current characteristic. The negative-sequence
overcurrent protection operates based on negative sequence current
calculated from three phase currents, as follows:

Equation 6
61
Individual pickup value for each definite stage can be set in setting value. The
calculated negative sequence current from Equation 6 is compared
separately with the corresponding setting value with delay time. If the
calculated negative-sequence current exceeds the associated pickup value,
after expiry of the time delay, the trip command or alarm signal is issued. The
drop out value of the definite stages is approximately equal to 95% of the
pickup value for I/I
n
0.5.
following equation:

K_NSOC
Equation 7
where:
A_NSOC: Time factor for inverse time stage
B_NSOC: Delay time for inverse time stage
P_NSOC: index for inverse time stage
K_NSOC: Time multiplier
By applying proper setting of the aforementioned parameters, the IED
calculates the tripping or alarming time from the measured current in each
phase separately. Once the calculated time has been elapsed, the trip signal
or alarm signal is issued.
1.2.2 Logic diagram

62
AND
T1
Func_NSOC1On
AND
T2
Func_NSOC2On
AND
Func_NSOCInv
CTFail
3I2>3I2_NSOC1
3I2>3I2_NSOC2
3I2>3I2_NSOCInv
NS1Trip/Alarm
NS2Trip/Alarm
NSINVTrip/Alarm

Figure 20 Logic diagram for negative-sequence overcurrent protection

IP1
IP2
IP3
NSOC1Trip
NSOC2Trip
NSOCInvTrip
NSOC1Alarm
NSOC2Alarm
NSOCInvAlarm

Signal Description
Signal Description
NSOC1 Trip
Negative sequence overcurrent protection
stage 1 trip
63
NSOC1 Alarm
stage 1 alarm
NSOC2 Trip
stage 2 trip
NSOC2 Alarm
stage 2 alarm
NSOC Inv Trip
inverse time stage trip
NSOC Inv Alarm
inverse time stage alarm
1.4.1 Setting list
Table 29 Function setting list for negative-sequence overcurrent protection
1. In 3I2_NSOC1
Negative sequence
current setting for
stage 1 of NSOC
protection
A 0.05In 20.00In
2. 0.4 T_NSOC1
Time setting for stage
1 of NSOC protection
S 0.00 60.00
3. 1.5In 3I2_NSOC2
Negative sequence
current setting for
stage 2 of NSOC
protection
A 0.05In 20.00In
4. 0.1 T_NSOC2
Time setting for stage
2 of NSOC protection
S 0.00 60.00
5. 1
Curve_NSO
C Inv
Inverse time curve 1 12
6. 0.5In
3I2_NSOC
Inv
Negative sequence
current setting for
inverse stage of NSOC
protection
A 0.05In 20.00In
7. 1 K_NSOC Inv Time multiplier 0.05 999.0
8. 0.056 A_NSOC Inv
time stage
S 0.001 1000
9. 0.02 P_NSOC Inv
stage
0.01 10.00
10. 0 B_NSOC Inv
time stage
S 0.000 60.00
64
Table 30 Logical linker list for negative-sequence overcurrent protection
1. Func_NSOC1 Enable or disable the stage 1 of negative sequence protection
2. Func_NSOC2 Enable or disable the stage 2 of negative sequence protection
3. Func_NSOC Inv
Enable or disable the inverse time stage of negative sequence
protection
Table 31 Binary setting list for negative-sequence overcurrent protection
Bit 0 1 Explanation
4.7 NSOC1 Alarm NSOC1 Trip
Stage 1 of negative sequence
overcurrent protection alarm or trip
4.8 NSOC Inv Alarm NSOC Inv Trip
Inverse stage of negative sequence
overcurrent protection alarm or trip
1.5 IED reports
NSOC1 Trip Negative sequence current protection stage 1 issues trip command
NSOC2 Trip Negative sequence current protection stage 2 issues trip command
NSOC Inv Trip Negative sequence current protection inverse stage issues trip command
NSOC1 Alarm Negative sequence current protection stage 1 issues an alarm signal
NSOC Inv Alarm Negative sequence current protection inverse stage issues an alarm signal
1.6 Technical data
Table 34 Technical data for negative sequence overcurrent protection
Current 0.08 Ir to 20.00 Ir 3% setting value or 0.02Ir
Time delay 0.00 to 60.00, step 0.01 s
1% setting or +40ms, at
200% operating setting
Reset time 40 ms
65
Reset ratio Approx. 0.95 for I2 /Ir > 0.5
Very inverse;
Extremely inverse;
Long inverse
with IEC60255-151
ANSI Inverse;
Short inverse;
Long inverse;
Moderately inverse;
Very inverse;
Extremely inverse;
Definite inverse
C37.112,
T=
A
i
ISET
P
1
Bk
with IEC60255-151



66

Chapter 7 Thermal overload protection
67
Chapter 7 Thermal overload
protection

About this chapter
This chapter introduces the protection principle, input and
technical data used for thermal overload protection.

68
1 Thermal overload protection
1.1 Introduction
The thermal overload protection represents an essential requirement to
prevent protected equipment from thermal damaging due to overloads.
Thermal damage mostly affects the insulating material surrounding the phase
current conductors in transformers, cables or any other power equipment. As
a matter of fact, the insulation material ages too rapidly if the equipment
temperature exceeds the design limit value. Thus, a special protection is
needed to prevent over-temperature condition for the protected object. Since
severity of over-temperature condition is directly proportional to current
squared, the thermal protection operates based on the square of measured
current flowing through the protected object. Furthermore, because the
cumulative nature of over-temperature condition, it is necessary to integrate
previous thermal history of equipment in the protection. This is achieved in
the IED by providing a comprehensive thermal replica of the protected object.
In this regard, the IED provides an overload protection with memory capability
by taking into account both the previous history of an overload and the heat
loss to the environment.
1.2.1 Function description
The thermal overload protection in the IED is provided with one trip stage as
well as one alarm stage. It is possible to set the alarm stage at a certain
percentage of the setting value applied at the trip stage. They protection
function operates based on an approximate replica of the protected object in
the event of temperature rise caused by overload. The thermal replica is
implemented based on thermal models (Cold or Hot Curve) of IEC60255-8
standard. The temperature rise is calculated separately for each phase in a
thermal replica from the square of the respective phase current. The
maximum calculated temperature rise of the three phases is decisive for
evaluation of the thresholds.
The IED calculates the temperature rise of the protected equipment in each
phase, based on following differential equation:

69
Equation 8
where:
: is thermal time constant of heating for the protected object, in seconds. It is usually
determined by manufacturer of the protected object. This parameter can be set in
setting value.
I: is the measured fundamental current flowing through each phase of the protected
object.
: is the maximum permissible continuous thermal overload current. It is usually

specified by manufacturer of the protected object. This parameter can be set in
setting value.
: is temperature rise of the protected object in per unit of the final temperature rise
at maximum allowed phase current
.
According to Equation 8, the tripping time for thermal overload protection is
calculated by the following equation based on Hot Curve in IEC60255-8
standard:

Equation 9
where:
I
P
: is steady state current previous to the overload.
The IED is capable to calculate tripping time of thermal overload protection
not only based on the Hot Curve, but also based on Cold Curve as defined in
IEC60255-8 standard and equation as following:

Equation 10
From the Equation 9 and Equation 10 can be seen, the cold curve provides
no memory regarding to previous thermal condition of the protected object,
70
whereas, by using the hot curve, the protection function is able to represent a
memorized thermal profile of the protected object. It is possible to set which
curve should be considered for thermal overload protection by binary setting
Hot Curve/Cold Curve. If Hot Curve is enabled, tripping time of thermal
overload protection would be calculated based on Equation 9. In contrast, if
applying Cold Curve, Equation 10 would be used for calculation process. It
is noted that binary setting Hot Curve/Cold Curve affects both the alarm and
trip stages.
IP1
IP2
IP3
ThermalOLTrip
ThermalOLAlarm

Signal Description
Signal Description
Thermal OL Trip Thermal overload protection trip
Thermal OL Alarm Thermal overload protection alarm
1.4.1 Setting list
Table 37 Function setting list for thermal overload protection
1. In I_Therm OL
Current setting for thermal
overload protection
A 0.10In 10.00In
71
2. 60 T_Const Therm
Time constant for thermal
overload protection
S 6.0 9999
3. 1 Ratio_Cool
Cool ratio for Hot Curve of
thermal overload protection

0.100 10.00
4. 0.9 Ratio_Alarm
Alarm ratio for thermal
overload protection

0.500 1.000
Table 38 Logical linker list for thermal overload protection
1. Func_ThermOL Enable or disable the thermal overload protection
Table 39 Binary setting list for thermal overload protection
Bit 0 1 Description
2.5 Therm Alarm Off Therm Alarm On
Enable or disable the alarm function of
thermal overload protection
2.6 Hot Curve Cold Curve
Enable or disable the Hot Curve or Cold
Curve
1.5 IED reports
Therm OL Trip Thermal overload protection issues trip command
Therm OL Alarm Thermal overload protection issues an alarm signal
1.6 Technical data
Table 42 Technical data for thermal overload protection
Thermal heating time constant 1 to 9999 s
72
Thermal cooling time constant 1 to 9999 s
IEC cold curve
=
2 2
2
ln
u
t
I I
I
t
eq
eq

IEC 602558,
5% setting or +40ms
IEC hot curve
=
2 2
2 2
ln
u
t
I I
I I
t
eq
P eq

IEC 602558,
5% setting or +40ms
Chapter 8 Current overload protection
73
Chapter 8 Current overload
protection

About this chapter
used for current overload protection.

74
1 Current overload protection
1.1 Function description
The purpose of the overload protection is used to protect the capacitor bank
against the faults that occur normally by over-voltage which results in
dielectric breakdown. Alarm function and trip function are provided, which can
be enabled or disabled separately.
1.1.1 Logic diagram
Func_OL
Talarm OR
OLAlarmOn
Func_OL
Ttrip OR
Ia>
Ib>
Ic>
Ia>>
Ib>>
Ic>>
Trip
Alarm

Figure 21 Logic diagram for current overload protection
IP1
IP2
IP3
OverloadAlarm
OverloadTrip

Signal Description
75
Signal Description
Thermal OL Trip Thermal overload protection trip
Thermal OL Alarm Thermal overload protection alarm
1.3 Setting parameter
1.3.1 Setting list
Table 45 Function setting list for current overload protection
1. 1.5In I_OL Alarm
Current setting for alarm of
overload protection
A 0.05In 20.00In
2. 5 T_OL Alarm
Time setting for alarm of
overload protection
s 0.10 6000.0
3. 1.2In I_OL Trip
Current setting for trip of
overload protection
A 0.05In 20.00In
4. 10 T_OL Trip
Time setting for trip of overload
protection
s 0.10 6000.0
1. Func_OL Enable or disable the overload protection
Bit 0 1 Explanation
4.7 OL Alarm Off OL Alarm On
Enable or disable the alarm
function of overload protection
1.4 IED reports
76
OL Trip Over load protection issues trip command
OL Alarm Over load protection issues an alarm signal

Chapter 9 Overvoltage protection
77

About this chapter
used for overvoltage protection.

78
1 Overvoltage protection
1.1 Introduction
The overvoltage protection detects abnormal network and machine high
voltage conditions. Overvoltage conditions may occur possibly in the power
system during abnormal conditions such as no-load, light load, or open line
end on long line. The protection can be used as open line end detector or as
system voltage supervision normally.
The protection provides following features:
First stage can be set to alarm or trip
Measuring voltage between phase-earth voltage and phase-phase
(selectable)
Three phase or single phase voltage connection
Settable dropout ratio
1.2.1 Overvoltage protection principle
Overvoltage protection element provides two definite time stages which can
be enabled or disabled separately according to the users requirement using
dedicated binary setting Func_OV1 and Func_OV2. The first stage can be
used for tripping or alarming, whereas the second stage is dedicated for
tripping purposes. It is possible to select the operation mode of the first stage
of overvoltage protection using binary setting OV1 Alarm/OV1 Trip. As
expected, setting OV1 Alarm makes it work as an alarming stage, while by
applying OV1 Trip, it is possible to use the first stage as a tripping stage.
Voltage thresholds and time delays can be set individually for each element.
Thus, alarming or tripping can be time-coordinated depending on how severe
the voltage increases are, i.e. in case of a high overvoltage, trip command
can be issued with a short time delay, whereas in case of less severe
overvoltage, trip or alarm command can be issued with a longer time delay. In
this context, settings U_OV1 and T_OV1 correspond to the voltage
threshold and time delay of the first stage. Similarly, settings U_OV2 and
T_OV2 are related to the second stage. The dropout ratio for both the
overvoltage stages can be set through setting Dropout_OV.
79
Overvoltage protection can operate based on phase to earth voltages VA-N,
VB-N, VC-N or phase to phase voltage VA-B, VB-C, VC-A. The IED is
informed about users preference by binary setting OV PP/OV PE. By
setting OV PP, calculation would be based on phase to phase voltages.
However, by setting OV PE, phase to ground voltages would be employed
in calculation.
1.2.2 Voltage connection
A
B
C
VA
VB
VC
VN
CSC-211
A
B
C
CaseA
CSC-211
VC
VN
VB
VA
CaseB
A
B
C
VA
VB
VC
VN
A
B
C
VA
VB
VC
VN
CaseC CaseD
CSC-211
CSC-211

Figure 22 Connection example for overvoltage protection
As can be seen from Figure 22, overvoltage protection is suitable for different
connections of voltage transformer. Overvoltage protection is capable to
operate not only with three phase to earth voltages connection (Case A and
Case B) but also with only one phase to phase voltage (Case C) or phase to
earth voltage (Case D). If only one phase to phase voltage is connected to the
IED, it can be connected to the VA-VB, VB-VC or VC-VA input of the relay. In
this case, overvoltage protection should be set to operate based on OV PP.
Similarly, by connection of one phase to earth voltage to the device, it can be
connected to the VA-VN, VB-VN or VC-VN input of the relay. Furthermore,
overvoltage protection should be set to operate based on OV PE. It should
be noted that if the IED is only provided with one phase to phase voltage, it is
80
impossible to calculate phase to earth voltage accurately. This is because the
fact that there is no earth voltage connected to the IED.
It is noted that despite the capability of overvoltage protection to operate
properly with one phase to phase or one phase to earth voltage, maybe there
are some limitation may exist in operation of other protection functions, in
these conditions. For example, direction determination based on three phase
voltages would not operate with one voltage transformer connected.
Furthermore, depending on the application, voltage transformers may be
installed either on the source side or the load side of the associated circuit
breaker. However, these different arrangements have no influence in
behavior of the overvoltage protection.
As mentioned previously, according to different requirements, stage 1 of the
overvoltage protection can be set to trip or alarm, whereas stage 2 is
dedicated for trip. If the setting OV1 Alarm is applied, the alarm output of
respective stage would be marshaled to ALARM contact. On the contrary, if
setting OV1 Trip is applied, the trip command of respective stage can be
configured at different output modules by using the trip binary setting. It
should be noted that the protection functions which are marshaled.
1.2.3 Logic diagram
OVPE
OVPP
T1
Func_OV1
OR
OR
OR
Ua>
Ub>
Uc>
Uab>
Ubc>
Uca>
Trip/Alarm

Figure 23 Overvoltage stage 1 operation logic
81
OVPE
OVPP
T2
Func_OV2
OR
OR
OR
Ua>>
Ub>>
Uc>>
Uab>>
Ubc>>
Uca>>
Trip
Figure 24 Overvoltage stage 2 operation logic
UP1
UP2
UP3 OV1Alarm
OV2Alarm
OV1_Trip
OV2_Trip

Signal Description
Signal Description
OV1 Alarm Overvoltage protection stage 1 alarm
OV2 Alarm Overvoltage protection stage 2 alarm
OV1_Trip Overvoltage protection stage 1 trip
OV2_Trip Overvoltage protection stage 2 trip
1.4.1 Setting list
82
Table 52 Function setting list for overvoltage protection
1. 70 U_OV1
The voltage setting
for OV stage 1
V
40.00 (PE)
80.00(PP)
100.0(PE)
200.0(PP)
2. 0.1 T_OV1
The time setting for
OV stage 1
S 0.00 60.00
3. 70 U_OV2
The voltage setting
for OV stage 2
V
40.00 (PE)
80.00(PP)
100.0(PE)
200.0(PP)
4. 0.1 T_OV2
OV stage 2
S 0.00 60.00
5. 0.95 Dropout_OV
The dropout ratio for
OV protection
0.90 0.99
Table 53 Logical linker list for overvoltage protection
1. Func_OV1 Enable or disable the overvoltage stage 1
2. Func_OV2 Enable or disable the overvoltage stage 2
Table 54 Binary setting list for overvoltage protection
Bit 0 1 Explanation
KG3.3 OV PP OV PE
Selection overvoltage connection
as PP or PE
KG4.12 OV1 Alarm OV1 Trip
Selection overvoltage protection
as alarm or trip
1.5 IED reports
OV1 Trip Overvoltage protection stage 1 issues trip command
OV2 Trip Overvoltage protection stage 2 issues trip command
OV1 Alarm Overvoltage protection stage 1 issues an alarm signal

83
1.6 Technical data
Table 57 Technical data for overvoltage protection
Voltage connection Phase-to-phase voltages or
phase-to-earth voltages
3 % setting or 1 V
Phase to earth voltage 40 to 100 V, step 1 V 3 % setting or 1 V
Phase to phase voltage 80 to 200 V, step 1 V 3 % setting or 1 V
Reset ratio 0.90 to 0.99, step 0.01 3 % setting
Time delay 0.00 to 60.00 s, step 0.01s 1 % setting or +50 ms, at
Reset time <40ms

84

Chapter 10 Undervoltage protection
85

About this chapter
This chapter introduces the protection principle, input and
technical data used for undervoltage protection.

86
1 Undervoltage protection
1.1 Introduction
The undervoltage protection provides protection against dangerous voltage
drops, especially for electric machines.
The protection function provides following features:
First stage can be set to alarm or trip
Measuring voltage between phase-earth voltage and phase-phase
selectable
Current criteria supervision
Circuit breaker aux. contact supervision
VT secondary circuit supervision, the undervoltage function will be
blocked when VT failure happens
Settable dropout ratio
1.2.1 Protection function description
Undervoltage protection element provides two definite time stages which can
be enabled or disabled separately according to the users requirement using
dedicated binary settings Fun_UV1 and Fun_UV2. The first stage can be
used for tripping or alarming, whereas the second stage is dedicated for
tripping purposes. It is possible to select the operation mode of the first stage
of undervoltage protection using binary setting UV1 Alarm/ UV1 Trip. As
expected, setting UV1 Alarm makes it work as an alarming stage, while by
applying UV1 Trip it is possible to set the first stage as a tripping
undervoltage stage. Voltage thresholds and time delays can be set
individually for each element. Thus, alarming or tripping can be
time-coordinated depending on how severe the voltage collapses are. In this
context, settings U_UV1 and T_UV1 correspond to the voltage threshold
and time delay of the first stage. Similarly, settings U_UV2 and T_UV2 are
related to the second stage. The dropout ratio for both the undervoltage
stages can be set through setting Dropout_UV.
87
Undervoltage protection can operate based on phase to earth voltages VA-N,
VB-N, VC-N or phase to phase voltage VA-B, VB-C, VC-A . The IED is
informed about users preference by binary setting UV PP/ UV PE. By
setting UV PP, calculation would be based on phase to phase voltages.
However, by setting UV PE, phase to ground voltages would be employed in
calculation. Furthermore, it is possible to set the IED to operate either when
all the measured phase to earth voltages (or phase to phase voltages
according to the setting of UV PP/ UV PE) falls below the setting values
U_UV1 and U_UV2 or when at least one of the phase to earth voltages (or
at least one of the phase to phase voltages according to the setting of UV
PP/ UV PE) falls below the respective setting values U_UV1 and U_UV2.
This can be achieved by setting of binary setting UV Chk All Phase/UV Chk
One Phase. If setting UV Chk All Phase is applied, the undervoltage
protection would operate only if all of the phase to ground or phase to phase
voltages falls below the setting of U_UV1 and U_UV2. In contrast, if setting
UV Chk One Phase is applied, the protection would operate when at least
one of the phase to earth or phase to phase voltages drops below the
respective thresholds.
1.2.2 Voltage connection
A
B
C
VA
VB
VC
VN
CSC-211
A
B
C
CaseA
CSC-211
VC
VN
VB
VA
CaseB
A
B
C
VA
VB
VC
VN
A
B
C
VA
VB
VC
VN
CaseC CaseD
CSC-211
CSC-211

Figure 25 Connection example for undervoltage protection
88
As can be seen from Figure 25, undervoltage protection is suitable for
different connections of voltage transformer. Undervoltage protection is
capable to operate not only with three phase to earth voltages connection
(Case A and Case B) but also with only one phase to phase voltage (Case C)
or phase to earth voltage (Case D). If only one phase to phase voltage is
connected to the IED, it can be connected to VA-VB, VB-VC or VC-VA input of
the IED and the IED should be informed by binary setting 1Ph V Connect. In
this case, undervoltage protection should be set to operate based on UV PP
and UV Chk All Phase. Similarly, by connection of one phase to earth
voltage to the device, it can be connected to VA-VN, VB-VN or VC-VN input of
the relay and the relay should be informed by control word 1Ph V Connect.
Furthermore, undervoltage protection should be set to operate based on UV
PE and UV Chk All Phase. It should be noted that if the IED is only provided
with one phase to phase voltage, it is impossible to calculate phase to earth
voltage accurately. This is because the fact that there is no earth voltage
connected to the IED.
It is noted that despite the capability of undervoltage protection to operate
properly by using only one phase to phase or one phase to earth voltage,
maybe there are some limitation in operation of other protection functions, in
these conditions. For example, direction determination based on three phase
voltages would not operate with one voltage transformer connected.
1.2.3 Depending on the VT location
Depending on the application, voltage transformers may be installed either on
the source side or the load side of the associated circuit breaker. These
different arrangements may lead to different behavior of the undervoltage
protection. When a tripping command is issued and the circuit breaker is
opened, full voltage remains on the source side while the load side voltage
becomes zero. In this case, undervoltage protection may remain picked up.
This problem is removed in the IED by integrating additional current criterion.
In this context, undervoltage pickup can be maintained only when the
undervoltage criterion satisfied and a minimum current (setting I_Chk) are
exceeded. The largest of the three phase currents is decisive. In other words,
subsequent to each pickup, the undervoltage protection would drop out as
soon as the current decreases below the setting of I_Chk. If the voltage
transformer is installed on the source side and it is not desired to check
current flow, this feature can be disabled by setting the minimum threshold of
I_Chk to 0. Furthermore, it is possible for the IED to integrate circuit breaker
position in operation logic of undervoltage protection. By employing this
feature, the IED would issue a trip command when the circuit breaker is
closed. In this regard, undervoltage protection would drop out when circuit
89
breaker is opened. This feature can be enabled by applying setting UV Chk
CB On in binary setting. This is mainly useful when voltage transformer is
installed on load side. However, if the voltage transformer is installed on the
source side and it is not desired to check circuit breaker position in
undervoltage protection, setting UV Chk CB Off should be applied in binary
setting.
1.2.4 Logic diagram

OR
OR
OR
AND
OR
UVChkOnePhase
UVPE
UVChkAllPhase
OR
UVChkOnePhase
UVPP
UVChkAllPhase
AND
Ua<
Ub<
Uc<
Ua<
Ub<
Uc<
Uab<
Ubc<
Uca<
Uab<
Ubc<
Uca<
UVstg1

Figure 26 Logic diagram for undervoltage stage 1
90
OR
OR
OR
AND
OR
UVChkOnePhase
UVPE
UVChkAllPhase
OR
UVChkOnePhase
UVPP
UVChkAllPhase
AND
Ua<<
Ub<<
Uc<<
Ua<<
Ub<<
Uc<<
Uab<<
Ubc<<
Uca<<
Uab<<
Ubc<<
Uca<<
UVstg2

Figure 27 Logic diagram for undervoltage stage 2
T1
Fun_UV1
AND
OR
1
UV Chk CB On
UV Chk CB Off
UV stg1
3Ph CB Open
Cur.Flow
VT fail
Trip/Alarm
Note: CSC-211 V01 has no Cur.Flowcriterion

Figure 28 Logic diagram for undervoltage stage 1 operation
91
T2
Fun_UV2
AND
OR
1
UV Chk CB On
UV Chk CB Off
UV stg2
CB Open
Cur.Flow
VT fail
Trip
Note: CSC-211 V01 has no Cur.Flowcriterion

Figure 29 Logic diagram for undervoltage stage 2 operation
UP1
UP2
UP3
UV1Alarm
UV1Trip
UV2Trip
IP1
IP2
IP3
PhACBOpen
PhBCBOpen
PhCCBOpen

Signal Description
UP1 signal for voltage input 1
IP1 signal for current input 1
Table 59 Binary input list
Signal Description
Ph A CB Open Phase A open status of CB
Ph B CB Open Phase B open status of CB
Ph C CB Open Phase C open status of CB
92
Signal Description
UV1 Alarm Undervoltage protection stage 1 alarm
UV1_Trip Undervoltage protection stage 1 trip
UV2_Trip Undervoltage protection stage 2 trip
1.4.1 Setting list
Table 61 Function setting list for undervoltage protection
1. 40 U_UV1
Voltage setting for stage 1 of
undervoltage protection
V
5.00
(PE)
10.00
(PP)
75.0
(PE)
150.0
(PP)
2. 0.1 T_UV1
Time setting for stage 1 of
s 0.00 120.0
3. 40 U_UV2
Voltage setting for stage 2 of
V
5.00
(PE)
10.00
(PP)
75.0
(PE)
150.0
(PP)
4. 0.1 T_UV2
Time setting for stage 2 of
s 0.00 120.0
5. 1.05 Dropout_UV
Dropout ratio for undervoltage
protection
1.01 2.00
6. 0.2In I_Chk
Current setting for
A 0.00In 2.00In
Table 62 Logical linker list for undervoltage protection
1. Func_UV1 Enable or disable the stage 1 of undervoltage protection
2. Func_UV2 Enable or disable the stage 2 of undervoltage protection
Table 63 Binary setting list for undervoltage protection
Bit 0 1 Explanation
2.9 3Ph V Connect 1Ph V Connect Single phase or three phase
93
Bit 0 1 Explanation
voltage connection
3.0 UV Chk CB Off UV Chk CB On
Enable or disable the function of
checking CB status
3.1 UV Chk All Phase UV Chk One Phase
Enable or disable the function of
checking single phase or three
phase voltage
3.2 UV PP UV PE
Phase-to-phase or phase-to-earth
discrimination
4.11 UV1 Alarm UV1 Trip
Stage 1 of undervoltage
1.5 IED reports
UV1 Trip Undervoltage protection stage 1 issues trip command
UV2 Trip Undervoltage protection stage 2 issues trip command
UV1 Alarm Undervoltage protection stage 1 issues an alarm signal
1.6 Technical data
Table 66 Technical data for undervoltage protection
Voltage connection Phase-to-phase voltages or
phase-to-earth voltages
3 % setting or 1 V
Phase to earth voltage 5 to 75 V , step 1 V 3 % setting or 1 V
Phase to phase voltage 10 to 150 V, step 1 V 3 % setting or 1 V
Reset ratio 1.01 to 2.00, step 0.01 3 % setting
Time delay 0.00 to 120.00 s, step 0.01 s 1 % setting or +50 ms, at 80%
operating setting
Current criteria 0.08 to 2.00 Ir 3% setting or 0.02Ir
Reset time 50 ms
94

Chapter 11 Displacement voltage protection
95
Chapter 11 Displacement voltage
protection

About this chapter
used for displacement voltage protection.

96
1 Displacement voltage protection
1.1 Introduction
In some applications, it is necessary to monitor the displacement voltage to
detect an earth fault in power system. This protection is usually applied in
networks where the earth fault current is limited.
The protection provide following features:
Each stage can be set to alarm or trip
Faulty phase discrimination
3U0 based on calculated summation of 3 phase voltage or measured
injected residual voltage
1.2.1 Displacement voltage input
The displacement voltage 3V0 can be directly applied to the IED or can be
calculated based on the connected three phase to ground voltages
(3V0=VA+VB+VC). In the latter case, the three voltage inputs must be
connected to voltage transformers in a ground-wye configuration. If the IED is
only provided with phase to phase voltages or provided only one phase to
earth or phase to phase voltage, it is not possible to calculate a displacement
voltage. In this case, the direction cannot be determined for earth fault or
sensitive earth fault protection.
If the displacement voltage is directly applied to the IED and the binary setting
3U0 Measured is enabled, it is not affected by VT fail detection on
three-phase connected voltage. Similarly, if the displacement voltage is
calculated based on the three-phase voltages and the binary setting 3U0
Calculated is enabled, it would not be blocked as a result of failure detection
in U4 voltage transformer. However, in case of a failure in U4 voltage
transformer, the displacement voltage protection based on measured value
3V0 would be blocked.
1.2.2 Protection description
97
The displacement voltage protection is used to detect ground faults and to
determine direction of earth faults. More information about direction
determination based on displacement voltage is presented in other
subsections. Two definite stages included in this protection for detection of
earth faults. Each stage can be set to issue an alarm signal or a trip command.
This can be achieved by binary settings 3V01 Trip/3V01 Alarm and 3V02
Trip/3V02 Alarm. For example, by applying settings 3V01 Alarm and 3V02
Trip, the first stage would operate as an alarming stage, whereas the second
one would operate as tripping stage. If each stage is set to alarm, respective
output would be marshaled to ALARM contact. In contrast, by applying
setting trip to a stage, the trip output can be configured to various trip outputs
with the trip binary setting. It should be noted that the protection function
which is marshaled to BO1 would initiate CBF function. Generally, stage 1 is
applied to monitor light earth faults and usually used as the alarm stage.
However, stage 2 is applied to detect severe earth fault and therefore is used
as the trip stage.
Individual pickup value for each definite stage can be defined by setting
U_3V01 and U_3V02. With these settings, the measured or calculated
displacement voltage is compared separately with the setting value for each
stage. If the respective value is exceeded, a trip or alarm time delay timer is
started. Each timer is set to count up to a user-defined time delay. The time
delay can be set for each definite stage individually via settings T_3V01 and
T_3V02. After the user-defined time delays elapsed, a trip command or an
alarm signal is issued by respective stage.
Furthermore, it is possible to determine the faulty phase after expiration of
time delay for the first stage. A precondition is that three phase to ground
voltages should be connected to the IED in a grounded wye configuration. By
doing so, the individual phase to ground voltages is measured and is
compared with settings U_Phase low and U_Phase up. In this context, if
the measured phase to ground voltage in a single phase falls below the
threshold U_Phase low and at the same time the magnitude of the phase
voltages in the remained phases are above the setting value U_Phase up,
an earth fault is recognized at the phase having voltage magnitude below
U_Phase low threshold.
1.2.3 Logic diagram
98
T1
T2
AND
AND
Func_3V01
Func_3V02
BLK
3V0
3U0>
3U0>>
3V01
OP
Trip/Alarm
Trip/Alarm

Figure 30 Logic diagram for displacement voltage protection
AND
AND
AND
3V01OP
VA>
VA<
VB>
VB<
VC>
VC<
GndA
GndB
GndC

Figure 31 Logic diagram for fault phase determination
UP1
UP2
UP3 3V01Alarm
3V02Alarm
3V01_Trip
3V02_Trip
UP4

99
Signal Description
Signal Description
3V01 Alarm
Displacement voltage protection stage 1
alarm
3V02 Alarm
Displacement voltage protection stage 2
alarm
3V01_Trip Displacement voltage protection stage 1 trip
3V02_Trip Displacement voltage protection stage 2 trip
1.4.1 Setting list
Table 69 Function setting list for displacement voltage protection
1. 20 U_3V01
The voltage setting for
displacement voltage protection
stage 1
V 2.00 100.0
2. 1 T_3V01
stage 1
S 0.00 60.00
3. 30 U_3V02
The voltage setting for
stage 2
V 2.00 100.0
4. 0.5 T_3V02
stage 2
S 0.00 60.00
5. 20 U_Phase low
Low voltage setting for fault
phase determination
V 10.00 100.0
6. 45 U_Phase up
High voltage setting for
remained phase when fault
occurs
V 10.00 100.0
100
Table 70 Logical linker list for displacement voltage protection
1. Func_3V01 Enable or disable the displacement voltage stage 1
2. Func_3V02 Enable or enable the displacement voltage stage 2
Table 71 Binary setting list for displacement voltage protection
Bit 0 1 Explanation
KG2.8 3U0 Measured 3U0 Calculated
Selection the measured voltage
or calculated voltage for
KG4.9 3V01 Alarm 3V01 Trip
Selection the stage 1 of
to alarm or trip
KG4.10 3V02 Alarm 3V02 Trip
Selection the stage 2 of
to alarm or trip
1.5 IED reports
3V01 Trip Voltage displacement protection stage 1 issues trip signal
3V02 Trip Voltage displacement protection stage 2 issues trip signal
3V01 Alarm Voltage displacement protection stage 1 issues an alarm signal
3V02 Alarm Voltage displacement protection stage 2 issues an alarm signal
PhA Grounded Phase A is grounded
PhB Grounded Phase B is grounded
PhC Grounded Phase C is grounded
1.6 Technical data
Table 74 Technical data for displacement voltage protection
101
Pickup threshold 3V0
(calculated)
2 to 100 V, step 1 V 5 % setting value or 1 V
Time delay 0.00 to 60.00 s, step 0.01s 1 % setting or +50 ms, at
Reset ratio Approx. 0.95

102

Chapter 12 Circuit breaker failure protection
103
Chapter 12 Circuit breaker failure
protection

About this chapter
included in circuit breaker failure protection.

104
1 Circuit breaker failure protection
1.1 Introduction
The circuit breaker failure protection is able to detect a failure of the circuit
breaker during a fault clearance. It ensures fast back-up tripping of
surrounding breakers by tripping relevant bus sections.
Once a circuit breaker operating failure occurs on a feeder/transformer, the
bus section which the feeder/transformer is connected with can be selectively
isolated by the protection. In addition a transfer trip signal is issued to trip the
remote end circuit breaker of the feeder.
In the event of a circuit breaker failure with a busbar fault, a transfer trip signal
is issued to trip the remote end circuit breaker of the feeder.
The current criteria are in combination with three phase currents, zero and
negative sequence current to achieve a higher security.
The function can be set to give three phase re-trip of the own breaker to avoid
unnecessary tripping of surrounding breakers at an incorrect starting due to
mistakes during testing.
Two trip stages (local CB and surrounding breaker tripping)
Transfer trip command to the remote line end in second stage
Internal/ external initiation
Three phase CBF initiation for sub-transmission system and distribution
system
Settable CB Aux contacts checking
Current criteria checking (including phase current, zero and negative
sequence current)
1.2.1 Protection description
Circuit breaker failure protection can be enabled or disabled in the IED via
binary setting Func_CBF. If setting ON is applied, CBF protection would
be enabled. In this case, by operation of a protection function, and
subsequent CBF initiation by respective protection function, a programmed
timer runs toward a preset time delay limit. This time delay is set by user
105
under the settings T_CBF1. If the circuit breaker has not been opened after
expiration of the preset time limit, the circuit breaker failure protection issues
a command to trip circuit breaker (e.g. via a second trip coil). If the circuit
breaker doesnt respond to the repeated trip command, until another preset
delay time which is set at T_CBF2, the protection issues a trip command to
isolate the fault by tripping other surrounding backup circuit breakers (e.g. the
other CBs connected to the same bus section as the faulty CB).
Initiation of CBF protection can be performed by both the internal and external
protection functions. If it is desired to initiate the CBF protection by means of
external protection functions, specified binary inputs (BI) should be
marshaled. Internal protection functions can initiate the CBF protection
integrated in the IED.
There are two criteria for breaker failure detection: the first one is to check
whether the actual current flow effectively disappeared after a tripping
command had been issued. The second one is to evaluate the circuit breaker
auxiliary contact status.
1.2.2 Current criterion evaluation
Since circuit breaker is supposed to be open when current disappears from
the circuit, the first criterion (current monitoring) is the most reliable way for
IED to be informed about proper operation of circuit breaker. Therefore,
current monitoring is applied to detect circuit breaker failure condition. In this
context, the monitored current of each phase is compared with the
pre-defined setting. Furthermore, it is possible to implement current checking
in case of zero-sequence (
) and negative-sequence currents

(3I
2
=I
A
+a
2
I
B
+aI
C
) via binary setting. If the zero-sequence and
negative-sequence currents checking are enabled, zero sequence and
negative-sequence current is compared separately with the corresponding
threshold.
1.2.3 Circuit breaker auxiliary contact evaluation
For protection functions where the tripping criterion is not dependent on
current, current flow is not a suitable criterion for proper operation of the
breaker. In this case, the position of the circuit breaker auxiliary contact
should be used to determine if the circuit breaker properly operated. It is
possible to evaluate the circuit breaker operation from its auxiliary contact
status. A precondition for evaluating circuit breaker auxiliary contact is that
open status of CB should be marshaled to binary inputs.
106
In addition, it should be noted that evaluation of circuit breaker auxiliary
contacts is performed in CBF function only when the current flow monitoring
has not picked up. Once the current flow criterion has picked up during the
running time of CBF timers, the circuit breaker is assumed to be open as soon
as the current disappears, even if the associated auxiliary contacts dont
indicate that the circuit breaker has opened.
1.2.4 Logic diagram
OR
OR
CBFChkI0/2Off
AND
CBFChkI0/2On
OR
AND
AND
AND
OR
Ia>
Ib>
Ic>
3I0>
3I2>
Curr.Crit.

Figure 32 Logic diagram for current criterion
AND
OR
AND
3PhCBOpen
3PhCBOpen
CBFINIT
Curr.crit.
CBisclosed

Figure 33 Logic diagram for circuit breaker evaluation criterion

107
T1
T2
Func_CBF
AND
OR
CBFChkCBOn
CBisclosed
Curr.crit.
CBFINIT
CBF1
CBF2

Figure 34 Logic diagram for circuit breaker failure protection
IP1 CBF1Trip
IP2
IP3
CBFInit
CBF2Trip
3PhCBOpen
3PhCBClose
IN

Signal Description
IN signal for zero sequence current input
Signal Description
CBF Init CBF initiation
3Ph CB Open Three Phase CB open
3Ph CB Close Three phase CB close
Signal Description
CBF1 Trip Circuit breaker failure protection stage 1 trip
CBF2 Trip Circuit breaker failure protection stage 2 trip
108
1.4.1 Setting list
Table 78 Function setting list for circuit breaker failure protection
1. In I_CBF
Phase current setting for CBF
protection
A 0.05In 20.00In
2. In 3I0_CBF
Zero-sequence current setting
for CBF protection
A 0.05In 20.00In
3. In 3I2_CBF
Negative-sequence current
setting for CBF protection
A 0.05In 20.00In
4. 0 T_CBF1
Delay time for stage 1 of CBF
protection
s 0.00 60.00
5. 0.2 T_CBF2
Delay time for stage 2 of CBF
protection
s 0.10 60.00
Table 79 Logical linker list for circuit breaker failure protection
1. Func_CBF Enable or disable the circuit breaker failure protection
Table 80 Binary setting list for circuit breaker failure protection
Bit 0 1 Explanation
2.7 3I0 Measured 3I0 Calculated 3U0 is measured or calculated
3.6 CBF Chk I0/2 Off CBF Chk I0/2 On
Enable or disable the function for
checking zero or negative
sequence current
3.7 CBF Chk CB Off CBF Chk CB On
Enable or disable the function for
checking CB status
1.5 IED reports
CBF1 Trip The first stage CBF issues trip command
CBF2 Trip The second stage CBF issues trip command
109
CBF Initiate CBF function is initiated
1.6 Technical data
Table 82 Technical data for circuit breaker failure protection
phase current
Negative sequence current
zero sequence current
0.08 Ir to 20.00 Ir 3% setting or 0.02Ir
Time delay of stage 1 0.00s to 32.00 s, step 0.01s 1% setting or +25 ms, at
200% operating setting Time delay of stage 2 0.00s to 32.00 s, step 0.01s
Reset ratio >0.95
Reset time of stage 1 < 20ms

110

Chapter 13 Dead zone protection
111

About this chapter
included in circuit breaker failure protection.

112
1 Dead zone protection
1.1 Introduction
The IED provides this protection function to protect the area between circuit
breaker and CT in the case that CB is open, namely dead zone. Therefore, by
occurrence of a fault in dead zone, the short circuit current is measured by
protection IED while CB auxiliary contacts indicate the CB is open.
The protection can be enabled or disabled using dedicated binary setting. If
the protection function is enabled, by operation of a protection function, and
subsequent CBF initiation by respective protection function, a programmed
timer runs toward a preset time delay limit. This time delay is set by user in
the setting T_Dead Zone. If the fault current has not been disappeared after
expiration of the preset time limit even now the circuit breaker has been
opened, the dead zone protection would issue a trip command to isolate the
fault by tripping other surrounding backup circuit breakers (e.g. the other CBs
connected to the same bus section as the faulty CB).
When one bus side CT of feeder is applied, once a fault occurs in the dead
zone, the IED trips the relevant busbar zone. Tripping logic is illustrated in
Figure 35.
113
Bus
IFAULT
trip
Line1 Line2 LineN
Opened CB
Closed CB
Legend:

Figure 35 Tripping logic when applying bus side CT
When one line side CT is applied, when a fault occurs in the dead zone,
protection relay sends a transfer trip to remote end relay to isolate the fault.
Tripping logic is illustrated in Figure 36.
114
Opened CB
Closed CB
Legend:
Busbar
IFAULT
Relay
Inter trip
Line1 Line2 LineN
Trip

Figure 36 Tripping logic when applying line side CT
1.2.2 Logic diagram
AND T
Func_DZ
CBFINIT
Curr.Crit.
3PhCBOpen
3PhCBClose
DZ

Figure 37 Logic diagram for dead zone protection

115
IP1
DeadZoneTrip
IP2
IP3
CBFInit
3PhCBOpen
3PhCBClose

Signal Description
Signal Description
CBF Init CBF initiation
3Ph CB Open Three phase CB open
3Ph CB Close Three phase CB Close
Signal Description
DeadZone_Trip Dead Zone protection trip
1.4.1 Setting list
Table 86 Function setting list for dead zone protection
1. 0.2 T_Dead Zone
Time delay for dead zone
protection
s 0.00 60
2. In I_CBF
Phase current setting for CBF
protection
A 0.05In 20In
Table 87 Logical linker list for dead zone protection
116
NO. Default Abbr. Explanation
1. On Func_DZ Enable or disable the dead zone protection
1.5 IED reports
Dead Zone Trip The dead zone function issues trip command
1.6 Technical data
Table 89 Technical data for dead zone protection
Time delay 0.00s to 32.00s, step 0.01s 1% setting or +40 ms, at
Reset ratio >0.95

Chapter 14 Synchro-check and
Energizing check function

117
energizing check function

About this chapter
used synchro-check and energizing check function.


118
1 Synchro-check and energizing check
function
1.1 Introduction
The synchronism and voltage check function ensures that the stability of the
network is not endangered when switching a line onto a busbar. The voltage
of the feeder to be energized is compared to that of the busbar to check
conformances in terms of magnitude, phase angle and frequency within
certain tolerances.
The synchro-check function checks whether the voltages on both sides of the
circuit breaker are synchronizing, or at least one side is dead to ensure
closing can be done safely.
When comparing the two voltages, the synchro check uses the voltages from
busbar and outgoing feeder. If the voltage transformers for the protective
functions are connected to the outgoing feeder side, the reference voltage
has to be connected to a busbar voltage.
If the voltage transformers for the protective functions are connected to the
busbar side, the reference voltage has to be connected to a feeder voltage.
1.2 Function principle
The synchronization function can either work together with automatic
reclosing function or with manual closure or in both cases. Thus,
synchronization check can be requested in two following ways:
Internal or external automatic reclosing request
Manual closing request
The external automatic reclosing and manual closing are initiated through
corresponding binary input respectively. When a synchronization request is
received to the function, it can work based on different close permission
criteria. The criteria can be selected for auto reclosure or manual closure
separately. The binary settings are AR_Override,AR_Syn
check,AR_EnergChkDLLB,AR_EnergChkLLDB, AR_EnergChkDLDB
for auto reclosure, and MC_Override, MC_Syn check,
MC_EnergChkDLLB, MC_EnergChkLLDB, MC_EnergChkDLDB are

119
settable for manual closure. The meaning of each operation mode is as
follows:
Syn check: by applying this setting, with any synchronization request, the
synchronization condition is checked continuously.
Override: by applying this setting, with any synchronization request, the
synchronizing OK condition is released.
EnergChkDLLB: by applying this setting, with any synchronization
request, the dead line and live bus conditions are checked.
EnergChkLLDB: by applying this setting, with any synchronization
request, the live line and dead bus conditions are checked.
EnergChkDLDB: by applying this setting, with any synchronization
request, the dead line and dead bus conditions are checked.
Synchronization check can operate based on different voltage input
configurations. Reference voltage U4 can be phase to phase or phase to
earth voltage. Accordingly, the setting Phase_UL should be set as phase to
phase or phase to earth voltage, respectively. Both the setting and voltage
connection must be consistent. Pay attention to the single phase voltage
connection of Va, Vb, Vc, phase A or phase B should be connected in order to
get accurate frequency. Table 90 shows the assignment of the settable
values for phase determination.
Table 90 Setting for phase determination
Phase Setting ValuePhase_UL
A 1
B 2
C 3
AB 4
BC 5
CA 6
1.2.1 Synchro-check mode
The voltage difference, frequency difference and phase angle difference
values are measured in the IED and are available for the synchro-check
function for evaluation.
By any synchronization request, the synchronization conditions will be

120
checked continuously. If the line voltages and busbar voltages are larger than
the value of Umin_Syn and meet the synchronization conditions,
synchronized reclosure can be performed.
At the end of the dead time, synchronization request will be initiated and the
synchronization conditions are continuously checked to be met for a certain
time during maximal extended time T_MaxSynExt. By satisfying
synch-check condition in this period, the monitor timer will stop and close
command will be issued for AR.
If the synchronization checking close permission criterion is used for manual
closure, the corresponding binary input should be active. When the binary
input is activated, a monitoring time T_MaxSynReq is started. This time is
considered for synchronizing process. During time period of T_MaxSynReq,
whenever synchronization condition is continuously met for T_Syn Chk, the
monitoring time would be stopped, and the output for manual close Syn OK
is energized. Syn OK output would be held if following conditions are met:
Synchronization conditions are met
Binary input for manual closure is energized
Monitoring time T_MaxSynReq does not elapse
Before releasing a close command at synchronization conditions, all of the
following conditions should be satisfied:
All three phases voltage U(a,b,c) should be above the setting value
Umin_Syn.
The reference voltage U4 should be above the setting value Umin_Syn.
The voltage difference should be within the permissible deviation U_Syn
Diff
The angle difference should be within the permissible deviation
Angle_Syn Diff
The frequency difference should be within the permissible deviation
Freq_Syn Diff
1.2.2 Energizing check mode

121
In this mode of operation, the low voltage (dead) condition is checked
continuously whenever synchronization check is requested. If the line
voltages are less than Umax_Energ, reclosure can be performed. If the line
voltages and busbar voltages are all larger than Umin_Syn, the check mode
will automatically turn to full synchronization check mode.
In auto-recloser procedure, synchronization check request is triggered at the
end of the dead time. If the low voltage conditions are continuously met for a
certain numbers and during maximum extended time T_MaxSynExt, the
monitor timer will stop and close command will be issued for AR.
Before releasing a close command in low voltage conditions, one of the
following conditions need to be checked according to requirement:
Energizing check for dead line and live bus for AR enabled or disabled,
when the control word AR_EnergChkDLLB is on
Energizing check for live line and live bus for AR enabled or disabled,
when the control word AR_EnergChkLLDB is on
Energizing check for dead line and dead bus for AR enabled or disabled,
when the control word AR_EnergChkDLDB is on
1.2.3 Override mode
In this mode, a synchronizing OK signal would be released whenever a
synchronization check request is received from autoreclosure or a manual
closure.
1.2.4 Logic diagram


122
AR_EnergChkDLLBon
VT_Lineoff
T_MaxSynExt
Ua(Ub,Uc)>U
min
_Syn
U4>U
min
_Syn
Angle
diff
<Angle_SynDiff
Freq
diff
<Freq_SynDiff
U
diff
<U_SynDiff
AND
AND T_SynCheck
Synchr-check
meet
Synchr-checkfail
AND
U4<Umax_Energ
Ua(Ub,Uc)>Umin_Syn
AR_EnergChkLLDBon
VT_Lineoff
AND
U4>Umin_Syn
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkDLDBon
AND
U4<Umax_Energ
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkDLLBon
VT_Lineon
AND
U4>Umin_Syn
Ua(Ub,Uc)
<Umax_Energ
AR_EnergChkLLDBon
VT_Lineon
AND
U
4
<Umax_Energ
Ua(Ub,Uc)
>Umin_Syn
OR
Energizingcheckmeet

Figure 38 Logic diagram for synchro-check function

123
UP1
UP2
UP3
UP4
BI3/InitAR
BI5/SynReq

Signal Description
Signal Description
BI3/Init AR Binary input 3/Initiation autoreclosing
BI5/Syn Req Binary input 5/Synchronization request
1.4.1 Setting list
Table 93 Function setting list for synchro-check and energizing check function
1. 500 T_Syn Chk
Time for synchro-check
function
S 0.05 60.00
2. 0.1 T_MaxSynExt
Maximum time for extending
synchronization check
S 0.05 60.00
3. 0.1 T_MaxSynReq
Maximum time for
S 0.05 60.00
4. 1 Phase_UL Phase determination setting 1.00 6.00
5. 10 Angle_Syn Diff
Angle difference for
synchro-check function

Degree 1.00 80.00
6. 5 U_Syn Diff
Voltage difference for
V 1.00 40.00

124

7. 0.02 Freq_Syn Diff
Frequency difference for
HZ 0.02 2.00
8. 43 Umin_Syn
Minimum voltage for
V 60.00 130.0
9. 17 Umax_Energ
Maximum voltage for
Energizing check
V 20.00 100.0
Table 94 Logical linker list for synchro-check and energizing check protection
1. On Func_AR Enable or disable the synchronization check function
2. On Func_MC Enable or disable the synchronization check function
Table 95 Binary setting list for synchro-check and energizing check protection
3.8 1
Selection of AR check mode
Synchrozination check mode
Energizing for DLLB check
mode
Energizing for LLDB check
mode
Energizing for DLDB check
mode
Override mode
3.9 0
3.10 0
3.11 1
Selection of MC check mode
mode
mode
mode
Override mode
3.12 0
3.13 0
1.5 IED reports
Syn Ok Synchronization check OK
Syn Request Check synchronization

125
Syn Vdiff fail Voltage difference for synchronization check fail
Syn Ang fail Angle difference for synchronization check fail
Syn Fdiff fail Frequency difference for synchronization check fail
Syn Failure Synchronization check timeout
1.6 Technical data
Table 97 Technical data for synchro-check and energizing check function
Operating mode
Synchronization check:
Synch-check
Energizing check, and
synch-check if energizing
check failure
Override
Energizing check:
Dead V4 and dead V3Ph
Dead V4 and live V3Ph
Live V4 and dead V3Ph

Voltage threshold of dead line or
bus
10 to 50 V (phase to earth), step
1 V
3 % setting or 1 V
Voltage threshold of live line or
bus
30 to 65 V (phase to earth), step
1 V
3 % setting or 1 V
V-measurement Voltage
difference
1 to 40 V (phase-to-earth), steps
1 V
1V
f-measurement (f2>f1; f2<f1) 0.02 to 2.00 Hz, step, 0.01 Hz, 20 mHz
-measurement (2>1;
2<1)
1 to 80 , step, 1 3
Minimum measuring time 0.05 to 60.00 s, step,0.01 s, 1.5 % setting value or +60
ms
Maximum synch-check
extension time
0.05 to 60.00 s, step,0.01 s, 1 % setting value or +50 ms


126

Chapter 15 Auto-reclosing function
127
Chapter 15 Autoreclosing function

About this chapter
used for automatic reclosure function.

128
1 Autoreclosing function
1.1 Introduction
For restoration of the normal service after a transient fault an autoreclosing
attempt is mostly made for overhead lines. Experiences show that about 85%
of faults have transient nature and will disappear after an auto reclosing
attempt is performed. This means that the line can be re-energized in a short
period. The reconnection is accomplished after a dead time via the automatic
reclosing function. If the fault is permanent or short circuit arc has not
disappeared, the protection will re-trip the breaker. Main features of the
autoreclosing are as follows:
4 shots automatic recloser (selectable)
Individually settable dead time for each shot
Internal/external AR initiation
Three phase AR operation
CB ready supervision
CB Aux. contact supervision
Cooperation with internal synch-check function for reclosing command
Three-pole multi-shot auto-recloser (AR) function is provided with selectable
number of shots from 1 to 4. This function can be enabled or disabled by
binary setting. In addition, it is possible to enable or disable AR function by
binary input BI1/AR Off. In this context, if binary input BI1/AR Off is active,
AR function would be disabled, even though the internal setting which is
applied at Func_AR. The priority for enable or disable the function with
binary input BI1/AR Off is higher than binary setting Func_AR. The
integrated AR function can be enabled, only when binary input BI1/AR Off is
inactive and at the same time binary setting Func_AR is set to ON.
1.2.1 Auto-reclosing initiation modules
Initiation of AR function can be performed by internal protection functions or
via external binary input BI3/Init AR. Regarding the internal protection
functions, it is possible to perform reclosing attempt in conjunction with
129
protection functions illustrated in Table 98.
Table 98 Protection functions for initiation AR
Protection Function Protection stage Binary setting
Overcurrent protection
Definite time stage 1 OC1 Init AR
Definite time stage 2 OC2 Init AR
Inverse time stage OC Inv Init AR
Earth fault protection
Definite time stage 1 EF1 Init AR
Definite time stage 2 EF2 Init AR
Inverse time stage EF Inv Init AR
Sensitive earth fault protection
Definite time stage 1 SEF1 Init AR
Definite time stage 2 SEF2 Init AR
Inverse time stage SEF Inv Init AR
Negative sequence protection
Definite time stage 1 NSOC1 Init AR
Definite time stage 2 NSOC2 Init AR
Inverse time stage NSOC Inv Init AR
In the table, the first and second columns show the protection functions,
respectively, while the third column introduces the binary setting which is
possible to set protection functions to work in conjunction with AR.
Furthermore, it is possible to program AR to operate for three-phase faults.
This can be achieved by applying setting 3P Fault Init AR/3P Fault Blk AR.
By this setting, autoreclosing would be possible in case of three-phase faults,
in addition to single-phase fault. However, if it is not desired to reclose in case
of three-phase faults, the IED should be set via setting 3P Fault Blk AR.
1.2.2 Autoreclosing logic
To prevent automatic reclosing during feeder dead status (circuit breaker (CB)
open), for example, by relay testing, AR is initiated at first shot only when the
CB has been closed for more than a time period defined by T_AR Reset.
Subsequent to initiation of AR, the dead time do not start until the IED is
informed about open status of CB through binary input. The delay of dead
time can be extended up to time setting T_Max. CB Open. During this time,
whenever CB open status is recognized by the IED, dead time is started. If
130
monitoring time T_Max. CB Open elapses and CB open status is not still
detected by the IED, AR function would be blocked for duration of AR reset
time which is defined by T_AR Reset. In this case, reclosing attempt would
be announced as unsuccessful (annunciation AR Failure).
If circuit breaker failure protection (internal or external) is used for the CB,
monitoring time T_Max CB Open should be set shorter than the delay time
for detection of circuit breaker failure. By doing so, make sure that no
reclosing takes place for a faulty circuit breaker. No reclosing would take
place for CBF stage 2 or dead zone function operation.
As mentioned previously, if CB open position is detected by the IED during
monitoring time T_Max. CB Open, dead time is started and would last for
pre-defined time T_3P AR1 in case of the first reclosing shot (respective
dead times for other reclosing shots are set by T_3P AR2, T_3P AR3 and
T_3P AR4, for second, third and forth shots, respectively). After dead time
expiration, a monitoring time T_MaxSynExt is started. In fact, dead time can
be extended by T_MaxSynExt. This time is considered for synchronizing
process. In this context, at the end of dead time, IED starts to check
synchronization condition. During monitoring time period T_MaxSynExt,
whenever synchronization condition is continuously met for T_Syn Chk, the
monitoring time would be stopped, AR close command will be issued to close
circuit breaker. However, at the end of monitoring time T_MaxSynExt, if
synchronization condition is not still met continuously for T_Syn Chk, AR
function would be blocked for a time period defined by T_AR Reset.
Furthermore, reclosing attempt would be announced as unsuccessful
(annunciation AR Failure).
Regarding the close command, it has a pulse nature which lasts for 500ms at
most. As expected, no synchronization check takes place during this pulse
time. If during this pulse time, the auxiliary contact of CB indicates that the CB
has been closed or a current flow is detected by the IED, the close command
pulse will be reset.
Once the close command pulse is issued (rising edge) to close the circuit
breaker, reclaim time T_Reclaim is started, within this time it is checked
whether the reclosing attempt is successful. If no fault occurs before the
reclaim time elapses, it is thought that fault is cleared. In this case, at the end
of reclaim time, reset time T_AR Reset is started. During reset time AR
function is blocked. If a new fault occurs before the reclaim time elapses, it
results in reset of the reclaim time and starting of next reclosing shot. This
procedure can be repeated until the maximum number of reclosure shots is
reached.
131
If none of the reclosing shots is successful, and therefore the fault is still
remained after the last shot, final trip takes place. Furthermore, AR function
would be blocked for a time period defined by T_AR Reset, and
annunciation AR Failure is issued.
It is possible to block AR function for a specified time after any manual closing
command. This can be achieved by marshaling CB close command to binary
input BI4/MC CLS. When the binary input is activated, the IED is informed
about execution of a manual closing. As a result, AR function would be
blocked for T_AR Reset.
Furthermore, AR function would be blocked if the IED detects an abnormal
condition in CB control circuit. This means that if both binary inputs 3Ph CB
Open and 3Ph CB Close are active or inactivate at the same time, AR
function is blocked until the abnormal condition disappears.
There may be cases when it is already obvious that CB cannot perform any
reclosing attempt. For such cases, binary input BI2/CB Faulty is considered
which indicates that CB is not ready for reclosing. CB Faulty should be
checked with a time delay T_CB Faulty, which is set according to the
characteristic of circuit breaker. AR function would be blocked if the IED
detects activation of BI2/CB Faulty, even the AR function would not be
initiated. AR is blocked until the BI disappears. Furthermore, this condition is
checked whenever a close command is received from AR function.
Single-shot reclosure
When an internal or external trip command initiates AR function, the reclosing
program is being executed. First of all, CB auxiliary contact is checked to be
open until expiration of monitoring time T_Max. CB Open. If during this time,
CB open status is recognized, dead time is started. When dead time interval
T_3P AR1 has elapsed, monitoring time T_MaxSynExt is started. During
this period, whenever synchronization condition is continuously met for
T_Syn Chk, a closing pulse signal is issued. At the same time, reclaim time
T_Reclaim is started. If a new fault occurs before the reclaim time elapses,
AR function is blocked causing final tripping of CB. However, if no fault occurs
before reclaim time expires, AR is reset and therefore is ready for future
reclosing attempt for the next fault.
Multi-shot reclosure
In this condition, the first reclosing shot, in principle, is same as the
single-shot auto reclosing. If the first reclosing is unsuccessful, it doesnt
result in a final trip. Therefore if a fault occurs during reclaim time of the first
132
reclosing shot; it would result in the starting of next reclosing shot with
different dead time. This procedure can be repeated until the whole reclosing
shots which are set inside the IED is performed. Different dead times can be
set for various shots of AR function. This can be performed through settings
T_3P AR1, T_3P AR2, T_3P AR3 and T_3P AR4. If one of the preset
reclosure shots is successful, AR function would be reset after expiration of
the reclaim time. However, if none of reclosing shots is successful, i.e. the
fault doesnt disappear after the last programmed shot, a final trip is issued,
and reclosing attempts are announced to be unsuccessful. Figure 39
illustrates the operation method of two shots reclosure.

Trip Command
CB Open
AR Initiate
Close Command
Dead time 1
< Reclaim time
Dead time 2
Reclaim time Reclaim time

Figure 39 Timing diagram showing two reclosure shots, first unsuccessful, second
successful

133
IP1
IP2
IP3
BI1/AROff
BI3/InitAR
BI4/MCCLS
ARClose
ARNotReady
ARFinalTrip
ARSuccessful
ARFail
UP1
UP2
UP3
BI8CBOpen
UP4
BI2/CBFaulty
BI9CBClose

Signal Description
Signal Description
BI1/AR Off Binary input 1/AR function off
BI2/CB Faulty Binary input 2/CB Faulty
BI3/Init AR Binary input 3/Initiation AR function
BI4/MC CLS Binary input 4/manual closing
MC/AR Block AR block
BI8 CB Open Binary input 8 CB Open
BI9 CB Close Binary input 9 CB Close
Signal Description
AR Close AR Close
AR Not Ready AR Not Ready
AR Final Trip AR Final Trip
AR Successful AR Successful
134
AR Fail AR Fail
1.4.1 Setting list
Table 102 Function setting list for auto-reclosing function
1. 0.5 T_3P AR1
Time delay setting for shot 1
dead time of three phase
autoreclosing
S 0.05 60.00
2. 0.5 T_3P AR2
autoreclosing
S 0.05 60.00
3. 0.5 T_3P AR3
autoreclosing
S 0.05 60.00
4. 0.5 T_3P AR4
autoreclosing
S 0.05 60.00
5. 4 Times_AR
The number of autoreclosing
shots
1.00 4.00
6. 3 T_Reclaim
Time setting for
autoreclosing reclaim time
S 0.05 60.00
7. 3 T_AR Reset Time setting for AR resting S 0.05 60.00
8. 0.1 T_Max. CB Open
Maximum time setting for CB
open
S 0.05 60.00
9. 500 T_Syn Chk
Time for synchro-check
function
S 0.05 60.00
10. 0.1 T_MaxSynExt
Maximum time for extension
of synchronization check
S 0.05 60.00
11. 1 Phase_UL
Phase determination setting
for syncho-check reference
1.00 6.00
12. 10 Angle_Syn Diff
Angle difference for
Degree 1.00 80.00
13. 5 U_Syn Diff
Voltage difference for
V 1.00 40.00
14. 0.02 Freq_Syn Diff
Frequency difference for
HZ 0.02 2.00
15. 43 Umin_Syn Minimum voltage for V 60.00 130.0
135
16. 17 Umax_Energ
Maximum voltage for
Energizing check
V 20.00 100.0
17. 10 T_CB Faulty Time setting for CB faulty S 0.10 60.00
Table 103 Logical linker list for auto-reclosing function
1. On Func_AR Enable or disable the auto-recloser function
Table 104 Binary setting list for auto-reclosing function
3.8 1
Selection of AR check mode
mode
mode
mode
Override mode
3.9 0
3.10 0
5.0 0 OC1 Init AR Off
Enable or disable the AR
function is initiated by stage 1
of overcurrent protection
5.1 0 OC2 Init AR Off
of overcurrent protection
5.2 0 OC Inv Init AR Off
function is initiated by inverse
stage of overcurrent
protection
5.3 0 EF1 Init AR Off
of earth fault protection
5.4 0 EF2 Init AR Off
of earth fault protection
5.5 0 EF Inv Init AR Off
stage of earth fault protection
5.6 0 SEF1 Init AR Off
136
of sensitive earth fault
protection
5.7 0 SEF2 Init AR Off
of sensitive earth fault
protection
5.8 0 SEF Inv Init AR Off
stage of sensitive earth fault
protection
5.9 0 NSOC1 Init AR Off
of negative sequence
5.10 0 NSOC2 Init AR Off
of negative sequence
5.11 0 NSOC Inv Init AR Off
stage of negative sequence
5.15 0 3P Fault Init AR 3P Fault Blk AR
function is initiated by single
phase fault or three phase
fault
1.5 IED reports
AR in progess AR is initiated by internal or external function
Syn Request Check synchronization
Syn OK Synchronization check OK
1st Reclose The first shot reclosing
2nd Reclose The second shot reclosing
3rd Reclose The third shot reclosing
4th Reclose The fourth shot reclosing
AR Success AR successful
AR Failure AR unsuccessful
137
Syn Vdiff fail Voltage difference for synchronization check fail
Syn Ang fail Angle difference for synchronization check fail
Syn Fdiff fail Frequency difference for synchronization check fail
Syn Failure Synchronization check timeout
CB Not Ready BI2 is active to show CB is not ready
1.6 Technical data
Table 107 Technical data for autoreclosing function
Number of reclosing shots Up to 4
Shot 1 to 4 is individually
selectable

AR initiating functions Internal protection functions
External binary input

Dead time, separated setting for
shots 1 to 4
0.05 s to 60.00 s, step 0.01 s 1 % setting value or +50 ms
Reclaim time 0.50 s to 60.00s, step 0.01 s
Blocking duration time (AR reset
time)
0.05 s to 60.00s, step 0.01 s
Circuit breaker ready supervision
time
0.50 s to 60.00 s, step 0.01 s
Dead time extension for
synch-check (Max. SYNT EXT)
0.05 s to 60.00 s, step 0.01 s

138

Chapter 16 Unbalance protection
139

About this chapter
used for unbalance protection function.

140
1 Unbalance protection
1.1 Introduction
The purpose of an unbalance detection scheme is to remove a capacitor bank
from the system in the event of a fuse operation. This will prevent damaging
overvoltages across the remaining capacitor units in the group where the fuse
operation occurs, to protect against the situation that can be immediately
harmful to the capacitor units or associated equipments.
Unbalance detection works scheme is set to issue an alarm signal for an
initial failure in a bank. If the critical failure happens, the capacitor bank would
be tripped from the line.
Unbalance detection based on unbalance current or unbalance voltage, This
IED provides three analog channels to monitor unbalance status. If only one
unbalance analog quantity input is provided, other two channels can be
reserved. In order to avoid mal-operating, auxiliary breaker contact is
necessary as a criterion.
Different detecting schemes are described in the following, which are applied
for the unbalance protection.
1.2.1 Unbalance protection detection for grounded capacitor
bank
A
B
C
I1

Figure 40 Example for grounded capacitor bank
141
A grounded capacitor arrangement is shown here. The typical unbalance
protection scheme consists of a current transformer connected between
neutral point and ground.
It provides a relatively inexpensive protection scheme. But disadvantages are
included:
Sensitive to system unbalance
Don not operate when failure happen similarly in all the phases
1.2.2 Summation of intermediate tap-point voltage for
grounded-wye capacitor bank
B
C
U1
A

Figure 41 Example for grounded-wye capacitor bank
It shows a different unbalance protection scheme for a grounded wye
capacitor bank using capacitor tap point voltages. Any unbalance detected in
the capacitor units will cause an unbalance voltage at the tap points. The
resultant voltage in the open delta indicates the unbalance.
1.2.3 Neutral current differential protection for grounded
split-wye capacitor bank
142
A
B
C
I1

Figure 42 Example for split-wye capacitor bank
In this scheme, the neutrals of the two banks are grounded through separate
current transformers. The secondary current transformed by the CT is
insensitive to any outside conditions and is affected by two capacitor banks.
There is no any indication for balance failure in this configuration.
1.2.4 Neutral voltage unbalance protection for unrounded wye
capacitor bank
A
B
C
U1

Figure 43 Example for unrounded-wye capacitor bank
Using a voltage transformer connected between the neutral point and ground,
any neutral voltage shift due to the failure of capacitor unit is detected. This
scheme is less sensitive to system unbalance.
1.2.5 Neutral voltage unbalance detection by 3PTs for
unrounded wye capacitor bank
143
B
C
U1
A

Figure 44 Example for unrounded-wye capacitor bank with 3VTs
This protection scheme uses three lines to neutral VTs with the secondary
connected in the broken delta. It is less sensitive to system unbalance.
1.2.6 Neutral current protection for ungrounded split-wye
capacitor bank
A
B
C

Figure 45 Example for ungrounded split-wye capacitor bank with CT
In this protection scheme, a current transformer is used in the neutral circuit
to measure the unbalance current. It is not sensitive to system unbalance but
sensitive to detection of capacitor unit failure.
1.2.7 Neutral voltage protection for ungrounded split-wye
capacitor bank
144
A
B
C
U1

Figure 46 Example for ungrounded split-wye capacitor bank with VT
In this protection scheme, a voltage transformer is used in the neutral circuit
to measure the unbalance voltage. It is not sensitive to system unbalance but
sensitive to detection of capacitor unit failure.
1.2.8 Neutral voltage unbalance detection for ungrounded
split-wye capacitor bank
A
B
C
U1

Figure 47 Example for ungrounded split-wye capacitor bank with neutral VT
This scheme is not sensitive to system unbalance but sensitive to detection of
capacitor unit failures.
1.2.9 Three unbalance voltages detection for capacitor bank
145
A
B
C
U1
U2
U3

Figure 48 Example for three unbalance voltages detection
This scheme is applicable for either grounded or ungrounded capacitor bank,
it is not sensitive to system unbalance but sensitive to detection of capacitor
unit failure, fault occurrence in each capacitor unit can be detected reliably.
1.2.10 Three unbalance currents detection for capacitor bank
A
B
C
I1
I2
I3

Figure 49 Example for three unbalance currents detection
This scheme is applicable for either grounded or ungrounded capacitor bank,
it is not sensitive to system unbalance but sensitive to detection of capacitor
unit failure, fault occurrence in each capacitor unit can be detected reliably.
146
1.2.11 Logic diagram
UBLAlarmOn
Func_UBL
Talarm
OR
AND
Func_UBL
Ttrip
OR
AND
Unbalance1>
Unbalance2>
Unbalance3>
3PhCBOpen
Unbalance1>
Unbalance2>
Unbalance3>
3PhCBOpen
Alarm
Trip

Figure 50 Logic diagram for unbalance protection
IC1
IC2
IC3
UBLAlarm
UC1
UC2
UC3
BI8CBOpen
UBLTrip

Signal Description
IC1 signal for current input 1
UC1 signal for voltage input 1
147
Signal Description
Signal Description
UBL Alarm Unbalance protection alarm
UBL Trip Unbalance protection trip
1.4.1 Setting list
Table 111 Function setting list for unbalance protection
NO. Abbr. Explanation Unit Min. Max.
1. U_UBL Alarm
Voltage setting for alarm of unbalance
protection
V 0.50 100.0
2. I_UBL Alarm
Current setting for alarm of unbalance
protection
A 0.10 20.0
3. T_UBL Alarm
Time setting for alarm of unbalance
protection
S 0.10 60.00
4. U_UBL Trip
Voltage setting for tripping of unbalance
protection
V 0.50 100.0
5. I_UBL Trip
Current setting for tripping of unbalance
protection
A 0.10 20.0
6. T_UBL Trip
Time setting for tripping of unbalance
protection
S 0.00 60.00
1. Func_UBL Enable or disable the unbalance protection
Bit 0 1 Explanation
4.8 UBL Alarm Off UBL Alarm On
Enable or disable the alarm
function of unbalance protection
1.5 IED reports
148
UBL Trip Unbalance protection issues trip command
UBL Alarm Unbalance protection issues an alarm signal

Chapter 17 Under current protection
149
Chapter 17 Under current monitoring

About this chapter
used for under current monitoring function.

150
1 Under current monitoring
1.1 Introduction
Under current protection is used to prevent reconnection of the charged
capacitor bank to energized network when a short loss of supply voltage
occurs.
Once under current protection operates, the CB closing circuit will be
interrupted and reset after a certain time. Additionally, time to resetting will be
displayed on the HMI.
In order to inhibit reconnection of a charged capacitor bank to a live network,
reconnection inhibition function is provided. It should be activated when under
current protection operates. Output UC_BLOCK is issued and the inhibition
will last for T_Inhibition, this contact is used in series of close circuit to inhibit
reconnection by any reasons.
After timer T_Inhibition expiration, the closing inhibition will remove
automatically. Shortcut mode is provided in HMI to reset this timer and
remove closing inhibition in case of any emergency closing. Press QUIT and
SET at same time, inhibition is removed.
1.2.2 Logic diagram
Func_UC
T
AND
AND
Ia<
Ib<
Ic<
3PhCBOpen
Trip

Figure 51 Logic diagram for under current monitoring function
151
IP1
IP2
IP3
BI8CBOpen
UCTrip

Signal Description
Signal Description
Signal Description
UC Trip Under current monitoring function trip
1.4.1 Setting list
Table 119 Function setting list for under current monitoring function
NO. Abbr. Explanation Unit Min. Max.
1. I_UC
Current setting for under current
protection
A 0.50In 20.00In
2. T_UC
Time setting for tripping of under
current protection
S 0.10 60.00
3. T_Inhibition
Time setting for inhibition of under
current protection
S 30.00 6000.0
Table 120 Logical linker list for under current monitoring function
152
1. Func_UC Enable or disable the under current protection
1.5 IED reports
UC Trip Under current protection issues trip command
Inhibit close Drive a contact to inhibit reconnection of capacitor

Chapter 18 Load shedding protection
153

About this chapter
used for load shedding function.

154
1 Low frequency load shedding
protection
1.1 Introduction
The function monitors the network abnormality by detection of frequency
reduction. When the system frequency falls down to a threshold frequency
with following conditions satisfied, specified load will be removed.
Undervoltage checking
Rate of frequency (df/dt) checking
CB position checking
Load current checking
VT secondary circuit supervision
Low frequency load shedding is provided based on bay load shedding
principle. This means that the protection function is implemented in each bay
separately, instead of being applied in an incoming bay and sending trip
command to various outgoing bays. In this regard, coordination between the
low frequency load shedding protection functions applied at various bays can
be achieved by selecting appropriate settings for pickup threshold and time
delay of the protection in various bays. The protection function can be
enabled or disabled via binary setting Func_LF LS. Based on the bay load
shedding principle, only one trip stage is applied for the protection. This
protection can operate based on both three-phase and single-phase voltage
input configurations. The voltage connection is set in the IED by binary setting
3Ph V Connect/1Ph V Connect. It is noted that in case of single-phase to
earth voltage input configuration, the voltage should be connected to phase A
or B, which are necessary for frequency measurement. Similarly, for single
phase to phase voltage, the voltage connection input should be VA-B. In each
configuration, it derives the power frequency from the connected voltage. If
the frequency falls below a pre-defined threshold (setting F_LF LS), a timer
155
begins to run toward a pre-defined time limit which is the time delay of the
protection (setting T_LF LS). When the time delay elapsed, the trip
command is issued.
Since the protection based on power frequency from the connected voltages,
the protection should be blocked if some conditions are satisfied as following:
The minimum magnitude among of the connected voltages is lower than
the defined threshold in setting U_Chk. In case of single-phase voltage
connection, only the magnitude of the connected voltage is checked with
setting U_Chk
VT fail is detected by the IED or a MCB failure signal is received to the
IED through respective binary input
Load current is lower than setting I_Chk. This condition is mainly useful
when the voltage transformer is connected at source side. The setting
applied at I_Chk corresponds to minimum load current which may flow
when circuit breaker is closed. It is possible to disable this feature by
applying setting 0 to I_Chk
Circuit breaker is in open status. Similar to the previous condition, it is
useful when the voltage transformer is connected at source side. In this
case, it is not desired to issue any trip command by low frequency load
shedding even if the frequency falls below the pre-defined threshold
Rate of frequency change (f/t) exceeds the setting of frequency
change rate dF/dt_LS
IP1
IP2
IP3
LFLSTrip
UP1
UP2
UP3
BI8CBOpen

Signal Description
156
Signal Description
BI8 CB Open Binary input 8 CB open
Signal Description
LF LS Trip Low frequency load shedding trip
1.4.1 Setting list
Table 125 Function setting list for low frequency load shedding protection
1. 49.5 F_LF LS
Frequency setting for low frequency
load shedding protection
HZ 45.00 60.00
2. 0.5 T_LF LS
Time setting for low frequency load
shedding protection
S 0.05 60.00
3. 3 dF/dt_LS
dF/dt setting for low frequency load
shedding protection
HZ/S 1.00 10.00
4. 70 U_Chk
Voltage checking setting for low
frequency load shedding protection
V 10.00 120.0
5. 0.2In I_Chk
Current checking setting for low
frequency load shedding protection
A 0 2.00In
Table 126 Logical linker list for low frequency load shedding protection
1. On Func_LF LS
Enable or disable the low frequency load shedding
protection
157
Table 127 Binary setting list for low frequency load shedding protection
2.9 0 3Ph V Connect 1Ph V Connect
Single phase or three phase
voltage connection
3.4 1 dF(dU)/dt Off dF(dU)/dt On
Enable or disable the binary
setting of dF(dU)/dt
1.5 IED reports
LF LS Trip Low frequency load shedding function issues trip command

158
2 Low voltage load shedding protection
2.1 Introduction
This kind of load shedding is to prevent the voltage collapse and uncontrolled
loss of load.
Low voltage load shedding is necessary when the network is connected with
a huge system with vast power capacity. Under this condition, Low
Frequency Load Shedding Scheme cannot work properly. Low Voltage Load
Shedding Scheme" would be a useful criterion whenever Automatic Voltages
Regulator (AVR) is out of service or not equipped with following conditions
satisfied.
Negative sequence voltage checking
Rate of voltage (du/dt) checking
CB position checking
Load current checking
VT secondary circuit supervision
2.2.1 Funciton description
Low voltage load shedding is provided based on bay load shedding principle.
This means that the protection function is implemented in each bay separately,
instead of being applied in an incoming bay and sending trip command to
various outgoing bays. In this regard, coordination between the low voltage
load shedding protection functions applied at various bays can be achieved
by selecting appropriate settings for pickup threshold and time delay of the
protection in various bays. The protection function can be enabled or disabled
via binary setting Func_LV LS. Based on the bay load shedding principle,
only one trip stage is provided for the protection. This protection can operate
based on both three-phase and single-phase voltage input configurations.
The voltage connection is set in the IED by binary setting 3Ph V
159
Connect/1Ph V Connect. If all the measured voltages fall below a
pre-defined threshold (setting U_LV LS), a timer begins to run toward a
pre-defined limit which is the time delay of the protection (setting T_LV LS).
When the time delay elapsed, the trip command is issued. It is noted that the
setting applied at U_LV LS corresponds to phase to phase voltage.
Since the protection operates based on measured voltages, for some
conditions satisfied the protection should be blocked. These conditions are as
follows:
the defined threshold U_Chk. In case of single-phase voltage
setting U_Chk
Load current is lower than setting I_Chk. This condition is mainly useful
when the voltage transformer is connected at source side. The setting
applied at I_Chk corresponds to minimum load current which may flow
when circuit breaker is closed. It is possible to disable this feature by
applying setting 0 to I_Chk
Circuit breaker is in open status. Similar to the previous condition, it is
useful when the voltage transformer is connected at source side. In this
case, it is not desired to issue any trip command by low voltage load
shedding even if the voltage falls below the pre-defined threshold
Rate of voltage change (U/t) exceeds the setting of voltage change
rate dU/dt_LS. The setting corresponds to phase to phase voltage
Negative sequence voltage is greater than 5V. In case of single-phase
voltage connection (by setting 1Ph V Connect), this condition is
useless.
160
IP1
IP2
IP3
LVLSTrip
UP1
UP2
UP3
BI8CBOpen

Signal Description
Signal Description
Signal Description
LF LS Trip Low voltage load shedding trip
2.4.1 Setting list
Table 132 Function setting list for low frequency load shedding protection
1. 100 U_LV LS
Voltage setting for low voltage load
shedding protection
V 50.00 110.00
2. 1 T_LV LS
Time setting for low voltage load
shedding protection
S 0.05 60.00
3. 5 dU/dt_LS dF/dt setting for low voltage load HZ/S 1.00 10.00
161
shedding protection
4. 70 U_Chk
voltage load shedding protection
V 10.00 120.0
5. 0.2In I_Chk
Current checking setting for low
A 0 2.00In
Table 133 Logical linker list for low frequency load shedding protection
1. On Func_LV LS
Enable or disable the low voltage load shedding
protection
Table 134 Binary setting list for low frequency load shedding protection
voltage connection
2.5 IED reports
Func_LV LS Disable or enable the low voltage load shedding

162
3 Overload load shedding protection
3.1 Introduction
The IED provides a load shedding function based on the load current passing
through feeder. This function will be essential in conditions that feeder is
connected to a huge network with constant frequency and additional AVR is
continuously used for voltage regulation. In this case, load shedding
protection should be done based on load current and monitoring of following
items
Rate of voltage (du/dt) checking (in the case of voltage connection)
Rate of frequency (df/dt) checking (in the case of voltage connection)
VT secondary circuit supervision (in the case of voltage connection)
3.2.1 Fucntion description
Overload load shedding is provided based on bay load shedding principle.
This means that the protection function is implemented in each bay separately,
instead of being applied in an incoming bay and sending trip command to
various outgoing bays. In this regard, coordination between the overload load
shedding protection functions applied at various bays can be achieved by
selecting appropriate settings for pickup threshold and time delay of the
protection in various bays. The protection function can be enabled or disabled
via binary setting Func_OL LS. Based on the bay load shedding principle,
only one trip stage is provided for the protection. It operates based on the
measured phase currents. If all of the measured phase currents exceed a
pre-defined threshold (setting I_OL LS), a timer begins to run toward a
pre-defined limit which is the time delay of the protection (setting T_OL LS).
When the time delay elapsed, the trip command is issued.
If the voltage connected to the IED and the binary setting OL LS Chk V On is
set in binary setting OL LS Chk V Off/OL LS Chk V On, the protection would
be blocked as following conditions:
163
the threshold defined by U_Chk. In case of single-phase voltage
setting U_Chk
Rate of voltage change (U/t) exceeds the setting of voltage change
rate dU/dt_LS. The setting corresponds to phase to phase voltage
Rate of frequency change (f/t) exceeds the setting of frequency
change rate dF/dt_LS.
IP1
IP2
IP3
OLLSTrip
UP1
UP2
UP3
BI8CBOpen

Signal Description
Signal Description
Signal Description
164
OL LS Trip Overload load shedding trip
3.4.1 Setting list
Table 139 Function setting list for overload load shedding protection
1. In I_OL LS
Current setting for over load load
shedding protection
V 50.00 110.00
2. 1 T_OL LS
Time setting for over load load
shedding protection
S 0.05 60.00
3. 5 dU/dt_LS
dU/dt setting for over load load
shedding protection
V/S 1.00 10.00
4. 3 dF/dt_LS
dF/dt setting for over load load
shedding protection
HZ/S 1.00 10.00
5. 70 U_Chk
V 10.00 120.0
Table 140 Logical linker list for overload load shedding protection
1. On Func_Lv LS
Enable or disable the low voltage load shedding
protection
Table 141 Binary setting list for overload load shedding protection
voltage connection
3.5 1 OL LS Chk V Off OL LS Chk V On
of checking voltage
3.5 IED reports
165
OL LS Trip Overload load shedding function issues trip command
3.6 Technical data
Table 143 Technical data for load shedding protection
Under Frequency Load shedding
Frequency for fr =50Hz 45.50 to 50.00 Hz, step 0.01 Hz 20 mHz
Time delay 0.05 to 60.00s, step 0.01 1.5 % setting or +60 ms
Under Voltage Load shedding
Voltage 50 to 110 V, step 1V 3 % setting or 1 V
Time delay
0.10 to 60.00s, step 0.01 s
1.5 % setting or +60 ms, at
Overload Load shedding
Phase current 0.08 to 20 A for Ir =1A
0.25 to 100 A for Ir =5A
3% setting or 0.02Ir
Time delay 0.10 to 60.00s , step 0.01 s 1.5 % setting or +60 ms, at
Blocking condition
Frequency change rate f/t 1 to 10 Hz/s 0.5 Hz/s
Voltage change rate u/t 1 to 100 V/s, step 1 V/s 3 % setting or 1 V
Blocking voltage 10 to 120V, step 1 V 3 % setting or 1 V
Blocking current 0 to 2 Ir 3% setting or 0.02Ir
Operating time Approx. 60 ms
Reset time Approx. 60 ms
Under voltage blocking reset ratio Approx. 1

166

Chapter 19 Fast busbar protection scheme
167
Chapter 19 Fast busbar protection
scheme

About this chapter
used for fast busbar protection scheme.

168
1 Fast busbar protection scheme
1.1 Function description
The IED provides fast busbar protection which is achieved based on
operation with GOOSE signals, it is able to block the incoming feeder
protection IED function by reception of a defined GOOSE signals from the
outgoing feeder linked with the same busbar.
The principle illustrated in the following figure:
Relay A
Relay C
Relay B
Trip
A
B
C
G
O
O
S
E

m
a
s
s
a
g
e
-
B
l
o
c
k

Figure 52 Action when fault on the feeder C
If the fault occurs on outgoing feeder C, the protection IED C will trip and send
block messenger to IED A to block IED A relevant protection function.
169
Relay A
Relay C
Relay B
Trip
A
B
C

Figure 53 Action when fault on the Busbar
Once the fault located on the busbar, protection IEDs of outgoing feeder do
not trip and therefore there is no any blocking signal. So the IED A will trip and
clear off the fault with short time delay.

IP1
IP2
IP3
UP1
UP2
UP3

Signal Description
170
1.3.1 Setting list
1.4 IED reports
OC Startup Three stages over current protections startup
OC Startup Back Three stages over current protections return

Chapter 20 Secondary system supervision
171
Chapter 20 Secondary system
supervision

About this chapter
This chapter describes the protection principle, input and output
signals, parameter, IED report and technical data used in
secondary system supervision function.

172
1 Current circuit supervision
Open or short circuited current transformer cores can cause unwanted
operation of many protection functions such as, earth fault current and
negative sequence current functions.
It must be remembered that a blocking of protection functions at an occurring
open CT circuit will mean that the situation will remain and extremely high
voltages will stress the secondary circuit.
To prevent the IED from wrong trip, interruptions in the secondary circuits of
current transformers is detected and reported by the UED. When the zero
sequence current is always larger than the setting value 3I0_CT Fail for 12s,
CT Fail will be reported and each stage of zero sequence current protection
will be blocked if setting Blk EF_CT Fail is selected.
1.1.2 Logic diagram
12s
CTFailOn
3I0> CTFail

Figure 54 Logic diagram for current circuit supervision
IP1
IP2
IP3
CTFail
IN

Signal Description
173
IN signal for zero sequence current input
Signal Description
CT Fail CT Fail
1.3.1 Setting list
Table 148 Function setting list for current circuit supervision protection
1. 0.5In 3I0_CT Fail
Maximum zero-sequence current for
detecting CT failure
A 0.05In 2.00In
Table 149 Binary setting list for current circuit supervision protection
2.13 1 CT Fail Off CT Fail On
of CT fail supervising
1.4 IED reports
CT Fail CT failure in circuit of current transformer

174
2 Fuse failure supervision VT
2.1 Introduction
A measured voltage failure, due to a broken conductor or a short circuit fault
in the secondary circuit of voltage transformer, may result in unwanted
operation of the protection functions which work based on voltage criteria. VT
failure supervision function is provided to block these protection functions and
enable the backup protection functions. The features of the function are as
follows:
Symmetrical/asymmetrical VT failure detection
3-phase AC voltage MCB monitoring
1-phase AC voltage MCB monitoring
Zero and negative sequence current monitoring
Applicable in solid grounded, compensated or isolated networks
VT failure supervision function can be enabled or disabled through binary
setting VT Fail On/ VT Fail Off. By applying setting VT Fail On to the binary
setting, VT failure supervision function would monitor the voltage transformer
circuit. As mentioned, the function is able to detect single-phase broken,
two-phase broken or three-phase broken faults in secondary circuit of voltage
transformer, if a three-phase connection is applied.
There are three main criteria for VT failure detection; the first is dedicated to
detect three-phase broken faults. The second and third ones are to detect
single or two-phase broken faults in solid earthed and isolated/resistance
earthed systems, respectively. A precondition to meet these three criteria is
that IED should not be picked up and the calculated zero sequence and
negative sequence currents should be less than setting of 3I02_ VT Fail.
The criteria are as follows:
2.2.1 Three phases (symmetrical) VT Fail
The calculated zero sequence voltage 3U0 as well as maximum of three
phase-to-earth voltages is less than the setting of Upe_VT Fail and at the
same time, maximum of three phase currents is higher than setting of I_ VT
Fail. This condition may correspond to three phase broken fault in secondary
175
circuit of the voltage transformer if no startup element has been detected.
2.2.2 Single/two phases (asymmetrical) VT Fail
The calculated zero sequence voltage 3U0 is more than the setting of
Upe_VT Fail. This condition may correspond to single or two-phase broken
fault in secondary circuit of the voltage transformer, if the system starpoint is
solidly earthed and no startup element has been detected.
The calculated zero sequence voltage 3U0 is more than the setting of
Upe_VT Fail, and at the same time, the difference between the maximum
and minimum phase-to-phase voltages is more than the setting of Upp_VT
Fail. This condition may correspond to single or two-phase broken fault in
secondary circuit of the voltage transformer, if the system starpoint is isolated
or resistance earthed and no startup element has been detected.
In addition to the mentioned conditions, IED has the capability to be informed
about the VT MCB failure through its binary inputs V3p MCB Fail and V1p
MCB Fail. In this context, VT fail is detected, if the respective binary input is
active.
2.2.3 The fourth voltage U4 VT fail
The IED is also capable to detect VT MCB failure of the forth input voltage U4
through its binary input V1P MCB Fail. In this context, VT fail is detected for
U4, if the respective binary input is active. As mentioned previously, U4 input
voltage can be used for in conjunction with reclosure function (setting 3U0
Calculated) or as 3U0 which can be used for earth fault protection or
displacement voltage protection (setting 3U0 Measured). When the fourth
input voltage is used as 3U0, activation of binary input V1P MCB Fail may
lead to block condition for the corresponding functions which operate based
on the measured 3U0 voltage. Similarly, when it is used as synchronization
purposes, activation of binary input V1P MCB Fail would result in blocking
condition for synchronization function.
2.2.4 Logic diagram
If VT failure supervision detects a failure in voltage transformer secondary
circuit, either by means of the above mentioned criteria or reception of a VT
MCB fail indication, all the protection functions which operate based on
direction component or low voltage criteria can be blocked, depending on the
176
setting. Furthermore, alarm report VT Fail is issued after 10s time delay. If
the VT Fail criteria recovers within this 10s time delay, the blocking condition
would be removed if one of the following conditions is met. Furthermore, it
should be noted that no VT MCB fail indication should be present during this
condition.
Without relay pickup, minimum phase voltage becomes more than setting of
Upe_VT Normal for 500ms. It is mentioned that with single phase
connection by setting 1-PH V Connect, only the connected voltage is
checked.
Without relay pickup, minimum phase voltage becomes more than setting of
Upe_VT Normal and at the same time, the calculated zero sequence or
negative sequence current of corresponding side becomes more than the
setting of 3I02_ VT Fail. It is mentioned that with single phase connection by
setting 1-PH V Connect, only the connected voltage is checked.
Subsequent to reporting VT fail alarm, the blocking condition of respective
protection functions would be removed if without relay pickup, the minimum
phase voltage becomes more than the setting of Upe_VT Normal for a
duration more than 10s. Furthermore, it should be noted that no VT MCB fail
indication should be present during this condition.
Max{Uab,Ubc,Uca}-
Min{Uab,Ubc,Uca}>
3U0 <
Max{Ua,Ub,Uc}<
10S Alarm
VT Fail On
AND
AND
OR
OR
V3P MCB Fail
VT Fail
3U0 >=
Solid Earthed
Isolate/Resist
3Ph CB Open
0
VT Chk CB On
VT Chk CB Off

Figure 55 VT Logic diagram of VT failure supervision for three phase voltage inputs
10S
VTCheckOn
V1pMCBFail
V1pVTFail
Alarm

177
Figure 56 VT Logic diagram of VT failure supervision for U4 input
IP1
IP2
IP3
UP1
UP2
UP3
VTFail
V3PMCBFail
IN
V1PMCBFail
V1PVTFail
UP4

Signal Description
IN Signal for zero sequence current input
Signal Description
V3P MCB Fail Three phase MCB VT fail
V1P MCB Fail Single phase MCB VT fail
Signal Description
VT Fail VT fail
V1P MCB Fail Single phase MCB VT fail
2.4.1 Setting list
178
Table 154 Function setting list for fuse failure supervision protection
1. 0.2In I_VT Fail
Maximum current for detecting VT
failure
A 0.05In 0.25In
2. 0.2In 3I02_VT Fail
Maximum zero- and negative-
sequence current for detecting VT
failure
A 0.05In 0.25In
3. 8 Upe_VT Fail
Maximum phase to earth voltage
for detecting VT failure
V 7.00 20.0
4. 16 Upp_VT Fail
Maximum phase to phase voltage
for detecting VT failure
V 10.00 30.0
5. 40 Upe_VT Normal
Minimum normal phase to earth
for VT restoring
V 40.00 65.00
Table 155 Binary setting list for fuse failure supervision protection
voltage connection
2.10 0 Isolate/ Resist Solid earthed
Solid earthed system or
isolated system
2.15 1 VT Fail Off VT Fail On
of VT failure
2.5 IED reports
VT Fail VT failure in circuit of voltage transformer
V1P VT Fail VT failure in circuit of the forth voltage transformer
2.6 Technical data
Table 157 Technical data for VT secondary circuit supervision
Item Range or value Tolerances
Minimum current 0.08Ir to 0.20Ir, step 0.01A 3% setting or 0.02Ir
Minimum zero or negative
sequence current
0.08Ir to 0.20Ir, step 0.01A 5% setting or 0.02Ir
179
Maximum phase to earth voltage 7.0V to 20.0V, step 0.01V 3% setting or 1 V
Maximum phase to phase
voltage
10.0V to 30.0V, step 0.01V 3% setting or 1 V
Normal phase to earth voltage 40.0V to 65.0V, step 0.01V 3% setting or 1 V
180

Chapter 21 Monitoring function
181

About this chapter
This chapter describes the protection principle, input and output
signals, parameter, IED report and technical data used in
monitoring function.

182
1 Switching devices status monitoring
The function is used to monitor the service status of circuit breaker. The
conditions such as spring charging status, gas pressure, etc., are available
for the protection IED.
The AR function will be blocked and alarm will be issued in case of something
wrong with CB.
2 Self-supervision
All modules can perform self-supervision to its key hardware components
and program as soon as energizing. Parts of the modules are
self-supervised in real time. All internal faults or abnormal conditions will
initiate an alarm. The fatal faults among them will result in the whole IED
blocked
CRC checks for the setting, program and configuration, etc.

Chapter 22 Station communication
183

About this chapter
This chapter describes the communication possibilities in a
SA-system.

184
1 Overview
Each IED is provided with a communication interface, enabling it to connect to
one or many substation level systems or equipment.
Following communication protocols are available:
IEC 61850-8-1 communication protocol
60870-5-103 communication protocol
The IED is able to connect to one or more substation level systems or
equipments simultaneously, through the communication ports with
communication protocols supported.
1.1 Protocol
1.1.1 IEC61850-8 communication protocol
IEC 61850-8-1 allows two or more intelligent electronic devices (IEDs) from
one or several vendors to exchange information and to use it in the
performance of their functions and for correct co-operation.
GOOSE (Generic Object Oriented Substation Event), which is a part of IEC
61850-8-1 standard, allows the IEDs to communicate state and control
information amongst themselves, using a publish-subscribe mechanism. That
is, upon detecting an event, the IED(s) use a multi-cast transmission to notify
those devices that have registered to receive the data. An IED can, by
publishing a GOOSE message, report its status. It can also request a control
action to be directed at any device in the network.
1.1.2 IEC60870-5-103 communication protocol
The IEC 60870-5-103 communication protocol is mainly used when a
protection IED communicates with a third party control or monitoring system.
This system must have software that can interpret the IEC 60870-5-103
communication messages.
The IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit
serial communication exchanging information with a control system. In IEC
terminology a primary station is a master and a secondary station is a slave.
185
The communication is based on a point-to-point principle. The master must
have software that can interpret the IEC 60870-5-103 communication
messages. For detailed information about IEC 60870-5-103, refer to the
IEC60870 standard part 5: Transmission protocols, and to the section 103:
Companion standard for the informative interface of protection equipment.
1.2 Communication port
1.2.1 Front communication port
There is a serial RS232 port on the front plate of all the IEDs. Through this
port, the IED can be connected to the personal computer for setting, testing,
and configuration using the dedicated Sifang software tool.
1.2.2 RS485 communication ports
One isolated electrical RS485 communication ports are provided to connect
with substation automation system. These two ports can work in parallel for
IEC60870-5-103.
1.2.3 Ethernet communication ports
Up to 2 electrical or optical Ethernet communication ports are provided to
connect with substation automation system. These two ports can work in
parallel for one protocol, IEC61850 or IEC60870-5-103.
1.3 Technical data
Item Data
Number 1
Connection Isolated, RS232; front panel,
9-pin subminiature connector, for software tools
Communication speed 9600 baud
Max. length of communication cable 15 m
186
RS485 communication port
Item Data
Number 1, only
Connection 2-wire connector
Rear port in communication module
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
For IEC 60870-5-103 protocol
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Ethernet communication port
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector
Max. length of communication cable 100m
For IEC 61850 protocol
Communication speed 100 Mbit/s
Optical communication port ( optional )
Number 0 to 2
Connection SC connector
Optical cable type Multi-mode
IEC 61850 protocol
IEC 60870-5-103 protocol
Note: There is not optical Ethernet port in CSC211
Time synchronization
187
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Voltage levels differential input

188
1.4 Typical substation communication scheme
The IED is able to connect to one or more substation level systems or
equipments simultaneously, through the communication ports with
communication protocols supported.
Gateway
or
converter
WorkStation3
ServerorWork
Station1
ServerorWork
Station2
Net2:IEC61850/IEC103,EthernetPortB
Net3:IEC103,RS485PortA
Net1:IEC61850/IEC103,EthernetPortA
Switch
Switch
Switch
Switch
Switch

Figure 57 Connection example for multi-networks of station automation system
1.5 Typical time synchronizing scheme
All IEDs feature a permanently integrated electrical time synchronization port
(shown in Figure 58). It can be used to feed timing telegrams in IRIG-B or
pulse format into the IEDs via time synchronization receivers. The IED can
adapt the second or minute pulse in the pulse mode automatically.
Meanwhile, SNTP network time synchronization can be applied.
SNTP
IRIG-B Pulse
Ethernet port IRIG-B port Binary input

Figure 58 Time synchronizing modes
Chapter 23 Hardware
189
Chapter 23 Hardware

About this chapter
This chapter describes the IED hardware.

Chapter 23 Hardware
190
1 Introduction
1.1 IED structure
The enclosure for IED is 1/2 19 inches in width and 4U in height.
The IED is flush mounting with panel cutout and cabinet.
Connection terminals to other system on the rear.
The front panel of IED is aluminum alloy by founding in integer and
overturn downwards. LCD, LED and setting keys are mounted on the
panel. There is a serial interface on the panel suitable for connecting a
PC.
Draw-out modules for serviceability are fixed by lock component.
The modules can be combined through the bus on the rear board. Both
the IED and the other system can be combined through the rear
interfaces.
1.2 IED module arrangement
Chapter 23 Hardware
191
X1
AIM
X2
AIM
X3
BIO
X4
CPU
X5
FIO
X6
FOM
X7
PSM

Figure 59 Rear view of the protection IED

Chapter 23 Hardware
192
2 Local human-machine interface
2.1 Introduction
The human-machine interface is simple and easy to understand the whole
front plate is divided into zones, each of which has a well-defined
functionality:
2
1
3
4
5
6
7

Figure 60 The view of IED front plate
1. Liquid crystal display (LCD)
2. LEDs
3. Arrow keys
4. Reset key
5. Quit key
6. Set key
7. RS232 communication port
2.2 Liquid crystal display (LCD)
The LCD back light of HMI is blue, 5 lines can be displayed.
Chapter 23 Hardware
193
When operating keys are pressed or in the case of IED alarming or operating
report appearance, the back light will turn on automatically until the preset
time delay elapse after the latest operation or alarm.
2.3 LED
There are 11 LEDs on the left side of the LCD. The definition for each LED is
shown as following table.
Table 158 HMI keys on the front of the IED
NO. Definition Color Explanation
1. Run/Alarm
Green The IED operate nomally
Red The alarm is issued
2. OC
Green The linker of overcurrent protection is enabled
Red The overcurrent protection operate
3. EF
Green The linker of earth fault protection is enabled
Red The earth fault protection operate
4. SEF
Green The linker of sensitive earth fault protection is enabled
Red The sensitive earth fault protection operate
5. NSOC
Green
The linker of negative sequence overcurrent protection is
enabled
Red The negative sequence overcurrent protection operate
6. CBF/DZ
Green
The linker of circuit breaker failure or dead zone protection
is enabled
Red The circuit breaker failure or dead zone protection operate
7. Themal OL
Green The linker of thermal overload protection is enabled
Red The thermal overload protection operate
8. 3V0
Green The linker of displacement voltage protection is enabled
Red The displacement voltage protection operate
9. OV/UV
Green
The linker of overvoltage or undervoltage protection is
enabled
Red The overvoltage or undervoltage protection operate
10. Load SHED
Green The linker of load shedding protection is enabled
Red The load shedding protection operate
11. AR/MC
Green
The linker of autorecloser or manual reclose function is
enabled
Red The autorecloser or manual reclose function operate
2.4 Keyboard
Chapter 23 Hardware
194
The keyboard is used to monitor and operate IED. The keyboard has the
same look and feel in CSC family. As shown in Figure 60, keyboard is divided
into Arrow keys, Reset key, Quit key and Set key. The specific instructions on
the keys as the following table described:
Table 159 HMI keys on the front of the IED
Key Function
Up arrow key Move up in menu
Page up between screens
Increase value in setting
Down arrow key Move down in menu
Page down between screens
Decrease value in setting
Left arrow key Move left in menu
Right arrow key Move Right in menu
Reset key Reset the LEDs
Return to normal scrolling display state directly
Set key Enter main menu or submenu
Confirm the setting change
Quit key Back to previous menu
Cancel the current operation and back to previous menu
Return to scrolling display state
Lock or unlock current display in the scrolling display state (the
lock state is indicated by a "solid diamond" type icon on the botton
right corner of the LCD)
2.5 IED menu
2.5.1 Menu construction
Chapter 23 Hardware
195
OpStatus
OpConfig
Settings
Report
ComConf
Testing
DevSetup
DevInfo
Analog BI
Connect
GOOSEINF
Metering
Energy
Switch Time
Connect
Read Switch
Event
Remote
BO
BI
Zero
LEDTest
Eth1#
Operation
Version OpInfo
Serial
MainMenu
Eth2#
Print
GOOCtrl GOOSESUB
GOOCtrl
Write Delete
Alarm Clear
Wave
Monitor
Label
Accuracy
TestMode
Metering
Module
Remote
SysParam Backlit

Table 160 Full name for the menu
Sub-menu Full name Sub-sub menu Full name
OpStatus Operation status
Analog Analog
Metering Metering
Chapter 23 Hardware
196
Sub-menu Full name Sub-sub menu Full name
Energy Energy
GOO Ctrl GOOSE control
BI Binary input
Connect Connector
GOOSEINF COOSE information
GOOSESUB GOOSE subscribe
OpConfig
Operation
configuration
Switch Switch
Connect Connector
Time Time
GOO Ctrl GOOSE control
Settings Settings
Read Read
Write write
Switch Switch
Delete Delete
Report Report
Event Event
Alarm Alarm
Wave Wave
Operation Operation
Clear Clear
ComConf
Communication
configuration
Eth 1# Ethernet port 1
Eth 2# Ethernet port 2
Monitor Monitor
Serial Serial port
Label Label
Testing Testing
BO Binary output
BI Binary input
LED Test LED Test
Accuracy Accuracy
Zero Zero drift
Remote Remote
TestMode Test mode
DevSetup Device setup
Module Module
Remote Remote
SysParam System parameter
Print Print
Metering Metering
Backlit Back light
DevInfo Device
information
Version Version
OpInfo Operation information
2.5.2 Operation status
Chapter 23 Hardware
197
Sub menu Sub-sub menu Explanation
OpConfig
Analog Read the analog input of the IED
Metering Read the measurement analog input of the IED
Energy Read the energy inputs of the IED
GOO Ctrl Read the status of the GOOSE connector
BI Read the status of binary inputs
Connect Read the status of the connector
GOOSEINF Read the transmission of the report
GOOSESUB Read the information of the GOOSE
2.5.3 Operation status
OpConfig
Analog Read the analog input of the IED
Metering Read the measurement analog input of the IED
Energy Read the energy inputs of the IED
GOO Ctrl Read the status of the GOOSE connector
BI Read the status of binary inputs
Connect Read the status of the connector
GOOSEINF Read the transmission of the report
GOOSESUB Read the information of the GOOSE
2.5.4 Operation configuration
OpConfig
Switch Switching setting group
Connect Enable or disable the protection function
Time Setting the current time of the IED
GOO Ctrl Function related GOOSE ON/OFF
2.5.5 Settings
Settings
Read Read the settings
Write Set the settings
Switch Switch setting group
Delete Delete settings
2.5.6 Report
Chapter 23 Hardware
198
Report
Event Display latest 40 event records
Alarm Display latest 40 alarm records
Wave Display latest 10 recording wave
Operation Display latest 40 IED operation records
Clear
Clear all history reports saved by the IED and delete
unnecessary test records before IED operation.
2.5.7 Communication configuration
ComConf
Eth 1# Set Ethernet port 1 in CPU module.
Eth 2# Set Ethernet port 2 in CPU module.
Monitor Set parameter related BIO module
Serial Serial 1 is used for SIO in panel, serial 2 is used for 485
port in CPU module and Serial 3 is reserved for dual
485 CPU module.
Label Set IED address (hex), STA name and Bay name
2.5.8 Testing
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
Testing
BO Test the binary outputs
BI Test the binary inputs
LED Test Test the panel LED
Accuracy
Test the analog quantites precision and
linearity
Zero View the zero drift
Remote
Event Report event report to monitor and SCADA
Alarm Report alarm report to monitor and SCADA
Signal
Report the virtual SOE event to the monitor
and SCADA
Metering
Report virtual remote measurement
over-limit event to the monitor and SCADA
TestMode
The IED enters/exit test state, and it will not
send the event information to the local
monitor and remote communication under
the test state. The IED should exit the test
status after the test completed
Chapter 23 Hardware
199
2.5.9 Device setup
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
DevSetup
Module
NetConf
Hardware support is necessary, the setup
must be consistent with the hardware, and
LON/485/Ethernet are optional
Connect
The default is the soft connector mode, for
soft and hard combined mode, only the
specific protection hard contact is provided,
the other protection hard connector starts up
by default
BIO
BIO module setup depends on the practical
equipment
sql
AI module setup depends on the practical
equipment
Remote
CSC2000
Setup of CSC2000 protocol, identify the
communication requirement of this station
and practical hardware configuration
Prot103
Setup of 103 protocol, identify the
IEC61850
Setup of 61850 protocol, identify the
Signal
Setup of signal, protocol version, report
parameter and time synchronization, identify
the external condition of this station
SysParam
Modify
Setup of the related parameters for external
conditions
Default
Load the default value when upgrade CPU
program
Print Set network printer address
Metering
Zero
Adjust the compensation coefficient of the
measurement module under the zero input
status
Scale Scale adjustment
Save
Confirm and save zero setup and scale
setup
Reset
Clear the current memorized operation value
of the measurement module (power and
impulse counter)
Backlit Set the back light to keep constant on or
Chapter 23 Hardware
200
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
automatically turn off when the keyboard is
free
2.5.10 Device information
Sub menu Sub-sub
menu
Sub-sub-sub
menu
Explanation
DevInfo
Version
Display the version of protection program,
protection scheme, HMI program, and IED
firmware.
OpInfo
BIO Com
Display operation statistical data of the BIO
communication.
HMI
Display operation statistical data of the MMI
communication.

Chapter 23 Hardware
201
3 Analog input module
3.1 Introduction
The analogue input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers.
3 dedicated high accurate current transformers (optional) are used for
metering.
There are four kinds of AIM, Module A, Module B, Module C and Module D
series.
AIM A series provides up to 2 current input channels.
AIM B series provides up to 2 current input channels and 3 voltage input
channels.
AIM C series provides up to 5 current input channels.
AIM D series provides up to 6 current input channels and 4 voltage input
channels.
Chapter 23 Hardware
202
3.2 Terminals of analog input module
Terminals of Analogue Input Module A series
I01
I02
I03
I04
I05
I06
I07
I08
I09
I10
I11
I12
P
r
o
t
e
c
t
i
o
n
M
e
t
e
r
i
n
g

Figure 61 Terminals arrangement of AIM A series
Table 161 Description of terminals of AIM A series
Terminal
Analogue
Input
Remark
I01 I
1
Star point
I02 I
1

I03 Null
I04 Null
I05 Null
I06 Null
I07 Null
I08 Null
I09 Null
I10 Null
I11 I
mB

Star point,
for metering
I12 I
mB

For
metering
Terminals of Analogue Input Module B series
Chapter 23 Hardware
203
I01
I02
U03
U04
U05
U06
U07
U08
I09
I10
I11
I12
P
r
o
t
e
c
t
i
o
n
M
e
t
e
r
i
n
g

Figure 62 Terminals arrangement of AIM B series
Table 162 Description of terminals of AIM B series
Terminal
Analogue
Input
Remark
I01 I
1
Star point
I02 I
1

U03 U
C1
Star point
U04 U
C1

U05 U
C2
Star point
U06 U
C2

U07 U
C3
Star point
U08 U
C3

I09 Null
I10 Null
I11 I
mB

Star point,
for metering
I12 I
mB

For
metering
Terminals of Analogue Input Module C series
Chapter 23 Hardware
204
I01
I02
I03
I04
I05
I06
I07
I08
I09
I10
I11
I12
P
r
o
t
e
c
t
i
o
n
M
e
t
e
r
i
n
g

Figure 63 Terminals arrangement of AIM C series
Table 163 Description of terminals of AIM C series
Terminal
Analogue
Input
Remark
I01 I
1
Star point
I02 I
1

I03 I
C1
Star point
I04 I
C1

I05 I
C2
Star point
I06 I
C2

I07 I
C3
Star point
I08 I
C3

I09 Null
I10 Null
I11 I
mB

Star point,
for metering
I12 I
mB

For
metering
Terminals of Analogue Input Module D series
Chapter 23 Hardware
205
I01
I02
I03
I04
I05
I06
I07
I08
I09
I10
I11
I12
U01
U02
U03
U04
U05
U06
P
r
o
t
e
c
t
i
o
n
M
e
t
e
r
i
n
g
3
P
h

v
o
l
t
a
g
e
1
P
h

v
o
l
t
a
g
e

Figure 64 Terminals arrangement of AIM D series
Table 164 Description of terminals AIM D-1 of AIM D series
Terminal Analogue Input Remark
I01 I
A
Star point
I02 I
A

I03 I
B
Star point
I04 I
B

I05 I
C
Star point
I06 I
C

I07 I
0
Star point
I08 I
0

I09 I
mA

Star point
For
metering
Chapter 23 Hardware
206
I10
I
mA
For
metering
I11 I
mC

Star point
For
metering
I12 I
mC

For
metering
Table 165 Description of terminals AIM D-2 of AIM D series
Terminal Definition Remark
U01 U
A
Star point
U02 U
B
Star point
U03 U
C
Star point
U04 U
N

U05 U
4
Star point
U06 U
4

3.3 Technical data
Internal current transformer
Item Standard Data
Rated current Ir IEC 60255-1 1 or 5 A
Nominal current range 0.05 Ir to 30 Ir
Nominal current range of sensitive
CT
0.005 to 1 A
Power consumption (per phase) 0.1 VA at Ir = 1 A;
0.5 VA at Ir = 5 A
0.5 VA for sensitive CT
Thermal overload capability IEC 60255-1
IEC 60255-27
100 Ir for 1 s
4 Ir continuous
Thermal overload capability for
sensitive CT
IEC 60255-27
DL/T 478-2001
100 A for 1 s
3 A continuous
Internal voltage transformer
Item Standard Data
Chapter 23 Hardware
207
Rated voltage Vr (ph-ph) IEC 60255-1 100 V /110 V
Nominal range (ph-e) 0.4 V to 120 V
Power consumption at Vr = 110 V IEC 60255-27
DL/T 478-2001
0.1 VA per phase
Thermal overload capability
(phase-neutral voltage)
IEC 60255-27
DL/T 478-2001
2 Vr, for 10s
1.5 Vr, continuous

Chapter 23 Hardware
208
4 Fast binary Input & Output module
4.1 Introduction
In this module, the fast binary inputs are used to connect with the signals and
alarms. The fast binary outputs are used for the tripping outputs and initiating
outputs for protection functions, or signaling output.
4 binary inputs and 7 binary output relays are provided in this module.
4.2 Terminals of fast binary input & output module
Chapter 23 Hardware
209
01
02
03
05
06
07
08
09
10
11
12
04
13
14
15
16
17
18
19
20
DC -
Relay 7
Relay 6
Relay 5
Relay 4
Relay 3
Relay 2
Relay 1
B
i
n
a
r
y

i
n
p
u
t
s
B
i
n
a
r
y

o
u
t
p
u
t
s

Figure 65 Terminals arrangement of FIO
Table 166 Definition of terminals of FIO
Terminal Definition
Output
relay
01 Binary input 1
02 Binary input 2
03 Binary input 3
04 Binary input 4
05
Common terminal
for all binary inputs

Chapter 23 Hardware
210
above, connect with
DC negative
terminal
06 Null
07 Trip contact 1-1 Relay 1
4.3 Technical data
Binary inputs
Item Standard Data
Input voltage range IEC60255-1 110/125 V
220/250 V
Threshold1: guarantee
operation
IEC60255-1 154V, for 220/250V
77V, for 110V/125V
Threshold2: uncertain operation IEC60255-1 132V, for 220/250V ;
66V, for 110V/125V
Response time/reset time IEC60255-1 Software provides de-bounce
time
Power consumption, energized IEC60255-1 Max. 0.5 W/input, 110V
Max. 1 W/input, 220V
Binary outputs
Chapter 23 Hardware
211
Item Standard Data
Max. system voltage IEC60255-1 250V /~
Current carrying capacity IEC60255-1 5 A continuous,
30A200ms ON, 15s OFF
Making capacity IEC60255-1 1100 W( ) at inductive load with
L/R>40 ms
1000 VA(AC)
Breaking capacity IEC60255-1 220V , 0.15A, at L/R40 ms
110V , 0.30A, at L/R40 ms
Mechanical endurance, Unloaded IEC60255-1 50,000,000 cycles (3 Hz switching
frequency)
Mechanical endurance, making IEC60255-1 1000 cycles
Mechanical endurance, breaking IEC60255-1 1000 cycles
Specification state verification IEC60255-1
IEC60255-23
IEC61810-1
UL/CSATV
Contact circuit resistance
measurement
IEC60255-1
IEC60255-23
IEC61810-1
30m
Open Contact insulation test (AC
Dielectric strength)
IEC60255-1
IEC60255-27
AC1000V 1min
Maximum temperature of parts and
materials
IEC60255-1 55

Chapter 23 Hardware
212
5 Fast binary output module
5.1 Introduction
This module is used to provide fast tripping outputs and initiating outputs for
protection functions, and signaling output.
10 binary output relays with 10 contacts in 5 groups are provided in the FOM.
5.2 Terminals of fast binary output module
Relay 5
Relay 4
Relay 3
Relay 2
Relay 1
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
01
02
03
04
05
B
i
n
a
r
y

o
u
t
p
u
t
s

Figure 66 Terminals arrangement of FOM
Chapter 23 Hardware
213
Table 167 Definition of terminals of FOM
Terminal Definition Output relay
01 Trip contact 1-1-1 Relay 1

Chapter 23 Hardware
214
6 Binary input & output module
6.1 Introduction
In this module, the output contacts are used for controlling and signaling
outputs mainly. The binary inputs are used to connect with the input signals
and alarms. 7 binary inputs and 9 binary output relays have been provided in
this module.
6.2 Terminals of binary & output module
Chapter 23 Hardware
215
08
09
10
11
12
13
14
15
16
17
18
19
Relay 1
Relay 2
Relay 3
Relay 4
Relay 5
Relay 6
Relay 7
Relay 8
Relay 9
01
02
03
05
04
DC -
06
07
20
21
22
B
i
n
a
r
y

o
u
t
p
u
t
s
B
i
n
a
r
y

i
n
p
u
t
s

Figure 67 Terminals arrangement of BIOTable 168 Definition of terminals of BIO
Terminal Definition Remark
01 Contact group 1-0
Common
terminal
02 Contact group 1-1 Relay 1
Chapter 23 Hardware
216
04 Contact 2-0 Relay 3
05 Contact 2-1 Relay 3
Common
terminal
Common
terminal
Common
terminal
15 Binary input 1
16 Binary input 2
17 Binary input 3
18 Binary input 4
19 Binary input 5
20 Binary input 6
21 Binary input 7
22
Common terminal
for all binary
inputs, connect
with AUX.DC
negative terminal

Chapter 23 Hardware
217
7 CPU module
7.1 Introduction
The CPU module handles all protection functions and logic, hardware
self-supervision and performs communication and information exchange
between the protection system and external equipments such as HMI, PC,
monitor, control system, substation automation system, engineer station,
RTU and printer, etc. Additionally, the CPU module transmits remote
metering, remote signaling, SOE, event reports and record data. The module
also provides binary inputs, synchronization and communication ports.
The pulse, IRIG-B or SNTP mode can be applied for time synchronization.
According to requirement, up to 2 isolated electrical or optical Ethernet ports
(optical Ethernet ports optional) and 1 RS485 serial communication port can
be provided to meet the demands of different substation automation system
and RTU at the same time.
There are 7 binary input channels with DC24V in the CPU module.
7.2 Terminals of CPU module
Chapter 23 Hardware
218
E
t
h
e
r
n
e
t

p
o
r
t
s
C
O
M
T
i
m
e

S
y
n
c
h
r
o
B
i
n
a
r
y

i
n
p
u
t
s
01
02
03
05
06
07
08
09
10
04
11
12

Figure 68 Terminals arrangement of CPU
Table 169 Definition of terminals of CPU
Terminal Definition
01 Binary input 1
02 Binary input 2
03 Binary input 3
04 Binary input 4
05 Binary input 5
06 Binary input 6
07 Binary input 7
Chapter 23 Hardware
219
08 Common terminal for all
binary inputs above, connect
with DC -24V. terminal
09 Time synchronization
10 Time synchronization GND
11 RS485 port - 1B
12 RS485 port - 1A
Ethernet
Port A
Optional optical fiber or RJ45
port for station automation
system
Ethernet
Port B
Optional optical fiber or RJ45
port for station automation
system
7.3 Technical data
Item Data
Number 1
Connection Isolated, RS232; front panel,
9-pin subminiature connector, for software tools
Communication speed 9600 baud
Max. length of communication cable 15 m
RS485 communication port
Item Data
Number 1, only
Max. length of communication cable 1.0 km
Test voltage 500 V AC against earth
Communication speed Factory setting 9600 baud,
Min. 1200 baud, Max. 19200 baud
Chapter 23 Hardware
220
Ethernet communication port
Item Data
Electrical communication port
Number 0 to 3
Connection RJ45 connector
Max. length of communication cable 100m
For IEC 61850 protocol
Time synchronization
Item Data
Mode Pulse mode
IRIG-B signal format IRIG-B000
Voltage levels differential input

Chapter 23 Hardware
221
8 Power supply module
8.1 Introduction
The power supply module is used to provide the correct internal voltages and
full isolation between the terminal and the battery system. The module
provides 9 binary input channels as well.
8.2 Terminals of power supply module
Chapter 23 Hardware
222
01
02
03
05
06
07
08
09
10
11
12
04
13
14
15
16
17
18
19
20
DC
24V +
DC
24V -
DC+
input
DC -
Relay 1
B
i
n
a
r
y

i
n
p
u
t
s
D
C

2
4
V

o
u
t
p
u
t
A
l
a
r
m
P
o
w
e
r

i
n
p
u
t
DC-
input

Figure 69 Terminals arrangement of PSM
Table 170 Definition of terminals of PSM
Terminal Definition
Chapter 23 Hardware
223
01 Binary input 1
02 Binary input 2
03 Binary input 3
04 Binary input 4
05 Binary input 5
06 Binary input 6
07 Binary input 7
08 Binary input 8
09 Binary input 9
10
Common terminal for all
binary inputs above,
connect with AUX.DC
negative terminal
11 AUX.DC 24V+ output
12 AUX.DC 24V- output
13 Alarm contact (NC) 0
14 Alarm contact (NC) 1
15 Isolated terminal, not wired
16 AUX. power input 1, DC +
18 AUX. power input 2, DC -
20 Terminal for earthing
8.3 Technical data
Item Standard Data
Rated auxiliary voltage Uaux IEC60255-1 100 to 125V
195 to 250V
Permissible tolerance IEC60255-1 %20 Uaux
Power consumption at quiescent
state
IEC60255-1 50 W per power supply module
Power consumption at maximum
load
IEC60255-1 60 W per power supply module
Inrush Current IEC60255-1 T 5 ms/I 35 A

Chapter 23 Hardware
224
9 Technical data
9.1 Type tests
Insulation test
Item Standard Data
Over voltage category IEC60255-27 Category III
Pollution degree IEC60255-27 Degree 2
Insulation IEC60255-27 Basic insulation
Degree of protection (IP) IEC60255-27
IEC 60529
Front plate: IP40
Rear, side, top and bottom: IP 30
Power frequency high voltage
withstand test
IEC 60255-5
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
2KV, 50Hz
2.8kV
between the following circuits:
auxiliary power supply
CT / VT inputs
binary inputs
binary outputs
case earth
500V, 50Hz
between the following circuits:
Communication ports to case
earth
time synchronization terminals
to case earth
Impulse voltage test IEC60255-5
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
5kV (1.2/50s, 0.5J)
If Ui63V
1kV if Ui<63V
Tested between the following
circuits:
CT / VT inputs
binary inputs
binary outputs
case earth
Note: Ui: Rated voltage
Insulation resistance IEC60255-5 100 M at 500 V
Chapter 23 Hardware
225
IEC 60255-27
EN 60255-5
ANSI C37.90
GB/T 15145-2001
DL/T 478-2001
Protective bonding resistance IEC60255-27 0.1
Fire withstand/flammability IEC60255-27 Class V2
Electromagnetic compatibility tests
Item Standard Data
1 MHz burst immunity test IEC60255-22-1
IEC60255-26
IEC61000-4-18
EN 60255-22-1
ANSI/IEEE C37.90.1
Class III
2.5 kV CM ; 1 kV DM
Tested on the following circuits:
CT / VT inputs
binary inputs
binary outputs
1 kV CM ; 0 kV DM
communication ports
Electrostatic discharge IEC 60255-22-2
IEC 61000-4-2
EN 60255-22-2
Level 4
8 kV contact discharge;
15 kV air gap discharge;
both polarities; 150 pF; Ri = 330
Radiated electromagnetic field
disturbance test
IEC 60255-22-3
EN 60255-22-3
Frequency sweep:
80 MHz 1 GHz; 1.4 GHz 2.7 GHz
spot frequencies:
80 MHz; 160 MHz; 380 MHz; 450
MHz; 900 MHz; 1850 MHz; 2150
MHz
10 V/m
AM, 80%, 1 kHz
Radiated electromagnetic field
disturbance test
IEC 60255-22-3
EN 60255-22-3
Pulse-modulated
10 V/m, 900 MHz; repetition rate
200 Hz, on duration 50 %
Electric fast transient/burst immunity
test
IEC 60255-22-4,
IEC 61000-4-4
EN 60255-22-4
Class A, 4KV
Chapter 23 Hardware
226
ANSI/IEEE C37.90.1 CT / VT inputs
binary inputs
binary outputs
Class A, 1KV
communication ports
Surge immunity test IEC 60255-22-5
IEC 61000-4-5
4.0kV L-E
2.0kV L-L
CT / VT inputs
binary inputs
binary outputs
500V L-E
communication ports
Conduct immunity test IEC 60255-22-6
IEC 61000-4-6
Frequency sweep: 150 kHz 80
MHz
spot frequencies: 27 MHz and 68
MHz
10 V
AM, 80%, 1 kHz
Power frequency immunity test IEC60255-22-7 Class A
300 V CM
150 V DM
Power frequency magnetic field test IEC 61000-4-8 Level 4
30 A/m cont. / 300 A/m 1 s to 3 s
100 kHz burst immunity test IEC61000-4-18 2.5 kV CM ; 1 kV DM
CT / VT inputs
binary inputs
binary outputs
1 kV CM ; 0 kV DM
communication ports
Mechanical tests
Chapter 23 Hardware
227
Item Standard Data
Sinusoidal Vibration response
test
IEC60255-21-1
EN 60255-21-1
Class 1
10 Hz to 60 Hz: 0.075 mm
60 Hz to 150 Hz: 1 g
1 sweep cycle in each axis
Relay energized
Sinusoidal Vibration endurance
test
IEC60255-21-1
EN 60255-21-1
Class 1
10 Hz to 150 Hz: 1 g
20 sweep cycle in each axis
Relay non-energized
Shock response test IEC60255-21-2
EN 60255-21-2
Class 1
5 g, 11 ms duration
3 shocks in both directions of 3 axes
Relay energized
Shock withstand test IEC60255-21-2
EN 60255-21-2
Class 1
15 g, 11 ms duration
3 shocks in both directions of 3 axes
Relay non-energized
Bump test IEC60255-21-2 Class 1
10 g, 16 ms duration
1000 shocks in both directions of 3
axes
Relay non-energized
Seismic test IEC60255-21-3 Class 1
X-axis 1 Hz to 8/9 Hz: 7.5 mm
X-axis 8/9 Hz to 35 Hz :2 g
Y-axis 1 Hz to 8/9 Hz: 3.75 mm
Y-axis 8/9 Hz to 35 Hz :1 g
1 sweep cycle in each axis,
Relay energized
Environmental tests
Item Data
Recommended permanent operating temperature -10 C to +55C
(Legibility of display may be impaired above
+55 C /+131 F)
Storage and transport temperature limit -25C to +70C
Chapter 23 Hardware
228
Permissible humidity 95 % of relative humidity
9.2 IED design
Item Data
Case size 4U1/2 19inch
Weight 5kg
9.3 CE certificate
Item Data
EMC Directive
EN 61000-6-2 and EN61000-6-4 (EMC Council
Directive 2004/108/EC)
Low voltage directive EN 60255-27 (Low-voltage directive 2006/95 EC).

Chapter 24 Appendix
229
Chapter 24 Appendix

About this chapter
This chapter describes the appendix.

Chapter 24 Appendix
230
1 General setting list
1.1 Setting list for CSC-211 M01
Table 171 Logical linker
Description Function
Func_OC1 Disable or enable the over current stage 1
Func_OC2
Disable or enable the over current stage 2
Func_OC Inv Disable or enable the over current inverse stage
Func_EF1 Disable or enable the earth fault stage 1
Func_EF2
Disable or enable the earth fault stage 2
Func_EF Inv Disable or enable the earth fault inverse stage
Func_SEF1 Disable or enable the sensitive earth fault stage 1
Func_SEF2
Disable or enable the sensitive earth fault stage 2
Func_SEF Inv Disable or enable the sensitive earth fault inverse stage
Func_NSOC1 Disable or enable the negative sequence over current stage 1
Func_NSOC2
Disable or enable the negative sequence over current stage 2
Func_NSOC Inv Disable or enable the negative sequence over current inverse stage
Func_3V01 Disable or enable the voltage displacement stage 1
Func_CBF Disable or enable the circuit breaker function
Func_ThermOL Disable or enable the thermal overload protection
Func_UV1 Disable or enable the under voltage stage 1
Func_OV1 Disable or enable the over voltage stage 1
Func_LF LS Disable or enable the low frequency load shedding function
Func_LV LS Disable or enable the low voltage load shedding function
Func_OL LS Disable or enable the overload load shedding function
Func_AR Disable or enable the auto-reclosing function
Func_MC Disable or enable the manual close function
Func_DZ Disable or enable the dead zone function
Chapter 24 Appendix
231
Table 172 Setting list
NO. Description Scope Unit Note
Ctr Word 1 0000~FFFF
AR INITIATION 0000~FFFF
BO1 Ctr Word 0000~FFFF
I_OC1 (0.05~20.00)In A In=1A or 5A
T_OC1 0.00~60.00 S
I_OC2 (0.05~20.00)In A
T_OC2 0.00~60.00 S
U_OC_UnBlk 1.00~120.0 V Phase to phase
I_OC Inv (0.05~20.00)In A
AK_OC Inv 0.001~1000 S
P_OC Inv 0.01~10.00
BK_OC Inv 0.000~60.00 S
Angle_OC 0.00~90.00 degree
3I0_EF1 (0.05~20.00)In A
T_EF1 0.00~60.00 S
3I0_EF2 (0.05~20.00)In A
T_EF2 0.00~60.00 S
3I0_EF Inv (0.05~20.00)In A
AK_EF Inv 0.001~1000 S
P_EF Inv 0.01~10.00
BK_EF Inv 0.000~60.00 S
Angle_EF 0.00~90.00 degree
Angle_Neg 0.00~90.00 degree
I_2H_UnBlk (0.25~20.00)In A
3I0_2H_UnBlk (0.25~20.00)In A
Ratio I2/I1 0.07~0.50
Ratio I02/I01 0.07~0.50
T2h_Cross_Blk 0.00~60.00 S
I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
T_SEF1 0.00~60.00 S
I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
Chapter 24 Appendix
232
T_SEF2 0.00~60.00 S
I_SEF Inv 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
AK_SEF Inv 0.001~1000 S
P_SEF Inv 0.01~10.00
BK_SEF Inv 0.000~60.00 S
Angle_SEF 0.00~90.00 degree
IsCOS_SEF 0.005~1.00 A
3I2_NSOC1 (0.05~20.00)In A
T_NSOC1 0.00~60.00 S
3I2_NSOC2 (0.05~20.00)In A
T_NSOC2 0.00~60.00 S
3I2_NSOC Inv (0.05~20.00)In A
AK_NSOC Inv 0.001~1000 S
P_NSOC Inv 0.01~10.00
BK_NSOC Inv 0.000~60.00 S
U_3V01 2.00~100.0 V
T_3V01 0.00~60.00 S
U_3V02 2.00~100.0 V
T_3V02 0.00~60.00 S
U_Phase low 10.00~100.0 V
U_Phase up 10.00~100.0 V
U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
T_UV1 0.00~120.0 S
U_UV2 5.00~75.0(PE)
10.00~150.0(PP)
V
T_UV2 0.00~120.0 S
Dropout_UV 1.01~2.00
U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
T_OV1 0.00~60.00 S
U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
T_OV2 0.00~60.00 S
Dropout_OV 0.90~0.99
I_Therm OL 0.10~10.00 A
T_Const Therm 6.0~9999 S
Ratio_Cool 0.100~10.00
Ratio_Alarm 0.500~1.000
F_LF LS 45.00~60.00 HZ
T_LF LS 0.05~60.00 S
Chapter 24 Appendix
233
U_LV LS 50.00~110.0 V
T_LV LS 0.10~60.00 S
I_OL LS 0.05~20.00 A
T_OL LS 0.10~60.00 S
dF/dt_LS 1.00~10.00 HZ/S
dU/dt_LS 1.00~100.0 V/S
T_3P AR1 0.05~60.00 S
T_3P AR2 0.05~60.00 S
T_3P AR3 0.05~60.00 S
T_3P AR4 0.05~60.00 S
Times_AR 1.00~4.00
T_Reclaim 0.05~60.00 S
T_AR Reset 0.05~60.00 S
T_Max. CB Open 0.05~60.00 S
T_Syn Chk 0.05~60.00 S
T_MaxSynExt 0.05~60.00 S
T_MaxSynReq 0.05~60.00 S
Phase_UL 1.00~6.00
Angle_Syn Diff 1.00~80.00 Degree
U_Syn Diff 1.00~40.00 V
Freq_Syn Diff 0.02~2.00 HZ
Umin_Syn 60.00~130.0 V
Umax_Energ 20.00~100.0 V
I_CBF (0.05~20.00)In A
3I0_CBF (0.05~20.00)In A
3I2_CBF (0.05~20.00)In A
T_CBF1 0.00~60.00 S
T_CBF2 0.10~60.00 S
T_Dead Zone 0.00~60.00 S
U_Chk 10.00~120.0 V
I_Chk (0.00~2.00)In A
3I02_ VT Fail (0.05~0.25)In A
Upe_VT Fail 7.00~20.0 V
Upp_VT Fail 10.00~30.0 V
Upe_VT Normal 40.00~65.00 V
I_VT Fail (0.05~0.25)In A
3I0_CT Fail (0.05~2.00)In A
T_CB POS 0.10~60.00 S
T_DS POS 0.10~60.00 S
T_ES POS 0.10~60.00 S
T_CB Faulty 0.10~60.00 S
Ratio_Mea CT 0.001~7.00
Chapter 24 Appendix
234
Ratio_VT 0.01~2.00
Table 173 Definition of control word Ctr Word 1
Bit 0 1
0 OC1 Dir Off OC1 Dir On
1 OC1 V_Blk Off C1_V Blk On
2 OC1 2H_Blk Off C1 2H_Blk On
4 OC2 V_Blk Off C2 V_Blk On
6 OC Inv Dir Off OC Inv Dir On
7 OCInv 2H_Blk Off OCInv 2H_Blk On
8 EF1 Dir Off EF1 Dir On
9 EF1 2H_Blk Off EF1 2H_Blk On
12 EF Inv Dir Off EF Inv Dir On
13 EFInv 2H_Blk Off EFInv 2H_Blk On
14 EF Chk I2/I1 EF Chk I02/I01
15 EF U2/I2 Dir Off EF U2/I2 Dir On
Bit 0 1
0 SOTF Off SOTF On
1 SEF1 Dir Off SEF1 Dir On
3 SEF Inv Dir Off SEF Inv Dir On
4 SEF Chk Iscos SEF Chk U0/I0
5 Therm Alarm Off Therm Alarm On
6 Hot Curve Cold Curve
7 3I0 Measured 3I0 Calculated
8 3U0 Measured 3U0 Calculated
9 3Ph V Connect 1Ph V Connect
10 Isolate/Resist Solid earthed
11 Blk EF_CT Fail UnBlk EF_CT Fail
12 Not used Not used
13 CT Fail Off CT Fail On
14 UnBlk Fun_VTFail Blk Fun_VTFail
15 VT Fail Off VT Fail On
Chapter 24 Appendix
235
Bit 0 1
0 UV Chk CB Off UV Chk CB On
1 UV Chk All Phase UV Chk One Phase
2 UV PP UV PE
3 OV PP OV PE
4 dF(dU)/dt Off dF(dU)/dt On
5 OL LS Chk V Off OL LS Chk V On
6 CBF Chk I0/2 Off CBF Chk I0/2 On
7 CBF Chk CB Off CBF Chk CB On
8 Selection of AR check mode
9
10
11 Selection of MC check mode
12
13
14 Interlock Off Interlock On
15 NR SetGrp Switch BI SetGrp Switch
Table 176 Selection of AR check mode
Bit10 Bit9 Bit8 Mode
0 0 0 AR_Override
0 0 1 AR_Syn check
0 1 0 AR_EnergChkDLLB
0 1 1 AR_EnergChkLLDB
1 0 0 AR_EnergChkDLDB
1 0 1 Not used
1 1 0 Not used
1 1 1 Not used
Table 177 Selection of MC check mode
0 0 0 MC_Override
0 0 1 MC _Syn check
0 1 0 MC _EnergChkDLLB
0 1 1 MC _EnergChkLLDB
1 0 0 MC _EnergChkDLDB
1 0 1 Not used
1 1 0 Not used
Chapter 24 Appendix
236
1 1 1 Not used
Bit 0 1
0 OC1 Alarm OC1 Trip
1 OC Inv Alarm OC Inv Trip
2 EF1 Alarm EF1 Trip
3 EF Inv Alarm EF Inv Trip
4 SEF1 Alarm SEF1 Trip
6 SEF Inv Alarm SEF Inv Trip
7 NSOC1 Alarm NSOC1 Trip
8 NSOC Inv Alarm NSOC Inv Trip
9 3V01 Alarm 3V01 Trip
11 UV1 Alarm UV1 Trip
12 OV1 Alarm OV1 Trip
13 CB Faulty Off CB Faulty On
14 DS Faulty Off DS Faulty On
15 ES Faulty Off ES Faulty On
Table 179 Definition of control word AR INITIATION
Bit 0 1
0 OC1 Init AR Off
1 OC2 Init AR Off
2 OC Inv Init AR Off
3 EF1 Init AR Off
4 EF2 Init AR Off
5 EF Inv Init AR Off
6 SEF1 Init AR Off
7 SEF2 Init AR Off
8 SEF Inv Init AR Off
9 NSOC1 Init AR Off
10 NSOC2 Init AR Off
11 NSOC Inv Init AR
12~14 Not used Not used
15 3P Fault Init AR 3P Fault Blk AR
Table 180 Definition of control word BO1 Ctr Word
Chapter 24 Appendix
237
Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
6 Off 3V0 Trip
7 Off NSOC1&2 Trip
8 Off NSOC Inv Trip
9 Off Therm OL Trip
10 Off Load SHED
11 Off OV1 Trip
12 Off OV2 Trip
13 Off UV1 Trip
14 Off UV2 Trip
Note: BO2 Ctr Word, BO3 Ctr Word, BO6 Ctr Word , BO7 Ctr Word are
defined the same as BO1 Ctr Word. Different outputs can be distributed to
different protections. Once a protection is designated to drive BO1, it will
initiate CBF function.

Table7-2 Soft connector
Func_OC2
Func_EF2
Func_SEF1 Disable or enable the sentitive earth fault stage 1
Func_SEF2
Disable or enable the sentitive earth fault stage 2
Func_SEF Inv Disable or enable the sentitive earth fault inverse stage
Func_NSOC1 Disable or enable the negative sequence over current stage 1
Chapter 24 Appendix
238
Func_NSOC2
Disable or enable the negative sequence over current stage 2
Func_NSOC Inv Disable or enable the negative sequence over current inverse stage
Func_ThermOL Disable or enable the thermal overload protection
Func_MC Disable or enable the manual close funciton
Func_DZ Disable or enable the dead zone funciton
Table7-3 Setting list
1 Ctr Word 1 0000~FFFF
5 BO1 Ctr Word 0000~FFFF
11 I_OC1 (0.05~20.00)In A In=1A or 5A
12 T_OC1 0.00~60.00 S
13 I_OC2 (0.05~20.00)In A
14 T_OC2 0.00~60.00 S
15 U_OC_UnBlk 1.00~120.0 V Phase to phase
16 Curve_OC Inv 1~12 Refer to table 7.3.4
17 I_OC Inv (0.05~20.00)In A
18 K_OC Inv 0.05~999.0
19 A_OC Inv 0.005~200.0 S
20 B_OC Inv 0.000~60.00 S
21 P_OC Inv 0.005~10.00
22 Angle_OC 0.00~90.00 degree
23 3I0_EF1 (0.05~20.00)In A
Chapter 24 Appendix
239
24 T_EF1 0.00~60.00 S
25 3I0_EF2 (0.05~20.00)In A
26 T_EF2 0.00~60.00 S
27 Curve_EF Inv 1~12 Refer to table 7.3.4
28 3I0_EF Inv (0.05~20.00)In A
29 K_EF Inv 0.05~999.0
30 A_EF Inv 0.005~200.0 S
31 B_EF Inv 0.000~60.00 S
32 P_EF Inv 0.005~10.00
33 Angle_EF 0.00~90.00 degree
34 Angle_Neg 0.00~90.00 degree
35 I_2H_UnBlk (0.25~20.00)In A
36 3I0_2H_UnBlk (0.25~20.00)In A
37 Ratio I2/I1 0.07~0.50
38 Ratio I02/I01 0.07~0.50
39 T2h_Cross_Blk 0.00~60.00 S
40 I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
41 T_SEF1 0.00~60.00 S
42 I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
43 T_SEF2 0.00~60.00 S
44 Curve_SEF Inv 1~12 Refer to table 7.3.4
45 I_SEF Inv 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
46 K_SEF Inv 0.05~999.0
47 A_SEF Inv 0.005~200.0 S
48 B_SEF Inv 0.000~60.00 S
49 P_SEF Inv 0.005~10.00
50 Angle_SEF 0.00~90.00 degree
51 IsCOS_SEF 0.005~1.00 A
52 U_3V0_SEF 2.00~100.0 V
53 3I2_NSOC1 (0.05~20.00)In A
54 T_NSOC1 0.00~60.00 S
55 3I2_NSOC2 (0.05~20.00)In A
56 T_NSOC2 0.00~60.00 S
57 Curve_NSOC Inv 1~12 Refer to table 7.3.4
58 3I2_NSOC Inv (0.05~20.00)In A
59 K_NSOC Inv 0.05~999.0
60 A_ NSOC Inv 0.005~200.0 S
61 B_ NSOC Inv 0.000~60.00 S
62 P_ NSOC Inv 0.005~10.00
63 U_3V01 2.00~100.0 V
Chapter 24 Appendix
240
64 T_3V01 0.00~60.00 S
65 U_3V02 2.00~100.0 V
66 T_3V02 0.00~60.00 S
67 U_Phase low 10.00~100.0 V
68 U_Phase up 10.00~100.0 V
69 U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
70 T_UV1 0.00~120.0 S
71 U_UV2 5.00~75.0(PE)
10.00~150.0(PP)
V
72 T_UV2 0.00~120.0 S
73 Dropout_UV 1.01~2.00
74 U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
75 T_OV1 0.00~60.00 S
76 U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
77 T_OV2 0.00~60.00 S
78 Dropout_OV 0.90~0.99
79 I_Therm OL 0.10~10.00 A
80 T_Const Therm 6.0~9999 S
81 Ratio_Cool 0.100~10.00
82 Ratio_Alarm 0.500~1.000
83 T_AR Reset 0.05~60.00 S
84 T_Syn Chk 0.05~60.00 S
85 T_MaxSynExt 0.05~60.00 S
86 T_MaxSynReq 0.05~60.00 S
87 Phase_UL 1.00~6.00
88 Angle_Syn Diff 1.00~80.00 Degree
89 U_Syn Diff 1.00~40.00 V
90 Freq_Syn Diff 0.02~2.00 HZ
91 Umin_Syn 30.00~65.0(PE)
60~130.0(PP)
V
92 Umax_Energ 10~50(PE)
20.00~100.0(PP)
V
93 I_CBF (0.05~20.00)In A
94 3I0_CBF (0.05~20.00)In A
95 3I2_CBF (0.05~20.00)In A
96 T_CBF1 0.00~60.00 S
97 T_CBF2 0.10~60.00 S
98 T_Dead Zone 0.00~60.00 S
99 U_Chk 10.00~120.0 V
100 I_Chk (0.00~2.00)In A
Chapter 24 Appendix
241
101 3I02_ VT Fail (0.05~0.25)In A
102 Upe_VT Fail 7.00~20.0 V
103 Upp_VT Fail 10.00~30.0 V
104 Upe_VT Normal 40.00~65.00 V
105 I_VT Fail (0.05~0.25)In A
106 3I0_CT Fail (0.05~2.00)In A
107 T_CB POS 0.10~60.00 S
108 T_DS POS 0.10~60.00 S
109 T_ES POS 0.10~60.00 S
110 T_CB Faulty 0.10~60.00 S
111 Ratio_Mea CT 0.001~7.00
112 Ratio_VT 0.01~2.00

Table7-4 Definition of control word Ctr Word 1
Bit 0 1


Bit 0 1
0 SOTF Off SOTF On
5 Therm Alarm Off Therm Alarm On
Chapter 24 Appendix
242
Bit 0 1
6 Hot Curve Cold Curve

Bit 0 1
2 UV PP UV PE
3 OV PP OV PE
4 Not used Not used
5 Not used Not used
8 Not used Not used
9 Not used Not used
11
Selection of MC check mode 12
13

Table7-10 Selection of MC check mode
0 0 0 MC_Override
0 0 1 MC _Syn check
1 0 1 Not used
1 1 0 Not used
Chapter 24 Appendix
243
1 1 1 Not used

Bit 0 1
7 NSOC1 Alarm NSOC1 Trip
8 NSOC Inv Alarm NSOC Inv Trip

Table7-14 Definition of control word BO1 Ctr Word
Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
6 Off 3V0 Trip
7 Off NSOC1&2 Trip
8 Off NSOC Inv Trip
9 Off Therm OL Trip
11 Off OV1 Trip
12 Off OV2 Trip
13 Off UV1 Trip
14 Off UV2 Trip

Note: BO2 Ctr Word, BO3 Ctr Word, BO6 Ctr Word , BO7 Ctr Word are defined the same as
Chapter 24 Appendix
244
BO1 Ctr Word. Different outputs can be distributed to different protections. Once a protection is
designated to drive BO1, it will initiate CBF function.

Func_OC2
Func_EF2
Func_SEF2
Func_OL LS Disable or enable the over load load shedding function
Func_AR Disable or enable the auto reclosure funciton
Func_MC Disable or enable the manual close funciton
Chapter 24 Appendix
245
5 AR INITIATION 0000~FFFF
11 I_OC1 (0.05~20.00)In A In=1A or 5A
12 T_OC1 0.00~60.00 S
13 I_OC2 (0.05~20.00)In A
14 T_OC2 0.00~60.00 S
17 I_OC Inv (0.05~20.00)In A
18 K_OC Inv 0.05~999.0
19 A_OC Inv 0.005~200.0 S
20 B_OC Inv 0.000~60.00 S
21 P_OC Inv 0.005~10.00
23 3I0_EF1 (0.05~20.00)In A
24 T_EF1 0.00~60.00 S
25 3I0_EF2 (0.05~20.00)In A
26 T_EF2 0.00~60.00 S
28 3I0_EF Inv (0.05~20.00)In A
29 K_EF Inv 0.05~999.0
30 A_EF Inv 0.005~200.0 S
31 B_EF Inv 0.000~60.00 S
32 P_EF Inv 0.005~10.00
35 I_2H_UnBlk (0.25~20.00)In A
36 3I0_2H_UnBlk (0.25~20.00)In A
37 Ratio I2/I1 0.07~0.50
38 Ratio I02/I01 0.07~0.50
39 T2h_Cross_Blk 0.00~60.00 S
40 I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
41 T_SEF1 0.00~60.00 S
42 I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
43 T_SEF2 0.00~60.00 S
45 I_SEF Inv 0.005~1.00(SEF) A
Chapter 24 Appendix
246
(0.05~20.00)In(Normal)
46 K_SEF Inv 0.05~999.0
47 A_SEF Inv 0.005~200.0 S
48 B_SEF Inv 0.000~60.00 S
49 P_SEF Inv 0.005~10.00
51 IsCOS_SEF 0.005~1.00 A
52 U_3V0_SEF 2.00~100.0 V
53 U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
54 T_UV1 0.00~120.0 S
55 U_UV2 5.00~75.0(PE)
10.00~150.0(PP)
V
56 T_UV2 0.00~120.0 S
57 Dropout_UV 1.01~2.00
58 U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
59 T_OV1 0.00~60.00 S
60 U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
61 T_OV2 0.00~60.00 S
62 Dropout_OV 0.90~0.99
63 F_LF LS 45.00~60.00 HZ
64 T_LF LS 0.05~60.00 S
65 U_LV LS 50.00~110.0 V
66 T_LV LS 0.10~60.00 S
67 I_OL LS 0.05~20.00 A
68 T_OL LS 0.10~60.00 S
69 dF/dt_LS 1.00~10.00 HZ/S
70 dU/dt_LS 1.00~100.0 V/S
71 T_3P AR1 0.05~60.00 S
72 T_3P AR2 0.05~60.00 S
73 T_3P AR3 0.05~60.00 S
74 T_3P AR4 0.05~60.00 S
75 Times_AR 1.00~4.00
76 T_Reclaim 0.05~60.00 S
77 T_AR Reset 0.05~60.00 S
78 T_Max. CB Open 0.05~60.00 S
79 T_Syn Chk 0.05~60.00 S
80 T_MaxSynExt 0.05~60.00 S
81 T_MaxSynReq 0.05~60.00 S
82 Phase_UL 1.00~6.00
83 Angle_Syn Diff 1.00~80.00 Degree
Chapter 24 Appendix
247
84 U_Syn Diff 1.00~40.00 V
85 Freq_Syn Diff 0.02~2.00 HZ
86 Umin_Syn 30.00~65.0(PE)
60~130.0(PP)
V
87 Umax_Energ 10~50(PE)
20.00~100.0(PP)
V
88 I_CBF (0.05~20.00)In A
89 3I0_CBF (0.05~20.00)In A
90 3I2_CBF (0.05~20.00)In A
91 T_CBF1 0.00~60.00 S
92 T_CBF2 0.10~60.00 S
93 T_Dead Zone 0.00~60.00 S
94 U_Chk 10.00~120.0 V
95 I_Chk (0.00~2.00)In A
96 3I02_ VT Fail (0.05~0.25)In A
97 Upe_VT Fail 7.00~20.0 V
98 Upp_VT Fail 10.00~30.0 V
99 Upe_VT Normal 40.00~65.00 V
100 I_VT Fail (0.05~0.25)In A
101 3I0_CT Fail (0.05~2.00)In A
102 T_CB POS 0.10~60.00 S
103 T_DS POS 0.10~60.00 S
104 T_ES POS 0.10~60.00 S
105 T_CB Faulty 0.10~60.00 S
106 Ratio_Mea CT 0.001~7.00
107 Ratio_VT 0.01~2.00

Bit 0 1
Chapter 24 Appendix
248


Bit 0 1
0 SOTF Off SOTF On
5 Not used Not used
6 Not used Not used

Bit 0 1
2 UV PP UV PE
3 OV PP OV PE
8 Selection of AR check mode
9
10
11 Selection of MC check mode
12
13
Chapter 24 Appendix
249

Table7-6 Selection of AR check mode
0 0 0 AR_Override
0 0 1 AR_Syn check
0 1 0 AR_EnergChkDLLB
0 1 1 AR_EnergChkLLDB
1 0 0 AR_EnergChkDLDB
1 0 1 Not used
1 1 0 Not used
1 1 1 Not used

Table7-10 Selection of MC check mode
0 0 0 MC_Override
0 0 1 MC _Syn check
1 0 1 Not used
1 1 0 Not used
1 1 1 Not used

Bit 0 1
7 Not used Not used
8 Not used Not used
9 Not used Not used
Chapter 24 Appendix
250

Table7-13 Definition of control word AR INITIATION
Bit 0 1
0 OC1 Init AR Off
1 OC2 Init AR Off
3 EF1 Init AR Off
4 EF2 Init AR Off
6 SEF1 Init AR Off
7 SEF2 Init AR Off
9 Not used Not used

Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
10 Off Load SHED
11 Off OV1 Trip
12 Off OV2 Trip
13 Off UV1 Trip
14 Off UV2 Trip
Chapter 24 Appendix
251
Func_OC2
Func_EF2
Func_SEF2
Func_OL LS Disable or enable the over load load shedding function
Func_AR Disable or enable the auto reclosure funciton

112 AR INITIATION 0000~FFFF
121 I_OC1 (0.05~20.00)In A In=1A or 5A
122 T_OC1 0.00~60.00 S
123 I_OC2 (0.05~20.00)In A
124 T_OC2 0.00~60.00 S
126 I_OC Inv (0.05~20.00)In A
127 K_OC Inv 0.05~999.0
Chapter 24 Appendix
252
128 A_OC Inv 0.005~200.0 S
129 B_OC Inv 0.000~60.00 S
130 P_OC Inv 0.005~10.00
131 3I0_EF1 (0.05~20.00)In A
132 T_EF1 0.00~60.00 S
133 3I0_EF2 (0.05~20.00)In A
134 T_EF2 0.00~60.00 S
136 3I0_EF Inv (0.05~20.00)In A
137 K_EF Inv 0.05~999.0
138 A_EF Inv 0.005~200.0 S
139 B_EF Inv 0.000~60.00 S
140 P_EF Inv 0.005~10.00
141 I_2H_UnBlk (0.25~20.00)In A
142 3I0_2H_UnBlk (0.25~20.00)In A
143 Ratio I2/I1 0.07~0.50
144 Ratio I02/I01 0.07~0.50
145 T2h_Cross_Blk 0.00~60.00 S
146 I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
147 T_SEF1 0.00~60.00 S
148 I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
149 T_SEF2 0.00~60.00 S
151 I_SEF Inv 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
152 K_SEF Inv 0.05~999.0
153 A_SEF Inv 0.005~200.0 S
154 B_SEF Inv 0.000~60.00 S
155 P_SEF Inv 0.005~10.00
156 F_LF LS 45.00~60.00 HZ
157 T_LF LS 0.05~60.00 S
158 U_LV LS 50.00~110.0 V
159 T_LV LS 0.10~60.00 S
160 I_OL LS 0.05~20.00 A
161 T_OL LS 0.10~60.00 S
162 dF/dt_LS 1.00~10.00 HZ/S
163 dU/dt_LS 1.00~100.0 V/S
164 T_3P AR1 0.05~60.00 S
165 T_3P AR2 0.05~60.00 S
166 T_3P AR3 0.05~60.00 S
167 T_3P AR4 0.05~60.00 S
Chapter 24 Appendix
253
168 Times_AR 1.00~4.00
169 T_Reclaim 0.05~60.00 S
170 T_AR Reset 0.05~60.00 S
171 T_Max. CB Open 0.05~60.00 S
172 U_Chk 10.00~120.0 V
173 I_Chk (0.00~2.00)In A
174 3I02_ VT Fail (0.05~0.25)In A
175 Upe_VT Fail 7.00~20.0 V
176 Upp_VT Fail 10.00~30.0 V
177 Upe_VT Normal 40.00~65.00 V
178 I_VT Fail (0.05~0.25)In A
179 3I0_CT Fail (0.05~2.00)In A
180 T_CB POS 0.10~60.00 S
181 T_DS POS 0.10~60.00 S
182 T_ES POS 0.10~60.00 S
183 T_CB Faulty 0.10~60.00 S
184 Ratio_Mea CT 0.001~7.00
185 Ratio_VT 0.01~2.00

Bit 0 1


Bit 0 1
0 SOTF Off SOTF On
1 Not used Not used
2 Not used Not used
3 Not used Not used
4 Not used Not used
5 Not used Not used
6 Not used Not used
8 Not used Not used
Chapter 24 Appendix
254
Bit 0 1

Bit 0 1
0 Not used Not used
1 Not used Not used
2 Not used Not used
3 Not used Not used
6 Not used Not used
7 Not used Not used

Bit 0 1
7 Not used Not used
8 Not used Not used
9 Not used Not used

Chapter 24 Appendix
255
Table7-13 Definition of control word AR INITIATION
Bit 0 1
0 OC1 Init AR Off
1 OC2 Init AR Off
3 EF1 Init AR Off
4 EF2 Init AR Off
6 SEF1 Init AR Off
7 SEF2 Init AR Off
9 Not used Not used

Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
6 Not used Not used
10 Off Load SHED
Note: BO2 Ctr Word, BO3 Ctr Word, BO4 Ctr Word, BO5 Ctr Word, BO6 Ctr Word , BO7 Ctr
Word ,BO8 Ctr Wordare defined the same as BO1 Ctr Word. Different outputs can be distributed
to different protections. Once a protection is designated to drive BO1, it will initiate CBF function.

Table 181 logical linker
Chapter 24 Appendix
256
Func_OC2
Func_EF2
Func_SEF2
BO8 Ctr Word 0000~FFFF A
BO9 Ctr Word 0000~FFFF S
I_OC1 (0.05~20.00)In A In=1A or 5A
T_OC1 0.00~60.00 S
I_OC2 (0.05~20.00)In A
T_OC2 0.00~60.00 S
I_OC Inv (0.05~20.00)In A
AK_OC Inv 0.001~1000 S
P_OC Inv 0.01~10.00
BK_OC Inv 0.000~60.00 S
3I0_EF1 (0.05~20.00)In A
T_EF1 0.00~60.00 S
3I0_EF2 (0.05~20.00)In A
T_EF2 0.00~60.00 S
3I0_EF Inv (0.05~20.00)In A
AK_EF Inv 0.001~1000 S
P_EF Inv 0.01~10.00
BK_EF Inv 0.000~60.00 S
I_2H_UnBlk (0.25~20.00)In A
3I0_2H_UnBlk (0.25~20.00)In A
Chapter 24 Appendix
257
Ratio I2/I1 0.07~0.50
Ratio I02/I01 0.07~0.50
I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
T_SEF1 0.00~60.00 S
I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
T_SEF2 0.00~60.00 S
(0.05~20.00)In(Normal)
A
AK_SEF Inv 0.001~1000 S
P_SEF Inv 0.01~10.00
BK_SEF Inv 0.000~60.00 S
3I0_CT Fail (0.05~2.00)In A
T_CB POS 0.10~60.00 S
T_DS POS 0.10~60.00 S
T_ES POS 0.10~60.00 S
Ratio_VT 0.01~2.00
Bit 0 1
6 Not used Not used
8 Not used Not used
Chapter 24 Appendix
258
Bit 0 1
0 SOTF Off SOTF On
Bit 0 1
Bit 0 1
Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
Chapter 24 Appendix
259
Note: BO7 Ctr Word, BO8 Ctr Word, BO9 Ctr Word are defined the same
as BO6 Ctr Word. Different outputs can be distributed to different
protections. Once a protection is designated to drive BO1, it will initiate CBF
function.
1.6 Setting list for CSC-211 V01
11 BO8Ctr Word 0000~FFFF
13 U_3V01 2.00~100.0 V
14 T_3V01 0.00~60.00 S
15 U_3V02 2.00~100.0 V
16 T_3V02 0.00~60.00 S
17 U_Phase low 10.00~100.0 V
18 U_Phase up 10.00~100.0 V
19 U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
20 T_UV1 0.00~120.0 S
21 U_UV2 5.00~75.0(PE) V
Chapter 24 Appendix
260
10.00~150.0(PP)
22 T_UV2 0.00~120.0 S
23 Dropout_UV 1.01~2.00
24 U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
25 T_OV1 0.00~60.00 S
26 U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
27 T_OV2 0.00~60.00 S
28 Dropout_OV 0.90~0.99
29 Upe_VT Fail 7.00~20.0 V
30 Upp_VT Fail 10.00~30.0 V
32 Ratio_VT 0.01~2.00


Bit 0 1
0 Not used Not used
1 Not used Not used
2 Not used Not used
3 Not used Not used
4 Not used Not used
5 Not used Not used
6 Not used Not used
7 Not used Not used
11 VT Chk CB Off VT Chk CB On

Bit 0 1
2 UV PP UV PE
3 OV PP OV PE
Chapter 24 Appendix
261
4 Not used Not used
5 Not used Not used
6 Not used Not used
7 Not used Not used
8
Not used

9
10
11
Not used 12
13

Bit 0 1
7 Not used Not used
8 Not used Not used

Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
Chapter 24 Appendix
262
5 Off SEF Inv Trip
6 Off 3V0 Trip
11 Off OV1 Trip
12 Off OV2 Trip
13 Off UV1 Trip
14 Off UV2 Trip
designated to drive BO1, it will initiate CBF function
1.7 Setting list for CSC-211 C01
Table 188 Soft connector
Name Function
Func_OC2
Func_EF2
Func_SEF1 Disable or enable the sensitive earth fault stage 1
Func_SEF2
Func_UBL Disable or enable the unbalance function
Func_OL Disable or enable the over load function
Func_UC Disable or enable the under current function
Chapter 24 Appendix
263
Name Function
Func_DZ Disable or enable the dead zone function
I_OC1 (0.05~20.00)In A In=1A or 5A
T_OC1 0.00~60.00 S
I_OC2 (0.05~20.00)In A
T_OC2 0.00~60.00 S
U_OC_UnBlk 1.00~120.0 V Phase to phase
I_OC Inv (0.05~20.00)In A
AK_OC Inv 0.001~1000 S
P_OC Inv 0.01~10.00
BK_OC Inv 0.000~60.00 S
Angle_OC 0.00~90.00 degree
3I0_EF1 (0.05~20.00)In A
T_EF1 0.00~60.00 S
3I0_EF2 (0.05~20.00)In A
T_EF2 0.00~60.00 S
3I0_EF Inv (0.05~20.00)In A
AK_EF Inv 0.001~1000 S
P_EF Inv 0.01~10.00
BK_EF Inv 0.000~60.00 S
Angle_EF 0.00~90.00 degree
Angle_Neg 0.00~90.00 degree
I_2H_UnBlk (0.25~20.00)In A
3I0_2H_UnBlk (0.25~20.00)In A
Ratio I2/I1 0.07~0.50
Ratio I02/I01 0.07~0.50
I_SEF1 0.005~1.00(SEF) A
Chapter 24 Appendix
264
(0.05~20.00)In(Normal)
T_SEF1 0.00~60.00 S
I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
T_SEF2 0.00~60.00 S
(0.05~20.00)In(Normal)
A
AK_SEF Inv 0.001~1000 S
P_SEF Inv 0.01~10.00
BK_SEF Inv 0.000~60.00 S
Angle_SEF 0.00~90.00 degree
IsCOS_SEF 0.005~1.00 A
I_OL Alarm (0.05~20.00)In A
T_OL Alarm 0.10~6000.0 S
I_OL Trip (0.05~20.00)In A
T_OL Trip 0.10~6000.0 S
I_UC (0.05~20.00)In A
T_UC 0.100~60.00 S
T_Inhibition 30.00~6000.0 S
U_UBL Alarm 0.50~100.0 V
T_UBL Alarm 0.10~60.00 S
U_UBL Trip 0.50~100.0 V
T_UBL Trip 0.00~60.00 S
U_3V01 2.00~100.0 V
T_3V01 0.00~60.00 S
U_3V02 2.00~100.0 V
T_3V02 0.00~60.00 S
U_Phase low 10.00~100.0 V
U_Phase up 10.00~100.0 V
U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
T_UV1 0.00~120.0 S
U_UV2 5.00~75.0(PE)
10.00~150.0(PP)
V
T_UV2 0.00~120.0 S
Dropout_UV 1.01~2.00
U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
T_OV1 0.00~60.00 S
U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
T_OV2 0.00~60.00 S
Chapter 24 Appendix
265
Dropout_OV 0.90~0.99
I_CBF (0.05~20.00)In A
3I0_CBF (0.05~20.00)In A
3I2_CBF (0.05~20.00)In A
T_CBF1 0.00~60.00 S
T_CBF2 0.10~60.00 S
T_Dead Zone 0.00~60.00 S
I_Chk (0.00~2.00)In A
3I02_ VT Fail (0.05~0.25)In A
Upe_VT Fail 7.00~20.0 V
Upp_VT Fail 10.00~30.0 V
Upe_VT Normal 40.00~65.00 V
I_VT Fail (0.05~0.25)In A
3I0_CT Fail (0.05~2.00)In A
T_CB POS 0.10~60.00 S
T_DS POS 0.10~60.00 S
T_ES POS 0.10~60.00 S
T_CB Faulty 0.10~60.00 S
Ratio_VT 0.01~2.00
Bit 0 1
Chapter 24 Appendix
266
Bit 0 1
0 Not used Not used
5 Not used Not used
6 Not used Not used
Bit 0 1
2 UV PP UV PE
3 OV PP OV PE
4 Not used Not used
5 Not used Not used
8 Not used Not used
9 Not used Not used
Chapter 24 Appendix
267
Bit 0 1
7 OL Alarm Off OL Alarm On
8 UBL Alarm Off UBL Alarm On
Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
6 Off OL Trip
7 Off UC
8 Off UV Trip
9 Off OL Trip
10 Off OV1 Trip
11 Off OV2 Trip
12 Off UV1 Trip
13 Off UV2 Trip
Note: BO2 Ctr Word, BO3 Ctr Word, BO6 Ctr Word , BO7 Ctr Word ,
BO9 Ctr Word are defined the same as BO1 Ctr Word. Different outputs
can be distributed to different protections. Once a protection is designated to
drive BO1, it will initiate CBF function.
Chapter 24 Appendix
268
1.8 Setting list for CSC-211 C02
Func_OC2
Func_EF2
Func_SEF2
Func_3V01 Disable or enable the displacement voltage protection stage 1
Func_3V01 Disable or enable the displacement voltage protection stage 1
Func_UBL Disable or enable unbalance detection function
Func_OL Disable or enable the over load function
Func_UC Disable or enable under current function
Chapter 24 Appendix
269
11 I_OC1 (0.05~20.00)In A In=1A or 5A
12 T_OC1 0.00~60.00 S
13 I_OC2 (0.05~20.00)In A
14 T_OC2 0.00~60.00 S
17 I_OC Inv (0.05~20.00)In A
18 K_OC Inv 0.05~999.0
19 A_OC Inv 0.005~200.0 S
20 B_OC Inv 0.000~60.00 S
21 P_OC Inv 0.005~10.00
23 3I0_EF1 (0.05~20.00)In A
24 T_EF1 0.00~60.00 S
25 3I0_EF2 (0.05~20.00)In A
26 T_EF2 0.00~60.00 S
28 3I0_EF Inv (0.05~20.00)In A
29 K_EF Inv 0.05~999.0
30 A_EF Inv 0.005~200.0 S
31 B_EF Inv 0.000~60.00 S
32 P_EF Inv 0.005~10.00
35 I_2H_UnBlk (0.25~20.00)In A
36 3I0_2H_UnBlk (0.25~20.00)In A
37 Ratio I2/I1 0.07~0.50
38 Ratio I02/I01 0.07~0.50
39 T2h_Cross_Blk 0.00~60.00 S
40 I_SEF1 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
41 T_SEF1 0.00~60.00 S
42 I_SEF2 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
43 T_SEF2 0.00~60.00 S
45 I_SEF Inv 0.005~1.00(SEF)
(0.05~20.00)In(Normal)
A
46 K_SEF Inv 0.05~999.0
47 A_SEF Inv 0.005~200.0 S
48 B_SEF Inv 0.000~60.00 S
49 P_SEF Inv 0.005~10.00
Chapter 24 Appendix
270
51 IsCOS_SEF 0.005~1.00 A
52 U_3V0_SEF 2.00~100.0 V
53 I_OL_Alarm (0.05~20.00)In A
54 T_ OL_Alarm 0.100~6000.0 S
55 I_OL_Trip (0.05~20.00)In A
56 T_ OL_Trip 0.100~6000.0 S
57 I_UC (0.05~20.00)In A
58 T_UC 0.100~60.0 S
59 T_Inhibition 30.000~6000.0 S
60 I_UBL_Alarm 0.050~20.00 A
61 T_UBL_Alarm 0.100~60.00 S
62 I_UBL_Trip 0.050~20.00 A
63 T_UBL_Trip 0.100~60.00 S
64 U_3V01 2.00~100.0 V
65 T_3V01 0.00~60.00 S
66 U_3V02 2.00~100.0 V
67 T_3V02 0.00~60.00 S
68 U_Phase low 10.00~100.0 V
69 U_Phase up 10.00~100.0 V
70 U_UV1 5.00~75.0(PE)
10.00~150.0(PP)
V
71 T_UV1 0.00~120.0 S
72 U_UV2 5.00~75.0(PE)
10.00~150.0(PP)
V
73 T_UV2 0.00~120.0 S
74 Dropout_UV 1.01~2.00
75 U_OV1 40.00~100.0(PE)
80.00~200.0(PP)
V
76 T_OV1 0.00~60.00 S
77 U_OV2 40.00~100.0(PE)
80.00~200.0(PP)
V
78 T_OV2 0.00~60.00 S
79 Dropout_OV 0.90~0.99
80 I_CBF (0.05~20.00)In A
81 3I0_CBF (0.05~20.00)In A
82 3I2_CBF (0.05~20.00)In A
83 T_CBF1 0.00~60.00 S
84 T_CBF2 0.10~60.00 S
85 T_Dead Zone 0.00~60.00 S
86 I_Chk (0.00~2.00)In A
87 3I02_ VT Fail (0.05~0.25)In A
88 Upe_VT Fail 7.00~20.0 V
Chapter 24 Appendix
271
89 Upp_VT Fail 10.00~30.0 V
91 I_VT Fail (0.05~0.25)In A
92 3I0_CT Fail (0.05~2.00)In A
93 T_CB POS 0.10~60.00 S
94 T_DS POS 0.10~60.00 S
95 T_ES POS 0.10~60.00 S
96 T_CB Faulty 0.10~60.00 S
97 Ratio_Mea CT 0.001~7.00
98 Ratio_VT 0.01~2.00

Bit 0 1


Bit 0 1
0 Not used Not used
5 Not used Not used
6 Not used Not used
Chapter 24 Appendix
272
Bit 0 1

Bit 0 1
2 UV PP UV PE
3 OV PP OV PE
4 Not used Not used
5 Not used Not used
8 Not used

9
10
11 Not used
12
13

Bit 0 1
7 OL Alarm Off OL Alarm On
8 UBL Alarm Off UBL Alarm On
Chapter 24 Appendix
273

Bit 0 1
0 Off OC1&2 Trip
1 Off OC Inv Trip
2 Off EF1&2 Trip
3 Off EF Inv Trip
4 Off SEF1&2 Trip
5 Off SEF Inv Trip
6 Off 3V0 Trip
7 Off UC
8 Off UBL Trip
9 Off OL Trip
10 Off OV1 Trip
11 Off OV2 Trip
12 Off UV1 Trip
13 Off UV2 Trip
14
Chapter 24 Appendix
274

Chapter 24 Appendix
275
2 General report list
2.1 Event report list
Table 195 Event report list for CSC-211 M1
No. Abbr. (LCD Display) Description
1 Startup Protection startup
2 OC1 Trip Overcurrent protection stage 1 issues trip command
4 OC Inv Trip Overcurrent protection inverse stage issues trip command
5 EF1 Trip Earth fault protection stage 1 issues trip command
7 EF Inv Trip Earth fault protection inverse stage issues trip command
8 Inrush Blk Inrush current is checked to block function.
9
NSOC1 Trip
Negative sequence current protection stage 1 issues trip
command
10
NSOC2 Trip
Negative sequence current protection stage 2 issues trip
command
11
NSOC Inv Trip
Negative sequence current protection inverse stage issues trip
command
12 SEF1 Trip Sensitive earth fault protection stage 1 issues trip command
14
SEF Inv Trip
Sensitive earth fault protection inverse stage issues trip
command
15 3V01 Trip Displacement voltage protection stage 1 issues trip command
17 UV1 Trip Undervoltage protection stage 1 issues trip command
19 OV1 Trip Overvoltage protection stage 1 issues trip command
21 Therm OL Trip Thermal overload protection issues trip command
22 LF LS Trip Low frequency load shedding function issues trip command
23 LV LS Trip Low voltage load shedding function issues trip command
24 OL LS Trip Overload load shedding function issues trip command
25 1st Reclose The first shot reclosing
26 2nd Reclose The second shot reclosing
27 3rd Reclose The third shot reclosing
28 4th Reclose The fourth shot reclosing
29 AR in progress AR is initiated by internal or external function
30 Syn Request Synchronization check
Chapter 24 Appendix
276
31 Syn Ok Answer to AR to check synchronization successfully
32 AR Success AR successful
33 Syn Failure Fail to check synchronization in limited duration
34 AR Failure AR unsuccessful
35 Syn Vdiff fail Voltage difference checking fail
36 Syn Ang fail Angle difference checking fail
37 Syn Fdiff fail Frequency difference checking fail
38 CBF Initiate CBF function is initiated
39 CBF1 Trip The first stage CBF issues trip command
40 CBF2 Trip The second stage CBF issues trip command
41 Dead Zone Trip The dead zone function issues trip command
42 OC Startup Three stages overcurrent protections startup
43 OC Startup Back Three stages overcurrent protections return
Table 196 Event report list for CSC-211 M6
11
SEF Inv Trip
command
12 OC Startup Three stages overcurrent protections startup
13 OC Startup Back Three stages overcurrent protections return
Table 197 Event report list for CSC-211 C1
Chapter 24 Appendix
277
11
SEF Inv Trip
command
18 UBL Trip Unbalance protection issues trip command
19 OL Initiate Overload protection issues trip command
20 UC Trip Under current protection issues trip command
21 CBF Initiate CBF function is initiated
22 CBF1 Trip The first stage CBF issues trip command
23 CBF2 Trip The second stage CBF issues trip command
24 Dead Zone Trip The dead zone function issues trip command
25 OC Startup Three stages over current protections startup
26 OC Startup Back Three stages over current protections return
2.2 Alarm report list
Two kinds of alarm report are included in the IED, which are shown in the
following table:
Alarm I is severe alarm. When alarm I happens, the alarm LED on the
front panel of the IED will flash, all of protection function will be out of
service and the trip power of protection will be blocked by the IED.
Alarm II is other alarm. When alarm II happens, the alarm LED on the
front panel of the IED will flash (except BI Set SetGr2 and BI Set
SetGr1), and will not block the trip power of protection.
Table 198 Alarm I list
1 AD Error AD is abnormal
2 BO Abnormal Binary output is abnormal
3 EPROM Error EPROM is abnormal
4 Flash Error Flash is abnormal
5 Invalid SetGr Pointer of setting group is error
Chapter 24 Appendix
278
6 Logic Scheme ERR Logic file and CPU file not cooperate
7 RAM Error RAM is abnormal
8 Setting Chk ERR Setting value is error
9 Zero Offset Zero deviation is out of limitation
Table 199 Alarm II list for M1
1 3V01 Alarm
Displacement voltage protection stage 1 issues an alarm
signal
2 3V02 Alarm
signal
3 BI Set SetGr1 Setting group switches to 2 by binary input is 1
5 BIO COM ERR Communication failure in BIO module
6 BIO OUT ERR BO error in BIO module
7 CB Faulty
Both the 3Ph CB Open and 3Ph CB Close are active or
inactive
8 CB Not Ready BI2 is active to indicate CB is not ready
9 CT Fail Failure in circuit of current transformer
10 DS Faulty Both DS Open and DS Close are active or inactive
11 EF Inv Alarm Earth fault protection inverse stage issues an alarm signal
12 EF1 Alarm Earth fault protection stage 1 issues an alarm signal
13 ES Faulty Both ES Open and ES Close are active or inactive
14 File ERR Read configuration files error
15 Frequency Differ
Frequency derived from software and hardware are
different by 0.5Hz
16 GOO_A_CFG_ERR Configuration failure in GOOSE A
17 GOO_A_COMMU_ERR Communication failure in GOOSE A
18 GOO_B_CFG_ERR Configuration failure in GOOSE B
19 GOO_B_COMMU_ERR Communication failure in GOOSE B
20 MMI Com Fail Communication failure between MMI module and CPU
21 NSOC Inv Alarm
Negative sequence current protection inverse stage issues
an alarm signal
22 NSOC1 Alarm
Negative sequence current protection stage 1 issues an
alarm signal
23 OC Inv Alarm
Overcurrent protection inverse stage issues an alarm
signal
24 OC1 Alarm Overcurrent protection stage 1 issues an alarm signal
25 OV1 Alarm Overvoltage protection stage 1 issues an alarm signal
26 PhA Grounded Phase A is grounded
Chapter 24 Appendix
279
27 PhB Grounded Phase B is grounded
28 PhC Grounded Phase C is grounded
29 SEF Inv Alarm
Sensitive earth fault protection inverse stage issues an
alarm signal
30 SEF1 Alarm
Sensitive earth fault protection stage 1 issues an alarm
signal
31 SEF2 Alarm
signal
32 Therm OL Alarm Thermal overload protection issues an alarm signal
33 Trip Fail Trip command is issued lasting for more than 9s
34 UV1 Alarm Undervoltage protection stage 1 issues an alarm signal
35 V1P VT Fail VT failure in circuit of the forth voltage transformer
36 VT Fail VT failure in circuit of voltage transformer
Table 200 Alarm II list for M6
3 BIO COM ERR Communication failure in BIO module
5 CB Faulty
Both the 3Ph CB Open and 3Ph CB Close are active or
inactive
11 File ERR Read configuration files error
12 Frequency Differ
different by 0.5Hz
17 HMI Com Fail Communication failure between HMI module and CPU
18 OC Inv Alarm
signal
20 SEF Inv Alarm
Sensitive earth fault protection inverse stage issues an
alarm signal
Chapter 24 Appendix
280
21 SEF1 Alarm
signal
22 SEF2 Alarm
signal
Table 201 Alarm II list for C1
1 3V01 Alarm
signal
2 3V02 Alarm
signal
5 BIO COM ERR Communication failure in DIO module
7 CB Faulty
Both 3Ph CB Open and 3Ph CB Close both active or
inactive
13 File ERR Read configuration files wrong
14 Frequency Differ
different by 0.5Hz
19 HMI Com Fail Communication failure between HMI module and CPU
20 Inhibit close Drive a contact to inhibit reconnection of capacitor
21 OC Inv Alarm
signal
23 OL Alarm Overload protection issues an alarm signal
24 OV1 Alarm Overvoltage protection stage 1 issues an alarm signal
25 PhA Grounded Phase A is grounded
26 PhB Grounded Phase B is grounded
27 PhC Grounded Phase C is grounded
28 SEF Inv Alarm Sensitive earth fault protection inverse stage issues an
Chapter 24 Appendix
281
alarm signal
29 SEF1 Alarm
signal
30 SEF2 Alarm
signal
32 UBL Alarm Unbalance protection issues an alarm signal
33 UV1 Alarm Undervoltage protection stage 1 issues an alarm signal
34 V1p VT Fail VT failure in circuit of the forth voltage transformer
35 VT Fail VT failure in circuit of voltage transformer

Chapter 24 Appendix
282
3 Typical connection
A. For incoming or outgoing feeder protection or line backup
protection
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08

Figure 70 Application of feeder protection to measure three phase and earth currents
Chapter 24 Appendix
283
IA
IB
IC
UB
UA
UC
IN
UN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
U01
U02
U03
U04
AIM2

Figure 71 Application of feeder protection to measure three phase and earth currents and
three phase voltages (bus side)
Chapter 24 Appendix
284
IA
IB
IC
UB
UA
UC
IN
UN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
U01
U02
U03
U04
AIM2

three phase voltages (line side)
Chapter 24 Appendix
285
IA
IB
IC
UB
UA
UC
IN
UN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
U01
U03
AIM2
U02
U04
single phase voltage (Ph-Ph) (bus side)
Chapter 24 Appendix
286
IA
IB
IC
UB
UA
UC
IN
UN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
U01
U03
AIM2
U02
U04
single phase voltage (Ph-E) (bus side)
Chapter 24 Appendix
287
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
*
I1

Figure 75 Application of feeder protection to measure three phase currents, earth current,
and sensitive earth current
Chapter 24 Appendix
288
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
*
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
I1

Figure 76 Application of feeder protection to measure three phase currents, earth current
and sensitive earth current, and three phase voltages (bus side)
Chapter 24 Appendix
289
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
*
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
I1

and sensitive earth current, and three phase voltages (line side)
Chapter 24 Appendix
290
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
*
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
I1

and sensitive earth current, and single phase voltage (Ph-Ph) (bus side)
Chapter 24 Appendix
291
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
*
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
I1

Figure 79 Application of feeder protection to measure three phase currents, earth current,
and sensitive earth current, and single phase voltage (Ph-E) (bus side)
Chapter 24 Appendix
292
B. For transformer backup protection
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
I1
*

Figure 80 Application of transformer backup protection to measure three phase currents,
earth current, and neutral current
Chapter 24 Appendix
293
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
I1
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
*

earth current and neutral current, and three phase voltages (bus side)
Chapter 24 Appendix
294
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
I1
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
*

earth current and neutral current, and three phase voltages (line side)
Chapter 24 Appendix
295
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
I1
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
*

earth current and neutral current, and single phase voltage (Ph-Ph) (bus side)
Chapter 24 Appendix
296
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
I01
AIM1
I02
I1
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
*

earth current and neutral current, and single phase voltage (Ph-E) (bus side)
Chapter 24 Appendix
297
C. For synch-check function
A
B
C
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
U4
U05
U06
A
B
C

Figure 85 Typical connection for synch-check on bus coupler applications
Chapter 24 Appendix
298
IA
IB
IC
IN
AIM2
A
B
C
* * *
I01
I03
I05
I07
I02
I04
I06
I08
UB
UA
UC
UN
U01
U02
U03
U04
AIM2
U4
U05
U06

Figure 86 Typical connection for synch-check and feeder current protection
Chapter 24 Appendix
299
D. For capacitor bank protection
A
B
C
Capacitor bank
IC1
IC2
IC3
AIM1
*
*
*
I03
I05
I07
I04
I06
I08

Figure 87 Typical connection for capacitor bank unbalanced current protection with three
current inputs
A
B
C
Capacitor bank
UC1
U03
U05
U07
AIM1
U04
U06
U08
UC2
UC3

Figure 88 Typical connection for capacitor bank unbalanced voltage protection with three
voltage inputs
Chapter 24 Appendix
300
A
B
C
Capacitor bank
*
IC1
IC2
IC3
AIM1
I03
I05
I07
I04
I06
I08

Figure 89 Typical connection for capacitor bank unbalanced current protection with one
current input
UC1
A
B
C
U03
U05
U07
AIM1
Capacitor bank
U04
U06
U08
UC2
UC3

Figure 90 Typical connection for capacitor bank unbalanced voltage protection with one
voltage input
Chapter 24 Appendix
301
I1
A
B
C

Figure 91 Unbalanced current detection for
grounded capacitor bank
I1
A
B
C

Figure 92 Neutral current differential
protection for grounded Split-Wye capacitor
bank
I1
A
B
C

Figure 93 Neutral current protection for
ungrounded split-Wye capacitor bank
I1
I2
I3
A
B
C

Figure 94 Three unbalanced currents
detection for capacitor bank
U1
A
B
C

Figure 95 Neutral voltage unbalanced
protection for unrounded Wye capacitor
bank
U1
A
B
C

Figure 96 Neutral voltage unbalanced
detection for ungrounded split-Wye
capacitor bank
Chapter 24 Appendix
302
U1
A
B
C

Figure 97 Summation of Intermediate
tap-point voltage for grounded Wye
capacitor bank
U1
A
B
C

Figure 98 Neutral voltage unbalance
detection by 3VTs for unrounded Wye
capacitor bank
U1
A
B
C

Figure 99 Neutral voltage protection for
ungrounded split-Wye capacitor bank
U1
U2
U3
A
B
C

Figure 100 Three unbalanced voltages
detection for Capacitor Bank
Chapter 24 Appendix
303
E. For Load shedding function
CSC-211 CSC-211 CSC-211 CSC-211 CSC-211

Figure 101 Typical connection for load shedding function

Chapter 24 Appendix
304
4 Time inverse characteristic
4.1 11 kinds of IEC and ANSI inverse time
characteristic curves
In the setting, if the curve number is set for inverse time characteristic, which
is corresponding to the characteristic curve in the following tabel. Both IEC
and ANSI based standard curves are available.
Table 202 11 kinds of IEC and ANSI inverse time characteristic
Curves No. IDMTL Curves Parameter A Parameter P Parameter B
1 IEC INV. 0.14 0.02 0
2 IEC VERY INV. 13.5 1.0 0
3 IEC EXTERMELY INV. 80.0 2.0 0
4 IEC LONG INV. 120.0 1.0 0
5 ANSI INV. 8.9341 2.0938 0.17966
6 ANSI SHORT INV. 0.2663 1.2969 0.03393
7 ANSI LONG INV. 5.6143 1 2.18592
8 ANSI MODERATELY
INV.
0.0103 0.02 0.0228
9 ANSI VERY INV. 3.922 2.0 0.0982
10 ANSI EXTERMELY INV. 5.64 2.0 0.02434
11 ANSI DEFINITE INV. 0.4797 1.5625 0.21359
4.2 User defined characteristic
For the inverse time characteristic, also can be set as user defined
characteristic if the setting is set to 12.

T
Equation 11
Chapter 24 Appendix
305
where:
A: Time factor for inverse time stage
B: Delay time for inverse time stage
P: index for inverse time stage
T: Set time multiplier for step n
4.3 Typical inverse curves

Chapter 24 Appendix
306
The typical 11 curves where K=0.025 is shown in the following figure:

Figure 102 Typical curves for IEC and ANSI standard

0.0001
0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I
d
/I_Inv
IEC & ANSI Curve
(K=0.025)
IEC INV.
IEC VERY INV.
IEC EXTE INV.
IEC LONG INV.
ANSI INV.
ANSI SHORT INV.
ANSI LONG INV.
ANSI MODE INV.
ANSI VERY INV.
ANSI EXTE INV.
ANSI DEFI INV.
Chapter 24 Appendix
307
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC INV. Curve in the
following figure:

Figure 103 Typical IEC INV. Curves

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
IEC INV. Curve
K=0.025
K=0.2
K=0.5
K=1.0
K=1.25
Chapter 24 Appendix
308
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC VERY INV. Curve in
the following figure:

Figure 104 Typical IEC VERY INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
IEC VERY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
309
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC EXTREMELY INV.
Curve in the following figure:

Figure 105 Typical IEC EXTREMELY INV. Curve

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
IEC EXTREMELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
310
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the IEC LONG INV. Curve in

Figure 106 Typical IEC LONG INV. Curve

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
IEC LONG INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
311
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ASNI INV. Curve in the
following figure:

Figure 107 Typical ANSI INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
312
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI SHOTR INV. Curve
in the following figure:

Figure 108 Typical ANSI SHORT INV. Curves

0.0001
0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI SHORT INV.Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
313
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI LONG INV. Curve in

Figure 109 Typical ANSI LONG INV. Curves

0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI LONG INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
314
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI MODETATELY INV.

Figure 110 Typical ANSI MODETATELY INV. Curve

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI MODERATELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
315
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSIVERY INV. Curve in

Figure 111 Typical ANSI VERY INV. Curves

0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI VERY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
316
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI EXTREMELY INV.

Figure 112 Typical ANSI EXTREMELY INV. Curves

0.0001
0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI EXTREMELY INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
317
Where K=0.025, K=0.2, K=0.5, K=1 and K=1.5 the ANSI DEFINITE INV.

Figure 113 Typical ANSI DEFINITE INV. Curves
5 CT Requirement
5.1 Overview
0.001
0.01
0.1
1
10
1 10 100
T
i
m
e

i
n

S
e
c
o
n
d
s

I/Is
ANSI DEFINITE INV. Curve
K=0.025
K=0.2
K=0.5
K=1
K=1.5
Chapter 24 Appendix
318
In practice, the conventional magnetic- core current transformer (hereinafter
as referred CT) is not able to transform the current signal accurately in whole
fault period of all possible faults because of manufactured cost and
installation space limited. CT Saturation will cause distortion of the current
signal and can result in a failure to operate or cause unwanted operations of
some functions. Although more and more protection IEDs have been
designed to permit CT saturation with maintained correct operation, the
performance of protection IED is still depended on the correct selection of CT.
5.2 Current transformer classification
The conventional CTs are usually manufactured in accordance with the
standard, IEC 60044, ANSI / IEEE C57.13, ANSI / IEEE C37.110 or other
comparable standards, which CTs are specified in different protection class.
Currently, the CT for protection are classified according to functional
performance as follows:
Class P CT
Accuracy limit defined by composite error with steady symmetric primary
current. No limit for remanent flux.
Class PR CT
CT with limited remanence factor for which, in some cased, a value of the
secondary loop time constant and/or a limiting value of the winding
resistance may also be specified.
Class PX CT
Low leakage reactance for which knowledge of the transformer
secondary excitation characteristic, secondary winding resistance,
secondary burden resistance and turns ratio is sufficient to assess its
performance in relation to the protective relay system with which it is to
be used.
Class TPS CT
Low leakage flux current transient transformer for which performance is
defined by the secondary excitation characteristics and turns ratio error
limits. No limit for remanent flux
Class TPX CT
Accuracy limit defined by peak instantaneous error during specified
transient duty cycle. No limit for remanent flux.
Class TPY CT
Accuracy limit defined by peak instantaneous error during specified
Chapter 24 Appendix
319
transient duty cycle. Remanent flux not to exceed 10% of the saturation
flux..
Class TPZ CT
Accuracy limit defined by peak instantaneous alternating current
component error during single energization with maximum d.c. offset at
specified secondary loop time constant. No requirements for d.c.
component error limit. Remanent flux to be practically negligible.
TPE class CT (TPE represents transient protection and electronic type
CT)
5.3 Abbreviations (according to IEC 60044-1, -6, as
defined)
Abbrev. Description
Esl Rated secondary limiting e.m.f
Eal Rated equivalent limiting secondary e.m.f
Ek Rated knee point e.m.f
Uk Knee point voltage (r.m.s.)
Kalf Accuracy limit factor
Kssc Rated symmetrical short-circuit current factor
Kssc
Kssc
Effective symmetrical short-circuit current factor
based on different Ipcf
Kpcf Protective checking factor
Ks Specified transient factor
Kx Dimensioning factor
Ktd Transient dimensioning factor
Ipn Rated primary current
Isn Rated secondary current
Ipsc Rated primary short-circuit current
Ipcf protective checking current
Isscmax Maximum symmetrical short-circuit current
Rct Secondary winding d.c. resistance at 75 C /
167 F (or other specified temperature)
Rb Rated resistive burden
Rb = Rlead + Rrelay = actual connected resistive
burden
Rs Total resistance of the secondary circuit,
inclusive of the secondary winding resistance
corrected to 75, unless otherwise specified,
and inclusive of all external burden connected.
Rlead Wire loop resistance
Zbn Rated relay burden
Chapter 24 Appendix
320
Zb Actual relay burden
Tp Specified primary time constant
Ts Secondary loop time constant
5.4 General current transformer requirements
5.4.1 Protective checking current
The current error of CT should be within the accuracy limit required at
specified fault current.
To verify the CT accuracy performance, Ipcf, primary protective checking
current, should be chose properly and carefully.
For different protections, Ipcf is the selected fault current in proper fault
position of the corresponding fault, which will flow through the verified CT.
To guarantee the reliability of protection relay, Ipcf should be the maximum
fault current at internal fault. E.g. maximum primary three phase short-circuit
fault current or single phase earth fault current depended on system
sequence impedance, in different positions.
Moreover, to guarantee the security of protection relay, Ipcf should be the
maximum fault current at external fault.
Last but not least, Ipcf calculation should be based on the future possible
system power capacity
Kpcf, protective checking factor, is always used to verified the CT
performance

To reduce the influence of transient state, Kalf, Accuracy limit factor of CT,
should be larger than the following requirement

Ks, Specified transient factor, should be decided based on actual operation
state and operation experiences by user.

5.4.2 CT class
Chapter 24 Appendix
321
The selected CT should guarantee that the error is within the required
accuracy limit at steady symmetric short circuit current. The influence of short
circuit current DC component and remanence should be considered, based
on extent of system transient influence, protection function characteristic,
consequence of transient saturation and actual operating experience. To fulfill
the requirement on a specified time to saturation, the rated equivalent
secondary e.m.f of CTs must higher than the required maximum equivalent
secondary e.m.f that is calculated based on actual application.
For the CTs applied to transmission line protection, transformer differential
protection with 330kV voltage level and above, and 300MW and above
generator-transformer set differential protection, the power system time
constant is so large that the CT is easy to saturate severely due to system
transient state. To prevent the CT from saturation at actual duty cycle, TP
class CT is preferred.
For TPS class CT, Eal (rated equivalent secondary limiting e.m.f) is generally
determined as follows:

Where
Ks: Specified transient factor
Kssc: Rated symmetrical short-circuit current factor
For TPX, TPY and TPZ class CT, Eal (rated equivalent secondary limiting
e.m.f) is generally determined as follows:

Where
Ktd: Rated transient dimensioning factor
Considering at short circuit current with 100% offset
For C-t-O duty cycle,

t: duration of one duty cycle;
For C-t-O-t
fr
-C-t-O duty cycle,

t: duration of first duty cycle;
t: duration of second duty cycle;
Chapter 24 Appendix
322
t
fr
: duration between two duty cycle;
For the CTs applied to 110 - 220kV voltage level transmission line protection,
110 - 220kV voltage level transformer differential protection, 100-200MW
generator-transformer set differential protection, and large capacity motor
differential protection, the influence of system transient state to CT is so less
that the CT selection is based on system steady fault state mainly, and leave
proper margin to tolerate the negative effect of possible transient state.
Therefore, P, PR, PX class CT can be always applied.
For P class and PR class CT, Esl (the rated secondary limited e.m.f) is
generally determined as follows:

Kalf: Accuracy limit factor
For PX class CT, Ek (rated knee point e.m.f) is generally determined as
follows:

Kx: Demensioning factor
For the CTs applied to protection for110kV voltage level and below system,
the CT should be selected based on system steady fault state condition. P
class CT is always applied.
5.4.3 Accuracy class
The CT accuracy class should guarantee that the protection relay applied is
able to operate correctly even at a very sensitive setting, e.g. for a sensitive
residual overcurrent protection. Generally, the current transformer should
have an accuracy class, which have an current error at rated primary current,
that is less than 1% (e.g. class 5P).
If current transformers with less accuracy are used it is advisable to check the
actual unwanted residual current during the commissioning.
5.4.4 Ratio of CT
The current transformer ratio is mainly selected based on power system data
like e.g. maximum load. However, it should be verified that the current to the
protection is higher than the minimum operating value for all faults that are to
be detected with the selected CT ratio. The minimum operating current is
different for different functions and settable normally. So each function should
be checked separately.
Chapter 24 Appendix
323
5.4.5 Rated secondary current
There are 2 standard rated secondary currents, 1A or 5A. Generally, 1 A
should be preferred, particularly in HV and EHV stations, to reduce the
burden of the CT secondary circuit. Because 5A rated CTs, i.e. I
2
R is 25x
compared to only 1x for a 1A CT. However, in some cases to reduce the CT
secondary circuit open voltage, 5A can be applied.
5.4.6 Secondary burden
Too high flux will result in CT saturation. The secondary e.m.f is directly
proportional to linked flux. To feed rated secondary current, CT need to
generate enough secondary e.m.f to feed the secondary burden.
Consequently, Higher secondary burden, need Higher secondary e.m.f, and
then closer to saturation. So the actual secondary burden Rb must be less
than the rated secondary burden Rb of applied CT, presented
Rb > Rb
The CT actual secondary burden Rb consists of wiring loop resistance Rlead
and the actual relay burdens Zb in whole secondary circuit, which is
calculated by following equation
Rb = Rlead + Zb
The rated relay burden, Zbn, is calculated as below:

Where
Sr: the burden of IED current input channel per phase, in VA;
For earth faults, the loop includes both phase and neutral wire, normally twice
the resistance of the single secondary wire. For three-phase faults the neutral
current is zero and it is just necessary to consider the resistance up to the
point where the phase wires are connected to the common neutral wire. The
most common practice is to use four wires secondary cables so it normally is
sufficient to consider just a single secondary wire for the three-phase case.
In isolated or high impedance earthed systems the phase-to-earth fault is not
the considered dimensioning case and therefore the resistance of the single
secondary wire always can be used in the calculation, for this case.
5.5 Rated equivalent secondary e.m.f requirements
To guarantee correct operation, the current transformers (CTs) must be able
to correctly reproduce the current for a minimum time before the CT will begin
Chapter 24 Appendix
324
to saturate.
5.5.1 Definite time overcurrent protection and earth fault protection
For TPY CT,
Kssc should be satisfied following requirement:

Where

Ipcf: Maximum primary fundamental frequency current at close-in
forward and reverse faults (A)
Ipcf: Maximum applied operating setting value (A)
Considering auto-reclosing operation, Eal should meet the following
requirement, at C-O-C-O duty cycle

Where
Ktd: Recommended transient dimensioning factor for verification, 1.2
recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:

Where

Ipcf: Maximum primary fundamental frequency current at close-in
forward and reverse faults (A)
Ipcf: Maximum applied operating setting value (A)
Esl can be verified as below:

Chapter 24 Appendix
325
Where
Ks: Specified transient factor, 2 recommended
For PX class CT,
Ek should be verified based on below equation.

Where
5.5.2 Inverse time overcurrent protection and earth fault protection
For TPY CT,
Kssc should be satisfied following requirement:

Where

Ipcf: Maximum applied primary startup current setting value (A)
Considering auto-reclosing operation, Eal should meet the following
requirement, at C-O duty cycle

Where
Ktd: Recommended transient dimensioning factor for verification, 1.2
recommended
For P Class and PR class CT,
Kalf should be satisfied following requirement:

Where

Ipcf: Maximum applied primary startup current setting value (A)
Chapter 24 Appendix
326
Esl can be verified as below:

Where
For PX class CT,
Ek should be verified based on below equation.

Where

CSC-211 Multifunction Protection IED Technical Application Manual - V1.01

Diunggah oleh

Informasi Dokumen

Judul Asli

Hak Cipta

Format Tersedia

Bagikan dokumen Ini

Bagikan atau Tanam Dokumen

Opsi Berbagi

Apakah menurut Anda dokumen ini bermanfaat?

Apakah konten ini tidak pantas?

Hak Cipta:

Format Tersedia

CSC-211 Multifunction Protection IED Technical Application Manual - V1.01

Diunggah oleh

Hak Cipta:

Format Tersedia

CSC-211

Multifunction Protection IED

: is the maximum permissible continuous thermal overload current. It is usually

) and negative-sequence currents

Anda mungkin juga menyukai