|
.
|
\
|
|
.
|
\
|
=
r
y
s
p
G
r
y
s
c
G
1 ) (
) ( (3)
Let the desired closed-loop transfer function for set-point changes be specified as
( ) /
d
y r , and assume that a process
model
( )
p
G s
is available. Replacing the unknown
( ) / y r
and ( )
p
G s by
( ) /
d
y r
and
( )
p
G s
|
.
|
\
|
|
.
|
\
|
=
d
r
y
s
p
G
r
y
s
c
G
1 ) (
~
) ( (4)
Because the characteristics of
( ) /
d
y r have a direct impact on the resulting controller,
( ) /
d
y r should be chosen so that the
closed-loop performance is satisfactory and the resulting controller is physically reliable.
The DS controller in equation 4 results in the following closed-loop transfer function
)
~
(
~
p
G
p
G
d
r
y
p
G
d
r
y
p
G
DS
r
y
+
=
|
.
|
\
|
|
.
|
\
|
|
.
|
\
|
(5)
)
~
(
~
1
~
p
G
p
G
d
r
y
p
G
d
r
y
d
G
p
G
DS
d
y
+
=
|
.
|
\
|
(
|
.
|
\
|
|
.
|
\
|
(6)
For the ideal case where the process model is perfect (i.e.,
p p
G G =
\
|
|
.
|
\
|
= (7)
(
|
.
|
\
|
|
.
|
\
|
=
d
r
y
d
G
DS
d
y
1 (8)
3.1 Direct Synthesis Design for Disturbance Rejection
The PI/PID settings obtained from the DS and IMC approaches are based on specifying the closed-loop transfer function
for set-point changes. For processes with small time-delay/time-constant ratios, these PI/PID controllers provide very
sluggish disturbance responses. Therefore, it is worth while to develop a modified direct synthesis approach based on
disturbance rejection. The new design method will be denoted by DS-d. Consider a control system with the standard
block diagram shown in Figure 1. The closed-loop transfer function for disturbances is given by
) ( ) ( 1
) (
s
c
G s
p
G
s
d
G
d
y
+
= . (9)
Rearranging gives an expression for the feedback controller
) (
1
) (
) (
) (
s
p
G
s
p
G
d
y
s
d
G
s
c
G =
|
.
|
\
|
(10)
Let the desired closed-loop transfer function for disturbances be specified as
( ) /
d
y d
, and assume that a process
model
( )
p
G s
and a disturbance model ( )
d
G s
are available.
Replacing the unknown, and ( )
d
G s by, and ( )
d
G s
\
|
(11)
For the DS-d controller, the closed-loop transfer functions is
)
~
(
~
~
p
G
p
G
d
d
y
d
G
p
G
d
d
y
d
G
p
G
d DS
d
y
+
=
|
.
|
\
|
|
.
|
\
|
|
.
|
\
|
(12)
For the ideal case where the model is perfect (i.e.,
p p
G G =
and
d d
G G =
), the closed-loop transfer function
d
d
y
d DS
d
y
|
.
|
\
|
|
.
|
\
|
=
(13)
) (
~
1
s
d
G
d
d
y
d DS
r
y
|
.
|
\
|
|
.
|
\
|
=
(14)
The structure and order of the controller depends on the specification of the desired closed-loop response and process
model..
4. RESULTS AND DISCUSSION
We have applied DS-d method for different systems and performance was compared with IMC method
4.1 Example 1
Consider first-order plus time delay system
1
4 . 0
1
) ( ) (
= =
s
s
e
s Gd s Gp
Here we consider DS-d and IMC method for design of PID controller
Tunning Method
K
DS-d approach
(
c
=2)
0.4 1 1
s
s s
c
G
559 . 24
3 . 1 860 . 32
2
990 . 2 + +
=
Modified IMC approach
( =0.3& =1.7462)
0.4 1 1 =
( )( )
( ) 9334 . 23
5 4074 . 7 9348 . 12
+
+ +
s s
s s
4.1.1 Simulation Result of DS-d approach and IMC approach
0 5 10 15 20 25 30 35 40 45
0
0.2
0.4
0.6
0.8
1
1.2
1.4
Time
P
r
o
c
e
s
s
O
u
t
p
u
t
Modified IMC method
DS-d method
Figure 2 Unit step response of DS-d approach and IMC approach for FOPDT system
International Journal of Application or Innovation in Engineering& Management (IJAIEM)
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Volume 3, Issue 5, May 2014 ISSN 2319 - 4847
Volume 3, Issue 5, May 2014 Page 165
Table.1 Time Domain Specification for FOPDT system
Tunning Methods Tr Ts Tsmax Tsmin Mp P Tp Mu
DS-d(
c
=2) 3.83 27.55 0.99 0.67 0.42 0.99 13 0
Modified IMC( = 0.3& = 1.74) 2.33 25.18 1.02 0.51 2.76 1.02 25 0
4.1.2 Robustness analysis - For Robustness analysis we have decreased by10% and has been increased by 10% then
Gp was obtained as below, be
1 9 . 0
44 . 0
1
=
s
s
e
Gp
4.1.3 Simulationon Results of DS-d method and IMC for Changed FOPDT system
0 5 10 15 20 25 30 35 40 45
0
0.5
1
1.5
Time
P
r
o
c
e
s
s
O
u
t
p
u
t
Modified IMC method
DS-d method
Figure 3 Unit Step Response of Modified IMC&DS-d method for Changed & of FOPDT system
Table 2.Time Domain Specification for changed & of FOPDT system
Tunning
Methods
Tr Ts Tsmax Tsmin Mp P Tp Mu
DS-d(
c
=2) 2.73 26.21 0.99 0.59 0.68 0 .99 11 0
IMC-Modified
( = 0.3& = 1.74)
23.10 40.93 1.46 0.53 21.01 1.46 27 0
As we compared DS-d method with Modified IMC method, the robustness of DS-d method is more.
4.2 Example 2
Consider Second order system
( )
( )( ) 5 1
2
) ( ) (
+ +
+
= =
s s
s
s Gd s Gp
Here we consider DS-d and IMC method for design of PID controller
Tunning Method
K Gc
DS-d approach
(
c
=2)
0 0.2 1
s
s s
Gc
667 . 0
2 334 . 1
2
66 . 0 + +
=
Modified IMC
( = 0.5, = 1.655)
0 0.2 1
( )
( ) s s
s
Gc
15 . 0 025 . 0 2
1 655 . 1
+
+
=
4.2.1 Simulation Result of DS-d approach and IMC approach
0 5 10 15 20 25 30 35 40
-1
-0.5
0
0.5
1
1.5
Time
P
r
o
c
e
s
s
O
u
t
p
u
t
Modified IMC method
DS-d Method
Figure 4 Unit Step Response of DS-d and IMC method for Second order system
International Journal of Application or Innovation in Engineering& Management (IJAIEM)
Web Site: www.ijaiem.org Email: editor@ijaiem.org
Volume 3, Issue 5, May 2014 ISSN 2319 - 4847
Volume 3, Issue 5, May 2014 Page 166
Table.3 Time Domain Specification for Second order system
Tunning
Methods
Tr Ts Tsmax Tsmin Mp P Tp Mu
DS-d(
c
=2) 1.51 6.90 1.00 0.83 0 1 1 0
Modified IMC
(=0.5,=1.65)
0.76
2.86
1.05
1.00
5.12
1.05
2
0
4.2.2 Robustness analysis - For Robustness analysis we have decreased
1
by10% and
2
has been increased by 10% then
Gp was obtained as follows,
( )
( )( ) 1 18 . 0 1 1 . 1
2
) (
+ +
+
=
s s
s
s Gp
4.2.3 Simulation Result of DS-d and IMC for changed Second order system
0 5 10 15 20 25 30 35 40
-1
-0.5
0
0.5
1
1.5
Time
P
r
o
c
e
s
s
O
u
t
p
u
t
Modified IMC method
DS-d Method
Figure 5 Unit step Response of DS-d and Modified IMC for Second order system
Table 4 Time Domain Specification of Modified IMC and DS-d for changed Second order system
Tunning
Methods
Tr Ts Tsmax Tsmin Mp P Tp Mu
DS-d(
c
=2) 0.86 5.73 1.00 0.80 0 1.46 1 146.3
Modified IMC ((=0.5,=1.65) 0.79 1.97 1.01 1.00 1.12 1.01 4 0
As we compared Modified IMC method with DS-d method the robustness of DS-d method is more.
5. CONCLUSION
The main objective of this study is to design robust PID controller for first order unstable time delay process and second
order process by using IMC Modified and DS-d approach. In the DS-d design method, the closed-loop time constant
c
is
the only design parameter, all other parameters are calculated analytically using it. Thus, the DS-d design procedure is
simple and easy to implement. Although the PID controllers are designed for disturbance rejection, the set-point
responses are usually satisfactory.Two simulation examples have been used to compare alternative design methods. The
simulation results demonstrate that the DS-d method provides better disturbance rejection than Modified IMC method
and provide satisfactory response to set point. The DS-d method furnishes a convenient and flexible design method that
provides good performance in terms of disturbance rejection and set-point tracking. The performance of the controller can
be further improved by modifying filter parameter.
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International Journal of Application or Innovation in Engineering& Management (IJAIEM)
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Volume 3, Issue 5, May 2014 ISSN 2319 - 4847
Volume 3, Issue 5, May 2014 Page 167
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AUTHOR
Ms. Yogita Dighe receieved the B.E degree in Instrumentation Engineering from Pravara Rural
Engineering College, Loni (M.S), India, in the year 2003. Presently she is working as a Lecturer in
Amrutvahini Polytechnic, Sangamner. She is currently a M.E scholar in Department of Instrumentation
Engineering, Loni (M.S), University of Pune, Pune, India.
Mr. Chandrakant B. Kadu is working as an Associate Prof. & HEAD, Instrumentation & Control
Engineering, Pravara Rural Engineering College, Loni (M.S), University of Pune, Pune, India. He is a
Member of Board of Studies Instrumentation, University of Pune, Pune .He is also Govering Council
Member of Instrumentation Society of India (ISOI) Bangalore. He has published more than 15 National
&International paper in the field of Process Control. Presently pursuing Ph.D from College of Engineering Pune (COEP),
University of Pune, Pune.