; 1
2
d
A a a
V
V m m
1
3
0.612 ; 1
2 2
LL a d a d a
V m V m V m
4.2.1.3 TOTAL HARMONIC DISTORTION (THD):
The total harmonic distortion, or THD, of a signal is a measurement of the
harmonic distortion and is defined as the ratio of the sum of the powers of all
harmonic components to the power of the fundamental frequency.
When the input is a pure sine wave, the measurement is most commonly the
ratio of sum of the powers of all higher harmonic frequencies to the power at the first
harmonic or fundamental frequency.
2 3 4 2
1 1
n
n
P
P P P P
THD
P P
This can be written as
1
1
total
P P
THD
P
Design And Specifications of DVR
Page 45
Measurements based on amplitudes (e.g. voltage or current) must be converted
to powers to make addition of harmonics distortion meaningful. For a voltage signal,
for example, the ratio of the squares of the RMS voltages is equivalent to the power
ratio
2 2 2 2
2 3 4
2
1
V V V V
THD
V
Where V
n
is the RMS voltage of nth harmonic and n=1 is the fundamental
frequency. THD is also commonly defined as an amplitude ratio rather than a power
ratio. Resulting in a definition of THD which is the square root of that given above
2 2 2 2
2 3 4
1
n
V V V V
THD
V
Measurements for calculating the THD are made at the output of a device under
specific conditions. The THD is usually expressed in percent as distortion factor or in
dB as distortion attenuation.
4.2.1.4 DSPACE RTI 1104:
By using the above SPWM technique pulses has been generated in
MATLAB/Simulink which has been fed to the switches of the inverter, but in order to
get the real time pulses we have used an interface for simulated pulses and inverter
known as dSPACE RTI 1104.
The dSPACE system is based on the DS1104 R&D Controller Board which
comprises both hardware and software. The DS1104 R&D Controller Board is a
standard board that can be plugged into a PCI slot of a PC. The DS1104 is specifically
designed for the development of high-speed multivariable digital controllers and real-
time simulations in various fields. It is a complete real-time control system based on a
603 PowerPC floating-point processor running at 250 MHz. For advanced I/O
purposes, the board includes a slave-DSP sub-system based on the TMS320F240 DSP
microcontroller.
For purposes of rapid control prototyping (RCP), specific interface connectors
and connector panels provide easy access to all input and output signals of the board.
Thus, the DS1104 R&D Controller Board is the ideal hardware for the dSPACE
Prototype development system for cost-sensitive RCP applications.
Using an adapter cable one can link external signals from the 100-pin I/O
connector on the board to Sub-D connectors. So it can make a high-density
Design And Specifications of DVR
Page 46
connection between the board and the devices of specified application via Sub-D
connectors.
Specific interface connector panels provide easy access to all the input and
output signals of the DS1104 R&D Controller Board:
The CP1104 Connector Panel provides easy-to-use connections between the
DS1104 R&D Controller Board and devices to be connected to it. Devices can
be individually connected, disconnected or interchanged without soldering via
BNC connectors and Sub-D connectors. This simplifies system construction,
testing and troubleshooting.
In addition to the CP1104, the CLP1104 Connector/LED Combi Panel
provides an array of LEDs indicating the states of the digital signals.
Fig.4.8: dSPACE RTI 1104 connector panels
Connector Pins: The CP1 to CP16 connectors are female BNC connectors.
Their shells are connected to GND. Among this CP1 to CP8 are ADC connector pins
and CP9 to CP16 are DAC connector pins. Digital I/O Connector Slot CP17 & Slave
I/O PWM Connector CP18 which is used for interfacing signals from outer system.
As dSPACE can bear a maximum voltage of +/-10V it is to be cautioned that a
voltage divider must be used to maintain a constant voltage and to ensure that it
should not exceed the limit. The hardware sensing model used for this DVR has been
shown in Fig.4.9.
Design And Specifications of DVR
Page 47
230 V
1 AC
SUPPLY
100K
2K
V
o
u
t
Fig.4.9: Voltage Sensor
S out
out
out
V R
V
R R
The voltage rating of the outputs being gathered from dSPACE is of 5V which
is difficult to drive gate pulse required by the MOSFET switches of the inverter. A
minimum of +12V is required to TURN ON MOSFET switch and -12V is required to
TURN OFF MOSFET, So to amplify 5V of dSPACE gate signal, Gate driver circuit
is required.
1- AC
Supply
4
7
0
F
4
7
F
470F
47F
15V DC
5VDC
7815
7805
(a)
Design And Specifications of DVR
Page 48
5
V
24
7
5
23
6
6
N
1
3
7
1
5
V
V
C
C
V
E
G
N
D
N
/
C
N
/
C
N
/
C
I
N
A
I
N
B
G
N
D
N
/
CV
S
4 7 0
470
4
7
0
5
0
5
0
1K
1 K 0 . 0 1 F
4.7V
TO SWITCH (S1)
1
A
1
Y
2
A
2
Y
3
A
3
Y
G
N
D
V
C
C
6
A
6
Y
5
A
5
Y
4
A
4
Y
7 4 L S 0 7
G
A
T
E
D
R
I
V
E
R
TO SWITCH
(S2)
TO SWITCH
(S3)
TO SWITCH
(S4)
G
A
T
E
D
R
I
V
E
R
G
A
T
E
D
R
I
V
E
R
G
A
T
E
D
R
I
V
E
R
4
4
2
5
F R O M d S P A C E
B
U
F
F
E
R
I
C
O
P
T
O
C
O
U
P
L
E
R
D
R
I
V
E
R
I
C
(b)
Design And Specifications of DVR
Page 49
(c) (d)
Fig.4.10: (a) Power supply required to operate Gate driver, (b) Gate driver circuit of
IC 4425 (c) Hardware implementation of Gate driver circuit, (d) Pulses to Gate driver
from dSPACE Control Panel to interface
4.2.2 HARMONIC FILTER:
1. Inductor Design:
Magnetic cores used in power electronic applications like transformers
and inductors usually fall in four broad categories. The first is bulk metal, like
electrical steels which are processed from furnace into ingots and then hot and cold
rolled. Second is powdered core materials where are manufactured from various types
of iron powders mixed with special binding agents and then die-pressed into toroids,
EE cores and slugs. The third is ferrite materials which are ceramics of iron oxide,
alloyed with oxides or carbonate of Mn, Zn, Ni, Mg, or Co. The most recent category
is of metallic glasses where the bulk metal is rapidly quenched from molten state to
obtain a glassy state without a regular arrangement of metallic atoms in the material.
One of the design objectives is to derive most general procedures for inductor
construction. Theoretically, it should be possible to accurately design the inductor
using just the property of permeability of the core material. But practically, the design
procedure for Ferrite, Amorphous and Powdered material is different, mainly because
vendors follow different conventions and specify the material properties in many
ways. Amorphous and powder cores also have nonlinear permeability, ie the
permeability varies with the applied field, temperature, air gap etc. Hence the design
procedure for different materials is heavily affected by the available data from
Design And Specifications of DVR
Page 50
vendors, and it is not possible to define a single generalized accurate design process
for all materials.
2. Capacitor Selection:
Metallised Polypropylene capacitors are AC capacitors that are
especially designed for high frequency current operation. These capacitors are
constructed from polypropylene films on which an extremely thin metal layer is
vacuum deposited. The metal layer typically consists of aluminium or zinc of
thickness in range of 0.02mm to 0.05mm. Several such layers are wound together in a
tubular fashion to get higher capacitance.
Metallised film capacitors are characterized by small size, wide operating
frequency range, low losses, and low to medium pulse handling capabilities, low
parasitic impedances and self-healing. In regular film-foil capacitors, if the electrode
foils of opposite potential are exposed to each other because of wearing away of the
dielectric, the foils will short and the capacitor will be destroyed. But in case of
metallised polypropylene capacitors, because of the extremely thin metal layer, the
contact points at the fault area are vaporised by the high energy density, and the
insulation between foils is maintained. Due to the above reasons, these capacitors are
perfectly suited for grid connected filter operation. The designing parameters of
inductor as 10 mH and capacitor as 105 F of LC filter have been analysed from the
reference paper [24].
F
R
O
M
I
N
V
E
R
T
E
R
T
O
I
N
J
E
C
T
I
O
N
T
R
A
N
S
F
O
R
M
E
R
10 mH
1
0
5
F
LC FILTER
Fig.4.11: Design of LC Filter and its hardware implementation.
4.2.3 Injection/Booster Transformer:
The transformers used throughout this project should be run over by a polarity
test which is the most accurate point while making a coupling with source voltage. It
is based upon the process of aiding and apposing flux direction which plays a crucial
Design And Specifications of DVR
Page 51
role while placing the device in the circuit. By using injection transformer (after
running through polarity test) it has been shown in the Fig.4.12 clearly regarding the
connection of sensitive loads with the high loads.
The filtered inverter output is injected to the line with the help of an injection
transformer. The Injection / Booster transformer is a specially designed transformer
that attempts to limit the coupling of noise and transient energy from the primary side
to the secondary side. The basic function of this transformer is to connect the DVR to
the distribution network couples the injected compensating voltages generated by the
voltage source inverters to the incoming supply voltage and it has to maintain low
impedance on the load side to avoid voltage drop across the load. The design of this
transformer is very crucial because, it faces saturation, overrating, overheating, cost
and performance. The injected voltage may consist of fundamental, desired
harmonics, switching harmonics and dc voltage components. If the transformer is not
designed properly, the injected voltage may saturate the transformer and result in
improper operation of the DVR and a practical hardware has been designed as shown
in Fig.4.13
CONVERTER
ENERGY
STORAGE
LARGE
LOAD
FILTER
CONTROL
UNIT
1:1
230/230V
1:1
115/115V
SENSITIVE
LOAD
SUPPLY
CB
PCC
D
V
R
Fig.4.12: Transformers placement after polarity Test
Design And Specifications of DVR
Page 52
Fig.4.13: Hardware implementation of Injection Transformer.
4.2.4 Storage Devices:
DC energy storage device provides the real power requirement of the DVR
during compensation as shown in Fig.4.14 with the use of rectifier circuit. Various
storage technologies have been proposed including Flywheel energy storage, Super-
conducting magnetic energy storage (SMES) and Super capacitors these have the
advantage of fast response. An alternative is the use of lead-acid battery batteries were
until now considered of limited suitability for DVR applications since it takes
considerable time to remove energy from them. Finally, conventional capacitors also
can be used. But rectifier has been used here to convert 230 V AC to (0-230) V DC
which maintain variable DC supply rather than constant DC.
Fig.4.14: Equivalent design of energy storage device and its hardware implementation
4.2.5 Detection and Control Block:
The basic proportional control scheme is implemented which is discussed
below. Firstly the error signal is detected by the comparison of the sag voltage with
the supply voltage and this error signal is proportionally used to the generation of the
pulses which are given to the switches of the voltage source inverter.
Design And Specifications of DVR
Page 53
Fig.4.15: Complete Hardware set up of DVR
Discussion on Results
Page 54
CHAPTER 5
DISCUSSION ON RESULTS
5.1 MATLAB SIMULINK MODEL AND SIMULATION RESULTS
Now the scenario of real time DVR system comes into picture. The real word
proposed DVR topology and control algorithm has been used here for emergency
control during the voltage sag. The heavy load has been considered as the cause of
disturbance in the simulations. The test system is modeled first in
MATLAB/SIMULINK [25] software and enacted as hardware. Fig.5.1 shows the
intentional creation of voltage sag by switching ON large loads suddenly. Fig.5.2
shows the initial conditions, supply voltage of 230V
rms
and load voltage of 200V
rms
when there is no occurrence of sag (Pre Sag condition). Switching ON of heavy load
of 1.3KW across a sensitive load has created voltage sag of 130V
rms
which is
resembled in Fig.5.3 and Fig.5.4 shows the SIMULINK for mitigating 70% voltage
sag by introducing a DVR in series with the sensitive load. The DVR has been
modeled by its components in the MATLAB/SIMULINK software to make more
effect of real simulation results. A single phase inverter has been used so that each
phase could be controlled separately.
Fig.5.1: Creation of voltage sag using large loads
Discussion on Results
Page 55
Fig.5.5 shows the closed loop control using PI Controller to compare the sag
and produce the error signal to trigger as pulses. After the pulses are fed to inverter
which generates the output voltage as shown in Fig 5.6. After injecting these voltages
into the load in series with load voltage the occurred sag will be mitigated. The
Fig.5.7 shows the mitigation of voltage sag after the voltage parameter has been
injected by DVR
Fig.5.2: Output waveform supply voltage, supply current and load voltage
Fig.5.3: Creation of 70% sag in the load voltage
Discussion on Results
Page 56
Fig.5.4: Mitigation of sag using DVR
Fig.5.5: Closed-loop control using the PI controller
Discussion on Results
Page 57
Fig.5.6: Output voltage of the single phase inverter using with and without filter.
Fig.5.7: Mitigation of voltage sag using DVR
Discussion on Results
Page 58
5.2 HARDWARE ENACTMENT
The Hardware enactment had been so crucially built up. Each and every device
has been used with utmost care. Many practical problems have been observed while
developing this project throughout the tenure of this project. Even the day before
starting this thesis to script, small difficulties have been overcome to process out an
attractive and exact desired output of this project.
The main focus to describe the above thought is that all the switches used over
here, ICs etc will never work as of ideal case. So cautiousness and constant patience
is more important while building up a hardware project.
Table.5.1: List of Hardware components
Sr
No
Component Rating Purpose
1 Buffer 74LS07 Driver Circuit
2 Regulator 7805, 7815 Driver Circuit
3 Driver IC MIC 4425 Driver Circuit
4 Opto Coupler 6N137 Driver Circuit
5 Capacitors 470 F, 47 F, 0.01 F Driver Circuit
6 Resistors 50 , 100 , 470 Driver Circuit
7 Bridge Rectifier MIC W08M Driver Circuit
8 Zener Diode 4.7 V Driver Circuit
9 Connectors 2 Pin, 5pin Driver Circuit
10 MOSFET IRF460 Inverter
11 Heat Sinks For Every Switch Inverter
12 Connectors 2 Pin, 4 Pin Inverter
13 Resistors 1 K Inverter
14 Resistors 100 K, 2 K Voltage Divider
15 Capacitors 0.01 F Voltage Divider
16 Connectors 4 Pin Voltage Divider
17 DC Capacitor 330 F, 450 V DC-Link
18 Resistor 10 K (10W) DC-Link
19 Bridge Rectifier MIC KBPC2510 DC-Link
20 Switch SPST DC-Link
Discussion on Results
Page 59
21 Dimmerstat (0-230)V, 8A, 1 Power Supply
22 dSpace RTI 1104 Trigger Pulse Interface
23 Transformers 230/230V, 1 KVA (1:1) Isolation
24 Step Down Transformer 230/115V, 2 KVA Isolation
25 Transformer 110/110V 1 KVA (1:1) Injection Transformer
26 Capacitor 105 F, 250V Harmonic Filter
27 Inductor 10 mH Harmonic Filter
28 Rheostat 1 , 5A Source Impedance
29 MCB 10 A, 240 V High Load Switch
30 Bulb 40 W, 230 V Sensitive Load
31 Bulb 1000 W, 230V High Load
5.2.1 MAIN SPECIFICATIONS:
Table.5.2: System parameters
Sr No Specifications Rating
1 Nominal Grid Voltage 110 Vrms
2 Nominal Load Voltage 110 Vrms
3 Switching/Sampling freq 1 KHz
5.3 PROBLEMS FACED:
While measuring triggering pulses of Driver circuit it is mandatory to use
differential probes to avoid many mis-matches and problems by measuring
with normal probes.
Specifications of Switches need be analyzed perfectly while choosing
MOSFET switches.
Gate resistors used for gate terminal of MOSFET Switches should be placed
near Switch and avoid placing near driver IC which may get overheated and
leads to damage to driver IC.
Transformers should be necessarily used for isolation purpose to avoid
problems while interfacing devices.
Discussion on Results
Page 60
Polarity test need to be checked out thoroughly before using any transformers
to clear out aiding or opposing techniques.
After measuring the output of inverter, analyze THD and identify the
harmonics, based on which designing of filters is processed.
5.3.1 BASIC CONDITIONS:
DVR is basically connected in series with the load.
The gate pulses provided for the inverter has been bypassed through dSPACE
system.
A Resistive load (Bulbs) has been used as shown in with a RMS load voltage
of 110 Volts for open loop.
Intentionally sag has been induced by switching a high resistive load (higher
ratings Bulbs) suddenly, which is connected along with actual sensitive load
(lower rating Bulb).
Differential probe has been used here with a multiplying factor of 20X for
every measurement throughout the tenure of the project.
5.4 MODES OF OPERATION:
1) Open Loop Control
2) Closed Loop Control
5.4.1 OPEN LOOP CONTROL:
The working of DVR can be segregated into two basic operational modes. One
of the modes is without controlling process known as open loop and with the help of
controlling process as the closed loop control.
Open loop control deals with the process of operating DVR model manually
whenever voltage sag occurs across the load. This process speaks about the
comparison of voltage sag with normal voltage to generate pulses and further feeding
it to inverter for generating an injected voltage. But this voltage can be injected only
when DVR is turned ON manually. So the mitigation of Sag [26] can be delayed by
processing it manually.
Discussion on Results
Page 61
The basic model of open loop control for pulse generation required in
hardware for DVR [27] using MATLAB Simulink has been shown in
Fig.5.8(a).
MATLAB simulink pulses have been interfaced with dSAPCE which are
shown in Fig.5.8 (b).
By using gate driver circuit pulses are amplified from 3V
p-p
to 30V
p-p
which is
shown in Fig.5.8 (c).
The Fig.5.9 speaks about the load working normally for sensitive load of Bulb
40 W with a Source voltage =16.0 V p-p (i.e. 1620 = 320 Vp-p i.e
113.3Vrms).
Now suddenly when a high load of 1000W is switched ON a voltage sag has
been occurred across the load as shown in Fig.5.10 working under pre sag
condition with a Load voltage =15.6 V p-p (i.e. 15.620 = 312 Vp-p i.e
110.3Vrms) and it clearly shows the marks for various modes of operation.
The load voltage has been working with voltage dip developing voltage sag.
Point A resembles the occurrence of sag by switching ON high resistive load
which dips the sensitive load voltage and is clearly visualized in Fig.5.11
(12.420 = 248 Vp-p i.e 87.6 Vrms).
It means that sag has been occurred for 64 Vp-p as shown in Fig.5.12 (i.e
1.60220 = 64 Vp-p i.e. 22.7 Vrms). So the contribution of DVR comes into
picture.
Area B resembles the time when DVR has been switched ON manually as
shown in Fig.5.10.
Now the injected voltage of 64 V p-p by DVR has been observed which is
represented in Fig.5.13 (i.e V
DVR
= 3.220 = 64 Vp-p i.e 22.6 Vrms).
Fig.5.14 shows the way of injected voltage by DVR which increases the
voltage from 248 Vp-p to 312 Vp-p.
After the injection of voltage as shown in Fig.5.15, the measured Load
voltage=15.6 Vp-p (i.e. 15.620 = 312Vp-p i.e 110.3 Vrms).
The overall THD analysis of Load voltage sag has been observed as shown in
Fig.5.16 which has been reduced to nearly 5.7%, maintaining a THD within
limit.
Discussion on Results
Page 62
Point C (Fig.5.10) again shows about the time when DVR has been turned
OFF to have a clear understanding regarding the operation of DVR and the sag
continues.
The overall specification which has been measured for complete operation of
DVR in open loop condition is tabulated below.
Table.5.3: Overall specifications of DVR in open loop condition
Parameter Peak to Peak (20) RMS
Vs = 16.0 V p-p 320 V 113.3 V
V
L
= 15.6 V p-p 312 V (Pre Sag) 110.3 V
V
L
= 12.4 V p-p 248V (During Sag) 87.6 V
Sag = 1.62 = 3.2V p-p 64V 22.7 V
Injection = 3.2V 64V 22.7 V
Fig.5.8 (a): Basic Model of Open Loop Control for pulse generation
Discussion on Results
Page 63
Fig.5.8 (b): Hardware pulses from dSPACE
(Channel 1: Carrier signal Channel 2: Reference Signal
Channel 3: Pulse for switches S
1
& S
2
Channel 4: Pulse for switches S
3
& S
4
)
Fig.5.8 (c): Hardware pulses after gate driver circuit
(Channel 1: Pulse for switches S
1
& S
2
Channel 2: Pulse for switches S
3
& S
4
)
Discussion on Results
Page 64
Fig.5.9: Source Voltage:
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
Channel 4: Voltage across inverter V
inv
)
Fig.5.10: Load Voltage during PreSag :
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
Channel 4: Voltage across inverter V
inv
)
Discussion on Results
Page 65
Fig.5.11: Load Voltage when sag dip occurs:
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
Channel 4: Voltage across inverter V
inv
)
Fig.5.12: Load Voltage when sag occurs :
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
Channel 4: Voltage across inverter V
inv
)
Discussion on Results
Page 66
Fig.5.13: Injected Voltages by DVR:
Fig.5.14: Injected Parameters by DVR
Discussion on Results
Page 67
Fig.5.15: Load Voltage after mitigation by DVR
Fig.5.16: THD Analysis of Load Voltage
V
L
Discussion on Results
Page 68
5.4.2 CLOSED LOOP OPERATION
Closed loop control deals with the process of operating DVR model
automatically whenever voltage sag occurs across the load. This process speaks about
the comparison of voltage sag with normal voltage to generate pulses and further
feeding it to inverter for generating an injection voltage. This process automatically
injects the voltage in series with the load to mitigate the voltage sag. Here it ensures
that there is no delay in processing it due to controlling methods.
The basic model of closed loop control for pulse generation required in
hardware for DVR [28], [29] using MATLAB Simulink [30] has been shown
in Fig.5.17.
The Fig.5.18 speaks about the Load voltage working normally for sensitive
load of Bulb 40 W with a Load voltage =17.6 Vp-p (i.e. 17.620 = 352 Vp-p
i.e 124.5 Vrms).
Now suddenly when a high load of 1000W is switched ON a voltage sag has
been occurred across the load as shown in Fig.5.19 working under pre sag
condition with a Load voltage =17.6 V p-p (i.e. 17.620 = 352 Vp-p i.e
124.5Vrms). The load voltage has been working with a voltage dip developing
voltage sag.
Point A resembles the occurrence of sag by switching ON high resistive load
which dips the sensitive load voltage and is clearly visualized in Fig.5.20
(1220 = 240 Vp-p i.e 84.9 Vrms).
It means that sag has been occurred for 5.6 Vp-p as shown in Fig.5.21 &
Fig.5.22 (i.e 2.8220 = 112 Vp-p i.e. 39.5 Vrms). So the contribution of
DVR comes into picture.
Area B resembles the time when DVR has been switched ON automatically as
shown in Fig.5.23.
Now the injected voltage of 5 V p-p by DVR has been observed which is
represented in Fig.5.25 (i.e V
DVR
= 520 = 100 Vp-p i.e 35.4 Vrms).
After the injection of voltage as shown in Fig.5.24, the measured Load
voltage=17.6 Vp-p (i.e. 17.620 = 352Vp-p i.e 124.5 Vrms).
The overall THD analysis of Load voltage sag has been observed as shown in
Fig.5.26 which has been reduced to nearly 5.45%, maintaining a THD within
limit.
Discussion on Results
Page 69
Point C (Fig.5.23) again shows about the time when DVR has been turned
OFF automatically to have a clear understanding regarding the operation of
DVR and the sag continues.
The overall specification which has been measured for complete operation of
DVR in closed loop condition is tabulated below.
Table.5.4: Overall specifications of DVR in closed loop condition
Parameter Peak to Peak (20) RMS
Vs = 17.6 V p-p 352 V 124.5 V
V
L
= 17.6 V p-p 352 V (Pre Sag) 124.5 V
V
L
= 12.0 V p-p 240 V (During Sag) 84.9 V
Sag = 2.82 = 5.6 V p-p 112 V 39.5 V
Injection = 5V 100 V 35.4 V
Fig.5.17: Basic Model of Open Loop Control for pulse generation
Discussion on Results
Page 70
Fig.5.18: Source voltage
(Channel 1: Voltage across Source Vs; Channel 2: Voltage across Load V
L
)
Fig.5.19: Load voltage
(Channel 1: Voltage across Source Vs; Channel 2: Voltage across Load V
L
)
Discussion on Results
Page 71
Fig.5.20: Load voltage when sag Dip occurs
(Channel 1: Voltage across Source Vs; Channel 2: Voltage across Load V
L
)
Fig.5.21: Load voltage when sag occurs
(Channel 1: Voltage across Source Vs; Channel 2: Voltage across Load V
L
)
Discussion on Results
Page 72
Fig.5.22: Load voltage when sag occurs
(Channel 1: Voltage across Source Vs; Channel 2: Voltage across Load V
L
)
Fig.5.23: Source voltage
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
)
A
B
A C
Discussion on Results
Page 73
Fig.5.24: Load voltage after mitigation
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
)
Fig.5.25: Injected DVR Voltages V
DVR
(Channel 1: Voltage across Source V
s
Channel 2: Voltage across Load V
L
Channel 3: Injected DVR Voltage V
dvr
)
Discussion on Results
Page 74
Fig.5.26: THD Analysis of Load Voltage
The thought of the author conveys many issues experienced during the tenure of
this project. The main origin of any project starts with the software analysis rather
than indulging directly into hardware enactment. So the complete production of this
project started with the bean of MATLAB SIMULINK which has initialized and
enhanced the desire of developing DVR. So basically this episode prologue with
simulation results of DVR which has involved an epic device known as dSPACE
which showered all the eradication of minute problems while generating triggering
pulses required for the heart of the DVR, the inverter. As the simulation results
excited the next episode of Hardware analysis with the production of driver circuit
which has migrated the analysis towards the production of injection voltage required
to mitigate the voltage sag which is the basic aim of this project. Finally it has
sprinkled a spark of merriment in heart, the day when DVR has worked through and
implemented its duty in a desired manner and thats the epilogue of this project.
It is the case when power system network is connected to DVR and complete set
up has been shown in Fig.5.27 for mere understanding. It has been noticed that
controlling scheme is the important fact of the complete system for future scope.
Discussion on Results
Page 75
Fig.5.27: Complete Hardware set up for sag mitigation using DVR
Conclusion & Future Scope
Page 76
CHAPTER 6
CONCLUSION & FUTURE SCOPE
CONCLUSION:
The documentary of this thesis has been pleasantly scripted with keen
curiosity and paramount heed. Each and every theme has been reviewed by many
skilled members to avoid any perplexity or gaffe throughout the libretto. The
simulation results have healed up the wounds before initializing this project which
excited the view of power quality issues to instigate a hardware project.
The triggering of this project escorted to edifice up DVR model in a software
analysis which has allowed creating a power quality issue of voltage sag. This voltage
sag wag intentionally created by switching on high loads and it has been analyzed.
The harvest of simulation was completely satisfied by analyzing the mitigation of sag
intellectually. It has then migrated towards the building up DVR model in hardware
era.
Hardware scenario has been geared up with drafting up driver circuit which
had induced the driving pulses with the help of dSPACE by comparing normal
voltage with voltage sag and fed to inverter. This inverter has yielded with harmonic
distortions. This distorted harvest has been filtered out by LC filter. The furnished
capitulate has been tried to infuse in series with the load and it has been keenly
pragmatic that DVR has involved in mitigating sag effectively. The efficient
mannered mitigation was superiorly observed for closed loop.
FUTURE SCOPE:
As the DVR modeled over here is of single phase, it can have a glowing
developed scope in future for three phase DVR by using different level inverters.
Many modulation techniques and few control methods can be adopted in the area of
harmonic eradication.
I would like to cease it by saying that DVR is not only reserved to mitigate sag
but it can have wider applications when equipped with many practical working
devices for controlling different types of power quality disturbances, by using
advanced controllers.
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