Govindarajan
Overview
Introduction
The Kernel
Process Management
Scheduling
Memory Management
System Calls
Interrupts
Virtual FileSystem
Virtual Machines
Introduction
X! "rchitecture
an x86 CPU with registers, execution unit, and memory
management
Memory
Disk
Dispay
!ther "esources
#$!% "!M
Cock, etc&
Introduction
'pp( 'pp) 'pp*
Introduction
" program that acts as an intermediary #etween a user
o$ a computer and the computer hardware%
Operating system goals
+xecute user programs
Contros execution o, programs to prevent errors and improper use
o, the computer
Make the computer system convenient to use
Use the computer hardware optimay
Manages a resources
Decides -etween con,icting re.uests ,or e,,icient and ,air resource
use
/erne 0 %ystem programs
Introduction
The Kernel
Process Management
Process
1undamenta a-straction in Unix
' program in execution
$ncudes
Program counter
%tack
Data and text section
"esources
'ddress space
!ne or more execution threads
Process in Memory
Process &esctriptor
Process Management
Process Creation
,ork23
C!4 pages
Process descriptor 2dup5task5struct233
%et 6'%/5U7$76+""UP6$#8+
get5pid23
exec23
v,ork23
cone23
Process Creation
Process States
Scheduling
Scheduler
Divides the ,inite resource o, CPU time -etween runna-e
processes
#asis o, mutitasking operating systems
Co9operative
Pre9emptive
Utii:e processor time optimay
Decide what process to run next -ased on a poicy
$;! -ound
CPU -ound
Process priority 29)< to 0(=3
Scheduling
Scheduling
CP' scheduling decisions may ta(e place when a
process
%witches ,rom running to waiting state
%witches ,rom running to ready state
%witches ,rom waiting to ready
6erminates
Process Management
Time)sharing
Prioriti:ed credit9-ased > process with most credits is schedued next
Credit su-tracted when timer interrupt occurs
4hen credit ? <, another process chosen
4hen a processes have credit ? <, recrediting occurs
#ased on ,actors incuding priority and history
*eal)time
%o,t rea9time
Posix&(- compiant > two casses
1C1% and ""
@ighest priority process aways runs ,irst
Scheduling
Scheduling
Memory Management
Program must -e -rought 2,rom disk3 into memory and paced
within a process ,or it to -e run
Main memory and registers are ony storage CPU can access
directy
"egister access in one CPU cock 2or ess3
Main memory can take many cyces
Cache sits -etween main memory and CPU registers
Protection o, memory re.uired to ensure correct operation
Memory Management
Memory Management
'ddress -inding o, instructions and data to memory addresses
can happen at three di,,erent stages
Compile timeA $, memory ocation known a priori, a#solute code can
-e generatedB must recompie code i, starting ocation changes
+oad timeA Must generate relocata#le code i, memory ocation is not
known at compie time
,-ecution timeA #inding deayed unti run time i, the process can -e
moved during its execution ,rom one memory segment to another&
7eed hardware support ,or address maps 2e&g&, -ase and imit
registers3
Memory Management
'ddress -inding o, instructions and data to memory addresses
can happen at three di,,erent stages
Compile timeA $, memory ocation known a priori, a#solute code can
-e generatedB must recompie code i, starting ocation changes
+oad timeA Must generate relocata#le code i, memory ocation is not
known at compie time
,-ecution timeA #inding deayed unti run time i, the process can -e
moved during its execution ,rom one memory segment to another&
7eed hardware support ,or address maps 2e&g&, -ase and imit
registers3
Memory Management
Memory Management
6he concept o, a ogica address space that is -ound to a
separate physical address space is centra to proper memory
management
+ogical address > generated -y the CPUB aso re,erred to as virtual
address
Physical address > address seen -y the memory unit
8ogica and physica addresses are the same in compie9time and
oad9time address9-inding schemes
ogica 2virtua3 and physica addresses di,,er in execution9time
address9-inding scheme
Memory Management 'nit
.ardware device that maps virtual to physical
address
In MM' scheme/ the value in the relocation register
is added to every address generated #y a user
process at the time it is sent to memory
The user program deals with logical addresses0 it
never sees the real physical addresses
Memory Management
" process can #e swapped temporarily out o$ memory to a #ac(ing store/
and then #rought #ac( into memory $or continued e-ecution
1ac(ing store 2 $ast dis( large enough to accommodate copies o$ all
memory images $or all users0 must provide direct access to these memory
images
*oll out/ roll in 2 swapping variant used $or priority)#ased scheduling
algorithms0 lower)priority process is swapped out so higher)priority process
can #e loaded and e-ecuted
Ma3or part o$ swap time is trans$er time0 total trans$er time is directly
proportional to the amount o$ memory swapped
Modi$ied versions o$ swapping are $ound on many systems 4i%e%/ '5IX/ +inu-/
and 6indows
System maintains a ready 7ueue o$ ready)to)run processes which have
memory images on dis(
Swapping
Memory Management
Main memory usuay into two partitionsA
"esident operating system, usuay hed in ow memory with interrupt
vector
User processes then hed in high memory
"eocation registers used to protect user processes ,rom each
other, and ,rom changing operating9system code and data
#ase register contains vaue o, smaest physica address
8imit register contains range o, ogica addresses > each ogica
address must -e ess than the imit register
MMU maps ogica address dynamically
Contiguous "llocation
Mutipe9partition aocation
@oe > -ock o, avaia-e memoryB hoes o, various si:e are
scattered throughout memory
4hen a process arrives, it is aocated memory ,rom a hoe arge
enough to accommodate it
!perating system maintains in,ormation a-outA
aocated partitions
8'P$C
$!'P$C
Provides ))H usa-e $"I vectors ,rom an $;! 'P$C
8'P$Cs manage a externa interrupts ,or the processor that it is part
o,
$;! 'P$Cs contain a redirection ta-e to route $nterrupts to 8'P$Cs
Virtual Machines
Virtual Machines
:uestions;
Product &iagrams 2 VMware Server
Product &iagrams 2 VMware Server
+%D %erver
Product Diagrams > FMware $n,rastructure *
+%D %erver
Product Diagrams > FMware $n,rastructure *