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Figure 1.

Three reported source followers


An Improved Source Follower with Wide Swing and
Low Output Impedance
Suming Lai, Hong Zhang,Guican Chen, Jianchao Xu
Department of Microelectronics, Xian Jiaotong Univ.
Xian, China
lai_suming@stu.xjtu.edu.cn


AbstractThis paper presents a wide-swing source follower with
resistive load capability designed in TSMC 0.18m CMOS
technology. Two additional amplifiers are employed to enlarge
its input swing. The resultant stability problem is solved by a
simple compensation scheme based on analysis of the system
transfer function. Under a 1.8V supply the source follower,
when loaded by a 1K resistor and shifting the level of 500mV,
achieves total harmonic distortion (THD) of -95.6dB with 0.2V
pp

input and -67.6dB with 1.2V
pp
input at 10MHz respectively.
I. INTRODUCTION
In modern circuit design, the source follower, as one of the
most basic building blocks, is widely employed in the designs
of buffers, current mirrors [1], differential OTAs with rail-to-
rail common-mode input voltage, linear transcondance
elements, especially in intermediate frequency (IF)
continuous-time filters [2-4] and analog multipliers [5]. Most
of them require a linear source follower with low output
impedance and a considerable input swing.
As the devices scale down, the supply voltage reduces
while the threshold voltage of MOSFETs downscales not as
much and the short-channel effects become increasingly
phenomenal. The crossfire of these factors diminishes the
room for trade-offs, and hence toughens the design of a
conventional source follower (shown in Fig. 1(a)) to meet
requirements of wide input swing and resistive load capability
for the state-of-the-art circuits. A so-called flip voltage
follower (shown in Fig. 1(b)) is presented in [1] to overcome
the reduced supply. Ascribing to its simple but relatively
weaker feedback network, however, it has a severe
disadvantage that the voltage at the sensing node (i.e. node F
in Fig. 1(b)) drops relatively faster with the rising input. The
larger voltage drop at the node F makes the input device M
1

reach the edge of saturation region more quickly.
Consequently, it suffers from a smaller input swing. An
improved super source follower is proposed in [6] (shown in
Fig.1(c)) to enlarge the swing by inserting a common-gate
(CG) amplifier into the feedback path to suppress big changes
at the sensing node. However, its work is incomplete in the
absence of addressing the stability problem introduced by the
multi-stage feedback path. This drawback severely limits its
applications for higher frequencies. In addition, the CG
amplifier draws currents from the main branch of the circuit,
which brings along extra output error as long as the finite
output resistance of I
1
and I
3
are taken into account.
In this paper, an improved source follower with wide-
swing and low output resistance is proposed. The follower
adopts two additional amplifiers with stability enhancement to
enlarge its input swing and reduce its output resistance.
II. PRINCIPLES OF THE CIRCUIT
Source follower is known to be capable of level shifting
and resistive-load driving owing to its intrinsic local feedback.
In the following discussion, we will introduce a new method
to enhance its negative feedback so as to improve the input
swing of the circuit when it is resistively loaded.
A. The Simple Source Follower
In Fig. 1(a), if R
L
is low (e.g., comparable to the reciprocal
of the transconductance of M
1
), the source follower will lose
its accuracy of voltage following even with an ideal current
source because with Vo rising, the increased current flowing
through M
1
augments the voltage shift by virtue of the square
dependence of drain-to-source current on the overdrive
voltage of a MOSFET. To achieve a low output resistance so
as to drive a relatively smaller resistor, the proposed source
follower combines the features of the simple source follower
and a large driving-current provider an inverting amplifier
which is allowed to work over all regions instead of only in
This work is supported by Applied Materials Innovation Fund under
contract XA-AM-200507.
814 978-1-4244-2342-2/08/$25.00 2008 IEEE.

http://www.paper.edu.cn

TABLE I. LIST OF PARAMETERS IN TRANSFER FUNCTION
Terms Order of values Terms Order of values
Gm1p, Gm1n 100S Gm2, g1, g2 10S
Gm3,gL 1mS C1, C2 10fF
CGD 1fF CL 100fF


Figure 2. Concept of the proposed source follower

+-
+ -

Figure 3. Small-signal equivalent of the proposed source follower
saturation region.
B. The Improved Source Follower
The conceptual diagram is shown in Fig. 2(a). If without
the inverting amplifier, the output voltage would remain I
b
R
L
,
and hence there is no following at the output node while the
voltage at node F (V
F
) would response contrarily to the input
change. As long as the amplifier has been installed, the
response at the node F is transferred to the output node
through the steep transition characteristics of the amplifier.
Therefore, any over- or under-following of the output will be
reflected by up- or down-change of V
F
which drives the
amplifier to correct the mal-following of the output. On the
other hand, once I
b
and the design parameters of M1 are set,
the level shift (i.e., V
GS
of M
1
) is determined. Thereby the
current source and M
1
are operating as the reference and
stabilizer of the voltage shift, while the amplifier is acting as
the major provider of driving current for the resistive load.
If the amplifier is loaded with only capacitors, then
transition region of the amplifier is normally narrower than the
swing (V
SW,F
) of V
F
. Therefore, V
SW,F
is sufficient to achieve
rail-to-rail output voltages of the amplifier and hence the
output port gains the strength to track the changes of the input
over a wide range. After loaded with resistors, however, the
transition slope declines, which necessitates a widened V
SW,F

to achieve the wide output range. The larger V
SW,F
results in a
bigger shifting error due to the finite output impedance of the
current source because whenever the input goes down, V
F
will
be charged up reducing the bias current, I
b
, and hence
decreasing the voltage shift, and vice versa. Furthermore, if
the load resistor is excessively small, V
F
will drop too low for
M
1
to maintain saturation, impeding the output to rise to the
right level.
Therefore a non-inverting amplifier is inserted before the
amplifier so as to minimize V
SW,F
and to extend the input
swing of the amplifier simultaneously, as depicted in Fig. 2(b).
Thereby the feedback path, composed of the input device M
1
,
the non-inverting amplifier and the inverting amplifier,
performs a frequency characteristic of a cascaded three-stage
amplifier and hence calls for compensation for stability.
III. ANALYSIS AND DESIGN OF THE CIRCUIT
A. Analysis of Transfer Function
The small-signal equivalent of the proposed source
follower is depicted in Fig. 3. Because M
1
in Fig. 2 is both on
the feed-forward path and the feedback path, it can be
described as two transconductors with opposite differential
input polarities as G
m1p
and G
m1n
in Fig. 3, while G
m2
and G
m3

correspond to the non-inverting amplifier and the inverting
amplifier respectively. Normally, G
m3
> G
m1p
(G
m1n
) > G
m2
and
g
1, 2
are several times smaller than G
m2
. The values of g
L
and
C
L
depend on the load. The normal orders of values of them
are listed in Table I. The dashed capacitor C
m
is adopted for
compensation, which will be discussed in the next subsection.
Without C
m
, the circuit will be instable which can be proven
by analyzing its close-loop transfer function given by:
( )( )
( )( ) ( )
1 1 1 2 2 1 2 3
1 1 2 2 1 1 2 3
( )
m p m n m m
L L m p m n m m
G C s g C s g G G G
H s
C s g C s g C s g G G G G
+ + +
=

+ + + + +

. (1)
Setting s=0 to judge the DC accuracy of the following, we
get
1 2 3 1 1 2
0
1 2 3 1 1 2 1 2
m n m m m p
m n m m m p L
G G G G g g
A
G G G G g g g g g
+
=
+ +
. (2)
A
0
is always less than unity and the error can be minimized by
maximizing G
m1n
G
m2
G
m3
which represents the strength of the
feedback path. However, increasing G
m1n
G
m2
G
m3
without any
change of other coefficients of the denominator in (1) leads to
stability problem as illustrated by the root locus and zero-pole
plot in Fig. 4 which shows a pair of complex poles will move
to the right-half plane (RHP). Although with the increasing
G
m3,
the growing parasitic capacitor (C
GD
) across from the
input to output of the inverting amplifier does good to the
circuits stability, yet it is not reliable due to its small and
uncertain capacitance and it also probably introduces two RHP
zeros by imposing a negative part to the second coefficient of
the numerator in (1), which can be inferred from (4) in the
next subsection. The analysis above is also suitable for the
follower in [6]. So stability problem also exists there and
compensation has to be applied.
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-6 -4 -2 0 2
x 10
10
-4
-3
-2
-1
0
1
2
3
4
x 10
10
Root Locus
Real Axis
I
m
a
g
in
a
r
y

A
x
is
Pole-Zero Map
Real Axis
I
m
a
g
in
a
r
y

A
x
is
-3 -2 -1 0 1
x 10
10
-4
-3
-2
-1
0
1
2
3
4
x 10
10

Figure 4. Plots of root locus and zero-pole positions with the increasing
of Gm1nGm2Gm3

Figure 5. The whole circuit of the proposed source follower
B. The Compensation for the Proposed Circuit
The proposed source follower is shown in Fig. 5, which
consists of five parts: the biasing circuit, the main stage
formed by M
1
and M
5
, the non-inverting amplifier formed by
M
2
and M
b4
, the inverting amplifier composed of M
3
and M
4
,
and the compensation circuit.
The compensation circuit does not adopt the nested Miller
compensation (NMC) technique (an universal compensation
method for multi-stage amplifiers) because the feed-forward
path in this circuit makes the topology differ from those that
NMC is immediately suitable for [7]. In fact, the principal
goal of compensation for this circuit is to ensure the stability,
while the accurate canceling of poles is not imperative which
means extra sacrifices at least of silicon real estate. We instead
engage a capacitor (C
m
) across the non-inverting stage. The
revised transfer function shows that C
m
adds significant
positive parts to coefficients that are positively related to
stability according to the Routh-Hurwitz criterion [8], namely
b
1
, a
1
, a
2
in
2
0 1 2
3 2
0 1 2 3
( )
compensated
b s b s b
H s
a s a s a s a
+ +
=
+ + +
, (3)
where
( ) ( )
0 1 1 2 1 1 1 1 1 1 2 m p m GD m p m GD m p m n m p
b G C C C C C G C C G G G C C = + + + + ,
( )
2 1 2 3 1 2 1 3 1 2 1 1 2 3
,
m n m m m p L m p m n m m
b G G G g g G a g g g G G G G = + = + + .
Other coefficients are expressed in (4) at the bottom of this
page. Noting the quantitative relations implied by Table I, it
can be inferred that the stability problem caused by boosting
G
m3
can be solved by: 1) properly enlarging g
1
, g
2
or reducing
G
m2
to make sure that the terms multiplied by C
m
are positive
and 2) enlarging C
m
to ensure that the positive parts added to
coefficients are large enough. In addition, M
1c
and M
5c
in Fig.
5 are appended to break the intrinsic equality between G
m1p

and G
m1n
to have G
m1p
> G
m1n
. This is used to achieve, to some
extent, co-tuning of G
m1p
with C
m
in case of an excessively
large C
m
and hence an unacceptable area cost. It can also
additionally contribute to the DC accuracy indicated by (2).
C. Input Swing
The wide input swing is realized by a sharp turn-on of
voltage following and ideally by a unity AC gain after the
turn-on which makes the output tracks every small change of
the input. And the sharp turn-on is achieved by the steep
transition of the inverting amplifier. When the output follows
the input, G
m1n
changes little since the gate-to-source voltage
of M
1
almost stays still, while G
m2
and G
m3
vary over a
relatively wider span, which nonetheless reflects little on the
gain fluctuation because of the dominant absolute value of
their product. Therefore the AC gain at low frequencies stays
nearly constant. Besides, if M
2
is directly connected to node F,
a voltage change at the node introduces simultaneous opposite
variations of I
b
and the current drawn by M
2
, resulting in an
extra aberration in bias current of M
1
, and hence an additional
error of AC gain occurs. This can be avoided by inserting a
down-shifting nMOS, M
6
, to insulate the second stage from
the main one. While M
5
and M
b4
form the CG amplifier, M
6

and M
b4
act as a level-shifter. Other advantages of this shifter
are: a) the biasing circuit of M
2
can be saved by directly tying
its gate to ground or to the gate of M
b4
; b) g
1
can be enlarged
independent of G
m2
, which is good for the compensation
discussed in last subsection; c) the shifter causes a lower input
level of the inverting amplifier, hence its transition region
should be designed closer to ground, indicating an area saving
by allowing a narrower pMOS in the amplifier.
D. Output Resistance
The approximate calculation of the low-frequency output
resistance is conducted by removing all the capacitors in Fig. 3
and attaching the input to AC ground. Then the output
( ) ( ) ( )
( ) ( ) ( )
( ) ( ) ( ) ( )( )
( )
1
1 1 1 2 2 1 1 3 1 2 2 1 1 1 2
0 1 2 1 2 1 2 1 2
1 2 1 1 2 1 1 2 1 2 2 2 1 1
1 1 1 2 2 1 1 3 1
-
-
m p m m n m m p m GD m p m n m
L m L GD L m GD L
L L m p m m L L m p
GD L L m m p
b G g C g C C G G G g g G C G g G G
a CC C C C C C C C C C C C C C C
a g C g C C g G CC C g g G C C C g G
C g C C g g C g C C G G

= + + + + +

= + + + + + + +

= + + + + + + + + +


+ + + + +

( )
( )( ) ( )( ) ( )
1 2 1 3 1 2
2 1 2 1 2 2 1 1 1 2 2 1 1 3 1 2 3 1 1 2
-
m GD L m p m m n m
L L m p m m L m p m n m GD L m m p m n m
C C g g g G G G G
a g g C g C g C g G C g g G g G G G C g g g G G G G
+ + + + +


= + + + + + + + + + + +

(4)
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resistance is derived as
1 2 3 1 2 1
1
o
m n m m o o m p Y
r
G G G r r G g
=
+ +
, (5)
where r
o1
and r
o2
are the reciprocals of g
1
and g
2
respectively
and g
Y
denotes the sum of all drain-to-source conductances of
devices connected to the output node. From (5), we can see
that the output resistance is reduced approximately by a factor
of G
m2
G
m3
r
o1
r
o2
compared with the simple source follower.
IV. SIMULATION RESULTS
The proposed circuit is designed in TSMC 0.18m CMOS
technology and simulated with Spectre under a 1.8V supply.
Fig. 6 is the plot of DC characteristics. The results show
that with the input ranging from 0.6V to 1.8V, the variation of
the DC voltage shift is only 7.5mV. The small-signal gain at
10MHz versus the input voltage, depicted in Fig. 7, is almost
constant at -60mdB when the input is higher than 0.6V. Fig. 8
displays the output resistance versus frequency. At frequencies
below 30MHz, the resistance is under 1.3. The THD of the
output loaded by a 1K resistor are obtained by applying a
group of sinusoid inputs at 10MHz with amplitudes varying
from 50mV to 600mV and the results versus the input swings
are plotted in Fig. 9. The THD remains -67.6dB with a 1.2Vpp
input. Results in [6] are also shown for comparison.
V. CONCLUSION
In this paper, the improved source follower with high
linearity over a wide input range and with low output
resistance is developed. The stability issue is discussed and a
simple compensation scheme is presented. The source
follower renders a very low output resistance over a medium
span of frequencies and hence it can be used in the IF
applications such as the IF continuous-time filters with highly
linear transconductance elements.
REFERENCES
[1] J. Ramirez-Angulo, R. G. Carvajal, A. Torralba, J. A. G. J. Galan, A.
P. A. V.-L. A. P. Vega-Leal, and J. A. T. J. Tombs, "The flipped
voltage follower: a useful cell for low-voltage low-power circuit
design," IEEE ISCAS, pp. 615-618, 2002.
[2] A. Nedungadi and T. Viswanathan, "Design of linear CMOS
transconductance elements," IEEE Trans. on Circuits and Systems, vol.
31, pp. 891-894, 1984.
[3] Z. Wang and W. Guggenbuhl, "A voltage-controllable linear MOS
transconductor using bias offset technique," IEEE J. Solid-State
Circuits, vol. 25, pp. 315-317, 1990.
[4] H. Chung-Chih, K. A. I. Halonen, M. Ismail, V. A. P. V. Porra, and A.
A. H. A. Hyogo, "A low-voltage, low-power CMOS fifth-order elliptic
GM-C filter for baseband mobile, wireless communication," IEEE
Trans. on Circuits and Systems for Video Tech., vol. 7, pp. 584-593,
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[5] C. Sawigun and J. Mahattanakul, "A low-voltage CMOS linear
transconductor suitable for analog multiplier application," in IEEE
ISCAS, pp. 1543-1546, 2006.
[6] K. Yaohui, X. Shuzheng, and Y. Huazhong, "An ultra low output
resistance and wide swing voltage follower," in International Conf. on
Communications, Circuits and Systems, pp. 1007-1010, 2007.
[7] L. Ka Nang and P. K. T. Mok, "Nested Miller compensation in low-
power CMOS design," IEEE Trans. on Circuits and Systems II: Analog
and Digital Signal Processing, vol. 48, pp. 388-394, 2001.
[8] Gene F. Franklin, J. David Powell, Abbas Emami-Naeini, Feedback
control of dynamic systems, Upper Saddle River, N.J. : Prentice Hall
PTR, 2002.

Figure
6. DC characteristics


Figure 7. AC analysis at 10MHz


Figure 8. Output resistance

0.2 0.4 0.6 0.8 1 1.2
-100
-90
-80
-70
-60
Input Swing (V)
T
H
D

(
d
B
)


this work @1.8V sup., 10MHz input
results in [6] @1.5V sup., 1MHz input

Figure 9. THD vs. input swing
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