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The 30th Annual Conference of the IEEE Industrial Electronics Society, November 2 - 6,2004, Busan, Korea

Automatic Voltage Regulator Using a Novel Phase-Shifted PWM

Single-phase Inverter
*Kuo-Kai S h y *Ming-Ji Yang *Jing-Heng Hong **Bau-Hung Lin
*Department of Electrical Engineering, National Central University, E-mail :
**Department of research and development, RIYE Electric CO., LTD, E-mail :
Absfract-In this paper, a novel phase-shifted pulse width
modulation (PS-PWM ) automatic voltage regulator (Am)
with fast voltage control and reduced total harmonics is
proposed The novel PS-PWM AVR is made up of an AUAC
converter withreversiblevoltage control and a transformer for
series voltage compensation. In the active rectifier, a proper
switching operation is achieved without the problemof power
factor correction. The AVR uses a fully digital controller,
which is implemented by a fixed-point digital signal processor
(DSP) TMS320F240 DSP-based board. Therefore, the
proposed AVR gives high efficiency and reliability. It is also
shown via some experimental results that the presented novel
PS-PWM AVR gives good performance for high quality of the
output voltage.
Index Terms- PS-PWM AVR, AC/AC converter, DSP, active
With the modem industry advance day by day, the
production equipments of automation become more and
more precise. So the requirement of power quality
becomes higher. Power quality problems commonly
face industrial operations including transients, sags,
swells, surges, outages, harmonics, and impulses that
vary in quantity or magnitude of the voltage. Of these,
voltage sags and extended undervoltages have the
largest negative impact on industrial productivity, and
could be the most important factors of power quality
variation for many industrial and commercial customers.
Therefore, the automatic voltage regulator (AVR) of
high stability, wide voltage regulation range, and fast
dynamic response is required to compensate for the
fault of power quality.
The conventional voltage regulator mainly has used
servomotor to change the tap-changing transformer. But
the faults are as follows: large size of the mechanism,
slower dynamic response, mechanical attrition and
lower efficiency etc. Therefore, the conventional
voltage regulator cannot be used in precision equipment.
In recent years, development of the AC voltage-voltage
Converter and AC chopper has been used in AVR [ 11-[7].
There are two typical configurations of such AVR. First,
the circuit configuration is an AC voltage-voltage
converter (AC Buck) type. Even though most faults of
the conventional voltage regulator could be improved
by AC Buck, but it cannot level down the AC line
voltage when the AC line has occurred some situations,
such as swell, surge or long-term overvoltage.
Secondary, the circuit configuration is a novel AC
chopper [Z]. It not only improves the problem of
conventional voltage regulator but also has voltage
upldown capability. But its switching sk-itegy cannot
reduce total harmonic distortion, switching loss and the
size of the LC filter.
Therefore, a novel switching strategy for single-phase
voltage regulator is proposed in t hi s study. The
proposed switching strategy can reduce switching loss,
total harmonic distortion, sizeof the LC filter etc, and
then increases the performance of the single-phase
voltage regulator.
In this paper, the proposed voltage regulator topology
is shown in Fig. 1. Tn order to provide a stable AC
power supply, the transformer series in between the AC
line and the load side to compensate the variable voltage
of AC he. The hcti on of the voltage regulator is
making AC line from unstable to stable voltage, after
the line voltage is regulated and controlled by power
circuit and digital controller.
Fig. 2 shows the voltage regulator topology, the output
voltage of load is given by
v, =v, +"./;G
where vi is the unstable input, V, is the stable output,
Yo' is the output of the AC/AC converter, and N is turns
ratio of transformer.
I\ i t
v, AC/AC Converter
Fig. 1.
When the AC line input terminal has occurred voltage
variation, the load terminal still outputs a stable voltage after
regulating the AC/AC converter. It can be noted that the power
specification of AC/AC converter is reduced to IN of the
output power because of using a hnsformer. That is,
Topology of the proposed novel PS-PWM AVR
output power, and N is the t u r n s ratio of the transformer.
is the power of the AClAC converter, Po,, is the
0-7803-8730-9/04/$20.00 92004 IEEE
" I
Inverter :
Fig. 2. Power circuit of the proposed AC/AC converter with
1_-!!9k?Rec!!?L~-i i _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ .--.--......*..... J
novel PS-PWM control.
Themain power circuit of systemis shown in Fig. 2 i s
based on the same circuit structure as 121, but the
switching strategy is innovative. Fig. 2 shows two parts
of the power circuit, the left dotted line block and the
right one are the active rectifier and the inverter,
respectively. In the following, their operational
principles and functions will be illustrated.
Consider the active rectifier shown in Fig. 2. When
switches S,, SJR are tumed on, the waveforms ofAC
input are changed from negative to positive. Thus, the
sine waveofAC input is rectified to a signal greater
than zero. Because the active switches are substituted
for the passive ones, it is called active rectifier. The
forward voItages on the active switch and the passive
one are 0.2 volt and 0.7 volt, respectively. Hence, the
forward voltage of active switch is lower as compared
with the passive diode rectifier.
However, using the active rectifier not only reduces
power loss on theswitches, but also increases the power
factor at the AC line input. Therefore, it is suitably used
high power applications.
Fig. 3 Equivalent circuit of the reversible voltage
Fig. 3 shows the equivalent circuit of the reversible
voltage inverter [ 8] . Th i s circuit schematic is identical
with general inverters. To compare the switching
strategies of the proposed method and the conventional
one, Figs. 4 and 5 show the conventional switching
strategy and the proposed method, respectively. These
figures show the sequences of all driving signals and
output voltage waveformat the fullbridge inverter. It
can be seen that the proposed switching strategy only
uses half the switching frequency of the conventional
one. But he proposed switching strategy outpuM the
same switch pattern as the conventional one.
However, it should be noticed that during the
positive period of AC line input, the duty ratio is limited
to greater than 50% for the switches Si and S4. On the
contrary, during the negative period of AC line input,
the duty ratio is limited to less than 50% for the
switches SI and S4.
To clearly explain the operational concepts o f the
switching strategy, in the following, more details will be
given. For convenient illustration, the input voltage will
be assumed to be a DC value and the characteristics of
all components will be considered in ideally.
Fig. 4. Conventional switching strategy for
single-phase full-bridge inverter
Fig. 5. Proposed switching strategy of the novel
PS-PWM for single-phase full-bridge inverter
(1) Duty ratio 0 2 5 0 %
FromFig. 6, it can be observed that the signal of S, is
phase-shifted 90" to the signal of S,, and the switching
signal of high side is complementary to that of the low
side in the full-bridge inverter. During the interval I , 5,
and S4 are turned on and S2 and S3 are turned off. The
switching output voltage Vsw is the same as the input
voltage Vi. Therefore, the inductor voltage VL is given
VL =y, - v, (3)
Duriog the interval 2, SI and S, are tumed on, and $2
and S, are turned off. In this case, Vm equals zero. VL
Similarly, same results can be obtained during inteivals
3 and 4. Therefore, the average inductor voltage can be
derived by the volt-second balance theoremduring one
switching cycle [SI as
v, =-v, (4)
(5-v,). T -- +(-v,).(Tw-Tm)=O ( 6)
D = ? k (7)
v, = V, . ( 2 0 - l ) ; DL0 . 5 (8)
( m : I
Define D be the ratio between the turn-on time and the
cycle time of the switch during a switching cycle as
Thus, inserting (7) into (6) gives
(2) Duty ratio DS OW
In t hi s condition, interval 5 is fmdy discussed.
Dlning the interval 5, SI and S3 areturned on, and SI
and S4 are turned off. It is seen that V, is equal to zero
and VL is:
v, =-v, (9)
Next, during the interval 6, because 52 and S, are
turned on, and S, and & are turned off. Vsw reverses to
Vi. As a result, VL isgiven by
Following similar discussions, same results can be
obtained for intervals 7 and 8. Accordingly, the average
inductor voltage during one switching cycle is obtained
v, =-vi -v, (10)
Consequently, oneobtains
v, =P i . ( 20 - 1); D 5 0. 5 (13)
Synthesizing analysis of above discussions (DZO. 5
and DSU.5), onecan easily have the relation between
Vi and V. for the whole duty ratio range as follows:
v, = v i . ( 2 ~ - I ) ; 0 S DI I (14)
v /
/ i
Fig. 6. Vdv, contrasts with the D
Fig. 6 shows the relation, which contrasts the F'Pi
witb the duty ratio D. When D >50%, the output
voltage is in phase to the input. When D=50%, the
output voltage is zero. When D <50%, the output
voltage is reverse to the input.
Accordingly, it is obvious that one only need to adjust
the duty ratio D to obtain an in phase or reverse voltage
to the input waveform. FromB e foregoing analysis, the
waveforms are repeated for V,, and VL during one
switching cycle (intervals 1-4 or intervals 5-6). In other
words, the output k pnc y will be double to the
switching fiequency of the each switch. That is
where fo is the oufput fiequency and fm is the actual
switching fiequency.
Consequently, it can be concluded that the proposed
novel switching strategy can reduce the switching
fkequency of the switch to reduce the switching losses.
The most important is that it doubles the output
fkquency; as a result, the total harmonic distortion and
the specification of LC filter are reduced. Fig. 7 shows
the corresponding signal waveforms of the inverter
using the proposed novel switching strategy.
f, =2 . f , (15)
1 inphase voltage I reverse vattage
Fig. 7. Waveforms diagramof the power circuit.
Turns ratio of the
Voltage disturbances
a. Momentary voltage
b. Transient 0
Freauencv variation
Voltage THD
Power factor
Switching frequency
PWM output
Input voitage
Load power
Inductance of the
output filter
Capacitance of the
output filter
neters and conditions
Rang or maximum
N, : N, = 5 : l
-20% to +20% (ANSI
C84.1-1970 k+6. -13%)
-20 to -25% for less
OSs , with -100%
acceptable for 5-25111s
+120 to 160% for less
than 0. l m
60- fO.5Hz to flHz
3-4% (withlinear load)
0.95-0.98 . . . . . .
AC llOV,, 14
10 kVA
Lo= 1mH
CO= louF
Fig. 8. Structure block diagram of the pmpased navel AVR
Fig. 9. Photo of the novel single-phase PS-PWM AVR
+ 45.514 m
Freq(1I 28.8885 k l h
FreqQ) Rn 28.8885 klh
Fr eql Q) M 48.8855 k l h
Fig. 10. Chi: Switching waveform of SI,
Ch2: Switching waveform of SI,
Ch3: Waveformof the P W M output.
c 47 IRj
mxirum(1 I 131 W
F reqtl l M 59 99 L
mx1ru" 155 W
Fr eq W M 59 99 tb
18 ffi
Fig. 11. Input and output voltage waveform when
input is long-term undervoltage.
19- k - 83
1356 I4
,I- ---.
Fig. 12. Input and output voltage waveform when
input is long-term overvoltage.
I l l I I I I I
I I I I I t I I
Eh2: b
Fig. 13. Input and output voltage waveform when
input is voltage sag.
I I I I l I I l l i
I I I I 1
I l l i I I I 450, O l s
Fig. 14 Input and output voltage waveform when
input is voltage swell.
The proposed novel switching strategy has been
implemented in a novel AVR according to the structure
block diagrams for this system shown in Fig. 8. Fig. 9
shows the real hardware experimental system of a 10
RVA novel single-phase PS-PWM AIR prototype. Table
I shows the experimental parameters and conditions for
this system. Figs. 10-14 show the experimental results.
In Fig. 10, one can see the output P W M fiequency
doubles the switching lkquency. Fig. 11 shows the
compensated output voltage when AC line had occurred
long-term undervoltage. However, if the AC line had
occurred long-term overvoltage, Fig. 12 shows this
system can still works well. For the case when the AC
line had occurred the voltage sag, Fig. 13 shows the
output voltage can be fast compensated. Also, Fig. 14
shows this systemfastly cut down the input voltage
when the AC line had occurred the voltage swell.
In this study, a fixed-point, high-speed cost-effective
DSP (TMS320F240) is used to implement the fully
digital controller of the proposed voltage regdator. It
has been demonstrated through experimental results that
the proposed novel switching strategy can lower the
switching fiequency of the switch to reduce the
switching losses. The most important is that it doubles
the output frequency; as a result, the total h o n i c
distortion and the specification of LC filter are reduced.
The proposed novel PS-PWM AVR has the following
allows any schemes of the single-phase
full-bridge inverter.
fast dynamic response for AC voltage
reduces switching losses and total harmonic
reduces the LC filter size.
improves the input power factor and power
a fully digital design to lower total system cost
and improves reliability.
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and the National Science Council of Taiwan under
contract NSC 92-2622-E-008-027-CC3.
This study was supported by the RIYE Electric CO.