DSD PROJECT:

SOC Implementation using FPGA prototyping

for
Colour Blindness Detection for Eye Patient

By
AMIT SHARMA
ASHANA JAIN

Normally, there are three kinds of
cones (each one sensitive to a
specific range of wavelengths):

"red" cones (64%)
"green" cones (32%)
"blue" cones (2%)

The normal human retina contains two kinds of light sensitive
cells: the rod cells (active only in low light) and the cone cells
(active in normal daylight and responsible for color perception).

The different kinds of inherited color blindness result from
partial or complete loss of function of one or more of the
different cone systems.

Various test available :
#Card testing

A color normal person can see a yellow circle and a faint brown
square. On the other hand color blind people can see only the
yellow circle.
#Ishihara test
Number on Ishihara plates
#Rainbow testing :
Normal mans view Protanopia Deuteranopia Tritanopia
view view view
Our test:
SOC Implementation using FPGA prototyping for
Colour Blindness Detection for Eye Patient
User binary input
enter next
Architecture Proposal :
Behind the project
Introduction
The Video Graphics Array (VGA) is a display
standard that was introduced in 1987. The
VGA screen that we intend to use is one
which finds use in PCs today.
VGA Video Signal
A colour VGA video signal is composed
by 5 different signals, two synchronization
signals (HSYNC and VSYNC) and three
video signals (R, G, B)

HSYNC Horizontal sync. Make
electron beam restart at next screen's
scan line (starts a new line)
VSYNC Vertical sync. Make electron
beam restart at first screen's scan line
(starts a new frame)
R Red intensity
G Green intensity
B Blue intensity

Nexys 3 VGA port
The Nexys3 board uses 10
FPGA signals to create a VGA
port

with 8-bit color, and
two standard sync signals
(HS Horizontal Sync, and
VS Vertical Sync)

Timings
Pulses on HSYNC signal
mark the start and end of a
line and ensure that the
monitor displays the pixels
between the left and right
edges of the visible screen
area.

Pulses on VSYNC signal
mark the start and end of a
frame made up of video lines
and ensure that the monitor
displays the lines between
the top and bottom edges of
the visible monitor screen.
Timings for 640x480 resolution
Symbol Parameter
Vertical Sync
Horizontal
Sync
Time Lines Time Clocks
T
s
Sync Pulse 16.7ms 521 32s 800
T
disp
Display Time 15.36ms 480 25.6s 640
T
pw
Pulse Width 64s 2 3.84s 96
T
fp
Front Porch 320s 10 640ns 16
T
bp
Back Porch 928s 29 1.92s 48
Block Diagram
1. A 640x480 resolution with
refresh rate of 60 Hz requires
a pixel clock of 25 MHz, this
clock is derived by dividing the
on-board 100 MHz clock by 4.

2. The HSYNC and VSYNC pulse
are generated by using
Horizontal counter and
Vertical Counter. The counters
also tell which pixel is
currently being dealt with.


Character Generation
3. Character Generator
(Font Map) stores 8x16
bit tile for every ASCII
character.

4. Using HC, VC and Font
Map the DAC assigns
RGB value to individual
pixels. The pixels
corresponding to 0 are
set Black while RGB value
of those corresponding to
1 are set as per desired
colour.

By using we are able to create a GUI having menu and a colour box on the
Screen of monitor. We can generate 255 colour because vga have 8 bit for
Defining colour (3 red ,3 green,2 blue). Bur here we use only 8 colour that
Is RGB and combination of these. we dont here deal with the shades of green
Or red. Finally our GUI look like this:
Following colour combination:
And FINALLY WE ARE ABLE TO PRESET A MODULE
OF THE DEVICE BY USING THAT ANY ONE CAN
CHECK WHETHER HE/SHE IS COLOUR BLIND OR
NOT WITHOUT THE OBSERVANCE OF ANY EXPERT.

Take Care