Error Specification (Includes Full-Scale,

Zero Error, and Non-Linearity)

Part
Number
Full-
Scale
Adusted
!
"EF
#$
e
$%&'' !
()
(No Adustments)
!
"EF
#$
e
No )onnection
(No Adustments)
A()'*'+ , (#- LS.
A()'*'$ , (#$ LS.
A()'*'/ , (#$ LS.
A()'*'- , + LS.
A()'*'& , + LS.
A
(
)
'
*
'
+
#
A
(
)
'
*
'
$
#
A
(
)
'
*
'
/
#
A
(
)
'
*
'
-
#
A
(
)
'
*
'
&
*
-
.
i
t

m
P

)
o
m
p
a
t
i
b
l
e

A
#
(

)
o
n
0
e
r
t
e
r
s
(ecember +11-
A()'*'+#A()'*'$#A()'*'/#A()'*'-#A()'*'&
*-.it mP )ompatible A#( )on0erters
2eneral (escription
34e A()'*'+, A()'*'$, A()'*'/, A()'*'- and
A()'*'& are )56S *-bit successi0e appro7imation A#(
con0erters t4at use a differential potentiometric ladder8
similar to t4e $&9" products% 34ese con0erters are de-
si,ned to allo: operation :it4 t4e NS)*'' and
INS*'*'A deri0ati0e control bus :it4 3"I-S3A3E; output
latc4es di- rectly dri0in, t4e data bus% 34ese A#(s appear
li<e memory locations or I#6 ports to t4e microprocessor
and no inter- facin, lo,ic is needed%
(ifferential analo, 0olta,e inputs allo: increasin, t4e com-
mon-mode reection and offsettin, t4e analo, =ero input
0olta,e 0alue% In addition, t4e 0olta,e reference input can
be adusted to allo: encodin, any smaller analo,
0olta,e span to t4e full * bits of resolution%
Features
>
)ompatible :it4 *'*' mP deri0ati0es8no
interfacin, lo,ic needed - access time - +/& ns
>
Easy interface to all microprocessors, or
operates
??stand alone@@
3ypical Applications
>
(ifferential analo, 0olta,e
inputs
>
Lo,ic inputs and outputs meet bot4 56S and 33L
0olt- a,e le0el specifications
>
Aor<s :it4 $%&! (L5//9) 0olta,e
reference
>
6n-c4ip cloc< ,enerator
>
'! to &! analo, input 0olta,e ran,e :it4 sin,le
&!
supply
>
No =ero adust reBuired
>
'%/C standard :idt4 $'-pin (IP
pac<a,e
>
$'-pin molded c4ip carrier or small outline
pac<a,e
>
6perates ratiometrically or :it4 & !
()
, $%& !
()
, or
ana- lo, span adusted 0olta,e reference
Dey Specifications
>
"esolution * bits
>
3otal error , (#- LS., , (#$ LS. and , +
LS.
>
)on0ersion time
+'' ms
3L#E#&9F+ G +
*'*' Interface
3L#E#&9F+ G /+
3"I-S3A3E; is a re,istered trademar< of National Semiconductor
)orp% Z-*'; is a re,istered trademar< of Zilo, )orp%
)
+11& National Semiconductor )orporation
3L#E#&9F+ ""(-./'5++&#Printed in H% S% A%
$
Absolute 5a7imum "atin,s (Notes + I $)
If 5ilitary#Aerospace specified de0ices are reBuired,
please contact t4e National Semiconductor Sales
6ffice#(istributors for a0ailability and specifications%
Supply !olta,e (!
))
) (Note /) 9%&!
!olta,e
Lo,ic )ontrol Inputs
b
'%/! to
a
+*!
At 6t4er Input and 6utputs
b
'%/! to (!
))
a
'%/!)
Lead 3emp% (Solderin,, +' seconds)
(ual-In-Line Pac<a,e (plastic) $9'J)
(ual-In-Line Pac<a,e (ceramic) /''J)
Surface 5ount Pac<a,e
!apor P4ase (9' seconds) $+&J)
Infrared (+& seconds) $$'J)
Electrical )4aracteristics
Stora,e 3emperature "an,e
b
9&J) to
a
+&'J)
Pac<a,e (issipation at 3
A
e
$&J) *F& mA
ES( Susceptibility (Note +') *''!
6peratin, "atin,s (Notes + I $)
3emperature "an,e 3
5IN
s
3
A
s
3
5AK
A()'*'+#'$LL, A()'*'$LL#**/
b
&&J)
s
3
A
s a
+$&J)
A()'*'+#'$#'/#'-L)L
b
-'J)
s
3
A
s a
*&J)
A()'*'+#'$#'/#'&L)N
b
-'J)
s
3
A
s a
*&J)
A()'*'-L)N 'J)
s
3
A
s a
F'J)
A()'*'$#'/#'-L)! 'J)
s
3
A
s a
F'J)
A()'*'$#'/#'-L)A5 'J)
s
3
A
s a
F'J)
"an,e of !
))
-%& !
()
to 9%/ !
()
34e follo:in, specifications apply for !
))
e
& !
()
, 3
5IN
s
3
A
s
3
5AK
and f
)LD
e
9-' <E= unless ot4er:ise specified%
Parameter )onditions 5in 3yp 5a7 Hnits
A()'*'+M 3otal Adusted Error (Note *) Ait4 Full-Scale Ad%
(See Section $%&%$)
, (#- LS.
A()'*'$M 3otal Hnadusted Error (Note *) !
"EF
#$
e
$%&'' !
()
, (#$ LS.
A()'*'/M 3otal Adusted Error (Note *) Ait4 Full-Scale Ad%
(See Section $%&%$)
, (#$ LS.
A()'*'-M 3otal Hnadusted Error (Note *) !
"EF
#$
e
$%&'' !
()
, + LS.
A()'*'&M 3otal Hnadusted Error (Note *) !
"EF
#$-No )onnection , + LS.
!
"EF
#$ Input "esistance (Pin 1) A()'*'+#'$#'/#'&
A()'*'- (Note 1)
$%&
'%F&
*%'
+%+
<K
<K
Analo, Input !olta,e "an,e (Note -) !(
a
) or !(
b
) 2nd G '%'& !
))
a
'%'& !
()
() )ommon-5ode Error 60er Analo, Input !olta,e
"an,e
, (#+9 , (#* LS.
Po:er Supply Sensiti0ity !
))
e
& !
()
, +'N 60er
Allo:ed !
IN
(
a
) and !
IN
(
b
)
!olta,e "an,e (Note -)
, (#+9 , (#* LS.
A) Electrical )4aracteristics
34e follo:in, specifications apply for !
))
e
& !
()
and 3
A
e
$&J) unless ot4er:ise specified%
Symbol Parameter )onditions 5in 3yp 5a7 Hnits
3
)
)on0ersion 3ime f
)LD
e
9-' <E= (Note 9) +'/ ++- ms
3
)
)on0ersion 3ime (Note &, 9) 99 F/ +#f
)LD
f
)LD
)loc< FreBuency
)loc< (uty )ycle
!
))
e
&!, (Note &)
(Note &)
+''
-'
9-' +-9'
9'
<E=
N
)" )on0ersion "ate in Free-"unnin,
5ode
IN3" tied to A" :it4
)S
e
' !
()
, f
)LD
e
9-' <E=
*FF' 1F'* con0#s
t
A(A")L
Aidt4 of A" Input (Start Pulse Aidt4) )S
e
' !
()
(Note F) +'' ns
t
A))
Access 3ime ((elay from Fallin,
Ed,e of "( to 6utput (ata !alid)
)
L
e
+'' pF +/& $'' ns
t
+E
, t
'E
3"I-S3A3E )ontrol ((elay
from "isin, Ed,e of "( to
Ei-Z State)
)
L
e
+' pF, "
L
e
+'<
(See 3"I-S3A3E 3est
)ircuits)
+$& $'' ns
t
AI
, t
"I
(elay from Fallin, Ed,e
of A" or "( to "eset of IN3"
/'' -&' ns
)
IN
Input )apacitance of Lo,ic
)ontrol Inputs
& F%& pF
)
6H3
3"I-S3A3E 6utput
)apacitance ((ata .uffers)
& F%& pF
)6N3"6L INPH3S ONoteM )LD IN (Pin -) is t4e input of a Sc4mitt tri,,er circuit and is t4erefore specified separatelyP
!
IN
(+) Lo,ical ??+@@ Input !olta,e
(E7cept Pin - )LD IN)
!
))
e
&%$& !
()
$%' +& !
()
A) Electrical )4aracteristics ()ontinued)
34e follo:in, specifications apply for !
))
e
&!
()
and 3
5IN
s
3
A
s
3
5AK
, unless ot4er:ise specified%
Symbol Parameter )onditions 5in 3yp 5a7 Hnits
)6N3"6L INPH3S ONoteM )LD IN (Pin -) is t4e input of a Sc4mitt tri,,er circuit and is t4erefore specified separatelyP
!
IN
(') Lo,ical ??'@@ Input !olta,e
(E7cept Pin - )LD IN)
!
))
e
-%F& !
()
'%* !
()
I
IN
(+) Lo,ical ??+@@ Input )urrent
(All Inputs)
!
IN
e
& !
()
'%''& + mA
()
I
IN
(') Lo,ical ??'@@ Input )urrent
(All Inputs)
!
IN
e
' !
()
b
+
b
'%''& mA
()
)L6)D IN AN( )L6)D "
!
3
a )LD IN (Pin -) Positi0e 2oin,
34res4old !olta,e
$%F /%+ /%& !
()
!
3
b )LD IN (Pin -) Ne,ati0e
2oin, 34res4old !olta,e
+%& +%* $%+ !
()
!
E
)LD IN (Pin -) Eysteresis
(!
3
a
)
b
(!
3
b
)
'%9 +%/ $%' !
()
!
6H3
(') Lo,ical ??'@@ )LD " 6utput
!olta,e
I
6
e
/9' mA
!
))
e
-%F& !
()
'%- !
()
!
6H3
(+) Lo,ical ??+@@ )LD " 6utput
!olta,e
I
6
eb
/9' mA
!
))
e
-%F& !
()
$%- !
()
(A3A 6H3PH3S AN( IN3"
!
6H3
(') Lo,ical ??'@@ 6utput !olta,e
(ata 6utputs
IN3" 6utput
I
6H3
e
+%9 mA, !
))
e
-%F& !
()
I
6H3
e
+%' mA, !
))
e
-%F& !
()
'%-
'%-
!
()
!
()
!
6H3
(+) Lo,ical ??+@@ 6utput !olta,e I
6
eb
/9' mA, !
))
e
-%F& !
()
$%- !
()
!
6H3
(+) Lo,ical ??+@@ 6utput !olta,e I
6
eb
+' mA, !
))
e
-%F& !
()
-%& !
()
I
6H3
3"I-S3A3E (isabled 6utput
Lea<a,e (All (ata .uffers)
!
6H3
e
' !
()
!
6H3
e
& !
()
b
/
/
mA
()
mA
()
I
S6H")E
!
6H3
S4ort to 2nd, 3
A
e
$&J) -%& 9 mA
()
I
SIND
!
6H3
S4ort to !
))
, 3
A
e
$&J) 1%' +9 mA
()
P6AE" SHPPL>
I
))
Supply )urrent (Includes
Ladder )urrent)
A()'*'+#'$#'/#'-L)L#'&
A()'*'-L)N#L)!#L)A5
f
)LD
e
9-' <E=,
!
"EF
#$
e
N), 3
A
e
$&J)
and )S
e
&!
+%+
+%1
+%*
$%&
mA
mA
Note +M Absolute 5a7imum "atin,s indicate limits beyond :4ic4 dama,e to t4e de0ice may occur% () and A) electrical specifications do not apply :4en
operatin, t4e de0ice beyond its specified operatin, conditions%
Note $M All 0olta,es are measured :it4 respect to 2nd, unless ot4er:ise specified% 34e separate A 2nd point s4ould al:ays be :ired to t4e (
2nd%
Note /M A =ener diode e7ists, internally, from !
))
to 2nd and 4as a typical brea<do:n 0olta,e of F
!
()
%
Note -M For !
IN
(b)
t
!
IN
(a) t4e di,ital output code :ill be '''' ''''% 3:o on-c4ip diodes are tied to eac4 analo, input (see bloc< dia,ram) :4ic4 :ill
for:ard conduct for analo, input 0olta,es one diode drop belo: ,round or one diode drop ,reater t4an t4e !
))
supply% .e careful, durin, testin, at lo: !
))
le0els (-%&!), as 4i,4 le0el analo, inputs (&!) can cause t4is input diode to conduct G especially at ele0ated temperatures, and cause errors for analo, inputs
near full-scale% 34e spec allo:s &' m! for:ard bias of eit4er diode% 34is means t4at as lon, as t4e analo, !
IN
does not e7ceed t4e supply 0olta,e by more
t4an &' m!, t4e output code :ill be correct% 3o ac4ie0e an absolute ' !
()
to & !
()
input 0olta,e ran,e :ill t4erefore reBuire a minimum supply 0olta,e of
-%1&' !
()
o0er temperature 0ariations, initial tolerance and loadin,%
Note &M Accuracy is ,uaranteed at f
)LD
e 9-' <E=% At 4i,4er cloc< freBuencies accuracy can de,rade% For lo:er cloc< freBuencies, t4e duty cycle limits
can be e7tended so lon, as t4e minimum cloc< 4i,4 time inter0al or minimum cloc< lo: time inter0al is no less t4an $F& ns%
Note 9M Ait4 an async4ronous start pulse, up to * cloc< periods may be reBuired before t4e internal cloc< p4ases are proper to start t4e con0ersion process%
34e start reBuest is internally latc4ed, see Fi,ure $ and section $%'%
Note FM 34e )S input is assumed to brac<et t4e A" strobe input and t4erefore timin, is dependent on t4e A" pulse :idt4% An arbitrarily :ide pulse :idt4 :ill
4old t4e con0erter in a reset mode and t4e start of con0ersion is initiated by t4e lo: to 4i,4 transition of t4e A" pulse (see timin, dia,rams)%
Note *M None of t4ese A#(s reBuires a =ero adust (see section $%&%+)% 3o obtain =ero code at ot4er analo, input 0olta,es see section $%& and Fi,ure
& %
Note 1M 34e !
"EF
#$ pin is t4e center point of a t:o-resistor di0ider connected from !
))
to ,round% In all 0ersions of t4e A()'*'+, A()'*'$, A()'*'/,
and
A()'*'&, and in t4e A()'*'-L)L, eac4 resistor is typically +9 <K% In all 0ersions of t4e A()'*'- e7cept t4e A()'*'-L)L, eac4 resistor is typically $%$
<K%
Note +'M Euman body model, +'' pF disc4ar,ed t4rou,4 a +%& <K
resistor%
Full-Scale Error 0s Effect of Hnadusted 6ffse
f
)LD
0s% )loc< )apacitor )on0ersion 3ime 0s% !
"EF
#$ !olta,e
6utput )urrent 0s Po:er Supply )urrent Linearity Error at Lo:
3emperature 0s 3emperature (Note 1) !
"EF
#$ !olta,es
3ypical Performance )4aracteristics
Lo,ic Input 34res4old !olta,e
0s% Supply !olta,e
(elay From Fallin, Ed,e of
"( to 6utput (ata !alid
0s% Load )apacitance
)LD IN Sc4mitt 3rip Le0els
0s% Supply !olta,e
t Error
3L#E#&9F+ G $
6utput Enable and "eset IN3"
3"I-S3A3E 3est )ircuits and Aa0eforms
t
+E
t
+E
, )
L
e
+' pF
t
r
e$' ns
t
'E
t
'E
, )
L
e
+' pF
t
r
e$' ns
3L#E#&9F+ G /
3imin, (ia,rams (All timin, is measured from t4e &'N 0olta,e points)
NoteM "ead strobe must occur * cloc< periods (*#f
)LD
) after assertion of interrupt to ,uarantee reset of
IN3"%
3L#E#&9F+ G -
NoteM before usin, caps at !
IN
or
!
"EF
#$, see section $%/%$ Input .ypass
)apacitors%
Absolute :it4 a $%&''! "eference Absolute :it4 a &! "eference
QFor lo: po:er, see also L5/*&-$%&
Zero-S4ift and Span AdustM $!
s
!
IN
s
&! Span AdustM '!
s
!
IN
s
/!
3ypical Applications ()ontinued)
9*'' Interface "atiometric :it4 Full-Scale Adust
3L#E#&9F+ G &
ForM !
IN
(a)
l
!
IN
(b)
6utputeFF
EEK
!
"EF
#$e$&9 m!
ForM !
IN
(a)
<
!
IN
(b)
6utpute''
EEK
+ m! "esolution :it4 mP )ontrolled "an,e
!
"EF
#$e+$* m!
+ LS.e+ m!
!
(A)
s
!
IN
s
(!
(A)
a$&9
m!)
(i,iti=in, a )urrent Flo:
3ypical Applications ()ontinued)
(irectly )on0ertin, a Lo:-Le0el Si,nal A mP Interfaced )omparator
3L#E#&9F+ G 9
Self-)loc<in, 5ultiple A#(s E7ternal )loc<in,
+'' <E=
s
f
)LD
s
+-9' <E=
Hse a lar,e " 0alue
to reduce loadin,
at )LD " output%
elf-)loc<in, in Free-"unnin, 5ode mP Interface for Free-"unnin, A#(
po:er-up, a momentary ,roundin,
A" input is needed to ,uarantee operation%
peratin, :it4 ??Automoti0e@@ "atiometric 3ransducers
"atiometric :it4 !
"EF
#$ Forced
!
IN
(b)e'%+& !
))
+&N of !
))
s
!
K("
s
*&N of !
))
3ypical Applications ()ontinued)
Q
S
QAfter
of t4e
Q
3L#E#&9F+ G F
QSee Fi,ure & to select " 0alue
(.Fe??+@@ for !
IN
(a)
l
!
IN
(b)a(!
"EF
#$)
6mit circuitry :it4in t4e dotted area if
4ysteresis is not needed
Eandlin, , +'! Analo, Inputs Lo:-)ost, mP Interfaced, 3emperature-to-(i,ital )on0erter
ec<man Instruments R91--/-"+'D resistor array
mP Interfaced 3emperature-to-(i,ital )on0erter
cuit 0alues s4o:n are for 'J)
s
3
A
s a+$*J)
calibrate eac4 sensor to allo: easy replacement, t4en
can be calibrated :it4 a pre-set input 0olta,e%
3ypical Applications ()ontinued)
mP )ompatible (ifferential-Input )omparator :it4 Pre-Set !
6S
(:it4 or :it4out
Eysteresis)
Q.
Q)ir
QQ)an
A#(
3L#E#&9F+ G *
3ypical Applications ()ontinued)
Eandlin, , &! Analo,
Inputs
3L#E#&9F+ G //
Q.ec<man Instruments R91--/-"+'D resistor array
"ead-6nly Interface
3L#E#&9F+ G /-
mP Interfaced )omparator :it4 Eysteresis Protectin, t4e Input
(iodes are +N1+-
3L#E#&9F+ G /&
Analo, Self-3est for a System
3L#E#&9F+ G 1
A Lo:-)ost, /-(ecade Lo,arit4mic )on0erter
3L#E#&9F+ G /9
QL5/*1 transistors
A, ., ), ( e L5/$-A Buad op
amp
3L#E#&9F+ G /F
Noise Filterin, t4e Analo, Input 5ultiple7in, (ifferential Inputs
f
)
e$' E=
Hses )4ebys4e0 implementation for steeper roll-
off unity-,ain, $nd order, lo:-pass filter
Addin, a separate filter for eac4 c4annel
increases system response time if an analo,
multiple7er
is used
6utput .uffers :it4 A#( (ata Enabled Increasin, .us (ri0e and#or "educin, 3ime on .us
3ypical Applications ()ontinued)
/-(ecade Lo,arit4mic A#( )on0erter
3L#E#&9F+ G +'
QA#( output data is updated + )LD period
prior to assertion of IN3"
QAllo:s output data to set-up at fallin, ed,e of )S
Note +M 60ersample :4ene0er possible O<eep fs
l
$f(b9')P to eliminate input freBuency
foldin,
(aliasin,) and to allo: for t4e s<irt response of t4e filter%
Note $M )onsider t4e amplitude errors :4ic4 are introduced :it4in t4e passband of t4e filter%
F'N Po:er Sa0in,s by )loc< 2atin,
()omplete s4utdo:n ta<es I /' seconds%)
Po:er Sa0in,s by A#( and !
"EF
S4utdo:n
3ypical Applications ()ontinued)
Samplin, an A) Input Si,nal
QHse A()'*'+, '$, '/ or '& for lo:est po:er consumption%
NoteM Lo,ic inputs can be dri0en to !
))
:it4 A#( supply at =ero 0olts%
.uffer pre0ents data bus from o0erdri0in, output of A#( :4en in s4utdo:n mode%
3L#E#&9F+ G ++
Functional (escription
+%' HN(E"S3AN(IN2 A#( E""6" SPE)S
A perfect A#( transfer c4aracteristic (staircase :a0eform) is
s4o:n in Fi,ure +a % 34e 4ori=ontal scale is analo,
input 0olta,e and t4e particular points labeled are in
steps of +
LS. (+1%&/ m! :it4 $%&! tied to t4e !
"EF
#$ pin)% 34e
di,ital output codes t4at correspond to t4ese inputs are
s4o:n as (
b
+, (, and (
a
+% For t4e perfect A#(, not only
:ill center- 0alue (A
b
+, A, A
a
+, % % % % ) analo, inputs
produce t4e cor- rect output diti,al codes, but also eac4
riser (t4e transitions bet:een adacent output codes) :ill
be located , (#$ LS. a:ay from eac4 center-0alue% As
s4o:n, t4e risers are ideal
and 4a0e no :idt4% )orrect di,ital output codes :ill be pro-
0ided for a ran,e of analo, input 0olta,es t4at e7tend ,
(#$
LS. from t4e ideal center-0alues% Eac4 tread (t4e ran,e
of analo, input 0olta,e t4at pro0ides t4e same di,ital
output code) is t4erefore + LS. :ide%
Fi,ure +b s4o:s a :orst case error plot for t4e A()'*'+%
All center-0alued inputs are ,uaranteed to produce t4e cor-
rect output codes and t4e adacent risers are ,uaranteed to
be no closer to t4e center-0alue points t4an , (#- LS.%
In
ot4er :ords, if :e apply an analo, input eBual to t4e
center- 0alue , (#- LS., :e ,uarantee t4at t4e A#( :ill
produce t4e correct di,ital code% 34e ma7imum ran,e of
t4e position of t4e code transition is indicated by t4e
4ori=ontal arro: and it is ,uaranteed to be no more t4an
(#$ LS.%
34e error cur0e of Fi,ure +c s4o:s a :orst case error plot
for t4e A()'*'$% Eere :e ,uarantee t4at if :e apply an
analo, input eBual to t4e LS. analo, 0olta,e center-0alue
t4e A#( :ill produce t4e correct di,ital code%
Ne7t to eac4 transfer function is s4o:n t4e
correspondin, error plot% 5any people may be more familiar
:it4 error plots t4an transfer functions% 34e analo, input
0olta,e to t4e A#( is pro0ided by eit4er a linear ramp or by
t4e discrete output steps of a 4i,4 resolution (A)% Notice
t4at t4e error is con- tinuously displayed and includes t4e
Buanti=ation uncertain- ty of t4e A#(% For e7ample t4e error
at point + of Fi,ure +a is
a
(#$ LS. because t4e di,ital
code appeared (#$ LS. in ad0ance of t4e center-0alue
of t4e tread% 34e error plots al:ays 4a0e a constant
ne,ati0e slope and t4e abrupt up- side steps are al:ays +
LS. in ma,nitude%
3ransfer Function
Error Plot
a) Accuracy
e
, ' LS.M A Perfect
A#(
3ransfer Function Error Plot
b) Accuracy
e
, (#-
LS.
3ransfer Function Error Plot
c) Accuracy
e
, (#$ LS. 3L#E#&9F+ G +$
FI2H"E +% )larifyin, t4e Error Specs of an A#( )on0erter
Functional (escription ()ontinued)
$%' FHN)3I6NAL (ES)"IP3I6N
34e A()'*'+ series contains a circuit eBui0alent of t4e
$&9" net:or<% Analo, s:itc4es are seBuenced by succes-
si0e appro7imation lo,ic to matc4 t4e analo, difference in-
put 0olta,e O!
IN
(
a
)
b
!
IN
(
b
)P to a correspondin, tap
on t4e " net:or<% 34e most si,nificant bit is tested first
and after * comparisons (9- cloc< cycles) a di,ital *-bit
binary code (++++ ++++
e
full-scale) is transferred to
an output latc4 and t4en an interrupt is asserted (IN3"
ma<es a 4i,4- to-lo: transition)% A con0ersion in process
can be interrupt- ed by issuin, a second start command%
34e de0ice may be operated in t4e free-runnin, mode by
connectin, IN3" to t4e A" input :it4 )S
e
'% 3o ensure
start-up under all pos- sible conditions, an e7ternal A"
pulse is reBuired durin, t4e first po:er-up cycle%
6n t4e 4i,4-to-lo: transition of t4e A" input t4e
internal SA" latc4es and t4e s4ift re,ister sta,es are reset%
As lon, as t4e )S input and A" input remain lo:, t4e A#(
:ill re- main in a reset state% )on0ersion :ill start from + to
* cloc< periods after at least one of t4ese inputs ma<es
a lo:-to- 4i,4 transition %
A functional dia,ram of t4e A#( con0erter is s4o:n in Fi,-
ure $ % All of t4e pac<a,e pinouts are s4o:n and t4e maor
lo,ic control pat4s are dra:n in 4ea0ier :ei,4t lines%
34e con0erter is started by 4a0in, )S and A"
simulta- neously lo:% 34is sets t4e start flip-flop (F#F) and
t4e result- in, ??+@@ le0el resets t4e *-bit s4ift re,ister,
resets t4e Inter- rupt (IN3") F#F and inputs a ??+@@ to t4e (
flop, F#F+, :4ic4 is at t4e input end of t4e *-bit s4ift
re,ister% Internal cloc< si,nals t4en transfer t4is ??+@@ to t4e
S output of F#F+% 34e AN( ,ate, 2+, combines t4is ??+@@
output :it4 a cloc< si,nal to pro0ide a reset si,nal to t4e
start F#F% If t4e set si,nal is no lon,er present (eit4er A"
or )S is a ??+@@) t4e start F#F is reset and t4e *-bit s4ift
re,ister t4en can 4a0e t4e ??+@@ cloc<ed in, :4ic4 starts
t4e con0ersion process% If t4e set si,nal :ere to still be
present, t4is reset pulse :ould 4a0e no effect (bot4
outputs of t4e start F#F :ould momentarily be at a ??+@@
le0el) and t4e *-bit s4ift re,ister :ould continue to be 4eld
in t4e reset mode% 34is lo,ic t4erefore allo:s for :ide )S
and A" si,nals and t4e con0erter :ill start after at least
one of t4ese si,nals returns 4i,4 and t4e internal
cloc<s a,ain pro0ide a reset si,nal for t4e start F#F%
Note +M )S s4o:n t:ice for clarity%
Note $M SA" e Successi0e Appro7imation
"e,ister%
FI2H"E $% .loc< (ia,ram
3L#E#&9F+ G +/
T f L
Functional (escription ()ontinued)
After t4e ??+@@ is cloc<ed t4rou,4 t4e *-bit s4ift
re,ister (:4ic4 completes t4e SA" searc4) it appears as t4e
input to t4e (-type latc4, LA3)E +% As soon as t4is ??+@@
is output from t4e s4ift re,ister, t4e AN( ,ate, 2$,
causes t4e ne: di,ital :ord to transfer to t4e 3"I-
S3A3E output latc4es% A4en LA3)E + is subseBuently
enabled, t4e S output ma<es a 4i,4-to-lo: transition
:4ic4 causes t4e IN3" F#F to set% An in0ertin, buffer t4en
supplies t4e IN3" input si,- nal%
Note t4at t4is SE3 control of t4e IN3" F#F remains lo: for
* of t4e e7ternal cloc< periods (as t4e internal cloc<s run at
(#* of t4e freBuency of t4e e7ternal cloc<)% If t4e data output
is continuously enabled ()S and "( bot4 4eld lo:), t4e
IN3" output :ill still si,nal t4e end of con0ersion (by a
4i,4-
sli,4t time difference bet:een t4e input 0olta,e samples is
,i0en byM
-%&
(!
e
(5AK)
e
(!
P
) ($Bf
cm
) ,
)LD
:4ereM
(!
e
is t4e error 0olta,e due to samplin, delay
!
P
is t4e pea< 0alue of t4e common-mode 0olta,e
f
cm
is t4e common-mode freBuency
As an e7ample, to <eep t4is error to (#- LS. (
E
& m!)
:4en
operatin, :it4 a 9' E= common-mode freBuency, f
cm
, and
usin, a 9-' <E= A#( cloc<, f
)LD
, :ould allo: a pea<
0alue of t4e common-mode 0olta,e, !
P
, :4ic4 is ,i0en byM
O(!
e(5AK)
(f
)LD
)P
to-lo: transition), because t4e SE3 input can control t4e
S
output of t4e IN3" F#F e0en t4ou,4 t4e "ESE3 input
is constantly at a ??+@@ le0el in t4is operatin, mode% 34is
IN3" output :ill t4erefore stay lo: for t4e duration of
t4e SE3 si,nal, :4ic4 is * periods of t4e e7ternal cloc<
freBuency (assumin, t4e A#( is not started durin, t4is
inter0al)%
!
P
e
or
!
P
e
($Bf
cm
) (-%&)
(&
c
+'
b
/
) (9-'
c
+'
/
) (9%$*) (9')
(-%&)
A4en operatin, in t4e free-runnin, or continuous con0er-
sion mode (IN3" pin tied to A" and )S :ired
lo:8see also section $%*), t4e S3A"3 F#F is SE3 by t4e
4i,4-to-lo: transition of t4e IN3" si,nal% 34is resets t4e
SEIF3 "E2IS- 3E" :4ic4 causes t4e input to t4e (-type
latc4, LA3)E +, to ,o lo:% As t4e latc4 enable input is
still present, t4e S output :ill ,o 4i,4, :4ic4 t4en allo:s
t4e IN3" F#F to be "ESE3% 34is reduces t4e :idt4 of t4e
resultin, IN3" output pulse to only a fe: propa,ation
delays (appro7imately /'' ns)%
A4en data is to be read, t4e combination of bot4 )S
and "( bein, lo: :ill cause t4e IN3" F#F to be reset and
t4e 3"I-S3A3E output latc4es :ill be enabled to pro0ide t4e
*- bit di,ital outputs%
$%+ (i,ital )ontrol Inputs
34e di,ital control inputs ()S, "(, and A") meet standard
3
$
L lo,ic 0olta,e le0els% 34ese si,nals 4a0e been renamed
:4en compared to t4e standard A#( Start and 6utput En-
able labels% In addition, t4ese inputs are acti0e lo: to allo:
an easy interface to microprocessor control busses%
For non-microprocessor based applications, t4e )S input
(pin +) can be ,rounded and t4e standard A#( Start
function is obtained by an acti0e lo: pulse applied at t4e
A" input (pin
/) and t4e 6utput Enable function is caused by an
acti0e lo: pulse at t4e "( input (pin $)%
$%$ Analo, (ifferential !olta,e Inputs and
)ommon-5ode "eection
34is A#( 4as additional applications fle7ibility due to t4e
analo, differential 0olta,e input% 34e !
IN
(
b
) input (pin
F) can be used to automatically subtract a fi7ed 0olta,e
0alue from t4e input readin, (tare correction)% 34is is also
useful in
- mA G $' mA current loop con0ersion% In addition,
common- mode noise can be reduced by use of t4e
differential input% 34e time inter0al bet:een samplin,
!
IN
(
a
) and !
IN
(
b
) is --
(#$ cloc< periods% 34e ma7imum error 0olta,e due to
t4is
:4ic4 ,i0es
!
P

+%1!%
34e allo:ed ran,e of analo, input 0olta,es usually
places more se0ere restrictions on input common-mode
noise le0- els%
An analo, input 0olta,e :it4 a reduced span and a relati0ely
lar,e =ero offset can be 4andled easily by ma<in, use of
t4e differential input (see section $%- "eference !olta,e)%
$%/ Analo, Inputs
$%/%+ Input )urrent
Normal 5ode
(ue to t4e internal s:itc4in, action, displacement currents
:ill flo: at t4e analo, inputs% 34is is due to on-c4ip
stray capacitance to ,round as s4o:n in Fi,ure / %
3L#E#&9F+ G +-
r
6N
of SA + and SA $

& <K
rer
6N
)
S3"A>

& <K c +$ pF e 9' ns
FI2H"E /% Analo, Input Impedance
Functional (escription ()ontinued)
34e 0olta,e on t4is capacitance is s:itc4ed and :ill result
in currents enterin, t4e !
IN
(
a
) input pin and lea0in,
t4e !
IN
(
b
) input :4ic4 :ill depend on t4e analo,
differential input 0olta,e le0els% 34ese current transients
occur at t4e leadin, ed,e of t4e internal cloc<s% 34ey
rapidly decay and do not cause errors as t4e on-c4ip
comparator is strobed at t4e end of t4e cloc< period%
Fault 5ode
If t4e 0olta,e source applied to t4e !
IN
(
a
) or !
IN
(
b
)
pin e7ceeds t4e allo:ed operatin, ran,e of !
))
a
&' m!,
lar,e input currents can flo: t4rou,4 a parasitic diode to t4e
!
))
pin% If t4ese currents can e7ceed t4e + mA ma7
allo:ed spec, an e7ternal diode (+N1+-) s4ould be added
to bypass t4is current to t4e !
))
pin (:it4 t4e current
bypassed :it4 t4is diode, t4e 0olta,e at t4e !
IN
(
a
) pin
can e7ceed t4e !
))
0olta,e by t4e for:ard 0olta,e of
t4is diode)%
$%/%$ Input .ypass )apacitors
.ypass capacitors at t4e inputs :ill a0era,e t4ese c4ar,es
and cause a () current to flo: t4rou,4 t4e output
resist- ances of t4e analo, si,nal sources% 34is c4ar,e
pumpin, action is :orse for continuous con0ersions :it4 t4e
!
IN
(
a
) input 0olta,e at full-scale% For continuous
con0ersions :it4 a 9-' <E= cloc< freBuency :it4 t4e
!
IN
(
a
) input at &!, t4is () current is at a ma7imum of
appro7imately & mA% 34ere- fore, bypass capacitors s4ould
not be used at t4e analo, inputs or t4e !
"EF
#$ pin for
4i,4 resistance sources (
l
+ <K)% If input bypass
capacitors are necessary for noise filter- in, and 4i,4
source resistance is desirable to minimi=e ca- pacitor si=e,
t4e detrimental effects of t4e 0olta,e drop across t4is
input resistance, :4ic4 is due to t4e a0era,e 0alue of
t4e input current, can be eliminated :it4 a full-scale
adustment :4ile t4e ,i0en source resistor and input bypass
capacitor are bot4 in place% 34is is possible because
t4e a0era,e 0alue of t4e input current is a precise linear
func- tion of t4e differential input 0olta,e%
$%/%/ Input Source "esistance
Lar,e 0alues of source resistance :4ere an input
bypass capacitor is not used, :ill not cause errors as t4e
input cur- rents settle out prior to t4e comparison time% If a
lo: pass filter is reBuired in t4e system, use a lo: 0alued
series resis- tor (
s
+ <K) for a passi0e ") section or add
an op amp ") acti0e lo: pass filter% For lo: source
resistance applica- tions, (
s
+ <K), a '%+ mF bypass
capacitor at t4e inputs :ill pre0ent noise pic<up due to
series lead inductance of a lon, :ire% A +''K series
resistor can be used to isolate t4is ca- pacitor8bot4 t4e "
and ) are placed outside t4e feedbac< loop8from t4e
output of an op amp, if used%
$%/%- Noise
34e leads to t4e analo, inputs (pin 9 and F) s4ould be <ept
as s4ort as possible to minimi=e input noise couplin,% .ot4
noise and undesired di,ital cloc< couplin, to t4ese inputs
can cause system errors% 34e source resistance for
t4ese inputs s4ould, in ,eneral, be <ept belo: & <K% Lar,er
0alues of source resistance can cause undesired
system noise pic<up% Input bypass capacitors, placed from
t4e analo, in- puts to ,round, :ill eliminate system noise
pic<up but can create analo, scale errors as t4ese
capacitors :ill a0era,e t4e transient input s:itc4in,
currents of t4e A#( (see sec- tion $%/%+%)% 34is scale error
depends on bot4 a lar,e source
resistance and t4e use of an input bypass capacitor%
34is error can be eliminated by doin, a full-scale
adustment of t4e A#( (adust !
"EF
#$ for a proper full-scale
readin,8see section $%&%$ on Full-Scale Adustment) :it4
t4e source re-
sistance and input bypass capacitor in place%
$%- "eference !olta,e
$%-%+ Span Adust
For ma7imum applications fle7ibility, t4ese A#(s 4a0e been
desi,ned to accommodate a & !
()
, $%& !
()
or an
adusted 0olta,e reference% 34is 4as been ac4ie0ed in t4e
desi,n of t4e I) as s4o:n in Fi,ure - %
3L#E#&9F+ G +&
FI2H"E -% 34e !
"EFE"EN)E
(esi,n on t4e I) Notice t4at
t4e reference 0olta,e for t4e I) is eit4er (#$ of t4e
0olta,e applied to t4e !
))
supply pin, or is eBual to t4e
0olta,e t4at is e7ternally forced at t4e !
"EF
#$ pin% 34is al-
lo:s for a ratiometric 0olta,e reference usin, t4e !
))
sup-
ply, a & !
()
reference 0olta,e can be used for t4e
!
))
supply or a 0olta,e less t4an $%& !
()
can be applied to t4e
!
"EF
#$ input for increased application fle7ibility% 34e inter-
nal ,ain to t4e !
"EF
#$ input is $, ma<in, t4e full-scale differ-
ential input 0olta,e t:ice t4e 0olta,e at pin 1%
An e7ample of t4e use of an adusted reference 0olta,e is to
accommodate a reduced span8or dynamic 0olta,e
ran,e of t4e analo, input 0olta,e% If t4e analo, input 0olta,e
:ere to ran,e from '%& !
()
to /%& !
()
, instead of '! to
& !
()
, t4e span :ould be /! as s4o:n in Fi,ure & % Ait4
'%& !
()
applied to t4e !
IN
(
b
) pin to absorb t4e offset, t4e
reference 0olta,e can be made eBual to (#$ of t4e /! span
or +%& !
()
% 34e A#( no: :ill encode t4e !
IN
(
a
) si,nal
from '%&! to /%&
! :it4 t4e '%&! input correspondin, to =ero and t4e /%&
!
()
input correspondin, to full-scale% 34e full * bits of
resolution are t4erefore applied o0er t4is reduced analo,
input 0olta,e ran,e%
QAdd if !
"EF
#$
s
+ !
()
:it4
L5/&* to dra: / mA to ,round%
Functional (escription ()ontinued)
3L#E#&9F+ G +9
a) Analo, Input Si,nal E7ample b) Accommodatin, an Analo, Input from
'%&! ((i,ital 6ut
ee
''
EEK
) to /%&!
((i,ital 6ut
e
FF
EEK
)
FI2H"E &% Adaptin, t4e A#( Analo, Input !olta,es to 5atc4 an Arbitrary Input Si,nal "an,e
$%-%$ "eference Accuracy "eBuirements
34e con0erter can be operated in a ratiometric mode or an
absolute mode% In ratiometric con0erter applications, t4e
ma,nitude of t4e reference 0olta,e is a factor in bot4
t4e output of t4e source transducer and t4e output of t4e
A#( con0erter and t4erefore cancels out in t4e final di,ital
output code% 34e A()'*'& is specified particularly for use
in ratio- metric applications :it4 no adustments reBuired%
In abso- lute con0ersion applications, bot4 t4e initial 0alue
and t4e temperature stability of t4e reference 0olta,e are
important factors in t4e accuracy of t4e A#( con0erter%
For !
"EF
#$ 0olta,es of $%- !
()
nominal 0alue, initial
errors of , +' m!
()
:ill cause con0ersion errors of ,
+ LS. due to t4e ,ain of $ of t4e !
"EF
#$ input% In
reduced span applications, t4e initial 0alue and t4e stability
of t4e !
"EF
#$ input 0olta,e become e0en more important%
For e7ample, if t4e span is reduced to $%&!, t4e analo,
input LS. 0olta,e 0alue is cor- respondin,ly reduced from
$' m! (&! span) to +' m! and
+ LS. at t4e !
"EF
#$ input becomes & m!% As can be
seen, t4is reduces t4e allo:ed initial tolerance of t4e
reference 0olta,e and reBuires correspondin,ly less
absolute c4an,e :it4 temperature 0ariations% Note t4at
spans smaller t4an
$%&! place e0en ti,4ter reBuirements on t4e initial accuracy
and stability of t4e reference source%
In ,eneral, t4e ma,nitude of t4e reference 0olta,e :ill
re- Buire an initial adustment% Errors due to an improper
0alue of reference 0olta,e appear as full-scale errors in t4e
A#( transfer function% I) 0olta,e re,ulators may be used for
ref- erences if t4e ambient temperature c4an,es are not
e7ces- si0e% 34e L5//9. $%&! I) reference diode (from
National Semiconductor) 4as a temperature stability of
+%* m! typ (9 m! ma7) o0er 'J)
s
3
A
s a
F'J)% 6t4er
temperature
ran,e parts are also a0ailable%
$%& Errors and "eference !olta,e
Adustments
$%&%+ Zero
Error
34e =ero of t4e A#( does not reBuire
adustment% If t4e minimum analo, input 0olta,e
0alue, !
IN(5IN)
, is not ,round, a =ero offset can be
done% 34e con0erter can be made to output ''''
'''' di,ital code for t4is minimum input 0olta,e by
biasin, t4e A#( !
IN
(
b
) input at t4is !
IN(5IN)
0alue
(see Applications section)% 34is utili=es t4e
differential mode op- eration of t4e A#(%
34e =ero error of t4e A#( con0erter relates to t4e
location of t4e first riser of t4e transfer function
and can be mea- sured by ,roundin, t4e !
IN
(
b
)
input and applyin, a small ma,nitude positi0e
0olta,e to t4e !
IN
(
a
) input% Zero error is t4e
difference bet:een t4e actual () input 0olta,e t4at
is necessary to ust cause an output di,ital code
transition from '''' '''' to '''' '''+ and t4e
ideal (#$ LS. 0alue ((#$ LS.
e
1%* m! for
!
"EF
#$
e
$%&'' !
()
)%
$%&%$
Full-
Scale
34e full-scale adustment can be made by applyin, a
differ- ential input 0olta,e t4at is +(#$ LS. less
t4an t4e desired analo, full-scale 0olta,e ran,e and
t4en adustin, t4e ma,- nitude of t4e !
"EF
#$ input
(pin 1 or t4e !
))
supply if pin 1 is not used) for a
di,ital output code t4at is ust c4an,in, from
++++ +++' to ++++
++++%
Functional (escription ()ontinued)
$%&%/ Adustin, for an Arbitrary Analo, Input !olta,e
"an,e
If t4e analo, =ero 0olta,e of t4e A#( is s4ifted a:ay
from ,round (for e7ample, to accommodate an analo,
input si,- nal t4at does not ,o to ,round) t4is ne: =ero
reference s4ould be properly adusted first% A !
IN
(
a
)
0olta,e t4at eBuals t4is desired =ero reference plus (#$
LS. (:4ere t4e LS. is calculated for t4e desired analo,
span, + LS.
e
ana- lo, span#$&9) is applied to pin 9 and
t4e =ero reference 0olta,e at pin F s4ould t4en be
adusted to ust obtain t4e
''
EEK
to '+
EEK
code transition%
34e full-scale adustment s4ould t4en be made (:it4
t4e proper !
IN
(
b
) 0olta,e applied) by forcin, a 0olta,e
to t4e !
IN
(
a
) input :4ic4 is ,i0en byM
(!5AK
b
!5IN)
con0ersion in process is not allo:ed to be completed, t4ere-
fore t4e data of t4e pre0ious con0ersion remains in
t4is latc4% 34e IN3" output simply remains at t4e ??+@@ le0el%
$%* )ontinuous )on0ersions
For operation in t4e free-runnin, mode an initiali=in, pulse
s4ould be used, follo:in, po:er-up, to ensure circuit
opera- tion% In t4is application, t4e )S input is ,rounded
and t4e A" input is tied to t4e IN3" output% 34is A"
and IN3" node s4ould be momentarily forced to lo,ic lo:
follo:in, a po:er-up cycle to ,uarantee operation%
$%1 (ri0in, t4e (ata .us
34is 56S A#(, li<e 56S microprocessors and
memories, :ill reBuire a bus dri0er :4en t4e total
capacitance of t4e data bus ,ets lar,e% 6t4er circuitry,
:4ic4 is tied to t4e data
!
IN
(a) fs ad e !
5AK
b+%&
8
:4ereM
$&9 (
, bus, :ill add to t4e total capaciti0e loadin,, e0en in
3"I- S3A3E (4i,4 impedance mode)% .ac<plane bussin,
also ,reatly adds to t4e stray capacitance of t4e data bus%
!
5AK
e
34e 4i,4 end of t4e analo, input
ran,e and
!
5IN
e
t4e lo: end (t4e offset =ero) of t4e analo, ran,e%
(.ot4 are ,round referenced%)
34e !
"EF
#$ (or !
))
) 0olta,e is t4en adusted to pro0ide a
code c4an,e from FE
EEK
to FF
EEK
% 34is completes t4e
ad- ustment procedure%
$%9 )loc<in, 6ption
34e cloc< for t4e A#( can be deri0ed from t4e )PH cloc<
or an e7ternal ") can be added to pro0ide self-cloc<in,%
34e )LD IN (pin -) ma<es use of a Sc4mitt tri,,er as
s4o:n in Fi,ure 9 %
+
f
)LD

+%+ ")
"

+' <K
3L#E#&9F+ G +F
FI2H"E 9% Self-)loc<in, t4e A#(
Eea0y capaciti0e or () loadin, of t4e cloc< " pin s4ould be
a0oided as t4is :ill disturb normal con0erter operation%
Loads less t4an &' pF, suc4 as dri0in, up to F A#( con0ert-
er cloc< inputs from a sin,le cloc< " pin of + con0erter,
are allo:ed% For lar,er cloc< line loadin,, a )56S or lo:
po:er 33L buffer or PNP input lo,ic s4ould be used to
minimi=e t4e loadin, on t4e cloc< " pin (do not use a
standard 33L buffer)%
$%F "estart (urin, a
)on0ersion
If t4e A#( is restarted ()S and A" ,o lo: and return 4i,4)
durin, a con0ersion, t4e con0erter is reset and a ne: con-
0ersion is started% 34e output data latc4 is not updated if
t4e
34ere are some alternati0es a0ailable to t4e desi,ner
to 4andle t4is problem% .asically, t4e capaciti0e loadin, of
t4e data bus slo:s do:n t4e response time, e0en
t4ou,4 () specifications are still met% For systems
operatin, :it4 a relati0ely slo: )PH cloc< freBuency,
more time is a0ailable in :4ic4 to establis4 proper lo,ic
le0els on t4e bus and t4erefore 4i,4er capaciti0e loads
can be dri0en (see typical c4aracteristics cur0es)%
At 4i,4er )PH cloc< freBuencies time can be e7tended for
I#6 reads (and#or :rites) by insertin, :ait states (*'*') or
usin, cloc< e7tendin, circuits (9*'')%
Finally, if time is s4ort and capaciti0e loadin, is 4i,4, e7ter-
nal bus dri0ers must be used% 34ese can be 3"I-
S3A3E buffers (lo: po:er Sc4ott<y suc4 as t4e
(5F-LS$-' series is recommended) or special 4i,4er
dri0e current products :4ic4 are desi,ned as bus dri0ers%
Ei,4 current bipolar bus dri0ers :it4 PNP inputs are
recommended%
$%+' Po:er Supplies
Noise spi<es on t4e !
))
supply line can cause
con0ersion errors as t4e comparator :ill respond to t4is
noise% A lo: inductance tantalum filter capacitor s4ould be
used close to t4e con0erter !
))
pin and 0alues of + mF
or ,reater are recommended% If an unre,ulated 0olta,e is
a0ailable in t4e system, a separate L5/-'LAZ-&%', 36-1$,
&! 0olta,e re,u- lator for t4e con0erter (and ot4er analo,
circuitry) :ill ,reatly reduce di,ital noise on t4e !
))
supply%
$%++ Airin, and Eoo<-Hp
Precautions
Standard di,ital :ire :rap soc<ets are not satisfactory
for breadboardin, t4is A#( con0erter% Soc<ets on P)
boards can be used and all lo,ic si,nal :ires and leads
s4ould be ,rouped and <ept as far a:ay as possible from
t4e analo, si,nal leads% E7posed leads to t4e analo, inputs
can cause undesired di,ital noise and 4um pic<up,
t4erefore s4ielded leads may be necessary in many
applications%
Functional (escription ()ontinued)
A sin,le point analo, ,round t4at is separate from t4e
lo,ic ,round points s4ould be used% 34e po:er supply
bypass capacitor and t4e self-cloc<in, capacitor (if
used) s4ould bot4 be returned to di,ital ,round% Any
!
"EF
#$ bypass ca- pacitors, analo, input filter capacitors,
or input si,nal s4ield- in, s4ould be returned to t4e analo,
,round point% A test for proper ,roundin, is to measure
t4e =ero error of t4e A#( con0erter% Zero errors in e7cess
of (#- LS. can usually be traced to improper board
layout and :irin, (see section
$%&%+ for measurin, t4e =ero error)%
/%' 3ES3IN2 3EE A#( )6N!E"3E"
34ere are many de,rees of comple7ity associated :it4 test-
in, an A#( con0erter% 6ne of t4e simplest tests is to apply
a <no:n analo, input 0olta,e to t4e con0erter and use
LE(s to display t4e resultin, di,ital output code as s4o:n
in Fi,- ure F %
For ease of testin,, t4e !
"EF
#$ (pin 1) s4ould be supplied
:it4 $%&9' !
()
and a !
))
supply 0olta,e of &%+$
!
()
s4ould be used% 34is pro0ides an LS. 0alue of $'
m!%
If a full-scale adustment is to be made, an analo,
input 0olta,e of &%'1' !
()
(&%+$' G +(#$ LS.) s4ould be
applied to t4e !
IN
(
a
) pin :it4 t4e !
IN
(
b
) pin ,rounded%
34e 0alue of t4e !
"EF
#$ input 0olta,e s4ould t4en be
adusted until t4e di,ital output code is ust c4an,in, from
++++ +++' to ++++
++++% 34is 0alue of !
"EF
#$ s4ould t4en be used for all t4e
tests%
34e di,ital output LE( display can be decoded by di0idin,
t4e * bits into $ 4e7 c4aracters, t4e - most si,nificant (5S)
and t4e - least si,nificant (LS)% 3able I s4o:s t4e fractional
binary eBui0alent of t4ese t:o --bit ,roups% .y addin, t4e
0olta,es obtained from t4e ??!5S@@ and ??!LS@@ columns
in 3able I, t4e nominal 0alue of t4e di,ital display
(:4en
!
"EF
#$
e
$%&9'!) can be determined% For e7ample, for an
output LE( display of +'++ '++' or .9 (in 4e7), t4e 0olta,e
0alues from t4e table are /%&$'
a
'%+$' or /%9-'
!
()
% 34ese 0olta,e 0alues represent t4e center-0alues of a
per- fect A#( con0erter% 34e effects of Buanti=ation error
4a0e to be accounted for in t4e interpretation of t4e test
results%
For a 4i,4er speed test system, or to obtain plotted data, a
di,ital-to-analo, con0erter is needed for t4e test set-up% An
accurate +'-bit (A) can ser0e as t4e precision 0olta,e
source for t4e A#(% Errors of t4e A#( under test can
be e7pressed as eit4er analo, 0olta,es or differences in $
di,i- tal :ords%
A basic A#( tester t4at uses a (A) and pro0ides t4e error
as an analo, output 0olta,e is s4o:n in Fi,ure * % 34e $
op amps can be eliminated if a lab (!5 :it4 a numerical
sub- traction feature is a0ailable to read t4e difference
0olta,e,
??A G )@@, directly% 34e analo, input 0olta,e can be
supplied by a lo: freBuency ramp ,enerator and an K->
plotter can be used to pro0ide analo, error (> a7is) 0ersus
analo, input (K a7is)%
For operation :it4 a microprocessor or a computer-
based test system, it is more con0enient to present t4e
errors di,i- tally% 34is can be done :it4 t4e circuit of Fi,ure
1 , :4ere t4e output code transitions can be detected as t4e
+'-bit (A) is incremented% 34is pro0ides (#- LS. steps for
t4e *-bit A#( under test% If t4e results of t4is test are
automatically plotted :it4 t4e analo, input on t4e K a7is
and t4e error (in LS.@s) as t4e > a7is, a useful transfer
function of t4e A#( under test results% For acceptance
testin,, t4e plot is not neces- sary and t4e testin, speed
can be increased by establis4in, internal limits on t4e
allo:ed error for eac4 code%
-%' 5I)"6P"6)ESS6" IN3E"FA)IN2
3o dicuss t4e interface :it4 *'*'A and 9*'' microproces-
sors, a common sample subroutine structure is used%
34e microprocessor starts t4e A#(, reads and stores t4e
results of +9 successi0e con0ersions, t4en returns to t4e
user@s pro,ram% 34e +9 data bytes are stored in +9
successi0e memory locations% All (ata and Addresses
:ill be ,i0en in 4e7adecimal form% Soft:are and 4ard:are
details are pro- 0ided separately for eac4 type of
microprocessor%
-%+ Interfacin, *'*' 5icroprocessor (eri0ati0es
(*'-*,
*'*&)
34is con0erter 4as been desi,ned to directly interface :it4
deri0ati0es of t4e *'*' microprocessor% 34e A#( can be
mapped into memory space (usin, standard memory ad-
dress decodin, for )S and t4e 5E5" and 5E5A
strobes) or it can be controlled as an I#6 de0ice by usin,
t4e I#6 "
and I#6 A strobes and decodin, t4e address bits A' 7
AF (or address bits A* 7 A+& as t4ey :ill contain
t4e
same *-bit address information) to obtain t4e )S input%
Hs-
in, t4e I#6 space pro0ides $&9 additional addresses
and may allo: a simpler *-bit address decoder but t4e data
can only be input to t4e accumulator% 3o ma<e use of t4e
addi- tional memory reference instructions, t4e A#(
s4ould be mapped into memory space% An e7ample of an
A#( in I#6 space is s4o:n in Fi,ure +' %
FI2H"E F% .asic A#( 3ester
3L#E#&9F+ G +*
FI2H"E *% A#( 3ester :it4 Analo, Error 6utput
Functional (escription ()ontinued)
FI2H"E 1% .asic ??(i,ital@@ A#( 3ester
3A.LE I% (E)6(IN2 3EE (I2I3AL 6H3PH3 LE(s
3L#E#&9F+ G +1
EEK .INA">
F"A)3I6NAL .INA"> !ALHE F6"
6H3PH3 !6L3A2E
)EN3E" !ALHES
AI3E
!
"EF
#$
e
$%&9' !
()
5S 2"6HP LS 2"6HP !5S 2"6HPQ !LS 2"6HPQ
F
E
(
)
+ + + +
+ + + '
+ + ' +
+ + ' '
+&#+9
F#*
+/#+9
/#-
+&#$&9
F#+$*
+/#$&9
/#9-
-%*''
-%-*'
-%+9'
/%*-'
'%/''
'%$*'
'%$9'
'%$-'
.
A
1
*
+ ' + +
+ ' + '
+ ' ' +
+ ' ' '
++#+9
&#*
1#+9
+#$
++#$&9
&#+$*
1#$&9
+#/$
/%&$'
/%$''
$#**'
$#&9'
'%$$'
'%$''
'%+*'
'%+9'
F
9
&
-
' + + +
' + + '
' + ' +
' + ' '
F#+9
/#*
&#+9
+#-
F#$&9
/#+$*
$#$&9
+#9-
$%$-'
+%1$'
+%9''
+#$*'
'%+-'
'%+$'
'%+''
'%'*'
/
$
+
'
' ' + +
' ' + '
' ' ' +
' ' ' '
/#+9
+#*
+#+9
/#$&9
+#+$*
+#$&9
'%19'
'%9-'
'%/$'
'
'%'9'
'%'-'
'%'$'
'
Q(isplay 6utpute!5S 2roup a !LS 2roup
Functional (escription ()ontinued)
Note +M QPin numbers for t4e (P*$$* system controller, ot4ers are INS*'*'A%
Note $M Pin $/ of t4e INS*$$* must be tied to a+$! t4rou,4 a + <K resistor to ,enerate t4e "S3
F instruction :4en an interrupt is ac<no:led,ed as reBuired by t4e accompanyin, sample pro,ram%
FI2H"E +'% A()'*'+ G INS*'*'A )PH Interface
SA5PLE P"62"A5 F6" FI2H"E +' A()'*'+ G INS*'*'A )PH IN3E"FA)E
3L#E#&9F+ G $'
''/*
T
)/ '' '/
T
"S3 FM
T
L5P L( (A3A
T T T
'+'' $+ '' '$ S3A"3M LKI E '$''E U EL pair :ill point to
U data stora,e locations
'+'/ /+ '' '- "E3H"NM LKI SP '-''E U Initiali=e stac< pointer (Note
+)
'+'9 F( 56! A, L U 3est T of bytes entered
'+'F FE 6F )PI 6F E U If T - +9% L5P to
'+'1 )A +/ '+ LZ )6N3 U user pro,ram
'+') (/ E' 6H3 E' E U Start A#(
'+'E F. EI U Enable interrupt
'+'F '' L66PM N6P U Loop until end of
'++' )/ 6F '+ L5P L66P U con0ersion
'++/
T
T
T
T
T
T
T
T
T
T
T
)6N3M
T
(Hser pro,ram to
process data)
T
T
T
T
T
T
T
T
'/'' (. E' L( (A3AM IN E' E U Load data into accumulator
'/'$ FF 56! 5, A U Store data
'/'/ $/ INK E U Increment stora,e pointer
'/'- )/ '/ '+ L5P "E3H"N
Note +M 34e stac< pointer must be dimensioned because a "S3 F instruction pus4es t4e P) onto t4e stac<%
Note $M All address used :ere arbitrarily c4osen%
Functional (escription ()ontinued)
34e standard control bus si,nals of t4e *'*' )S, "(
and A") can be directly :ired to t4e di,ital control inputs
of t4e A#( and t4e bus timin, reBuirements are met to
allo: bot4 startin, t4e con0erter and outputtin, t4e data
onto t4e data bus% A bus dri0er s4ould be used for lar,er
microprocessor systems :4ere t4e data bus lea0es t4e
P) board and#or must dri0e capaciti0e loads lar,er t4an
+'' pF%
-%+%+ Sample *'*'A )PH Interfacin, )ircuitry
and
Pro,ram
34e follo:in, sample pro,ram and associated 4ard:are
s4o:n in Fi,ure +' may be used to input data from t4e
con0erter to t4e INS*'*'A )PH c4ip set (comprised of t4e
INS*'*'A microprocessor, t4e INS*$$* system controller
and t4e INS*$$- cloc< ,enerator)% For simplicity, t4e A#(
is controlled as an I#6 de0ice, specifically an *-bit bi-
direction- al port located at an arbitrarily c4osen port
address, E'% 34e 3"I-S3A3E output capability of t4e A#(
eliminates t4e need for a perip4eral interface de0ice,
4o:e0er address decodin, is still reBuired to ,enerate t4e
appropriate )S for t4e con- 0erter%
It is important to note t4at in systems :4ere t4e A#( con-
0erter is +-of-* or less I#6 mapped de0ices, no address
decodin, circuitry is necessary% Eac4 of t4e * address bits
(A' to AF) can be directly used as )S inputs8one for eac4
I#6 de0ice%
-%+%$ INS*'-* Interface
34e INS*'-* interface tec4niBue :it4 t4e A()'*'+ series
(see Fi,ure ++ ) is simpler t4an t4e *'*'A )PH
interface% 34ere are $- I#6 lines and t4ree test input lines in
t4e *'-*% Ait4 t4ese e7tra I#6 lines a0ailable, one of t4e
I#6 lines (bit
' of port +) is used as t4e c4ip select si,nal to t4e A#(,
t4us eliminatin, t4e use of an e7ternal address decoder%
.us control si,nals "(, A" and IN3 of t4e *'-* are tied
directly to t4e A#(% 34e +9 con0erted data :ords are
stored at on- c4ip "A5 locations from $' to $F (Ee7)% 34e
"( and A" si,nals are ,enerated by readin, from and
:ritin, into a dummy address, respecti0ely% A sample
interface pro,ram is s4o:n belo:%
FI2H"E ++% INS*'-* Interface
SA5PLE P"62"A5 F6" FI2H"E ++ INS*'-* IN3E"FA)E
3L#E#&9F+ G $+
'- +'
'- &'
L5P
6"2
L5P
+'E
/E
&'E
M Pro,ram starts at addr +'
U Interrupt ump 0ector
6"2 +'E U 5ain pro,ram
11 FE
*+
ANL
56!K
P+, T'FEE
A, V "+
U )4ip select
U "ead in t4e +st data
U to reset t4e intr
*1 '+ S3A"3M 6"L P+, R+ U Set port pin 4i,4
.* $'
.1 FF
.A +'
$/ FF
11 FE
1+
A2AINM
56!
56!
56!
56!
ANL
56!K
"', T$'E
"+, T'FFE
"$, T+'E
A, T'FFE
P+, T'FEE
V "+, A
U (ata address
U (ummy address
U )ounter for +9 bytes
U Set A)) for intr loop
U Send )S (bit ' of P+)
U Send A" out
'& EN I U Enable interrupt
19 $+ L66PM LNZ L66P U Aait for interrupt
EA +. (LNZ "$, A2AIN U If +9 bytes are read
'' N6P U ,o to user@s pro,ram
'' N6P
6"2 &'E
*+
A'
+*
IN(A3AM 56!K
56!
IN)
A, V "+
V "', A
"'
U Input data, )S still lo:
U Store in memory
U Increment stora,e counter
*1 '+ 6"L P+, T+ U "eset )S si,nal
$F )L" A U )lear A)) to ,et out of
1/ "E3" U t4e interrupt loop
Functional (escription ()ontinued)
-%$ Interfacin, t4e Z-
*'
34e Z-*' control bus is sli,4tly different from t4at of
t4e
*'*'% 2eneral "( and A" strobes are pro0ided and sepa-
rate memory reBuest, 5"ES, and I#6 reBuest, I6"S,
si,- nals are used :4ic4 4a0e to be combined :it4 t4e
,eneral- i=ed strobes to pro0ide t4e eBui0alent *'*'
si,nals% An ad- 0anta,e of operatin, t4e A#( in I#6 space
:it4 t4e Z-*' is t4at t4e )PH :ill automatically insert one
:ait state (t4e "( and A" strobes are e7tended one
cloc< period) to allo: more time for t4e I#6 de0ices to
respond% Lo,ic to map t4e A#( in I#6 space is s4o:n in
Fi,ure +/ %
3L#E#&9F+ G $/
FI2H"E +/% 5appin, t4e A#( as an I#6
(e0ice for Hse :it4 t4e Z-*' )PH
Additional I#6 ad0anta,es e7ist as soft:are (5A
routines are a0ailable and use can be made of t4e output
data trans- fer :4ic4 e7ists on t4e upper * address lines
(A* to A+&) durin, I#6 input instructions% For e7ample,
5HK c4annel selection for t4e A#( can be accomplis4ed
:it4 t4is operat- in, mode%
-%/ Interfacin, 9*'' 5icroprocessor
(eri0ati0es
(9&'$, etc%)
34e control bus for t4e 9*'' microprocessor
deri0ati0es does not use t4e "( and A" strobe si,nals%
Instead it em- ploys a sin,le "#A line and additional timin,,
if needed, can be deri0ed fom t4e :$ cloc<% All I#6
de0ices are memory mapped in t4e 9*'' system, and a
special si,nal, !5A, indicates t4at t4e current address is
0alid% Fi,ure +- s4o:s an interface sc4ematic :4ere t4e
A#( is memory mapped in t4e 9*'' system% For simplicity,
t4e )S decodin, is s4o:n usin, (#$ (5*'1$% Note t4at in
many 9*'' systems, an al-
ready decoded -#& line is brou,4t out to t4e common bus
at pin $+% 34is can be tied directly to t4e )S pin of t4e
A#(, pro0ided t4at no ot4er de0ices are addressed at EK
A(("M
-KKK or
&KKK%
34e follo:in, subroutine performs essentially t4e same
function as in t4e case of t4e *'*'A interface and it can
be called from any:4ere in t4e user@s pro,ram%
In Fi,ure +& t4e A()'*'+ series is interfaced to t4e
59*'' microprocessor t4rou,4 (t4e arbitrarily c4osen) Port
. of t4e 5)9*$' or 5)9*$+ Perip4eral Interface
Adapter, (PIA)% Eere t4e )S pin of t4e A#( is ,rounded
since t4e PIA is already memory mapped in t4e 59*''
system and no )S decodin, is necessary% Also notice t4at
t4e A#( output data lines are connected to t4e
microprocessor bus under pro- ,ram control t4rou,4 t4e
PIA and t4erefore t4e A#( "( pin can be ,rounded%
A sample interface pro,ram eBui0alent to t4e pre0ious one
is s4o:n belo: Fi,ure +& % 34e PIA (ata and )ontrol
"e,is- ters of Port . are located at EEK addresses *''9
and *''F, respecti0ely%
&%' 2ENE"AL APPLI)A3I6NS
34e follo:in, applications s4o: some interestin, uses
for t4e A#(% 34e fact t4at one particular microprocessor is
used is not meant to be restricti0e% Eac4 of t4ese
application cir- cuits :ould 4a0e its counterpart usin, any
microprocessor t4at is desired%
&%+ 5ultiple A()'*'+ Series to 5)9*'' )PH
Interface
3o transfer analo, data from se0eral c4annels to a
sin,le microprocessor system, a multiple con0erter
sc4eme pre- sents se0eral ad0anta,es o0er t4e
con0entional multiple7er sin,le-con0erter approac4% Ait4
t4e A()'*'+ series, t4e differential inputs allo: indi0idual
span adustment for eac4 c4annel% Furt4ermore, all analo,
input c4annels are sensed simultaneously, :4ic4
essentially di0ides t4e microproces- sor@s total system
ser0icin, time by t4e number of c4annels, since all
con0ersions occur simultaneously% 34is sc4eme is s4o:n in
Fi,ure +9 %
Note +M Numbers in parent4eses refer to 5)9*'' )PH pin out% Note $M Number or letters in
brac<ets refer to standard 59*'' system common bus code%
FI2H"E +-% A()'*'+-5)9*'' )PH Interface
3L#E#&9F+ G $-
Functional (escription ()ontinued)
SA5PLE P"62"A5 F6" FI2H"E +- A()'*'+-5)9*'' )PH IN3E"FA)E
''+' (F /9 (A3AIN S3K 3E5P$ U Sa0e contents of K
''+$ )E '' $) L(K TW''$) U Hpon I"S lo: )PH
''+& FF FF F* S3K WFFF* U umps to ''$)
''+* .F &' '' S3AA W&''' U Start A()'*'+
''+. 'E )LI
''+) /E )6N!"3 AAI U Aait for interrupt
''+( (E /- L(K 3E5P+
''+F
''$$
*) '$ 'F
$F +-
)PK
.ES
TW'$'F
EN(P
U Is final data storedX
''$- .F &' '' S3AA W&''' U "estarts A()'*'+
''$F '* INK
''$* (F /- S3K 3E5P+
''$A $' F' ."A )6N!"3
''$) (E /- IN3"P3 L(K 3E5P+
''$E .9 &' '' L(AA W&''' U "ead data
''/+ AF '' S3AA K U Store it at K
''// /. "3I
''/- '$ '' 3E5P+ F(. W'$'' U Startin, address for
U data stora,e
''/9 '' '' 3E5P$ F(. W''''
''/*
''/.
)E '$ ''
(F /-
EN(P L(K
S3K
TW'$''
3E5P+
U "einitiali=e 3E5P+
''/( (E /9 L(K 3E5P$
''/F /1 "3S U "eturn from
subroutine U 3o user@s pro,ram
Note +M In order for t4e microprocessor to ser0ice subroutines and interrupts, t4e stac< pointer must be dimensioned in t4e user@s pro,ram%
FI2H"E +&% A()'*'+ G 5)9*$' PIA Interface
3L#E#&9F+ G $&
Functional (escription ()ontinued)
SA5PLE P"62"A5 F6" FI2H"E +& A()'*'+ G 5)9*$' PIA IN3E"FA)E
''+' )E '' /* (A3AIN L(K TW''/* U Hpon I"S lo: )PH
''+/ FF FF F* S3K WFFF* U umps to ''/*
''+9 .9 *' '9 L(AA PIA6". U )lear possible I"S
fla,s
''+1 -F )L"A
''+A .F *' 'F S3AA PIA)".
''+( .F *' '9 S3AA PIA6". U Set Port . as input
''$' 'E )LI
''$+ )9 /- L(A. TW/-
''$/ *9 /( L(AA TW/(
''$& FF *' 'F )6N!"3 S3A. PIA)". U Starts A()'*'+
''$* .F *' 'F S3AA PIA)".
''$. /E AAI U Aait for interrupt
''$) (E -' L(K 3E5P+
''$E
''/+
*) '$ 'F
$F 'F
)PK
.ES
TW'$'F
EN(P
U Is final data storedX
''// '* INK
''/- (F -' S3K 3E5P+
''/9 $' E( ."A )6N!"3
''/* (E -' IN3"P3 L(K 3E5P+
''/A .9 *' '9 L(AA PIA6". U "ead data in
''/( AF '' S3AA K U Store it at K
''/F /. "3I
''-' '$ '' 3E5P+ F(. W'$'' U Startin, address for
U data stora,e
''-$ )E '$ '' EN(P L(K TW'$'' U "einitiali=e 3E5P+
''-& (F -' S3K 3E5P+
''-F /1 "3S U "eturn from subroutine
PIA6". ESH W*''9 U 3o user@s pro,ram
PIA)". ESH W*''F
34e follo:in, sc4ematic and sample subroutine ((A3A IN)
may be used to interface (up to) * A()'*'+@s directly to t4e
5)9*'' )PH% 34is sc4eme can easily be e7tended to allo:
t4e interface of more con0erters% In t4is confi,uration
t4e con0erters are (arbitrarily) located at EEK address &'''
in t4e 5)9*'' memory space% 3o sa0e components,
t4e cloc< si,nal is deri0ed from ust one ") pair on t4e
first con0erter% 34is output dri0es t4e ot4er A#(s%
All t4e con0erters are started simultaneously :it4 a S36"E
instruction at EEK address &'''% Note t4at any ot4er EEK
address of t4e form &KKK :ill be decoded by t4e
circuit, pullin, all t4e )S inputs lo:% 34is can easily be
a0oided by usin, a more definiti0e address decodin,
sc4eme% All t4e interrupts are 6"ed to,et4er to insure
t4at all A#(s 4a0e completed t4eir con0ersion before t4e
microprocessor is in- terrupted%
34e subroutine, (A3A IN, may be called from any:4ere in
t4e user@s pro,ram% 6nce called, t4is routine initiali=es
t4e
)PH, starts all t4e con0erters simultaneously and :aits for
t4e interrupt si,nal% Hpon recei0in, t4e interrupt, it reads
t4e con0erters (from EEK addresses &''' t4rou,4 &''F)
and stores t4e data successi0ely at (arbitrarily c4osen)
EEK ad- dresses '$'' to '$'F, before returnin, to t4e
user@s pro- ,ram% All )PH re,isters t4en reco0er t4e
ori,inal data t4ey 4ad before ser0icin, (A3A IN%
&%$ Auto-Zeroed (ifferential 3ransducer Amplifier
and A#( )on0erter
34e differential inputs of t4e A()'*'+ series eliminate t4e
need to perform a differential to sin,le ended con0ersion
for a differential transducer% 34us, one op amp can be
eliminat- ed since t4e differential to sin,le ended
con0ersion is pro- 0ided by t4e differential input of t4e
A()'*'+ series% In ,en- eral, a transducer preamp is
reBuired to ta<e ad0anta,e of t4e full A#( con0erter input
dynamic ran,e%
Functional (escription ()ontinued)
Note +M Numbers in parent4eses refer to 5)9*'' )PH pin out%
Note $M Numbers of letters in brac<ets refer to standard 59*'' system common bus code%
FI2H"E +9% Interfacin, 5ultiple A#(s in an 5)9*'' System
SA5PLE P"62"A5 F6" FI2H"E +9 IN3E"FA)IN2 5HL3IPLE A#(s IN AN 5)9*'' S>S3E5
3L#E#&9F+ G $9
A(("ESS
''+'
EEK )6(E
(F -- (A3AIN
5NE56NI)S
S3K 3E5P
)655EN3S
U Sa0e )ontents of K
''+$ )E '' $A L(K TW''$A U Hpon I"S L6A )PH
''+& FF FF F* S3K WFFF* U Lumps to ''$A
''+* .F &' '' S3AA W&''' U Starts all A#(@s
''+. 'E )LI
''+) /E AAI U Aait for interrupt
''+( )E &' '' L(K TW&'''
''$' (F -' S3K IN(EK+ U "eset bot4 IN(EK
''$$ )E '$ '' L(K TW'$'' U + and $ to startin,
''$& (F -$ S3K IN(EK$ U addresses
''$F (E -- L(K 3E5P
''$1
''$A
/1
(E -' IN3"P3
"3S
L(K IN(EK+
U "eturn from subroutine
U IN(EK+ 7 K
''$) A9 '' L(AA K U "ead data in from A#( at K
''$E
''$F
'*
(F -'
INK
S3K IN(EK+
U Increment K by one
U K 7 IN(EK+
''/+ (E -$ L(K IN(EK$ U IN(EK$ 7 K
Functional (escription ()ontinued)
SA5PLE P"62"A5 F6" FI2H"E +9 IN3E"FA)IN2 5HL3IPLE A#(s IN AN 5)9*'' S>S3E5
A(("ESS
''//
EEK )6(E
AF ''
5NE56NI)S
S3AA K
)655EN3S
U Store data at K
''/& *) '$ 'F )PK TW'$'F U Ea0e all A#(@s been readX
''/* $F '& .ES "E3H"N U >esM branc4 to "E3H"N
''/A
''/.
'*
(F -$
INK
S3K IN(EK$
U NoM increment K by one
U K 7 IN(EK$
''/( $' E. ."A IN3"P3 U .ranc4 to ''$A
''/F /. "E3H"N "3I
''-' &' '' IN(EK+ F(. W&''' U Startin, address for A#(
''-$ '$ '' IN(EK$ F(. W'$'' U Startin, address for data
stora,e ''-- '' '' 3E5P F(. W''''
Note +M In order for t4e microprocessor to ser0ice subroutines and interrupts, t4e stac< pointer must be dimensioned in t4e user@s pro,ram%
For amplification of () input si,nals, a maor system error
is t4e input offset 0olta,e of t4e amplifiers used for
t4e preamp% Fi,ure +F is a ,ain of +'' differential
preamp :4ose offset 0olta,e errors :ill be cancelled by
a =eroin, subroutine :4ic4 is performed by t4e INS*'*'A
microproc- essor system% 34e total allo:able input offset
0olta,e error for t4is preamp is only &' m! for (#- LS.
error% 34is :ould ob0iously reBuire 0ery precise amplifiers%
34e e7pression for t4e differential output 0olta,e of t4e
preamp isM
$"$
SA+ is closed to force t4e preamp@s differential input to be
=ero durin, t4e =eroin, subroutine and t4en opened
and SA$ is t4en closed for con0ersion of t4e actual
differential input si,nal% Hsin, $ s:itc4es in t4is manner
eliminates con- cern for t4e 6N resistance of t4e
s:itc4es as t4ey must conduct only t4e input bias current
of t4e input amplifiers%
6utput Port . is used as a successi0e appro7imation re,is-
ter by t4e *'*' and t4e binary scaled resistors in series
:it4 eac4 output bit create a (#A con0erter% (urin, t4e
=eroin,
subroutine, t4e 0olta,e at !
7
increases or decreases as re-
!
6
e O!
IN
(
a
)
b
!
IN
(
b
)P
8
+
a
"+ (
a
Buired to ma<e t4e differential output 0olta,e eBual to =ero%
34is is accomplis4ed by ensurin, t4at t4e 0olta,e at
t4e
K Y > K Y
>
SI2NAL 2AIN
(!
6S
$
b
!
6S
+
b
!
6S
/
, I
K
"
K
)
T
+
a
"+ L
output of A+ is appro7imately $%&! so t4at a lo,ic ??+@@ (&!)
on any output of Port . :ill source current into node !
K
t4us
raisin, t4e 0olta,e at !
K
and ma<in, t4e output
differential
$"$
K Y > K Y >
() E""6" 3E"5 2AIN
:4ere I
K
is t4e current t4rou,4 resistor "
K
% All of t4e
offset error terms can be cancelled by ma<in, , I
K
"
K
e
!
6S+
a
!
6S/
b
!
6S$
% 34is is t4e principle of t4is
auto-=eroin, sc4eme%
34e INS*'*'A uses t4e / I#6 ports of an INS*$&&
Pro- ,ramable Perip4eral Interface (PPI) to control t4e auto
=ero- in, and input data from t4e A()'*'+ as s4o:n in
Fi,ure +* % 34e PPI is pro,rammed for basic I#6
operation (mode ') :it4 Port A bein, an input port and
Ports . and ) bein, output ports% 3:o bits of Port ) are
used to alternately open or close t4e $ s:itc4es at t4e
input of t4e preamp% S:itc4
more ne,ati0e% )on0ersely, a lo,ic ??'@@ ('!) :ill pull current
out of node !
K
and decrease t4e 0olta,e, causin, t4e
differ- ential output to become more positi0e% For t4e
resistor 0al- ues s4o:n, !
K
can mo0e , +$ m! :it4 a
resolution of &' m!, :4ic4 :ill null t4e offset error term
to (#- LS. of full- scale for t4e A()'*'+% It is important
t4at t4e 0olta,e le0els t4at dri0e t4e auto-=ero resistors be
constant% Also, for sym- metry, a lo,ic s:in, of '! to &! is
con0enient% 3o ac4ie0e t4is, a )56S buffer is used for
t4e lo,ic output si,nals of Port . and t4is )56S pac<a,e
is po:ered :it4 a stable &! source% .uffer amplifier A+ is
necessary so t4at it can source or sin< t4e (#A output
current%
+M "$ e -1%& "+
$M S:itc4es are L5)+///- )56S analo, s:itc4es%
/M 34e 1 resistors used in t4e auto-=ero section can be , &N tolerance%
FI2H"E +F% 2ain of +'' (ifferential 3ransducer Preamp
Functional (escription ()ontinued)
Note
Note
Note
FI2H"E +*% 5icroprocessor Interface )ircuitry for (ifferential Preamp
3L#E#&9F+ G $F
A flo: c4art for t4e =eroin, subroutine is s4o:n in
Fi,ure
+1 % It must be noted t4at t4e A()'*'+ series :ill output an
all =ero code :4en it con0erts a ne,ati0e input O!
IN
(
b
)
t
!
IN
(
a
)P% Also, a lo,ic in0ersion e7ists as all of t4e I#6 ports
are buffered :it4 in0ertin, ,ates%
.asically, if t4e data read is =ero, t4e differential output
0olt- a,e is ne,ati0e, so a bit in Port . is cleared to pull !
K
more ne,ati0e :4ic4 :ill ma<e t4e output more positi0e
for t4e ne7t con0ersion% If t4e data read is not =ero, t4e
output 0olt- a,e is positi0e so a bit in Port . is set to
ma<e !
K
more positi0e and t4e output more ne,ati0e% 34is
continues for * appro7imations and t4e differential output
e0entually con- 0er,es to :it4in & m! of =ero%
34e actual pro,ram is ,i0en in Fi,ure $' % All
addresses used are compatible :it4 t4e .L) *'#+'
microcomputer system% In particularM
Port A and t4e A()'*'+ are at port address E-
Port . is at port address E&
Port ) is at port address E9
PPI control :ord port is at port address EF
Pro,ram )ounter automatically ,oes to A(("M/)/( upon
ac<no:led,ement of an interrupt from t4e A()'*'+
&%/ 5ultiple A#( )on0erters in a Z-*'
Interrupt
(ri0en 5ode
In data acBuisition systems :4ere more t4an one A#( con-
0erter (or ot4er perip4eral de0ice) :ill be interruptin,
pro- ,ram e7ecution of a microprocessor, t4ere is
ob0iously a need for t4e )PH to determine :4ic4 de0ice
reBuires ser0ic- in,% Fi,ure $+ and t4e accompanyin,
soft:are is a met4od of determinin, :4ic4 of F A()'*'+
con0erters 4as com- pleted a con0ersion (IN3" asserted)
and is reBuestin, an interrupt% 34is circuit allo:s startin,
t4e A#( con0erters in any seBuence, but :ill input and
store 0alid data from t4e con0erters :it4 a priority
seBuence of A#( + bein, read first, A#( $ second, etc%,
t4rou,4 A#( F :4ic4 :ould 4a0e t4e lo:est priority for
data bein, read% 6nly t4e con0erters :4ose IN3 is
asserted :ill be read%
34e <ey to decodin, circuitry is t4e (5F-LS/F/, *-bit
( type flip-flop% A4en t4e Z-*' ac<no:led,es t4e
interrupt, t4e pro,ram is 0ectored to a data input Z-*'
subroutine% 34is subroutine :ill read a perip4eral status
:ord from t4e (5F-LS/F/ :4ic4 contains t4e lo,ic state
of t4e IN3" out- puts of all t4e con0erters% Eac4 con0erter
:4ic4 initiates an interrupt :ill place a lo,ic ??'@@ in a uniBue
bit position in t4e status :ord and t4e subroutine :ill
determine t4e identity of t4e con0erter and e7ecute a
data read% An identifier :ord (:4ic4 indicates :4ic4 A#(
t4e data came from) is stored in t4e ne7t seBuential
memory location abo0e t4e location of t4e data so t4e
pro,ram can <eep trac< of t4e identity of t4e data entered%
3L#E#&9F+ G $*
FI2H"E +1% Flo: )4art for Auto-Zero "outine
tial memory locations startin, at t4e arbitrarily c4osen ad-
'- A#( -
dress K /E''% '& A#( &
-) 34e stac< pointer must be dimensioned in t4e main pro-
'9 A#( 9
,ram as t4e "S3 F instruction automatically pus4es t4e 'F A#( F
/(''
/('$
/('-
/('9
/('F
/('1
/('.
/('(
/('E
/E1'
(/EF
$9'+
F)
(/E9
'9*'
/EFF
-F
(/E&
5!I 1'
6ut )ontrol Port
5!I E '+
56! A,E
6H3 )
5!I . *'
5!I A FF
56! ),A
6H3 .
Auto-Zero Subroutine
"eturn
U Pro,ram PPI
U )lose SA+ open SA$
U Initiali=e SA" bit pointer
U Initiali=e SA" code
U Port . - SA" code
/(+' /+AA/( LKI SP /(AA Start U (imension stac< pointer
/(+/ (/E- 6H3 A U Start A#(
/(+& F. IE
/(+9 '' N6P Loop U Loop until IN3 asserted
/(+F )/+9/( L5P Loop
/(+A FA 56! A,( Auto-Zero
/(+. )9'' A(I ''
/(+( )A$(/( LZ Set ) U 3est A#( output data for =ero
/($' F* 56! A,. S4ift .
/($+ F9'' 6"I '' U )lear carry
/($/ +F "A" U S4ift ?+? in . ri,4t one place
/($- FE'' )PI '' U Is . =eroX If yes last
/($9 )A/F/( LZ (one U appro7imation 4as been made
/($1 -F 56! .,A
/($A )////( L5P Ne: )
/($( F1 56! A,) Set )
/($E .' 6"A . U Set bit in ) t4at is in same
/($F -F 56! ),A U position as ?+? in .
/(/' )/$'/( L5P S4ift .
/(// A1 K"A ) Ne: ) U )lear bit in ) t4at is in
/(/- )/'(/( L5P "eturn U same position as ?+? in .
/(/F -F 56! .,A (one U t4en output ne: SA" code%
/(/* F) 56! A,E U 6pen SA+, close SA$ t4en
/(/1 EE'/ K"I '/ U proceed :it4 pro,ram% Preamp
/(/. (/E9 6H3 ) U is no: =eroed%
/(/( T
T
T
Normal
Pro,ram for processin,
proper data 0alues
/)/( (.E- IN A "ead A#( Subroutine U "ead A#( data
/)/F EEFF K"I FF U In0ert data
/)-+ &F 56! (,A
/)-$ F* 56! A,. U Is . "e, - 'X If not stay
/)-/ E9FF ANI FF U in auto =ero subroutine
/)-& )$+A/( LNZ Auto-Zero
/)-* )//(/( L5P Normal
NoteM All numerical 0alues are 4e7adecimal representations%
FI2H"E $'% Soft:are for Auto-Zeroed (ifferential A#(
&%/ 5ultiple A#( )on0erters in a Z-*'; Interrupt (ri0en
5ode ()ontinued)
34e follo:in, notes applyM
+) It is assumed t4at t4e )PH automatically performs a "S3
F instruction :4en a 0alid interrupt is ac<no:led,ed ()PH
is in interrupt mode +)% Eence, t4e subroutine startin, ad-
dress of K''/*%
$) 34e address bus from t4e Z-*' and t4e data bus to t4e
Z-
*' are assumed to be in0erted by bus dri0ers%
/) A#( data and identifyin, :ords :ill be stored in seBuen-
&) 34e perip4erals of concern are mapped into I#6
space :it4 t4e follo:in, port assi,nmentsM
EEK P6"3 A(("ESS PE"IPEE"AL
'' 55F-)/F- *-bit flip-flop
'+ A#( +
'$ A#( $
'/ A#( /
P) onto t4e stac< and t4e subroutine uses an additional
9 stac< addresses%
34is port address also ser0es as t4e A#( identifyin, :ord
in t4e pro,ram%
FI2H"E $+% 5ultiple A#(s :it4 Z-*' 3ype 5icroprocessor
IN3E""HP3 SE"!I)IN2 SH."6H3INE
S6H")E
L6) 6.L )6(E S3A3E5EN3 )655EN3
3L#E#&9F+ G $1
''/* E& PHSE EL U Sa0e contents of all re,isters affected by
''/1 )& PHSE .) U t4is subroutine%
''/A F& PHSE AF U Assumed IN3 mode + earlier set%
''/. $+ '' /E L( (EL),K/E'' U Initiali=e memory pointer :4ere data :ill be stored%
''/E 'E '+ L( ), K'+ U ) re,ister :ill be port A((" of A#( con0erters%
''-' (/'' 6H3 K'', A U Load perip4eral status :ord into *-bit latc4%
''-$ (.'' IN A, K'' U Load status :ord into accumulator%
''-- -F L( .,A U Sa0e t4e status :ord%
''-& F1 3ES3 L( A,) U 3est to see if t4e status of all A#(@s 4a0e
''-9 FE '* )P, K'* U been c4ec<ed% If so, e7it subroutine
''-* )A 9' '' LPZ, (6NE
''-. F* L( A,. U 3est a sin,le bit in status :ord by loo<in, for
''-) +F ""A U a ?+? to be rotated into t4e )A""> (an IN3
''-( -F L( .,A U is loaded as a ?+?)% If )A""> is set t4en load
''-E (A &&'' LP), L6A( U contents of A#( at port A((" in ) re,ister%
''&+ ') NEK3 IN) ) U If )A""> is not set, increment ) re,ister to point
''&$ )/ -&'' LP,3ES3 U to ne7t A#(, t4en test ne7t bit in status :ord%
''&& E( F* L6A( IN A, ()) U "ead data from interruptin, A#( and in0ert
''&F EE FF K6" FF U t4e data%
''&1 FF L( (EL),A U Store t4e data
''&A $) IN) L
''&. F+ L( (EL),) U Store A#( identifier (A#( port A((")%
''&) $) IN) L
''&( )/ &+ '' LP,NEK3 U 3est ne7t bit in status :ord%
''9' F+ (6NE P6P AF U "e-establis4 all re,isters as t4ey :ere
''9+ )+ P6P .) U before t4e interrupt%
''9$ E+ P6P EL
''9/ )1 "E3 U "eturn to ori,inal pro,ram
6rderin, Information
3E5P "AN2E 'J) 36 F'J) 'J) 36 F'J) 'J) 36 F'J) b
-'J) 36
a
*&J)
E""6"
, (#- .it
Adusted ,
(#$ .it
Hnadusted
, (#$ .it
Adusted ,
+.it
Hnadusted
A()'*'$L)A5
A()'*'/L)A5
A()'*'-L)A5
A()'*'$L)!
A()'*'/L)!
A()'*'-L)!
A()'*'-L)N
A()'*'+L)N
A()'*'$L)N
A()'*'/L)N
A()'*'&L)N
PA)DA2E 6H3LINE 5$'.8Small 6utline !$'A8)4ip )arrier N$'A85olded (IP
3E5P "AN2E b
-'J) 36
a
*&J)
b
&&J) 36
a
+$&J)
E""6"
, (#- .it Adusted
, (#$ .it
Hnadusted , (#$
.it Adusted , +.it
Hnadusted
A()'*'+L)L
A()'*'$L)L
A()'*'/L)L
A()'*'-L)L
A()'*'+LL
A()'*'$LL,
A()'*'$LL#**/
PA)DA2E 6H3LINE L$'A8)a0ity (IP L$'A8)a0ity (IP
)onnection (ia,rams
A()'*'K
(ual-In-Line and Small 6utline (S6) Pac<a,es
3L#E#&9F+ G /'
A()'*'K
5olded )4ip )arrier (P))) Pac<a,e
3L#E#&9F+ G /$
See 6rderin, Information
P4ysical (imensions inc4es (millimeters)
(ual-In-Line Pac<a,e (L)
6rder Number A()'*'+LL, A()'*'$LL, A()'*'+L)L,
A()'*'$L)L, A()'*'/L)L or A()'*'-L)L
A()'*'$LL#**/ or &19$-1'199'+5"A
NS Pac<a,e Number L$'A
S6 Pac<a,e (5)
6rder Number A()'*'$L)A5, A()'*'/L)A5 or A()'*'-L)A5
NS Pac<a,e Number 5$'.
P4ysical (imensions inc4es (millimeters) ()ontinued)
5olded (ual-In-Line Pac<a,e (N) 6rder
Number A()'*'+L)N, A()'*'$L)N,
A()'*'/L)N, A()'*'-L)N or A()'*'&L)N
NS Pac<a,e Number N$'A
A
(
)
'
*
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P4ysical (imensions inc4es (millimeters) ()ontinued)
5olded )4ip )arrier Pac<a,e (!)
6rder Number A()'*'$L)!, A()'*'/L)! or A()'*'-L)!
NS Pac<a,e Number !$'A
LIFE SHPP6"3 P6LI)>
NA3I6NAL@S P"6(H)3S A"E N63 AH3E6"IZE( F6" HSE AS )"I3I)AL )65P6NEN3S IN LIFE SHPP6"3
(E!I)ES 6" S>S3E5S AI3E6H3 3EE EKP"ESS A"I33EN APP"6!AL 6F 3EE P"ESI(EN3 6F NA3I6NAL
SE5I)6N(H)36" )6"P6"A3I6N% As used 4ereinM
+% Life support de0ices or systems are de0ices or $% A critical component is any component of a life
systems :4ic4, (a) are intended for sur,ical implant support de0ice or system :4ose failure to perform can
into t4e body, or (b) support or sustain life, and :4ose be reasonably e7pected to cause t4e failure of t4e
life failure to perform, :4en properly used in accordance support de0ice or system, or to affect its
safety or :it4 instructions for use pro0ided in t4e labelin,, can effecti0eness%
be reasonably e7pected to result in a si,nificant
inury to t4e user%
National Semiconductor National Semiconductor National Semiconductor National Semiconductor
)orporation Europe Eon, Don, Ltd% Lapan Ltd%
++++ Aest .ardin "oad Fa7M (a-1) '-+*'-&/' *& *9 +/t4 Floor, Strai,4t .loc<, 3elM *+-'-/-$11-$/'1
Arlin,ton, 3K F9'+F EmailM cn:,e
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te0m$%nsc%com 6cean )entre, & )anton "d% Fa7M *+-'-/-$11-$-'*
3elM +(*'') $F$-11&1 (eutsc4 3elM (a-1) '-+*'-&/' *& *& 3sims4atsui, Do:loon
Fa7M +(*'') F/F-F'+* En,lis4 3elM (a-1) '-+*'-&/$ F* /$
Fran/ais 3elM (a-1) '-+*'-&/$ 1/ &*
Eon, Don,
3elM (*&$) $F/F-+9''
Italiano 3elM (a-1) '-+*'-&/- +9 *' Fa7M (*&$) $F/9-119'
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reser0es t4e ri,4t at any time :it4out notice to c4an,e said circuitry and
specifications%
This datasheet has been download from:
www . da t a s hee tc a t alog .c om
Datasheets for electronics components.