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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO.

5, SEPTEMBER 2002

609

Control of Circulating Current in Two Parallel


Three-Phase Boost Rectifiers
Zhihong Ye, Member, IEEE, Dushan Boroyevich, Member, IEEE, Jae-Young Choi, Member, IEEE, and
Fred C. Lee, Fellow, IEEE

AbstractOne unique feature in parallel three-phase converters


is a potential zero-sequence circulating current. To avoid the circulating current, most present technology uses isolation approach,
such as transformers or separate power supplies. This paper proposes a parallel system where individual converters connect both
ac and dc sides directly without additional passive components to
reduce size and cost of the overall parallel system. In this case, the
control of the circulating current becomes an important objective
in the converter design. This paper
1) develops an averaged model of the parallel converters based
on a phase-leg averaging technique;
2) a zero-sequence model is then developed to predict the dynamics of the zero-sequence current;
3) based on the zero-sequence model, this paper introduces a
new control variable, which is associated with space-vector
modulation;
4) a strong zero-sequence current control loop is designed to
suppress the circulating current;
5) simulation and experimental results validate the developed
model and the proposed control scheme.
Index TermsBoost rectifier, parallel three-phase converters,
phase-leg, space vector modulation (SVM), variable zero-vectors,
zero-sequence circulating current.

I. INTRODUCTION

HE use of parallel power converters, particularly parallel


dc/dc converters, has become more common in the past
decade. However, the use of parallel three-phase converters has
not yet been explored extensively. One unique feature when paralleling three-phase converters is a potential zero-sequence circulating current [1][12]. To avoid the circulating current, the
following three approaches are used commonly with present
technology:
1) Isolation. Separate ac or dc power supplies [2], [11], or
a transformer isolated ac side [3], [5] is configured for
the overall parallel system. In this approach, the overall
parallel system is bulky and costly because of additional
power supplies or the ac line-frequency transformer.
Manuscript received December 1, 2000; revised May 1, 2002. Recommended
by Associate Editor Y.-F. Liu.
Z. Ye is with the General Electric Corporate Research and Development,
Niskayuna, NY 12309 USA (e-mail: ye@crd.ge.com).
D. Boroyevich and F. C. Lee are with the Center for Power Electronics Systems (CPES), The Bradley Department of Electrical and Computer Engineering,
Virginia Polytechnic Institute and State University, Blacksburg, VA 24061-0111
USA.
J.-Y. Choi is with the Research and Development Center, Samsung Electronics Company, Ltd., Kyunggi-Do 442-742, Korea.
Publisher Item Identifier 10.1109/TPEL.2002.802170.

Fig. 1.

Directly parallel three-phase boost rectifier system.

2) High impedance. Inter-phase reactors are used to provide


high zero-sequence impedance [1], [6]. However, the reactors provide high impedance only at medium and high
frequencies. They cannot prevent a low-frequency circulating current.
3) Synchronized control. This approach basically treats the
parallel converters as one converter [4], [5], [7][10]. For
example, two parallel three-phase three-leg converters are
controlled as a three-phase six-leg converter. This approach is not suitable for modular converter design. When
more converters are in parallel, the system becomes very
complicated to design and control.
This paper proposes a parallel system where individual converters connect both ac and dc sides directly without additional
passive components. The direct connection would reduce size
and cost. Meanwhile, the parallel converters are controlled independently to facilitate modular design.
In Section II, an averaged model of the zero-sequence current
in two parallel three-phase boost rectifiers, as shown in Fig. 1,
is developed. Based on the model, Section III introduces a new
control variable, which is associated with space-vector modulation. Then, a zero-sequence current control scheme is proposed.
The control scheme is designed within an individual converter in
order to have modular design. Section IV shows some simulation
and experimental results to validate the developed model and
the proposed control scheme. Section V summarizes the major
contributions of this work and discusses ideas for future work.

0885-8993/02$17.00 2002 IEEE

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

Fig. 3. Averaged phase-leg model of a three-phase boost rectifier.

(a)

in Fig. 2, where the lower case symbols represent instantaneous


variables, and the upper case symbols represent averaged variables.
Fig. 2(a) shows one totem pole phase-leg of the rectifier.
It has a current source in one side and a voltage source in
the other. Both current and voltage are assumed continuous.
Fig. 2(b) shows the pulse-width modulation (PWM) of the
switches, where is defined as the duty cycle of the top switch
, while
is complementary with
. The corresponding
voltage and current relationships are also shown in Fig. 2(b).
Based on these relationships, the averaged model of the phaseleg is depicted in Fig. 2(c).
Applying phase-leg averaging to all three legs of the rectifier,
an averaged model of the rectifier is developed, as shown in
Fig. 3.
For a carrier-based PWM rectifier, the duty cycles
and are sinusoidal in steady state under balanced condition.
, and
is zero. A space-vector
Therefore, the sum of
modulated rectifier, however, usually has triple harmonics in
order to reduce switching losses, increase maximum modulation
index, and improve waveforms total harmonic distortion (THD).
Therefore, the sum of the duty cycles is not equal to zero, and it
is defined as a zero-sequence duty-cycle
(1)

(b)

From (1), the following equation can be easily derived:


(2)
That is
(3)

(c)
Fig. 2. Totem pole phase-leg averaging technique. (a) Totem pole phase-leg
cell. (b) Switching pulses and the relationships between input and output
variables. (c) Averaged phase-leg model.

where

, and

are

II. MODELING OF THE ZERO-SEQUENCE CURRENT


(4)
A traditional modeling approach for a three-phase boost rectifier is to transform stationary variables into rotating coordinates.
Zero-sequence components, such as zero-sequence voltage, are
not reflected in the model because they do not affect control objectives, such as input line currents and output dc voltage. In
order to model the zero-sequence current for the parallel rectifiers, a phase-leg averaging technique is used [12], as illustrated

Therefore,

, and

can be expressed as

(5)

YE et al.: CONTROL OF CIRCULATING CURRENT

611

Fig. 4.

Averaged model of a three-phase PWM boost rectifier with zero-sequence components.

Fig. 5.

Averaged model of the parallel rectifiers based on phase-leg averaging.

As a result, Fig. 4 shows the averaged model of the threephase rectifier with zero-sequence components. For a single recand has to be zero because there is no
tifier, the sum of
zero-sequence current path. Although a zero-sequence voltage
exists in the converter, it does not affect the input currents and output voltage control.
With two rectifiers in parallel, a zero-sequence current path
is formed and a circulating current may occur. Fig. 5 shows the
averaged model of the two parallel three-phase rectifiers.
In Fig. 5, the zero-sequence current is defined as

(8)
and

(9)

(6)

and , which are not identified as a separate circuit


where
element in Fig. 5, are equivalent series resistors (ESRs) of the
and , respectively.
inductors
Summing up (7)(9), and using (3) and (6), the following
equation can be derived:

(7)

(10)

In the ac side, there are three loops forming three equations

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

Fig. 8.
Fig. 6.

Definition of the new control variable k .

Averaged model of the zero-sequence dynamic.

Fig. 9. Averaged zero-sequence model with the new control variable k .


Fig. 7. Duty cycle relationship between phase-legs and space vectors.

Equation (10) describes the dynamic of the zero-sequence


components. As a result, the averaged model of the zero-sequence dynamic is developed, and is depicted in Fig. 6.
III. CONTROL OF THE ZERO-SEQUENCE CURRENT
Different space-vector modulation (SVM) schemes produce
different triple harmonics and therefore have different duty cy, and . For example, Fig. 7 shows one PWM pattern
cles
,
of the SVM scheme with alternative zero vectors. The
and
, respectively
and are the duty cycles of

(11)
and
are the duty cycles of the active vectors
where
and
, respectively, and
is the total duty cycle of the zero
and
.
vectors
is
In this case,
(12)
Fig. 10.

Implementation of the common-sequence control.

Although different SVM schemes have the same and in


the synthesis of a reference vector, can differ. The distribution
of the zero vectors can vary without affecting the control objectives, such as the input ac currents and the output dc voltage.
can be controlled by the distribution of
This indicates that
. Based on this idea, a new control variable is introduced as
follows:

where
is the time period for applying the zero vector
,
as illustrated in Fig. 8.
Usually, for the scheme with alternative zero vectors,
, as shown in Fig. 7. With the definition in (13), (12) can be
rewritten as

(13)

(14)

YE et al.: CONTROL OF CIRCULATING CURRENT

613

(a)

(a)

(b)

(b)

Fig. 11. Simulated waveforms without zero-sequence current control (f


=
32 kHz, f
= 16 kHz). (a) Zero-sequence currents. (b) Input phase currents.

Fig. 12. Simulated waveforms with zero-sequence current control (f


=
= 16 kHz). (a) The zero-sequence currents. (b) The input phase
32 kHz, f
currents.

Then, the difference of

of the two rectifiers is expressed as


(15)

As a result, the new averaged model of the zero-sequence


dynamic with the new control variable is shown in Fig. 9.
Since it is a first-order system, the control bandwidth of the
zero-sequence current loop can be designed to be very high and
a strong current loop suppressing the zero-sequence current can
be achieved.
One rectifier needs only two current sensors to implement
power factor correction because the sum of the three line currents is always zero. With two rectifiers in parallel, three current
sensors are needed in order to obtain the zero-sequence current. Fig. 10 shows the implementation of the zero-sequence
current control. In a two-parallel converter system, it is sufficient to control one of the two converters since there is only
one zero-sequence current. The shaded block is the zero-sequence current controller added onto the other control parts of
the rectifier.
This control scheme is advantageous over the one that treats
the parallel converters as one converter. Since this scheme

is implemented within the individual converter and does not


need any additional interconnected circuitry, it allows modular
design.

IV. SIMULATION AND EXPERIMENTAL RESULTS


The simulation model was developed using SABER. Without
the zero-sequence current control, any discrepancies between
two rectifiers (different switching frequencies, different power
stage parameters or different switching deadtime, for example,
each of which was demonstrated in simulation) may cause a
large circulating current.
Fig. 11 shows two rectifiers with switching frequencies of
32 kHz and 16 kHz. Fig. 11(a) shows that a significant low-freand
quency circulating current exists in the system. The
are zero-sequence currents for rectifiers 1 and 2, respectively.
The circulating current causes distorted input line currents
and , as shown in Fig. 11(b). By applying the zero-sequence
current control, the waveforms in Fig. 12 show that the circulating current is almost gone. Only high-frequency current ripples still exist, and they can be easily attenuated.

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 5, SEPTEMBER 2002

(a)
(a)

(b)
Fig. 14. Experimental waveforms with zero-sequence current control (f
=
32 kHz, f
= 16 kHz, unsynchronized). (a) The zero-sequence currents.
(b) The input phase currents.
(b)
Fig. 13. Experimental waveforms without zero-sequence current control
= 32 kHz, f
= 16 kHz, unsynchronized). (a) The zero-sequence
(f
currents. (b) The input phase currents.

The experimental results are shown in Figs. 13 and 14. A twoparallel, three-phase boost rectifier breadboard system was built
and tested. The converters specifications are shown as follows:
V.
Input voltage:
V.
Output voltage:
Rated power: 15 kW/converter.
Switching frequency: 16 kHz or 32 kHz.
Input inductor: 256 H.
Output capacitor: 1200 F.
IGBT modules: TOSHIBA MG 150J2YS50.
DSP: ADSP2101.
Fig. 13 shows the zero-sequence currents and the line currents
without zero-sequence current control, whereas Fig. 14 shows
the waveforms with control. Due to nonuniform practical conditions (such as different delays of clock signals), the experimental waveforms are less uniform than simulation waveforms.
Also, three noticeable ripples in Fig. 14(a) are due to distortion
introduced by zero-crossing detection.

V. CONCLUSION
This work has developed an averaged model to predict zerosequence dynamics in two parallel three-phase boost rectifiers.
To control the zero-sequence current, a new control variable associated with space-vector modulation was introduced. Since
the zero-sequence dynamic is a first-order system, a high bandwidth control loop was designed to effectively suppress the circulating current. Both simulation and experimental results validated the proposed control scheme. The implementation requires only one additional current sensor. The control algorithm
can be easily programmed in a digital signal processor (DSP).
This modeling approach and control concept can be generalized for paralleling any two multi-phase converters, such as full
bridge rectifiers and inverters, three-phase three-leg rectifiers and
inverters, and three-phase four-leg rectifiers and inverters. These
converters cover most medium and high power applications, such
as motor drives, ac power supplies and dc power supplies. The
generalization of this concept will be reported in a separate paper.
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Zhihong Ye (S98M00) received the B.S. and
M.S. degrees in electrical engineering from Tsinghua University, Beijing, China, in 1992 and 1994,
respectively, and the Ph.D. degree from the Virginia
Polytechnic Institute and State University (Virginia
Tech), Blacksburg, in 2000.
Prior to joining Virginia Tech in 1996, he was a
Research Assistant with the Department of Electrical
and Applied Electronics Engineering, Tsinghua University. Since September 2000, he has been with General Electric Corporate Research and Development
Center, Niskayuna, NY, where he is involved with several alternative energy
and distributed generation programs, including power conditioning systems design for fuel cell and microturbine, distributed generation, and grid interconnection studies, etc. His research interests are multiphase power conversion, power
conditioning systems for alternative energy, stability, and interaction analysis of
distributed power electronics systems.
Dr. Ye is a member of Sigma Xi and the IEEE Power Electronics, Industry
Applications, Industrial Electronics, and Power Engineering Societies.
Dushan Boroyevich (M82) received the B.S. degree
from the University of Belgrade, Yugoslavia, in 1976,
the M.S. degree from the University of Novi Sad, Yugoslavia, in 1982, and the Ph.D. degree from the Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, in 1986.
Between 1986 and 1990, he was an Assistant
Professor and Director of the Power and Industrial
Electronics Research Program, Institute for Power
and Electronic Engineering, University of Novi
Sad, and later, acting head of the Institute. In 1990,
he joined The Bradley Department of Electrical and Computer Engineering,
Virginia Tech, as an Associate Professor. From 1996 to 1998, he was Associate
Director of Virginia Power Electronics Center, and since 1998 he has been
the Deputy Director of the NSF Engineering Research Center for Power
Electronics Systems and Professor at the department. His research interests
include multiphase power conversion, high-power PWM converters, modeling
and control of power converters, applied digital control, and electrical drives.
He has published over 100 technical papers, has three patents, and has been
involved in numerous government and industry-sponsored projects in the areas
of power and industrial electronics.
Dr. Boroyevich is a member of Phi Kappa Phi, the IEEE Power Electronics
Society AdCom, and the IEEE Industry Applications Society Industrial Power
Converter Committee.

615

Jae-Young Choi (M01) was born in Ulsan-City,


Korea, on May 5, 1965. He received the B.S. and
M.S. degrees from Seoul National University, Korea,
in 1988 and 1990, respectively, and the Ph.D. degree
from the Virginia Polytechnic Institute and State
University (Virginia Tech), Blacksburg, in 2001.
He worked for LG Electronics, Ltd., Korea as a Research Engineer from 1990 to 1996 and for CPES,
Virginia Tech, as a Research Assistant from 1996 to
2001. Since 2001, he has been a Principal Engineer
at Samsung Electronics, Ltd., Korea. His research interests are soft-switching topologies for multiphase converters, motor control,
and power distribution systems.
Dr. Choi is a member of both the IEEE Power Electronics Society and the
IEEE Industry Applications Society.

Fred C. Lee (S72M74SM87F90) received


the the B.S. degree in electrical engineering from the
National Cheng Kung University, Taiwan, R.O.C.,
in 1968 and the M.S. and Ph.D. degrees in electrical
engineering from Duke University, Durham, NC, in
1971 and 1974, respectively.
He is a University Distinguished Professor with
Virginia Polytechnic Institute and State University
(Virginia Tech), Blacksburg, and prior to that he was
the Lewis A. Hester Chair of Engineering at Virginia
Tech. He directs the Center for Power Electronics
Systems (CPES), a National Science Foundation engineering research center
whose participants include five universities and over 100 corporations. He
is also the Founder and Director of the Virginia Power Electronics Center
(VPEC), one of the largest university-based power electronics research centers
in the country. Total sponsored research funding secured by him over the last
20 years exceeds $35 million. His research interests include high-frequency
power conversion, distributed power systems, space power systems, power
factor correction techniques, electronics packaging, high-frequency magnetics,
device characterization, and modeling and control of converters. He holds 19
U.S. patents, and has published over 120 journal articles in refereed journals
and more than 300 technical papers in conference proceedings.
Dr. Lee received the Society of Automotive Engineerings Ralph R. Teeter
Education Award (1985), Virginia Techs Alumni Award for Research Excellence (1990), and its College of Engineering Deans Award for Excellence in
Research (1997), in 1989, the William E. Newell Power Electronics Award, the
highest award presented by the IEEE Power Electronics Society for outstanding
achievement in the power electronics discipline, the Power Conversion and Intelligent Motion Award for Leadership in Power Electronics Education (1990),
the Arthur E. Fury Award for Leadership and Innovation in Advancing Power
Electronic Systems Technology (1998), the IEEE Millennium Medal, and honorary professorships from Shanghai University of Technology, Shanghai Railroad and Technology Institute, Nanjing Aeronautical Institute, Zhejiang University, and Tsinghua University. He is an active member in the professional
community of power electronics engineers. He chaired the 1995 International
Conference on Power Electronics and Drives Systems, which took place in Singapore, and co-chaired the 1994 International Power Electronics and Motion
Control Conference, held in Beijing. During 1993-1994, he served as President
of the IEEE Power Electronics Society and, before that, as Program Chair and
then Conference Chair of IEEE-sponsored power electronics specialist conferences.