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IPASJ International Journal of Electronics & Communication (IIJEC)

Web Site: http://www.ipasj.org/IIJEC/IIJEC.htm


A Publisher for Research Motivation........ Email: editoriijec@ipasj.org
Volume 2, Issue 8, August 2014 ISSN 2321-5984

Volume 2, Issue 8, August 2014 Page 69

ABSTRACT
This paper report Dynamic testing using sine wave input based on histogram method for overdrive effect on ENOB
&.Estimation of signal to noise ratio in ADC have been carry out.A algorithm is proposed to estimate signal to noise &
distortion ratio using histogram test. The effect of ENOB on SNR is studied by simulation (with software) to meet practical
conditions. Simulation results for 5 bit ADC are presented which show effectiveness of the proposed method. Finally results of
this method are compared with earlier reported work and improvements are obtained in present results.
Keywords-Effective number of bits (ENOB), Transfer Characteristics, Histogram technique, Signal to noise ratio
(SNR),
1. INTRODUCTION
Most applications needs measurements using analog-to-digital based on the signals dynamic range. ENOB of an ADC
is a function of test frequency. It is necessary to determine the value of ENOB at this test frequency. With increase in
input frequency nonlinearity error increases which results in decreases in value of ENOB.The smallest change in a
parameter that must be measured is the signal-to-noise ratio (SNR) & signal-to-noise & distortion ratio (SINAD). SNR
is the ratio of the amplitude of the desired signal to the amplitude of the noise signals at a specified point in time. Sine
wave with high purity is required for spectral testing [1]-[2], which is a major challenge, especially for on-chip test.
Conversion from analog to digital is two steps process. First step is to make the time discrete (Sampling) and the
second step is to make the amplitude discrete (Quantization)[3].The theoretical maximum SNR is the ratio of the full-
scale analog input (RMS value) to the RMS quantization error (residual error). Signal-to-noise-and-distortion ratio
(S/N+D, SINAD, or SNDR) is the ratio of the input signal amplitude to the rms sum of all other spectral components
[4]-[5]. Spectrial analysis of ADC is based on the exploitation of the fourier transform of the digital samples acquired at
output when pure sine wave is applied to input [6]. ADC is usually characterized by its figures of merits like Effective
Number of Bits (ENOB), Signal to Noise and Distortion ratio (SINAD), DNL and 9INL [9]-[10].
2. FACTORS AFFECTING THE ADC PERFORMANCE
To enhance & calibration of signal-to-noise ratio many parameter are required, some of them are:
(i) Oversample & Averaging
(ii) Resolution
(iii) Quantization Noise
(iv) Effective Number of Bit
(v) Throughput
2.1 Need of oversampling & averaging to increase snr
Oversampling and averaging can be used to increase measurement resolution, eliminating the need to resists expensive,
off-chip ADCs. It is done to accomplish for improvement in SNR and to increase the effective resolution (i.e., increase
the effective number of bits of the ADC measurement). Both of these are really the same entities. For example, if we
have a 8-bit ADC and want to generate codes with 10- bits of resolution, then we can use oversampling and averaging
to get the same SNR of a 10-bit ADC.
2.2 Resolution Improvement
The theoretical limit of the SNR of an ADC measurement is based on the quantization noise. Because quantization
error depends on the number of bits of resolution of the ADC [8], the best case SNR is calculated as a function of the



ADC Testing: Effect of overdrive on Effective No.
of Bit (ENOB) & Signal-to-Noise &Distortion
ratio (SINAD) Analysis
Corresponding author Manish Jain
1
, Dr. R S Gamad
2
1Research Scholar, Department of Electronics & Communication Engineering, PAHER University,
Udaipur Rajasthan, India 313024,
2Department of Electronics & Instrumentation Engineering, Shri G. S. Institute of Technology and Science, 23, Park Road,
Indore, M.P., India 452003
IPASJ International Journal of Electronics & Communication (IIJEC)
Web Site: http://www.ipasj.org/IIJEC/IIJEC.htm
A Publisher for Research Motivation........ Email: editoriijec@ipasj.org
Volume 2, Issue 8, August 2014 ISSN 2321-5984

Volume 2, Issue 8, August 2014 Page 70

Effective Number of Bits.
SNR (dB) =(6.02 * ENOB) +1.76
2.3 Quantization Error
The distance between adjacent ADC codes determines the quantization error. Because the ADC will round to the
nearest quantization level, or ADC code:
=
where N is the number of bits in the ADC code
And Vref is the reference voltage. The quantization error (eq) is:
e
q
<=
2.4 Effective Number of Bits
Forgiven fixed noise power, we can calculate the required number of bits.
=- log(OSR)
2 -
- log(12)
2-
- log( )
2
+log (vref)
2
From equation we observe that each doubling of the sampling frequency will lower the in-band noise by 3 dB, and
increase the resolution of the measurement by 1/2 bit.
3. ALGORITHM FOR ANALYSIS OF ENOB & SINAD
For Estimation of best case SNR, the dynamic range of the input signal must match the reference voltage (Vref).


Fig. 3.1 Algorithm flow for estimation of ENOB &SINAD
The values of corrected ENOB considering corrected code transition level can be expressed as
( )
2
log
( )
c
r ms er ror Co rr ec ted
EN OB N
rm se rro r ide al
(
=
(


The rms value of actual and ideal noise can be computed by
Rms noise (K) =
2
1
1] X[K
X[K]
2
] [ ] 1 [
e
(
(
(
(
(

+
}
+
K x K x
dx

Wheree is the error signal between output and input of transfer characteristic
If we assume the best case input signal to be a full-scale sine wave, code transition level T[k] of N bit ADC is
1

[ ] .
k
C
T k C A cos
M

| |
=
|
\ .
, K=1, 2 2
N-1
(3.1)
IPASJ International Journal of Electronics & Communication (IIJEC)
Web Site: http://www.ipasj.org/IIJEC/IIJEC.htm
A Publisher for Research Motivation........ Email: editoriijec@ipasj.org
Volume 2, Issue 8, August 2014 ISSN 2321-5984

Volume 2, Issue 8, August 2014 Page 71

Also rms value as function of Vref for sinusoidal stimuli is
[ rms] = (3.2)
The range of the error voltage is the quantum voltage level (the least significant bit)
[] = =1 LSB (3.3)
Assuming this quantization error voltage is uniformly distributed over the code width from -1/2 LSB to +1/2 LSB, the
expectation value of the error voltage is
= = (3.4)
So the signal to noise ratio is
=20 log =6.02N+1.76 db (3.5)
SINAD is frequently expressed as function of ENOB as
=( - 1.76) / 6.02. (3.6)




Figure 2.2 Sine wave for Histogram representation
4. EXPERIMENTAL ANALYSIS & SIMULATION RESULT
Noise appear due to quantization error may leads to the result of signal to quantization ratio for different effective
number of bit.
4.1 Overdrive Effect on ENOB
Table 4.1 Overdrive Effect on ENOB for 5 bit ADC

S.
No
Over
drive
Voltage
(LSB)
ENOB
without
correction
ENOB
with
correction
ENOB
with
correction
ENOB
with
correction
ENOB with
Correction
1
0 4.6411 3.591714 3.832237 4.185664 4.49258
2
0.3 4.585717 3.7395 3.80722 4.112153 4.371658
IPASJ International Journal of Electronics & Communication (IIJEC)
Web Site: http://www.ipasj.org/IIJEC/IIJEC.htm
A Publisher for Research Motivation........ Email: editoriijec@ipasj.org
Volume 2, Issue 8, August 2014 ISSN 2321-5984

Volume 2, Issue 8, August 2014 Page 72

3
0.6 3.526631 3.944277 3.955724 4.154126 4.293105
4
0.9 3.052208 4.106052 4.102543 4.278497 4.388625
5
1.2 2.773103 4.262992 4.245827 4.413243 4.509603
6
1.5 2.580804 4.41501 4.391954 4.555625 4.64326
7
1.8 2.418624 4.571049 4.593446 4.702765 4.784715
8
2.1 2.282153 4.730507 4.84872 4.852046 4.92587
9
2.4 2.16101 4.886028 4.997289 4.996745 5.062183

Fig.4.1 Comparision of ENOB for overdrive effect for 5 bit ADC
4.2 SINAD estimation & comparision (propsed & earlier)
Table 4.2 Estimation of signal-to-noise & distortion ratio (SINAD) for 5 bit ADC
No. of
Samples
Resolution
ENOB SINAD ENOB
SINAD
(proposed)
(earlier) (earlier) (proposed)
512 5 Bits 4.7178 30.16 db 4.832 30.84 db
1024 5 Bits 4.7094 30.11 db 4.7963 30.63 db
2048 5 Bits 4.607 29.49 db 4.7687 30.46 db
4096 5 Bits 4.6491 29.74 db 4.7786 30.52db
8192 5 Bits 4.642 29.70 db 4.7824 30.55 db
11200 5 Bits 4.6543 29.77 db 4.7801 30.53 db
16384 5 Bits 4.7437 30.31 db 4.7872 30.57 db
20000 5 Bits 4.7469 30.33 db 4.7811 30.54 db


Fig.4.2 Comparision of SINAD for 5 bit ADC with previous results
IPASJ International Journal of Electronics & Communication (IIJEC)
Web Site: http://www.ipasj.org/IIJEC/IIJEC.htm
A Publisher for Research Motivation........ Email: editoriijec@ipasj.org
Volume 2, Issue 8, August 2014 ISSN 2321-5984

Volume 2, Issue 8, August 2014 Page 73

5. CONCLUSION
In proposed work dynamic testing of an ADC is done by simulating ideal 5 bit ADC transfer characteristics. Large
number of samples of full scale sine wave is taken at selected sampling frequency and code transition levels are
computed using histogram method. Overdrive effects on Effective No. of bit (ENOB) have been analyzed.
Quantization error & different error voltage are determined. Signal-to-noise ratio & signal-to-noise & distortion ratio is
estimated with different samples of input frequency of sine wave. Expected proposed output has been compared with
previous results, which shows improvement in the outcomes of estimated parameter of proposed work.
REFERENCES
[1] IEEE Standard for Terminology and Test Methods for Analog-to- Digital Converters, IEEE Std. 1241, 2000.
[2] Jingbo Duan, Degang Chen, SNR Measurement Based on Linearity Test for ADC BIST IEEE Std. 2011.
[3] Bhawana Garg, Dr. D.K.Mishra, Dynamic Testing of ADC: A Review International Journal of Advancements in
Research & Technology, Vol. 1, Issue 4, September-2012.
[4] Jerome J. Blair, Thomas E. Linnenbrink, Corrected rms error and effective number of bits for sine wave ADC ests
ELSEVIER International J ournal on Computer Standards & Interfaces, vol. 26, pp. 4349, 2003.
[5] H. W. Ting, Bin-Da Liu and S. J. Chang, A histogram based testing method for estimating/D converter
performance, IEEE transaction on instrumentation and measurement. Vol. 57,no. 2, PP 420 427, Feb. 2008.
[6] F.azais, S.Bernard, Y.Bertrand, M.Comte, M.Renovell, A-to-D Converter static error detection from dynamic
Parameter measurement, Microelectronics journal34945-953, 2003.
[7] Mahmoud Fawzy Wagdy and Selim S. Awad, Determining ADC Effective Number of Bits Via Histogram testing,
IEEE transaction on instrumentation and measurement. Vol.40, no.4, PP 770-772, Aug.1991.
[8] H. W. Ting, Bin-Da Liu and S. J. Chang, A histogram based testing method for estimating A/D converter
performance, IEEE transaction on instrumentation and measurement. Vol. 57, no. 2, PP 420 427, Feb. 2008.
[9] F. Correa Alegria and A. Cruz Serra, Error in the estimation of transition voltages with the standard
Histogram test ADCs ELSEVIER international Journal on Measurement, 35, pp 389-397, 2004.
[10] H. W. Ting, B. Da Liu and S. Jyh Chang, A Histogram - Based Testing Method for Estimating A/D
Converter Performance IEEE Transactions on Instrumentation and Measurement, vol 57, No 2,2008.
AUTHORS
Manish Jain received the B.E.in Electronics & Telecommunication from MIT with RGPV Bhopal in
2001, and M.Tech. in Microelectronics & VLSI from SGSITS Indore in 2008.He has having 11 years of
Experience in field of teaching & research. His field of interest is in NOC, ADC design & testing, RF
communication, digital design & fabrication. He is currently working as a Associate Professor in Elex. &
Communication Department in Engg. College.

Dr. R.S. Gamad received B.E. in Electronics & Communication, M.Tech. in EC & Ph.D. He has having
17 years of Experience in field of teaching. His area of interest is Design and performance analysis of
ADC, Analog & mixed signal circuit design. He is member of IETE & IE India. He is currently working
as a Associate Professor in Elex. & Instrument Department in reputed Engg. College.

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