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ReductionofStatesandFlowTables

How to reduce the number of internal states in an asynchronous


sequential circuit ????
The algorithm, that was used in chapter 5 for state reduction of a
complete state table in synchronous sequential circuits, will be modified
to cover the state reduction of asynchronous sequential circuits.
Implication Table Implication Table
Merging of the Flow Table
Compatible Pairs Compatible Pairs
Maximal Compatibles
Closed Covering Condition Closed Covering Condition
40 2010Dr.AshrafArmoush,AnNajahNationalUniversity
ImplicationTable
Twostatesinastatetablecanbecombinedintoone,aslongas
theycanbeshowntobeequivalent
Equivalent States: Two states are equivalent if, for each possible EquivalentStates:Twostatesareequivalentif,foreachpossible
input,they giveexactlythesameoutputandgotothesamenext
statesortoequivalentnextstates.
a andb havethesameoutputforthesameinput,theirnextstatesare
c andd forx=0 andb anda forx=1
( ) ( ) Ifwecanshowthat(candd)areequivalent,then(aandb)are
equivalent. [(a,b)imply(c,d)]
41 2010Dr.AshrafArmoush,AnNajahNationalUniversity
ImplicationTable(cont.)
The checking of each pair of states for possible equivalence in a
table with a large number of states can be done systematically by
means of an implication table. means of an implication table.
It is a chart that consists of squares, one for every possible pair of
states.
On the left side along the vertical are listed all the states defined in the
state table except the last.
Across the bottom horizontally are listed all the states except the last.
The states that are not equivalent are marked with (X) in the
corresponding squares.
The states that are equivalent are marked with () in the
corresponding squares.
Some of the squares have entries of implied states that must be q p
further investigated to determine whether they are equivalent or not.
42 2010Dr.AshrafArmoush,AnNajahNationalUniversity
ImplicationTable(cont.)
1. Place a cross in any square corresponding to a pair whose outputs are not equal
2. Enter in the remaining squares the pairs of states that are implied by the pair of g q p p y p
states representing the squares. (Start form the top square in the left column
and going down and then proceeding with the next column to the right).
3. Make successive passes through the table to determine whether any additional
squares should be marked with a x
43 2010Dr.AshrafArmoush,AnNajahNationalUniversity
squares should be marked with a x .
4. Finally, all the squares that have no crosses are recorded with check marks.
ImplicationTable(cont.)
The equivalent states are:
(a, b), (d, e), (d, g), (e, g).
Combine pairs of states into larger groups of Combine pairs of states into larger groups of
equivalent states.
(a, b), (d, e, g)
The final partition consists of:
The equivalent states found from the
implication table [(a, b) (d, e, g)]
All the remaining states in the state table
that are not equivalent to any other state.
[(c) , (f)]
(a b) (c) (d e g) (f) {4 states}
Present
State
NextState Output
0 1 0 1 (a, b) (c) (d, e, g) (f) {4 states}
The original flow table can be reduced from
7 states into 4 states:
State
x=0 x=1 x=0 x=1
a d a 0 0
c d f 0 1
44 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
7 states into 4 states:
d a d 1 0
f c a 0 0
Merging of the Flow Table
When certain combinations of inputs or input sequences may never
occur because of external and internal constrains The state table
is incompletely specified. p y p
Incompletely specified states can be combined to reduce the
number of states in the flow table.
Such states cannot be called equivalent, but, instead they are said
to be compatible.
In order to find a suitable group of compatibles for the purpose of
merging a flow table, the following steps must be applied:
1. Determine all compatible pairs by using the implication table.
2. Find the maximal compatibles using a merger diagram.
3. Find a minimal collection of compatibles that covers all the states
and is closed.
45 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Compatible Pairs
Compatible States: Two states are compatible if in every column of
the corresponding rows in the flow table, they are identical or
compatible states and if there is no conflict in the output values compatible states and if there is no conflict in the output values.
Thecompatible
i pairsare:
(a,b)
(a,c)
( d) (a,d)
(b,e)
(b,f)
(c,d)
(e,f)
46 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Maximal Compatibles
Maximalcompatible: isagroupofcompatiblesthatcontainsall
thepossiblecombinations ofcompatiblestates.
A merger diagram can be used to obtain the maximal compatible Amergerdiagramcanbeusedtoobtainthemaximalcompatible.
All possible compatibles can be found from the geometrical
47 2010Dr.AshrafArmoush,AnNajahNationalUniversity
All possible compatibles can be found from the geometrical
patterns in which states are connected to each other.
Closed Covering Condition
Theconditionthatmustbesatisfiedforrowmergingisthattheset
ofchosencompatiblesmust:
1 Cover all states 1. Coverallstates.
2. Beclosed:(theclosureconditionissatisfiediftherearenoimpliedstatesor
iftheimpliedstatesareincludedwithintheset)
Inthelastexample,the maximalcompatiblesare(a,b)(a,c,d)(b,e,f)
ifweremove(a,b),wegetasetoftwocompatibles:(a,c,d)(b,e,f)
Allthesixstatesareincludedinthisset.
Therearenoimpiled states for(a,c);(a,d);(c,d);(b,e);(b,f)and(e,f)[you
canchecktheimplicationtable] .thecloserconditionissatisfied
Theoriginalprimitiveflowtablecanbemergedintotworows,onefor g p f g , f
eachofthecompatibles.
48 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Ex: (Closed Covering Condition)
From the given implication table, we have the following
compatible pairs:
( a , b ) ( a , d ) ( b , c ) ( c , d ) ( c , e ) ( d , e )
From the merger diagram we determine the maximal From the merger diagram, we determine the maximal
compatibles:
( a , b ) ( a , d ) ( b , c ) ( c , d , e )
If we choose the two compatibles If we choose the two compatibles
( a , b ) ( c , d , e )
All the 5 states are included in this set. ()
The implied states for (a,b) are (b,c). But (b,c) are not
include in the chosen set This set is not closed. (X)
A set of compatibles that will satisfy the closed
covering condition is ( a , d ) ( b , c ) ( c , d , e )
49 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Notes
The same state can be repeated more than once.
There may be more than one possible way of merging rows
when reducing a primitive flow table.
50 2010Dr.AshrafArmoush,AnNajahNationalUniversity
RaceFreeStateAssignment
Once a reduced flow table has been derived, the next step in the
design is to assign binary variables to each stable state.
The main objective in choosing a proper binary state assignment is
the prevention of critical races.
Adjacent Binary Values: 2 binary values are said to be adjacent if
they differ in only one variable ( e g 010 and 011 are adjacent) they differ in only one variable ( e.g. 010 and 011 are adjacent)
2Row FlowTable:
The assignment of a single variable to a flow table with two rows
does not impose critical race problems.
[two adjacent values 0 and 1] [two adjacent values 0 and 1]
51 2010Dr.AshrafArmoush,AnNajahNationalUniversity
3RowFlowTableExample
A flow table with 3 states requires an assignment of 2
variables.
We have the following transitions: We have the following transitions:
a b , a c , b a , b c & c a
(seethetransitiondiagram)
If we take the following assignment:
State Value
00 a 00
b 01
c 11
This assignment will cause a critical race during the
transition from a to c (2 changes in the binary state ),
and also from c to a and also from c to a
52 2010Dr.AshrafArmoush,AnNajahNationalUniversity
3RowFlowTableExample(cont.)
Aracefreeassignmentcanbeobtainedbyaddinganextrarowtotheoriginal
flowtable:
Th f t ill t i The use of an extra row will not increase
the number of binary state variables (2
variables), but it allows the formation of
cycles between two stable states. y
The added row (d) is assigned the binary
value (10), which is adjacent to both a & c.
X
The transition from a to c must go
through d, thus avoiding a critical race.
X
The two squares with dashes in row d
represent unspecified states (dont care).
These squares must not be assigned to 01
in order to avoid the possibility of stable
53 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
in order to avoid the possibility of stable
state being established in the 4
th
row.
3RowFlowTableExample(cont.)
Thenewflowtableisconvertedtoatransitiontabletocompletethedesign
process.
54 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
4RowFlowTableExample
A flow table with 4 states requires an assignment
of two state variables.
If there were no transitions in the diagonal
direction (from a to c or from b to d), it would be
possible to find adjacent assignment for the possible to find adjacent assignment for the
remaining 4 transitions.
In order to satisfy the adjacency requirement In order to satisfy the adjacency requirement,
at least 3 binary variables are needed.
55 2010Dr.AshrafArmoush,AnNajahNationalUniversity
4RowFlowTableExample(cont.)
The following state assignment map is suitable for any 4row flow table.
a, b, c, and d are the original states.
e f and g are extra states e, f, and g are extra states.
States placed in adjacent squares in the map will have adjacent assignments
56 2010Dr.AshrafArmoush,AnNajahNationalUniversity
4RowFlowTableExample(cont.)
To produce cycles:
The transition from a to d must be directed through the extra state e
The transition from c to a must be directed through the extra state g
The transition from d to c must be directed through the extra state f
Although the flow Although the flow
table has 7 rows,
there are only 4
stable states.
57 2010Dr.AshrafArmoush,AnNajahNationalUniversity
MultipleRowMethod forracefreeassignment
It is less efficient than the previous method (shared row method).
Each state in the original flow table is replaced by two or more
combinations of state variables.
e.g.: g
a is replaced with a1 and a2, where a1 is the logical complement of a2
E h bl h bi i i h l h Each stable state has two binary assignments with exactly the
same output
e.g.:
The output values must be the same in a1 and a2
At i ti l f th i t i i At any given time, only one of the assignments is in use.
58 2010Dr.AshrafArmoush,AnNajahNationalUniversity
MultipleRowMethod(cont.)
e.g. a1 is adjacent to b1, c2, and d1 where a2 is adjacent to c1, b2, d1
When choosing the next state for a given present state, a state that is
adjacent to the present state is selected from the map.
59 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Hazards
In order to ensure the proper operation in asynchronous circuits , the
circuits must be:
1 Operated in fundamental mode with only one input changing at any time 1. Operated in fundamental mode with only one input changing at any time.
2. Free of critical races.
3. Checked for hazards .
Hazards are unwanted switching transients that may appear at the
output of a circuit because different paths exhibit different
propagation delay.
Hazards occur in in combinational and asynchronous circuits: Hazards occur in in combinational and asynchronous circuits:
In combination circuits, they may cause a temporarily false output value.
In asynchronous circuits, they may result in a transition to a wrong stable state.
60 2010Dr.AshrafArmoush,AnNajahNationalUniversity
HazardsinCombinationalCircuits
x1 x2 x3 AND1 AND 2 Y
1 1 1 1 0 1
The delay in the inverter may cause the output of gate 1 to change to 0
1 1 1 1 0 1
1 0 1 0 1 1
Thedelayintheinvertermaycausetheoutputofgate1tochangeto0
beforetheoutputofgate2changesto1.
Inthatcase,theoutputgoesto0forshortintervaloftime.
sums) of (product products) of (sum
) )( ' ( or '
3 2 2 1 3 2 2 1
x x x x Y x x x x Y + + = + =
Thefirstimplementationmaycausetheoutputtogoto0whenitshould
remain at 1 (Static 1hazard), while the second implementation may cause remainat1(Static1 hazard),whilethesecondimplementationmaycause
theoutputtogoto1whenitshouldremainat0(Static0hazard).
61 2010Dr.AshrafArmoush,AnNajahNationalUniversity
HazardsinCombinationalCircuits(cont.)
The dynamic hazard causes the output to change three or four
times when it should change from 1 to 0 or from 0 to 1 times when it should change from 1 to 0 or from 0 to 1.
The occurrence of the hazard can be detected by inspecting the
map of a particular circuit.
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HazardFreeCircuit
The change in x2 from 1 to 0 moves the circuit
from minterm 111 to minterm 101.
The hazard exists because the change of input
results in a different product term covering the
two minterms two minterms.
Whenever the circuit must move from one
product term to another, there is a possibility
of a momentary interval when neither term is
equal to 1, giving rise to undesirable 0 output.
The solution is to enclose the minterms with
another product term that overlaps both another product term that overlaps both
groupings.
63 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
HazardFreeCircuit(cont.)
The removal of hazards requires the addition of
redundant gates to the circuit.
64 2010Dr.AshrafArmoush,AnNajahNationalUniversity
HazardsinSequentialCircuits
Momentary erroneous signals are not generally troublesome in normal
combinationalcircuits associated with synchronous sequential circuit. Thus,
hazard are not of concern in these circuits.
Conversely, if a momentary incorrect signal is fed back in an asynchronous
sequential circuit, it may cause the circuit to go to a wrong stable state.
o If the circuit is in total state yx1x2 = 111 and input x2 changes from 1 to 0, the
next total state should be 110. However, because of the hazard, output Y
may go 0 momentarily.
o If this false signal feeds back into gate 2, the output of gate 2 will remain at
0 and the circuit will switch to the incorrect total state 010.
This problem can be eliminated by adding an extra gate.
65 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
HazardsinSequentialCircuits
ImplementationwithSRLatches
Another way to avoid static hazards in asynchronous sequential circuits is
to implement the circuit with SR latches.
A momentary 0 signal applied to the S or R inputs of a NOR latch will have no
effect on the state of the latch.
Similarly, a momentary 1 signal applied to the S or R inputs of a NAND latch
will also have no effect on the state of the latch.
Ex:
Thi i l t ti h t ti 1 h d if b th i t f t #3 This implementation may have a static 1hazard if both inputs of gate#3 go
to 1, changing the output from 1 to 0 momentarily.
But if gate 3 is part of a NANDlatch, the momentarily 1 signal will have no
ff t b th i t ill f Q th t ill b l t 0 d effect because another input will come from Q that will be equal to 0 and
thus maintain the output at 1
66 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Ex:
ConsideraNANDSRlatchwiththefollowingBooleanfunctionsforSandR
S=AB+CD
R AC R=AC
SincethisisaNANDlatchwemustusethecomplementvalueforSandR
S=(AB+CD)=(AB)(CD)
R=(AC)
67 2010Dr.AshrafArmoush,AnNajahNationalUniversity
Ex(cont.):
TheBooleanfunctionforoutputis
Q=(QS)=[Q(AB)(CD)]
TheoutputisgeneratedwithtwolevelsofNANDgates:
If output Q is equal to 1, then Q is equal to 0. If two of the three inputs
go momentarily to 1, the NAND gate associated with output Q will
remain at 1 because Q is maintained at 0.
68 2010Dr.AshrafArmoush,AnNajahNationalUniversity
EssentialHazards
AnEssentialHazard: iscausedbyunequaldelaysalongtwoor
morepathsthatoriginatefromthesameinput.
Essentialhazardscannotbecorrectedbyaddingredundant
gates as in static hazards gatesasinstatichazards.
Theproblemcanbecorrectedbyadjustingtheamountof p y j g
delayintheaffectedpaths.
69 2010Dr.AshrafArmoush,AnNajahNationalUniversity
DESIGNEXAMPLE
The recommended procedural steps for the design of a complete
asynchronous sequential circuit are:
1 State the design specifications 1. State the design specifications.
2. Derive a Primitive Flow Table.
3. Reduce the Flow Table by merging rows.
k f bi i 4. Make a racefree binary state assignment.
5. Obtain the transition table and output map.
6. Obtain the logic diagram using SR latches.
1) Design Specification:
It is necessary to design a negativeedgetriggered T flipflop The It is necessary to design a negativeedgetriggered T flipflop. The
circuit has two inputs T (toggle) and C (clock) and one output Q.
The output state is complemented if T=1 and the clock changes
from 1 to 0 (negativeedgetriggering). Otherwise, under all input ( g g gg g) , p
condition, the output remains unchanged.
70 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
2) Primitive flow table.
Inputs Output
State T C Q Comments
1 1 0 I iti l t t i 0 a 1 1 0 Initialoutputis0
b 1 0 1 Afterstatea
c 1 1 1 Initialoutputis1
d 0 0 f d 1 0 0 Afterstate c
e 0 0 0 Afterstatedorf
f 0 1 0 Afterstateeora
g 0 0 1 Afterstateborh
h 0 1 1 AfterStategorc
71 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
3) Merging of the Flow Table
Th i l tibl i The maximal compatibles pairs are:
(a,f)(b,g,h)(c,h)(d,e,f)
72 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
In this particular example, the minimal collection of compatibles
is also the maximal compatibles set:
( f) (b h) ( h) (d f) (a,f)(b,g,h)(c,h)(d,e,f)
73 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
4) State Assignment and Transition Table
From the transition diagram, it is clear that there are no diagonal lines.
Therefore, it is possible to find a suitable adjacent assignment without , p j g
the need of extra states.
74 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
5) Logic Diagram
There are two state variables Y1 and Y2, and one output Q. The
previous output map shows that Q is equal to y2. previous output map shows that Q is equal to y2.
75 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity
Designexample(cont)
76 2010Dr.Ashraf Armoush ,AnNajah NationalUniversity

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