=1
k
*Frequncy
= (4*25% ) + (1.33*75% ) = 2.0
CPI
Iwith new
FPSQR
= CPI
original
- 2%*(
CPI
with olds
FPSQR
-
CPI
with new
FPSQR only
)
= 2.0 2% *( 20 2) = 1.64
We can compute the CPI for the enhancement of all FP instructions the same way or by
summing the FP and non-FP CPIs. Using the latter gives us
CPI
new
FP
= (75% *1.33) +( 25%*2.5) = 1.625
The speedup for the overall FP enhancement is
Speedup
new
FP
= ( CPI
original
/ CPI
new
FP
) = (2/1.625) = 1.23
2. Number Representation
Q.1. Do the following calculations below in single precision floating point representation. Show
the floating point binary values for the operands, show the result of the add or subtract, then
show the final normalized binary representation.
(A) 0.5 + 0.3125,
(B) 12 3.875.
SOL. Each of the numbers can be represented in the following single precision floating point
format.
Sign (1 bit) Exponent (8 bits) (1),Fraction (23 bits)
(A) 0.5:
0 01111110 (1),00000000000000000000000
0.3125:
0 01111101 (1)01000000000000000000000
0.3125 After aligning the exponent:
0 01111110 (0)10100000000000000000000
0.3125+0.5:
0 01111110 (1)10100000000000000000000
Normalize the result:
0 01111110 10100000000000000000000
(B). 12:
0 10000010 (1)10000000000000000000000
3.875
0 10000000 (1).11110000000000000000000
3.875 After aligning the exponent:
0 10000010 (0).01111100000000000000000
12-3.875: use the 2s complement to represent the fractions, and do addition for two operands:
0 1.100000 (all zeros)
+ 1 1.100001 (all zeros)
0 1.000001 (all zeros)
Therefore the result is:
0 10000010 00000100000000000000000
3. Addressing Modes
Q.1. A three byte long PC-relative instruction is stored in the memory with starting address of
304052 (decimal) onwards. If a (-31) signed displacement is present in the address field of the
instruction what is the next instruction address (effective address).
SOL. EA= PC+IR [address field value]
EA=304055 +(-31) =304024
Q.2. Find out the name of addressing modes presented and number of memory references of
following instructions-
1. ADD A [R
0
], @B
2. MOV R
0
, [2000][R
1
]
3. MOV Ax, [Bx][SI]
4. ADD @R
0
, @5000
SOL.1. Indexed and indirect addressing mode, 4[1(D)+1(S1)+2(S2)] memory references
2. Indirect Indexed addressing modes, 2[1-base address cal,1-read-write data] memory ref.
3. Base indexed addressing mode, 1[for read-write data] memory ref.
4. Memory indirect addressing mode, 4[1+1+2] memory ref.