Anda di halaman 1dari 3

Microprocessors

Page 1 of 3
LAB # 1. Introduction to VHDL

I. OBJECTIVES
By the end of this laboratory assignment, you should be able to:
Use Quartus II to develop a simple project.
Write, compile, synthesize and simulate sequential circuits using VHDL code.

II. REFERENCES
Quartus II Introduction Using VHDL Design. (See PDF file in SAVIO).
The Quartus II Software Interactive Tutorial
(http://www.altera.com/education/training/courses/ODSW1050)

III. MATERIALS AND METHODS
Part A
4-bit serial shift register

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY shift_a IS
PORT( n_cp, ser_data : IN std_logic;
q : OUT std_logic_vector(3 DOWNTO 0));
END shift_a;

ARCHITECTURE arc OF shift_a IS
SIGNAL reg : std_logic_vector (3 DOWNTO 0);
BEGIN
PROCESS (n_cp)
BEGIN
IF (n_cpEVENT AND n_cp = 0) THEN
reg(3)<= ser_data;
reg(2)<= reg(3);
reg(1)<= reg(2);
reg(0)<= reg(1);
END IF;
q<=reg;
END PROCESS;
END arc;
Fig 1. VHDL description of a serial-in shift-right shift register.

Microprocessors
Page 2 of 3
Procedure:
1. Open Quartus II software.
2. Go to File ! New Project Wizard
3. Type the program of Fig.1. Save it with the name of the entity.
4. Create a new project and name it.
5. Name the project with the name of the entity.
6. Select Family Flex 10K, and Device EPF10K70RC240-4 [Optional] Any device
from the Cyclone family also works fine.
7. Click Continue and Finish.
8. Compile (Processing ! Start compilation)
9. Open a vector waveform file. Add the signals of the entity. Give values to the clock
(n_cp) and serial input (ser_data), and simulate to obtain the values of the outputs.
10. Analyze the results to make sure the system works well.

Part B
Universal shift register.
A universal shift register can load parallel data, shift its content left or right, or remain in
the same state. It can perform parallel-to-serial operation (first loading parallel input and
then shifting) or serial-to-parallel operation (first shifting and then retrieving parallel
output). The desired operation is specified by a 2-bit control signal, ctrl.

Procedure:
11. Write a VHDL code for a 4-bit parallel register based on the code from Part A.
Repeat steps 2-8 to write the program, create a new project, compile and simulate
your code.
12. Create a symbol for your register (File ! Create/Update ! Create symbol files for
current file).
13. Use the new to design an 8-bit universal shift register using the Schematic Editor.
14. Add the necessary component you need to complete the design (for example:
multiplexer, input and output ports, etc.).
Microprocessors
Page 3 of 3
15. Compile your design and correct the errors (if they appear).
16. Simulate all the functions (load, shift right, shift left, and hold) in the same simulation
file.

IV. DISCUSSION
Create a report and include:
Block diagram of the system
Logic diagram of the system
VHDL program
Timing graphs
Conclusions