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Instructions are encoded as binary values to be executed by processors. An instruction encoding includes the opcode and information about operands and addressing modes. There are several approaches to encoding instructions depending on factors like the number of operands and whether operands are registers or memory addresses. Instructions are encoded by assemblers into object files and decoded by processors during execution. Special cases like single-operand instructions may use shorter encodings. Understanding instruction encoding allows both generating encoded instructions from assembly and decoding binary instructions.
Instructions are encoded as binary values to be executed by processors. An instruction encoding includes the opcode and information about operands and addressing modes. There are several approaches to encoding instructions depending on factors like the number of operands and whether operands are registers or memory addresses. Instructions are encoded by assemblers into object files and decoded by processors during execution. Special cases like single-operand instructions may use shorter encodings. Understanding instruction encoding allows both generating encoded instructions from assembly and decoding binary instructions.
Instructions are encoded as binary values to be executed by processors. An instruction encoding includes the opcode and information about operands and addressing modes. There are several approaches to encoding instructions depending on factors like the number of operands and whether operands are registers or memory addresses. Instructions are encoded by assemblers into object files and decoded by processors during execution. Special cases like single-operand instructions may use shorter encodings. Understanding instruction encoding allows both generating encoded instructions from assembly and decoding binary instructions.
Instructions consist of: operation (opcode) e.g. MOV operands (number depends on operation) operands specified using addressing modes addressing mode may include addressing information e.g. registers, constant values Encoding of instruction must include opcode, operands addressing information. !nstruction Encoding "all ##$#% % Encoding: represent entire instruction as a binary value number of bytes needed depends on &ow muc& information must be encoded instructions are encoded by assembler: .OBJ file ' (lin(, t&en loaded by loader) instructions are decoded by processor during e)ecution cycle *e will consider a subset of interesting cases Instructions with No Operands (easy) encode operation only in a single byte e)amples+ ,E- C H .O/ !" H 0re consistent 1 never c&ange !nstruction Encoding "all ##$#% 2 Instructions with One Operand operand is a register (reg3$%4) or a memory operand (mem3$%4) always 2 bytes for opcode and addressing info may &ave up to 2 more bytes of immediate data opcode bits+ some in bot& bytes' #" bits total w 5 widt& of operand # 5 36bit % 5 %46bit mod r$m encode addressing info !nstruction Encoding "all ##$#% 7 opcode w 8 % # mod opcode r$m 8 4 9 : 7 2 % # $O% & '&$ ()B*E mod "" "# #" ## r/m w = 0 w = 1 """ ;<= > ?!@ ;<= > ?! > d@ ;<= > ?! > n@ 0A 0= ""# ;<= > B!@ ;<= > B! > d@ ;<= > B! > n@ CA C= "#" ;</ > ?!@ ;</ > ?! > d@ ;</ > ?! > n@ BA B= "##;</ > B!@ ;</ > B! > d@ ;</ > B! > n@ <A <= #"" ;?!@ ;?! > d@ ;?! > n@ 0H ?/ #"# ;B!@ ;B! > d@ ;B! > n@ CH </ ##" direct ad ;</ > d@ ;</ > n@ BH ?! !nstruction Encoding "all ##$#% : d is +,bit signed value n is #-,bit unsigned value register direct address mod 5 #% is not used by t&e assembler' ### ;<=@ ;<= > d@ ;<= > n@ <H B! !nstruction Encoding "all ##$#% 9 E)ample+ INC %. opcode+ % st byte+ %%%%%%% 2 nd byte+ ### w / " (36bit operand) operand 5 BH register+ mod 5 %% r&m 5 %%# opcode w # st byte: ####### " / 0E . mod opcode r$m 1 nd byte: ## """ ##" / C- . !nstruction Encoding "all ##$#% 4 from table' 2hat does following encoding represent3 ######## ##"""### 5 00 C4 H opcode 5 !.C % st byte+ %%%%%%% 2 nd byte+ ### w 5 % %46bit operand mod 5 %% register operand r&m 5 %%% B! register encoding for INC %I ''' !nstruction Encoding "all ##$#% 8 0not&er E)ample+ INC B5(E 6(' 78I 9 :; inde)ed addressing to an 36bit memory operand will need e)tra byte(s) to encode t&e immediate value (: / 000C .) opcode 1 same as last e)ample+ %%%%%% ### w / " 36bit destination (memory) operand r&m / #"" (from table) mod could be #% or %# depends on constant can use w&ic&ever mod value wor(s can s&orten encodings' !nstruction Encoding "all ##$#% 3 t&e assembler will use mod / #" %46bit constant ("""CH) encoded into instruction little endian resulting instruction encoding+ byte % byte 2 byte 7 byte : ####### " #" """ #"" ######"" ######## 0E +: 0C 00 . !nstruction Encoding "all ##$#% D Could also encode same instruction+ mod / "# constant encoded as signed 36bit value t&erefore instruction encoding includes only one byte for t&e encoding of 1 : resulting instruction encoding+ byte % byte 2 byte 7 ####### " "# """ #"" ######"" 0E :: 0C H ..<. t&e 36bit value (1 : 5 "C H) is sign e<tended to %46bits ("""C H) before adding ?! value w&y? !nstruction Encoding "all ##$#% %# value of most signif. bit of byte is copied to all bits in e)tension byte 0not&er E)ample+ INC B5(E 6(' 78I = #1+; inde)ed addressing to an 36bit memory operand everyt&ing t&e same as last e)ample, e)cept+ canEt encode >%23 as 36bit signed value' need %46bits to encode %23 t&en must &ave mod / #" '' instruction encoding would include two e<tra bytes encoding %23 5 ## 3# H resulting instruction encoding+ byte % byte 2 byte 7 byte : ####### " #" """ #"" 0E +: "" +" . !nstruction Encoding "all ##$#% %% little endian mod ' Instructions with (wo Operands >1 0orms? at most, can &ave only one memory operand can &ave # or % memory operands, but not 2 limits ma). instruction siFe to 4 bytes e.g. $O@ 2O'% 6(' 7BA= B"";C "0"0". 2 bytes opcode > addressing info 2 bytes destination addressing constant B"" 2 bytes source constant 0"0" . !nstruction Encoding "all ##$#% %2 0O'$ #: (wo Operands )nd 8ource Dses Immediate $ode destination eit&er register or memory encode dest using mod r$m 1 as before w (as before) 5 siFe of operand (36 or %46bit) if w / # (%46bit) t&en s is significant s indicates siFe of immediate value 5 " all %46bits encoded in instruction assembler always used s / " 5 # 36bits encoded 1 sign e)tend to %46bits' !nstruction Encoding "all ##$#% %7 opcode s w 8 2 % # mod opcode r$m 8 4 9 : 7 2 % # E)ample+ 8DB $yE@arC #. MyGVar is a word (B*) stored at address #2##H opcode bits+ % st byte+ #""""" 2 nd byte+ #"# w / # (%46bit memory operand) s / # 1 can encode 7%H in one byte sign e)tend to ##7%H mod / "" r&m / ##" resulting encoding+ opcode #""""" # # "" #"# ##"26bytes dest %6byte address imm s w mod r$m !nstruction Encoding "all ##$#% %: destination+ direct addressing assembler uses s / " %46bit immediate value 5 # "" (little endian) + 1E "1 "" # !nstruction Encoding "all ##$#% %9 stored little endian 0O'$ 1: (wo Operands )nd 8ource %oes Not Dse Immediate $ode at least one of destination or source is register' encode register operand encode ot&er using mod r$m 1 as before d 5 destination 5 " source is encoded in ,EH 5 # destination is encoded in ,EH !nstruction Encoding "all ##$#% %4 opcode d w 8 2 % # mod 'EF r$m 8 4 9 : 7 2 % # E)ample+ 8DB $yE@ar C 8I opcode+ ""#" #" suppose $yE@ar is G address ""1". d / " 1 source is a register 1 encoded in ,EH w / # 1 %46bit operand mod / "" destination is memory 1 direct mode r&m / ##" 'EF / ##" (?!) encoding+ ##%#%# # % ## %%# %%# addrs const 1! - 1" "" !nstruction Encoding "all ##$#% %8 d w mod register encoding as in mod 5 %% column in table r$m NO(E+ different first6byte opcode bits for ?I< w&en source is immediate (%#####) vs. w&en source is not immediate (##%#%#) -&e opcode bits for "O,M % vs. "O,M 2 instructions are different' MOV ;<=@, 2## MOV ;<=@ , 0= w&at if bot& source and destination are registers? s&ould ,EH encode source or destination? E)ample+ 8DB BAC CA !nstruction Encoding "all ##$#% %3 different opcode bits' Case #: 8ource (C=) is encoded in 'EF opcode+ ""#" #" d / " 1 source is encoded in ,EH w / # 1 %46bit operand mod / ## destination is register r&m / "## <= register is destination register 'EF / ""# C= register is source register encoding+ ##%#%# # % %% ##% #%% 1! CB !nstruction Encoding "all ##$#% %D d w mod r$m Case 1: %estination (<=) is encoded in 'EF opcode+ ""#" #" d / # 1 destination is encoded in ,EH w / # 1 %46bit operand mod / ## source is register r&m / ""# C= register (source) 'EF / "## <= register (destination) encoding+ ##%#%# # % %% #%% ##% 1! %! cases # H 1: two encodings for same instructionI !nstruction Encoding "all ##$#% 2# d w mod r$m ,EH 8ome 8pecial,Case Encodings: single6operand instructions operand is %46bit register 1 can encode in one byte instructions involving t&e accumulator+ )* or )A s&orter encoded forms 1 often one byte 2.53 2hat use are these special cases3 Instruction Encoding >human perspective? %. given instruction 1 &ow to encode ? 2. given binary 1 &ow to decode ? !nstruction Encoding "all ##$#% 2% *&y mig&t t&is be important? EA)$ IIII Fiven instruction 9 how to encode 3 decide on form number of bytes find opcode bits from table decide on remaining bits individual bit values loo( up mod H r&m values if needed loo( up register encoding if needed fill opcode byte(s) add immediate operand data byte(s) words little endian dest precedes source !nstruction Encoding "all ##$#% 22 Fiven binary 9 how to decode 3 use first 4 bits of first byte to decide on form number of bytes use opcode bits to find operation from table identify operands from remaining bits individual bits loo( up mod H r&m values if present loo( up register encoding if present add immediate operand data byte(s) if present words little endian dest precedes source !nstruction Encoding "all ##$#% 27 Could you &and6assemble a simple program now? 5E8I recall previous control flow encoding discussions II *&at about an operation $ opcode loo(6up table? many forms 1 some give+ opcode bits only entire first instruction byte 1 including operand info encoded in first byte' list of info for eac& instruction will be posted' opcode bits forms !nstruction Encoding "all ##$#% 2: