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AUTOMATION

ENGINEERING



I dedicate this text to my students.
They are my source of inspiration since I could
not find a text that cover the principles of
system integration applied to industrial controls
and automation.









By: Wence Lpez


Version 0.6
San Juan, Puerto Rico
Prof. Wence Lpez Page 1 of 45 Version 0.6
Table of Contents

Chapter 1 Relay Logic ........................................................................................................2

Chapter 2 Sensors ...............................................................................................................3

Chapter 3 PLC Hardware ...................................................................................................9

Chapter 4 PLC Memory Map ...........................................................................................12

Chapter 5 Basic SLC Instructions ....................................................................................16

Chapter 6 Program Control...............................................................................................26

Chapter 7 Data Management ............................................................................................30

Chapter 8 Managing Files ................................................................................................35

Chapter 9 Special Addressing...........................................................................................42

Chapter 10 Introduction to Electro-Pneumatic ...................................................................43



Sample Documentation ............................................................................................ Appendix A
Laboratory Documentation ...................................................................................... Appendix B
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Chapter 1 Relay Logic

Relay- It is an electromechanical device that consists of a coil and sets of hard contacts (metal to
metal). When a voltage is applied to the coil, its contacts switch position, the open contacts
closed and the closed contacts opens. The relay can be used to interface high current loads and
various voltages levels. It is limited by relatively slow switching speeds and finite mechanical
life.

Complementary output
The dual configuration of a sensing device, where one output is normally open and the other is
normally closed. An example is a SPDT form 1C relay contact.

SPST is an abbreviation for Single Pole Single Throw. It refers to a switch or a relay contact
(electromechanical or solid-state) with a single contact that is either normally open or normally
closed.

SPDT is an abbreviation for Single Pole Double Throw. It refers to a switch or an
electromechanical relay having one set of form 1C contacts. One contact is open when the other
is closed (complementary switching).

DPDT is an Abbreviation for Double-Pole Double-Throw. It refers to a switch or an
electromechanical relay with two sets of single-pole double-throw form 1C contacts that are
operated simultaneously by a single action (when the relay is energized).











SPDT



SPST
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Operator control devices

Symbol Description





Normally Open Momentary Pushbutton





Normally Closed Momentary Pushbutton


Momentary pushbutton, 2PST







Maintained Pushbutton


Indicating light








DC Neutral


PB1, ON


R


PB1, OFF


W


+DC


Typical ON/OFF control


R


LT1




W


ON OFF
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Chapter 2 Sensors

2.1 Photoelectric sensors

There are 4 basic components to any photoelectric sensor:
a- Light source
b- Light detector
c- Lenses
d- Output device

The light source or emitter normally is a light-emitting diode (LED) that is a solid-state
semiconductor that emits light when current is applied. The LEDs emits a specific wavelengths
or colors of light. The most common light sources are infrared, visible red, green, & blue.
Different LED colors offer different characteristics, therefore the color can be used as an
advantage to detect specific object.

The light wavelengths of the Infrared LEDs are greater than 800 nanometers (800 Angstroms)
and are invisible to the eye and safe to most photographic films. Infrared is the most efficient
since they generate the most light & least heat. They are used where maximum light output is
required. Visible red is used where a visible beam is required to help a setup. Visible red, blue
& yellow LEDs are used in applications where specific colors or contrasts must be detected.

One of the biggest advantages of an LED is its ability to be modulated. Modulating an LED
simply means turning it ON and OFF at high frequencies. The photo detector and its amplifier
are turned to the modulation frequencies. Only the modulated light is amplified and all other
light that reaches the phototransistor is ignored. This is analog to a radio receiver, which tunes
only one station and ignores the others. Modulation of sensors allow them to be used in a more
wide variety of places, like areas with dust, smoke, fog, mist, etc.

Non-modulated receiver may be used to detect parts that emit their own light (i.e. Red-hot metal,
room lighting).

The light detector or receiver normally is a photo detector that detects the incoming light to the
sensor. A typical photo detector is a photodiode or phototransistor that provides a change in
conducted current depending on the amount of light detected. Photo detectors are mode sensitive
to certain wavelengths of light. Therefore, to improve sensing efficiency, the LED & photo
detector are often spectrally matched.

The lenses are used with LED & photo detectors to adjust the sensitivity or to increase the
sensing distance.

The output device of the sensor provides an interface signal to control logic. When the photo
detector portion of the sensor sense enough change of light level it activates the output device.
For example an output device can be a relay.

Since the sensor consists of electronic parts, it is not sensitive to vibration & can handle a wide
temperature range. Typically the LED doesnt need replacement; therefore the sensor might be
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totally encapsulated, making them more rugged & reliable. A self-contained sensor contains:
Optics, Modulator, Amplification, Demodulator, and Output switch.

Fiber Optic Sensor

The fiber optics sensors are the smallest photoelectric sensors and can be used when the space
available for installation is too small. The fiber optic sensor is made of small transparent strands
fibers of glass or plastic, that conduct and guides light energy into and out of a specific
inspection area of interest. The bundles of fibers are usually within and protected by a flexible
steel armored sheath.

The glass fiber type is able to withstand hostile sensing environments. The plastic fiber optic
assemblies are made up of either one or two acrylic monofilaments in a flexible sheath. The
fiber optic assembly is manufactured in 2 styles:

- Individual fiber - one for emitter; one for receiver
- Bifurcated - combines emitter & receiver in one

The most common problem encountered is the breakage of individual strands due to sharpening
or bending. (i.e. reciprocating machine).

The infrared sensors are specified in three sensing modes:

1) Diffuse sensing mode
In this mode the sensor has the emitter and receiver in the same package. The object is
detected when some part of the light generated by the emitter strikes the surface of the
object at some arbitrary angle and is diffused from the surface at all angles. The object is
detected when the receiver captures some small percentage of the diffused light that
returns to the sensor. In another word the objects reflects the light back to the sensor.

Design Tip:
In diffuse sensing mode the more light the object reflects (i.e. white) the better the
object is detected. The dark absorbing light (i.e. black) can have problems being
detected.

There is a special case of diffuse sensing called convergent. The convergent sensing
mode has range of distance with a center focal point that can detect and object. In
another words, the object is detected if it is within the detection area, not closer not
farther.

2) Retro-reflective mode
Also called retro mode. Similar to the diffuse sensing this mode contains the emitter
and receiver, but uses a reflector to create a continue beam of light. The emitter produces
the light, toward the reflector target in another strategic location. The light rebounds on
the reflector, back to the sensor, where the receiver detects it. Retro is the popular for
conveyor applications where the objects are large (i.e. boxes, cartons, etc.) and the
scanning ranges are typically few feet.
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Design Tip:
In retro-reflective mode, the object is detected when it cross and interrupts the beam
of light. Therefore the less light the object reflects, the better is detected. If the
object is a good reflector, when it cross the beam will reflect the light back to the
receiver, and be confused as the reflector, crossing undetected.

3) Opposed sensing
In this mode the emitter and receiver are separate and installed facing each other. The
emitter produces a ray of light, toward the receiver that is located strategically. The
object is detected when it travel and cross between the emitter and receiver interrupting
the ray of light. The oppose mode is the most precise and reliable method to detect an
object. Since the emitter and receiver are separate they can be optimized to have the
receiver and receiver far apart.

Design Tip:
In opposed sensing the ray of light could go across a glass and cause the glass object
to go undetected. This problem might be resolved by moving the sensor installation
diagonally with the glass object.

2.2 Proximity Sensors

a. Capacitive proximity sensor
The capacitive proximity sensors are triggered by a change in the surrounding dielectric. The
transducer of a capacitive sensor is configured to act as the plate of a capacitor. The
dielectric property of any object present in the sensing field increases the capacitance of the
transducer circuit and, in turn, changes the frequency of an oscillator circuit. A detector
senses this change in frequency, and signals the output to change state.

b. Inductive proximity sensor
This sensor has an oscillator and a coil which radiate an electromagnetic field that induces
eddy currents on the surface of metallic objects approaching the sensor face. The eddy
currents dampen the oscillator energy loss, it sensed as a voltage drop, which causes a change
in the sensors output state.

2.3 Sensor Interfacing

Normally the sensor is a digital device, but there are analog sensors that provide an output that is
proportional, or inversely proportional to the quantity of light seen by the receiver. Some sensors
have the option to be configured to work with positive or negative logic. In positive logic the
output of the sensor is either ON (detected target) OFF (no target detected). The opposed happen
in negative.

The response time, or response speed, of the sensor is the time required for the output of a sensor
or sensing system to respond to a change of the input signal (e.g. a sensing event).


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Design Tip:
The response time of a sensor becomes extremely important when detecting small
objects moving at high speed. Narrow gaps between adjacent objects also must be
considered when verifying that sensor response is fast enough for an application.

There are many types of outputs available, each with benefits & weaknesses.

1. Electromechanical Relay
The relay offers a reliable, positive means of switching electrical energy with a range of
current contact rating.

Major advantages:
a. High switching current (various amps) relative to the electronic counterpart.
b. Electrical isolation from sensor power source. Due to the isolation, (absence of
leakage current), they can be connected in series or parallel.
d. Different contact arrangements; SPST, SPDT, DPDT.

Disadvantages:
a. Have a finite life span, (measured in millions of operations).
b. Inductive load can shorten the life span.
c. Response times are much slower than must solid-state outputs. (Typically 15-25ms)

2. FET (Field effect transistor)
The FET provides a fast switching of AC or DC power.

Major advantages:
a. Has very low leakage current.
b. Can be connected in parallel like relays.

Disadvantages:
a. Switching current capacity is limited (~30ma).

3. Power MOSFET ( Metal Oxide Semiconductor Field Effect Transistor)
The MOSFET provides fast response time like a FET but with higher switching current
capacity (300ma) and has very low leakage current

4. TRIAC
The TRIAC is a solid-state output device designed for AC switching only.

Advantages:
a. Offer high switching current; suitable to connect large contactors & solenoids.

Disadvantages:
a. Exhibit much higher leakage than FET & power MOSFETS (can exceed 1ma) therefore
cannot be used with PLC & other solid state devices.
b. Cycle activation is required, meaning minimum response time of 8.3ms.

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5. NPN/PNP transistors

The transistor exhibits very low leakage current (measured in NA) and has a relatively low
switching current (typically 100ma) for easy interface to most DC loads. Response times of
sensors with transistor output can vary from 2ms to as fast as 30us.

2.4 Sinking VS. Sourcing

The sinking and sourcing concept applies to sensors with DC current only.

Current sinking output
The current sinking output usually uses NPN transistors with its emitter tied the common
(negative) side of the supply voltage. The concept of sinking means the current direction is
toward the sensor (the sensor receives current). The load must be connected between +
power connection and the sensor output. When the sensor detects an object provides the DC
common voltage to the load.

Current sourcing output
The current sourcing output usually an open collector PNP transistor with its emitter tied to
the positive side of the supply voltage. The concept of sourcing means the current direction
is away the sensor (the sensor send current). The load must be connected between the sensor
output and the DC common power connection. When the sensor detects an object provides
the + DC voltage to the load.


Standard wiring for DC sensors







Brown

Black Sourcing wire

White Sinking wire

Blue
Sinking Load
Sensor
Internal
Electronics
Sourcing Load
DC neutral
Symbolic schematic
for a DC Sensor
DC neutral
Vcc
Vcc
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2.5 Sensor timing and logic

Some sensors provide timing or logic functions.
a) On delay: The operation of the output is delay after the object was detected.

b) Off delay: is the most common, the operation of the output is delay after the object is
not detected anymore.

Design Tip:
Can be use in a conveyor application to create a separation between boxes in a conveyor.

c) ONE SHOT
Provides a single pulse output regardless of the speed that an object past the sensor.
The length of the pulse is adjustable.

Design tip:
Can be used in a applications like:
- In high-speed operations to provide a pulse each time an object moves past the
sensor. The pulse could be long enough to allow a slower logic to detect it.
- In slow speed operation-provide a short pulse to trigger a piston or other device to
create a separation between the objects.
- Provide a leading edge signal regardless of object length.
- Provide a trailing edge signal regardless of object length.

2.6 NEMA

The National Electrical Manufacturers Association, NEMA, standards are used to specify
suitability of sensor and sensing system enclosures for various environments.

NEMA 1 Indoor use Protects against accidental contact by personnel & falling dirt
NEMA 2 Indoor use Protects against falling dirt & liquid & light splash
NEMA 3 Outdoor use Protects against rain, sleet, snow, dirt & dust
NEMA 3S Outdoor use Protects against rain, sleet, snow, dirt dust & ice buildup
NEMA 4 In-or outdoor Protects against dirt, dust, hose-down (and heavy splash)
NEMA 4x In-or outdoor Protects against dirt, dust, hose-down, & corrosion
NEMA 6 In-or outdoor Protects against dirt, dust, hose-down, & occasional submersion
NEMA 6P In-or outdoor Protects against dirt, dust, hose-down, & prolonged submersion
NEMA 7 Indoor use For use in areas of explosive gases or vapors or combustible dust
NEMA 9 Indoor use For use in areas of atmospheres containing combustible dust
NEMA 12 Indoor use Protects against dirt, dust, light splash, & oil or coolant seepage
NEMA 13 Indoor use Protects against dirt, dust, light splash, & oil or coolant spray

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3.0 PLC Hardware description

The Programmable Logic Controllers (PLC) is an industrial computer constructed and adapted to
resist the industrial environment. The PLC has the following advantages:

Optical Isolation; this is the capability to receive input or send output information from/to
devices without direct electrical connection between the device and the CPU. The electrical
signal is converted to a light signal; therefore the CPU is protected from the outside world.

Ability to change modules quickly for easy and rapid maintenance and repair.

User-friendly programming.

Adapted for industrial environment


The PLC is composed of the following:

a. A Central processing Unit (CPU)
- Contains one or more microprocessors
- Read only memory (ROM), for the operating system
- Random Access Memory (RAM), for user applications and requires battery back up.
- Electrically Erasable Programmable Read-Only Memory (EEPROM), do not requires
battery back up.

b. Input interface:
Receive signals from the real physical sensors and convert the signals to logic levels
required by the CPU. The inputs can be discrete AC/DC signals or analog signals.
Typical input devices are: Switches, sensors, pushbuttons, relay contact, and analog
transducers.

c. Output interface:
Connects and control real physical devices. They can be discrete AC/DC voltages or
analog signals. Typical output devices are: motor starters, valves, lights, and relay coils.

d. Power Supply:
Provides all the power required by the CPU, input and output interface modules. Various
types of power supplies are available to meet power requirements.

e. Rack:
The rack is the chassis that holds the components mentioned above and contains the
electronics to interconnect them.

There are various PLC manufacturers such as: Allen-Bradley, Siemens, Omron, General Elecric,
Modicon, IDEC, to mention a few.
CHAPTER 3 PLC Hardware
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A very common PLC processors used are the Allen-Bradley SLC 500 family. This family has
two type of PLC, fixed and modular.

The fixed processors combine the CPU, Input, outputs and power supply in one chassis unit.

The modular processor includes all the components previously mentioned (CPU, Inputs,
Outputs, power supply) separate units. Therefore a mounting rack is used to accommodate
all the components, to provide the electrical power and communication signals connections
between the power supply, processor and the I/O modules. Example of the SLC-500 family
of processors are:

- SLC 5/01
- SLC 5/02 (DH-485 communication capability)
- SLC 5/03 (DH-485 and RS-232 communication capability)
- SLC 5/04 (DH+ and RS-232 communication capability)
- SLC 5/05 (Ethernet and RS-232 communication capability)

Rack and slot number

The modular SLC-500 requires as a minimum one rack and can handle up to three racks. The
racks come in various sizes; 4, 7, 10 and 13 slots. The slots are space inside the rack where the
processor and I/O modules are inserted. The main rack contains the processor. If more than one
rack is used for the application, the extra racks are called expansion racks. The processor always
is on the slot 0 of the main rack. The other expansion racks do not require a processor, only a
remote adapter module wired (in Daisy chain) to the main rack.

Something to remember is that although you can use up to three racks, the combination of the
racks can provide only a maximum configuration of 31 slots (0 to 30) slots.

Example of rack configuration
Requirement: A modular SLC-500 will be used for an application that requires 22 slots. Specify
a possible rack configuration for this system.

Solution:
With this requirement three racks of 4 will provide only 12 slots ( 3 racks x 4 slots = 12 slots),
and three racks of 7 slots will provide only 21 slots. Therefore those configurations are
discarded. One solution is to use three racks of 10 slots that will provide a total of 30 slots.
Various other solutions for the rack configuration can be generated. For illustration purposes the
following configuration is also valid; main rack of 7 slots, two expansion racks of 4 and 13 slots.







SLOT 0 1 2 3 4 5 6 SLOT 7 8 9 10 SLOT 11 12 13 14 15 16 17 18 19 20 21 22 23
Remote I/O Network
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As we can see, the racks can be combined to meet the desired requirements. In this case we
provide 24 slots, which are 2 slots more than what is requires. Those two spare slots will be
available for future applications.

Design Tip:
1. Special consideration must be place to the space needed to mount the racks. The rack
requires to be separated from other components around. This is important to have
enough space for the air to flow through the rack to remove hot spots. Refer to the
PLC manufacturing installation guide for more information.

2. In many cases, the space available for control equipment is limited; therefore the
selection of the rack size could be important. The bigger the PLC rack the bigger the
space required, especially if the PLC is mounted inside an enclosure.



3.1 Networks available on the SLC 500 family of PLC.

1. Remote I/O
Is used to connect all the PLCs to the remote I/O racks. The data transfer is 230.4 kbps for
cables up to 2,500 ft, or 57.6 kbps for cables up to 10,000 ft.

2. DH-485
This network is used to transfer information between other PLCs, operator interfaces and/or
other PC computer. The maximum number of nodes allows is 32 nodes. The data transfer
depends of the length of the network, for example for up to 4,000 ft is 19.2 kbps.

3. DH+
This network is similar to DH-485, but faster. For example 57.6 kbps for up to 10,000 ft, and
can handle a maximum of 64 nodes.

4. Ethernet
Is used to transfer information between the PLCs and computers, for example to connect the
plant computer network. It can handle data transfer rates up to 10,000 kbps, over unlimited
number of nodes, and supports TCP/IP protocol.

5. DeviceNet
Is one of the latest networks being used. It allows to connect control devices (i.e. sensors)
directly to the PLC without the need to hardwire it to an I/O rack. The maximum length is
1,600 ft with data transfer rate up to 125 kbps. It can handle a maximum of 64 nodes.
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3.2 Hardware Design Considerations


Power supply consideration

The rack power supply provides the power to the rack for the operation of the processor and
Input/Output modules. Therefore select the correct size of the power supply with enough current
to handle the PLC rack system. This power supply also provides DC power for external sensors
that might required this type of power. In some occasions the amount of DC power required for
all the sensors exceed the amount of DC power available on the rack power supply. In that case
a dedicated external DC power supply is used instead of the DC connection available on the rack
power supply.


Wiring

Appropriate sizing of wires shall be made according to the National Electric Code (NEC). All
the wires should be identified with a unique number at each end of the wire. This number shall
match the electrical drawings. The wire color code recommended for is as follow:

Application Wire color
- DC voltage Blue
- AC voltage Red, Black
- AC common White
- AC neutral Green
- Remote power (not controlled from the local breaker) yellow

In some occasions a multi-conductor cable (with various colors) are used. This type of wire has
the advantage of providing an easy way to identify the wire by color and also comes in a cable
that is easy to manage during routing.

The transients are very short duration of voltage (or current) pulses that can be many times larger
in magnitude than the supply voltage. Transients are usually caused by the operation of a heavy
load or of any size inductive load like motors, contactors, and solenoids. Voltage transients can
cause false actuation of fast electronic circuits such as solid-state counters, one-shot timers, and
latching outputs.

Design Tip:
1. The problems resulting from transients are dealt with by careful shielding and
grounding of remote sensor lead wires, by physical separation of signal wires from
power wires in wire ways, and by installing transient suppressors directly across
offending loads.





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Wire routing
Put special attention to the wiring routing, do your best to reduce at maximum the mixture of DC
wires and A/C wires in the same wire duct. The DC analog signals should be segregated from
AC wires as much as possible.

Design Tip:
A common technique used is to have the DC wires running vertically in the right side of the
rack and the AC wires running vertically on the left side of the rack.















PLC RACK
With Input/Output modules

D
C

W
I
R
E

D
U
C
T

WIRE DUCT

Power Distribution Area
A
C

W
I
R
E

D
U
C
T

WIRE DUCT


Terminal Blocks
Area
Example Enclosure layout for PLC
Enclosure
Mounting Panel
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4.0 Memory Map of PLC processor

Allen-Bradley divides the PLC memory in files. There are two types of files: Program files and
data files. Either one program or data file can be divided on a maximum of 256 files (0-255).




















4.1 Scan Time

Is the time required by the PLC to update the inputs, execute the ladder program and update the
outputs. The ladder program execution is performed rung by rung, from left to right.


Time to update
Input image
Time to update
Output image
PLC Scan time
Overhead
Program execution time
The Scan time is composed of the following:
1. Time to update the Input Image with physical Inputs.
2. Time to execute the program (longest time).
3. Time to update the output image and physical outputs.
4. Processor overhead time (shortest time).



Digital Inputs

Analog Inputs
I/O image files

Other data files
Digital Outputs

Analog Outputs
Ladder programs
Data files
Program files
PLC Memory
Physical devices
Physical devices
Relationship between I/O modules, Data Storage, and ladder program
CHAPTER 4 PLC Memory Map
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The Program file memory area is divided as follows:

Program
File no.
Description of program files
0 System configuration information, password, processor name
1 Reserved
2 Contains the main ladder program
3 to 255 User subroutines called by the main program



Data files

The data file section contains status information related to the I/O and the instructions used on
the main program and subroutines. The data files are divided in types of information as follows:

Data File
number
Data File
Name
Starting
Address
Range of values Data Stored
Or Use for
0 Output Image O: Depends of rack
configuration
State of physical outputs
1 Input Image I: Depends of rack
configuration
State of physical inputs
2 Processor
Status
S2: 0-82 Status info. of processor
3 Binary B3: 0-255 words equal
to 4096 bits
User program internal
use
4 Timers T4: 0-255 timers Timer accumulator,
preset, and status
5 Counters C5: 0-255 Counter accumulator,
preset, and status
6 Control R6: 0-255 words Instruction specific;
Length, position, status
7 Integer N7: 0-255 words Positive or negative
whole numbers
8 Floating Point F8: 0-255 words Positive or negative
number with decimals
9 ASCII A9: 0-255 Alphanumeric
characters
10-255 Optional As
required
0-255 Configurable as
required by user



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4.1 Addressing Format

The following format must be used to refer (address) to a specific area of the data memory.


















Example: Addressing word 2 Example: Addressing Input 0
of integer data file 7 located on slot 2











FN : E . W / B
File type
File number
Element delimiter
Word number
ype
Word delimiter
delimiter
Element number

Bit delimiter
Bit number
N7 : 2
Integer file
File number
Element delimiter
Element number

I : 2 / 0
Input file
Element delimiter
Element number
(Slot 2)

Bit delimiter
Bit number
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Example: Addressing bit 22 Example: Addressing accumulated value of timer 7
of binary file 3 of file 4
(same as B3:1/6)












In the previous example, B3/22, we start counting at B3:0/0 and keep counting in the next word
until we reach to bit 22 which is B3:1/6. Also we can specify bit 27 start counting in word one
(1) by specifying B3:1/27= B3:2/11


Word
B3:0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B3:1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
B3:2
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0





Symbols
A description (tag) can be assigned to an address, this is known as symbol. The symbol is a
name or tag assigned to an address that the user could refer to instead of using the address. This
has the advantage of having direct reference to the device being controlled instead of learning the
address. To assign a symbol to an address using RS-Logix 500:

1. Enter in the program the instruction with address.
2. Place the mouse over the desired instruction and right click the mouse. Select Edit Symbol
and enter the description for the address.
B 3 / 22
Binary file
File number
Bit delimiter
Bit number

T 4 : 7 . ACC
Timer File
File number
Element delimiter
Element number
(Timer 7)


Word delimiter
Word Mnemonic
(Accumulator)
B3:1/6= B3/22
BIT
B3:1/27= B3:2/11
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4.2 Status file:
The status file allows you to monitor the PLC operating system and control it. The following
is a list of the words that applies to all the SLC processors. Some other functions exists for
specific processors.

Word Description
S:0 Arithmetic flags
S:1 Processor mode status/control
S:2 STI bits/DH485 comms
S:3L Current/Last scan time
S:3H Watchdog scan time
S:4 Free running clock
S:5 Minor error bits
S:6 Major error code
S:7 , S:8 Suspend code/Suspend file
S:9, S:10 Active nodes (DH-485)
S:11, S:12 I/O slot enables
S:13, S:14 Math register
S:15L Node Address
S:15H Baud Rate
S:16, S:17 Test single step start step on
S:18, S:19 Test single step - Breakpoint
S:20, S:21 Test Fault/Power down
S:22 Maximum observed scan time
S:23 Average scan time
S:24 Index register
S:25, S:26 I/O interrupt pending
S:27, S:28 I/O interrupt enabled
S:29 User fault routine file number
S:30 Selectable timed interrupt setpoint
S:31 Selectable timed interrupt file number
S:32 I/O interrupt executing
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5.0 Basic Instructions

The set of instructions depends on the PLC model. Some models have extra instructions not found
in smaller PLC. Refer to each PLC documentation to understand which instructions are available.
In the appendix a list of instructions is included for reference.

Concept of Input and output instructions
The instructions are divided in two main types, input instructions and output instructions. The input
instructions cannot be positioned in the last right position of the rung. Only output instructions can
be the last instruction to the right. Now, you can have various output instructions in parallel located
in the right side.

The instructions with similar functions are grouped together to facilitate their finding. These groups
of instructions are: Bit, Timer/Counter, Input/Output, Compare, Compute/Math, Move/Logical,
File/Misc., File Shift/Sequencer, Program control, ASCII control, ASCII string, Micro high speed
counter, Trigonometric functions and Advanced math.

5.1 Bit Instructions

The first three instructions, XIC, XIO, OTE are similar to the relay logic. Therefore think in term of
relay logic when learn them.

5.1.1 Examine if closed (XIC)

Also called Normally Open. Similar to relay logic, this instruction looks for an ON state. You
can think that this instruction is like a relay contact, in which it closes when its relay coil is
activated with logic one (1). In another words, when the reference address is true (1), the
instruction also will be true.

If the reference address is a physical input, it will close (change state) when the field device applies
power to the input. If the address is an internal bit (for example a bit from the B3 file) then it will
close when that address has a one (1).


5.1.2 Examine if Open (XIO)

Also called Normally Closed. Similar to relay logic, this instruction looks for an OFF state. You
can think that this instruction is like a relay contact, in which it opens when its relay coil is activated
with a logic one (1). This is negative logic, in another words, when the reference address is true (1),
the instruction will be false.

If the reference address is a physical input, the instruction XIO will open (change state) when the
field device applies power to the input. If the reference address is an internal bit (for example a bit
from the B3 file) then the instruction XIO will open (is false) when that address has a one (1).
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5.1.3 Output Energize (OTE)

This instruction controls the status of a bit in memory. Since this is an output instruction, it goes on
the right side of the rung. The instruction is true (1) if the conditions preceding are true.

Possible applications
If the address corresponds to a physical output, the device wired to the output will be energized
when the instruction is true. If the reference address is an internal bit (for example a B3 file), then
the corresponding bit instructions (XIC or XIO) will be true when the instruction is true.


5.1.4 Output Latch (OTL)

This is a retentive output instruction that keeps the last state. Meaning that if the preceding
conditions are not true the instructions or if the processor lost power, the instruction maintains its
last logical state condition (0 or 1). When the preceding conditions are true, the instruction is true
and sets the reference bit equal to one (1). The bit remains set to 1 even if the preceding
conditions are false. The OTU instructions can be used to set the reference bit to 0

Possible Applications
This instruction can be used to identify when an event occurs. For example if a condition or series
of conditions only are activated during a short period of time, this instruction will be activated and
stay ON even when the conditions are not present any more.

Most of the time, this instruction is used in pairs with the OTU (unlatch) instruction, with both
instructions referencing the same address. But the bit can be unlatched (set to 0) with other
instructions as well.


5.1.5 Output Un-Latch (OTU)

This is a retentive output instruction that keeps the last state. When the preceding instructions are
true, the instruction is true and sets the reference bit equal to 0. The bit remains 0 even if the
preceding conditions are false. To set the reference bit back to 1 the OTL instruction could be
used.

Most of the time, this instruction is used in pairs with the OTL (latch) instruction, with both
instructions referencing the same address. But this is not mandatory, since the bit can be set to 1
by other means in the logic.

L
U
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5.1.6 One shot rising (OSR)


This instruction is a conditional input that allows the logic to its left to be executed only for one
scan of the logic (until the instruction is executed again).
The address bit assigned to the OSR instruction allows it to remember its previous rung state. Is set
to 1 if the proceedings conditions to the OSR are true, the bit is reset to 0 when the conditions
are false. The bit address assigned must be unique, therefore dont use it elsewhere in the program.
Use a bit from the binary or integer file.


5.1.7 Scan Time

Refer to Section 4.1


5.2 Timer and counters instructions

These instructions are considered programs output instructions, therefore must be the last
instruction on the right side of the rung. These instructions will be energized when the preceding
instructions on the rung are true.

Timers

The timer consumes three words per instruction:
- Word #1 is for the instruction control bits (the control word)
- Word #2 is to save the preset value.
- Word #3 is to save the accumulator value.

Bit number

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word #1
EN TT DN



Word #2 Preset Value
Word #3 Accumulated Value


For SLC 5/01 the time-base is 0.01
For SLC 5/02 , 5/03 , 5/04 the time-base options are : 1.0 and 0.01 seconds.

The timing accuracy is 0.01 to 0 seconds with a program scan of up to 2.5 seconds.

OSR
U
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5.2.1 Timer On-delay (TON)

When this instruction is energized it accumulator value increments. Its accumulated value is reset
to zero when the rung conditions are loss.







Description of the Control Bits

Bit 15 = Enable bit (/EN); This bit is set to 1 when the rung condition are true, means that the
instruction is energized.

Bit 14 = Timer timing bit (/TT); This bit is set to 1 only when the timer is incrementing. When
the accumulator reaches the Preset value, the bit is set to 0.

Bit 13 = Done Bit (/DN); This bit is set when the accumulator is equal or greater than the Preset
value. Under normal condition the timer will increment only up to the preset value and
stop. If the instruction is enable (energized), the programmer could create logic to
move to the accumulator a value greater than the preset value. In that case, the done bit
and the enable bit will stay set to 1.

5.2.2 Timer Off-Delay (TOF)

This timer contrary to the TON instruction, will increment only when the rung conditions are not
true, in another words when the TOF instruction is not energized. The instruction is reset when the
rung conditions are true (the TOF instruction is energized), the reset will cause the following:
/En=1, /DN=1, /TT=0 and accumulator =0.







Description of the Control Bits

Bit 15 = Enable bit (/EN); This bit is set to 1 when the rung condition are true, means that the
instruction is energized.

Bit 14 = Timer timing bit (/TT); This bit is set to 1 only when the timer is incrementing. When
the accumulator reaches the Preset value, the bit is set to 0.

Bit 13 = Done Bit (/DN); This bit works oppose as in the TON instruction. This bit is set to 1
when the instruction is energized or while is incrementing. The bit is set to 0 when the
Timer On Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TON
Timer OFF Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TOF
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accumulator is equal or greater than the preset value. Under normal condition the timer
will increment only up to the preset value and stop. If the instruction is not energized,
the programmer could create a logic to move to the accumulator a value greater than the
preset value. In that case, the done bit and the enable bit will stay set to 0.

Is important to mention, that for proper function of the TOF instruction, is better to control its reset
using the rung conditions instead of the RES instruction (refer to RES instruction). In another
words, it shall be reset energizing the instruction by activating its rung conditions. The reset
instruction could cause improper operation.

5.2.3 Retentive Timer On-Delay (RTO)

The RTO instruction starts to increment when the rung conditions are true (when the instruction is
energize). But it retains the accumulated value when the rung conditions are false. When the
instruction is energize again, the accumulated value starts from the last value used. This feature
makes the RTO instruction excellent to add time at different periods. For example, to calculate the
total time a machine has being ON for a period of time.







The status bits definition are identical to the TON instruction. It is important to mention that the
timer timing bit (/TT) stays set as 1 while the instruction is in the process to reach the preset
value, even though the RTO is not energize.


Timer addressing examples:

T4:1/15 = T4:1/EN
T4:1/14 = T4:1/TT
T4:1/13 = T4:1/DN
T4:1.1 = T4:1.PRE
T4:1.1/0 = Bit 0 of preset value
T4:1.2 = T4:1.ACC
T4:1.2/0 = Bit 0 of accumulated value
Retentive Timer On
Timer
Timer Base
Preset
Accum
T4:2
0.01
100
0
( EN )
( DN )
RTO
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Counters instructions

The counter instructions are mostly used to count events. These instructions are considered
programs output instructions, therefore must be the last instruction on the right side of the rung.
These instructions will be energized when the preceding instructions on the rung are true.

Same as the timers, the counters consume three words per instruction:
- One word for the instruction status bits (the control word)
- One word for the preset
- One word for the accumulator.
Bit number

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word #1
CU CD DN OV UN



Word #2 Preset Value
Word #3 Accumulated Value


5.2.4 Counter Up (CTU)

Data required for the CTU instruction

- Counter number = Is also known as the counter address. Enter C5:#, where # is the counter
number within a range of 0 to 255.
- Preset value = This is the number of events desired to detect. Is a fix number and is used to
compare with the accumulated value.
- Accumulated value = This is the number of events detected. The accumulated value increments
by one when the rung conditions change from false to true. In the example shown below, when
the condition X change state from 0 to 1 the accumulated value of C5:1 increment by one (from
0 to 1). The accumulated value will maintain its valued, even when the condition X=1, it will
increment again in the next transition of X from 0 to 1. When the accumulated value is equal or
greater than the preset the done bit is set to 1.








The status bit used for the CTU instruction are as follow:

Bit 15 (CU) = Counter UP. This bit is set to 1 when the instruction is true (is energized).
Bit 14 (CD) = Counter Down. Not applicable for the CTU instruction.
Bit 13 (DN) = Done bit. Is set to 1 when the Accumulator is equal or greater than the Preset.
Bit 12 (OV) = Overflow bit. Is set to 1 when the Accumulator wraps from +32,767 to 32,768.
Bit 11 (UN) = Underflow bit. Not applicable for the CTU instruction.

Count Up
Counter
Preset
Accum
C5:1
10
0
( CU )
( DN )
CTU x
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5.2.5 Counter Down (CTD)

Data required for the CTD instruction

- Counter number = Is also known as the counter address. Enter C5:#, where # is the counter
number within a range of 0 to 255.

- Preset value = This is the number of events desired to detect. Is a fix number and is used to
compare with the accumulated value.

- Accumulated value = This is the number of events detected. The accumulated value decrements
by one when the rung conditions change from false to true. In the example shown below, when
the condition Y changes state from 0 to 1 the accumulated value of C5:2 decrement by one
(from 5 to 4). While the condition Y=1 the accumulated value stays the same, it will decrement
again in the next transition from 0 to 1. When the accumulated value is equal or greater than the
preset the done bit is set to 1.








The status bit used for the CTD instruction are as follow:

Bit 15 (CU) = Counter UP. Not applicable for the CTD instruction
Bit 14 (CD) = Counter Down. This bit is set to 1 when the instruction is true (is energized).
Bit 13 (DN) = Done bit. Is set to 1 when the Accumulator is equal or greater than the Preset.
Bit 12 (OV) = Overflow bit. Not applicable for the CTD instruction
Bit 11 (UN) = Underflow bit. Is set to 1 when the Accumulator wraps from -32,768 to +32,767.


Comments and applications for CTU and CTD instruction

1. The status word includes all the bits required by both instructions; therefore the programmer
must use and interpret the applicable bits for the instruction being used.
2. The relationship of the overflow and underflow bit is as follow:

+32,767


0


-32,768


Count Down
Counter
Preset
Accum
C5:1
10
0
( CD )
( DN )
CTD Y
CTD CTU
Underflow condition
Overflow condition
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3. Done bit
In the CTU and CTD instructions the done bit always is going to be set to one, when the
accumulator is equal of greater than the preset. Therefore in the case when the preset is
negative, a value of zero in the accumulator will activate the done bit. The reason is, because
the value of zero in the accumulator is greater than any negative number in the preset.







4. Incrementing and decrementing a value.
If the same address is assigned to the CTU and CTD instruction, the result is a logic that allows
to increment and decrement the same accumulator.

Example problem:
Design a PLC based control system to turn ON a red light when the capacity of people inside a
room reaches a maximum of 50 people.

Solution:
Lets wire a red light in output O:2/0. We need a sensor at the entrance of the room to count the
people entering the room, wired to input I:1/1. Also we need a separate sensor at the exit to
detect the people leaving the room, wired to input I:1/2. For purpose to synchronize the counter,
lets add a key switch to reset the counter at the beginning when the room is empty. The logic
will be as follows:





















Count Up
Counter
Preset
Accum
C5:1
50
0
( CU )
( DN )
CTU I:1/1
Count Down
Counter
Preset
Accum
C5:1
50
0
( CD )
( DN )
CTD
I:1/2
I:1/3
( RES )
C5:1
O:2/0
C5:1/DN
( END )
0
1
2
3
When the entrance sensor is activated, it
increments the accumulated value of
counter C5:1
When the exit sensor is activated, it
decrements the accumulated value of
counter C5:1
When the accumulator is equal to the
preset, the done bit is activated, turning the
red light in O:2/0
When the room is empty, the accumulator
must be zero. If not the key switch in I:1/3
can be activated to reset the accumulator to
zero.
Count Down
Counter
Preset
Accum
C5:1
-10
0
( CD )
( DN )
CTD I:1/0
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5.2.6 Reset (RES)

The RES instruction is used to reset timers and counters. The address assigned to the RES
instruction must be the same address of the timer or counter desired to be reset. For example if we
want to reset the counter C5:1, then your RES instruction address must be C5:1.








When the RES is energized the accumulated value and control bits of the timer or counter are reset.

Hints:
Resetting a counter: When the RES instruction is energized, it resets the counter control bits, which
includes CU or CD and also resets the accumulated value to cero. When the program
continues, if the corresponding counter that was reset still energized, it will increment to one in the
case of CTU or decrement to minus one (-1) in the case of the CTD. This would cause a double
counting of an event used to trigger the counter.
Possible Solution:
Use an OSR (One Shot) instruction before the counter instruction to make sure the counter only
counts real changes of the event.

If the counter preset value is negative, the RES instruction will reset the accumulated value to zero.
That causes the done bit to be set to 1 in both the CTU or CTD instructions.

Warning! The use of RES instruction to reset a TOF instruction might cause problems. The RES
always clears the status bits and the accumulated value, causing to disable the TOF instruction until
a change of state on the rung input conditions occur. This could result in unpredictable machine
operation or injury to personnel.

Now a possible logic to correct this problem is the following:












This logic will allow to reset the timer any moment when the timer is incrementing, and the timer
will start to increment from zero again.
C5:1
( RES ) ( RES )
T4:1
( RES )
T4:1
T4:1/DN
B3:0/0
Timer OFF Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TOF
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Practice problems for first test.

1. Use the information in the appendix to get familiar with the RS-Logic 500 program:
a. Learn to create a new project.
b. Navigate thru the data and program files.

2. Using the instructions XIC, XIO and OTE:
a. Write a PLC program to simulate a logic AND, OR, EXOR.
b. Learn to use the RS-Emulator

3. Using the instructions XIC, XIO and OTE:
a. Write a PLC program to control a DC motor. Use a NO Start PB and a NC Stop PB. Show
the status of the motor (ON and OFF) with lights.

4. Repeat the previous problem using the instructions OTL and OUT.

5. Use a TON instruction to control a light, to flash alternating ON and OFF. A two position
selector switch is used to controls two possible delay options.

6. Control two lights flashing alternating, only one ON at a time. A two position selector switch is
used to control the two possible delay options. When the START pushbutton is pressed the
sequence must be executed automatically three times.

7. Turn ON 3 lights, with 3 different ON time delays. A selector switch is used to decide the delay
to be used. Details to be provided by class instructor.

8. Control an assembly machine to produce a six pack. Details to be provided by class instructor.

9. Control 3 motors that turn ON in sequence when a pushbutton is activated. Once the motor turn
ON, stays ON while the others turn ON. At the end all three motors are ON.

10. Control a motor with the following functions: ON, STOP, FORWARD, REVERSE and JOG.
Assume that two coils are used to control the direction of the motor, one output for forward and
one for reverse. Make sure the two outputs never are ON at the same time.

11. Control a toaster (tostadora de pan) with 3 heat setting positions.
a. In low turn ON the output 1 for 20 seconds
b. In Med, turn ON the output 1 and 2 for 15 seconds
c. In Hi, turn ON ouputs 1 and 2 for 25 seconds
Inputs:
- 3 heat positions (Low, Med, Hi)
- Bread slot is down (limit switch),
an mechanical lock is used to
hold the slot down.
Ouputs:
- 2 outputs to control the heaters
- One output to release and raise the slot of the bread.
HI
MED
LOW
R3 R2
R1
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Chapter 6 Program Control

6.1 Program Control Instructions

6.1.2 Jump (JMP) to Label (LBL)























You can have more than one JMP instruction addressing the same label (LBL). The program scan
time is reduced when jumping forward to a label, because is omitting program rungs. Jumping
backward lets the controller execute program segments repeatedly.

Note: Be careful when using the JMP instruction to move backwards or loop through your
program. To loop too many times, may cause the watchdog timer to time out, resulting a processor
fault. You could use a counter, timer, or the program scan register (S:3, bits 0-7) to limit the amount
of time you spend looping inside of JMP/LBL instructions.

You can enter a decimal label number in the range of 0-999. But you can use up to 256 labels for
SLC controllers in each subroutine file (not to exceed 256 labels in entire project). And up to 1,000
labels for MicroLogix controllers in each subroutine file (not to exceed 1,000 labels in entire
project).

6.1.3 Troubleshooting tools

Temporary end (TND)
This instruction is used to disable a specific part of the ladder logic. All the logic after the
TND will not be executed by the PLC.
X
( END )
8
9
When the rung condition X the processor
jumps forward or backward to the corresponding
label with the same address specified in the JMP
instruction. The program resumes execution at
the rung where the LBL is found (in this case
Rung 20).
While the JMP is executed, the instructions after
the JMP and before the LBL are not executed. In
this example, the timer T4:1 is not executed
while the JMP is active.
:
:
:
:
( JMP )
Q2:1
( LBL )
Q2:1
B3:2/0
20
T4:1/DN
Timer OFF Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TOF
:
:
:
:
When the JMP in rung 8 is activated, it causes
the program scan to jump to this line where the
same address LBL is located.
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Master control reset (MCR)

Two MCR instructions, one at the beginning and one at the end of the area, are used to define a
group of rungs called a zone. The zone can be enabled or disabled to activate or deactivated
the function defined by the rungs within the zone. The zone is enabled when the conditions of
the first MCR that defines the zone is energized. When the first MCR is not energized, the
ladder logic within the zone is not executed, and all the non-retentive output instructions are de-
energized. That includes the reset of the timers. It is important to mention that the first MCR,
defining the beginning of the zone, must have a rung condition. If it doesnt have rung
conditions the verification of the project will show an error. Meanwhile the last MCR of the
zone cannot have rung conditions.
























Suspend (SUS)

This instruction is used to debug or diagnose your ladder program. When the rung conditions
are true, this instruction places the controller in the Suspend Idle mode. The suspend ID is
placed in word 7 (S:7) of the status file. The suspend file (program or subroutine number
identifying where the executed SUS instruction resides) is placed in word 8 (S:8) of the status
file. All the outputs are de-energized.

( END )
7
9
11
T4:1/DN
Timer ON Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TON
X
8 ( MCR)
)
B3:2/0
B3:0/0
( MCR)
)
The zone is defined from rung 7 to rung 10.
When the rung condition X is energized the
zone is enabled and the TON instruction is
going to start. Notice that the first MCR in rung
8 has rung conditions and the second MCR does
not.
When the rung condition X is de-energized
the zone is disabled and the TON instruction
resets automatically.
10
Timer OFF Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TOF
B3:0/2
Attention:
The TOF instruction is activated (increments)
when the zone is disabled. Therefore proper
precaution must be considered when is used
within a MCR zone.
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6.1.4 Subroutines

A subroutine is a program that contains a series of rungs (similar to the main program) in a separate
file number ranging from file number 3 to 255. Most of the time the subroutine contains a function
that perform a specific task. One of the advantages of using subroutines is that this function not
necessarily is used all the time, therefore is called from the main program (file no. 2) when is
necessary.

The following instructions are used to program subroutines:

- Jump to subroutine (JSR) , Subroutine label (SBR), Return from subroutine (RET)























X
( END )
0
:
:
:
:
Jump To Subroutine
SBR File Number U:3
JSR
( END )
0
1
:
:
:
:
( )
B3:0/0
20
T4:1/DN
Subroutine
SBR
LADDER No. 2
Timer On Delay
Timer
Timer Base
Preset
Accum
T4:1
1.0
10
0
( EN )
( DN )
TON
Return
RET
LADDER No. 3
When rung conditions X is true the JSR
instructions is executed, causing the execution to
continue in program file no.3 (subroutine). After
finishing scanning the file no. 3, the program
scan returns to the main file no. 2.
The first instruction of the subroutine must be
SBR. Then the specific rungs for the subroutine
follow, and finally a RET instruction must be the
final instruction.
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6.1.5. Concept of Subroutines

You can nest subroutines, in other words, you can call a subroutine from the main program and then
from that subroutine on to another subroutine. Keep in mind the following rules when nesting
subroutines:

- For Fixed and 5/01 processors , you can nest subroutines up to 4 levels.
- For 5/02, 5/03, 5/04, 5/05 and MicroLogix processors, you can nest subroutines up to 8 levels. If
you are using an STI subroutine, I/O event-driven interrupt subroutine, or user fault routine, you
can nest subroutines up to 3 levels from each subroutine. With MicroLogix 1000 processors you
can nest subroutines up to 3 levels from the HSC Interrupt subroutine.
- When you call a subroutine it always jump to the first rung of the subroutine. When you nest
subroutines they return back in the same reverse order they were called. A runtime error will
occur when calling more subroutines than allowed. Also cannot call a subroutine already active.

When the subroutine stops being scanned, all the values inside the subroutine are freeze and stay in
the last state and retain the last values. For an example, an OTE output will maintain its last state.

In the specific case of a timer, although the accumulator is frozen, the timer internally keeps
counting but not reflected for the purpose of logic; therefore this means that when the subroutine is
activated the timer is updated with the last time counted.

For example: In the case of two timers with preset 100, T4:1 inside a subroutine and T4:0 in the
main program. If both start at the same time, and the subroutine stops when the accumulator is 10,
the T4:0 keep incrementing but T4:1 maintains the ACC=10. If the subroutine is activated 10
seconds later when the t4:0 accumulator =20, then t4:1 accumulator will become 20 also; like it was
counting.

Now, if the subroutine stops when t4:0 acc=50, and is activated back after when the t4:0 have being
reset and its acc=10, then the t4:1 acc will become 100, (like it is finish) and will be reset to cero
and start again causing t4:0 to be a difference about 11 seconds ahead.

Bottom line: If the timer is stopped and return before its preset time value was complete, it
continues like it never lost a time. But if it stop, and return after a time greater then its preset value,
it will reset to zero.

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Chapter 7 Data Management

All the instructions used to manage data works a word level. In another words, they use the sixteen
(16) bits of the word.

7.1 Move and Logical Instructions

Move (MOV)
Is used to move a value or the content of an address to a specific address location of the PLC
data table. The destination value is overwritten.







Move with Mask (MVM)
This is similar to MOV, but with a mask we can specify which bits we can move. If all the 16
bits are selected (set to 1), the instruction is identical to the MOV instruction.








And (AND)
When the rung conditions are true, this output instruction executes an AND function between
the values in source A and source B and write the result in the destination specified.









Move
Source
Dest
B3:1
N7:0
MOV
0000000000001010<
10<
Masked Move
Source
Mask
N7:0
B3:1
10<
0007h<
B3:1
2<
Dest
MVM
Bitwise AND
Source A
Source B
B3:2
B3:3
FFFFh
0<
AAAAh<
B3:10
AAAAh<
Dest
AND
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Or (OR)
When the rung conditions are true, this output instruction executes an OR function between the
values in source A and source B and write the result in the destination specified.








Exclusive OR (XOR)

When the rung conditions are true, this output instruction executes an Exclusive OR function
between the values in source A and source B and write the result in the destination specified.








Not (NOT)
When the rung conditions are true, this output instruction executes a NOT function to the source
and writes the result in the destination specified.







Clear (CLR)
When the rung conditions are true, this output instruction sets all the bits to zero in the word
specified. The destination must be a word address.






Bitwise Inclusive OR
Source A
Source B
B3:2
B3:3
FFFFh
0<
AAAAh<
B3:11
FFFFh<
Dest
OR
Bitwise Exclusive OR
Source A
Source B
B3:2
B3:3
FFFFh
0<
AAAAh<
B3:12
5555h<
Dest
XOR
NOT
Source
Dest
B3:2
B3:12
NOT
1111111111111111<
0000000000000000<
Clear
Dest N7:3
CLR
10<
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7.2 Compare instructions

Limit Test (LIM)
This instruction is used to verify if the test value is within the low and high limits specified.
The applicable formula is LOW TEST HIGH . Now there are two possible operations:

- If the low limit value is less than the high limit value, then the instruction is only true
when the test is in between the low and the high limits verification (within the limits).

- If the low limit is greater than the high limit then the instruction is only false when the
test value is between the low and high limits (true outside the limits)

Remember that the comparison includes the Low and High limits specified.


B3:0/1
( ) Limit Test
Low Lim
Test
N7:0
N7:1
10<
1<
N7:2
2<
High Lim
LIM
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Mask Equal (MEQ)
This input instruction compares up to 16 bits of the Source and Compare values. The
instruction has a 16-bit mask that allows specifying which bits we want to compare. A 1
enables to compare and a 0 disables the comparison of that bit. Set all the bits to 1 to
compare all the 16 bits of the Source and Compare words. When the bits enabled matches
the comparison matches, the instruction is true.









Compare (CMP)
This input instruction compares the result of the expression; If the expression is true then the
instruction is true. This instruction is not available on the SLC-5/03.





Equal (EQU)
This input instruction compares two values; If the values are the same the instruction is true.








Not Equal (NEQ)
This input instruction compares two values; If the values are different the instruction is true.









B3:0/2
( ) Masked Equal
Source
Mask
N7:3
B3:1
3855<
000Fh<
N7:4
15<
Compare
MEQ
B3:0/3
( )
15<
Equal
Source A
Source B
N7:3
N7:4
3855<
EQU
B3:0/4
( )
15<
Not Equal
Source A
Source B
N7:3
N7:4
3855<
NEQ
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Less Than (LES)
This input instruction compares two values; If the values in Source A is less than the value in
Source B the instruction is true. Source A < Source B.







Greater Than (GRT)
This input instruction compares two values; If the values in Source A is greater than the value in
Source B the instruction is true. Source A > Source B.







Less Than or Equal (LEQ)
This input instruction compares two values, If the values in Source A is less than or equal to the
value in Source B the instruction is true.








Greater Than or Equal (GEQ)
This input instruction compares two values, if the values in Source A is greater than or equal to
the value in Source B the instruction is true.







B3:0/5
( )
15<
Less Than (A<B)
Source A
Source B
N7:3
N7:4
3855<
LES
B3:0/6
( )
15<
Greater Than (A>B)
((A<B) Source A
Source B
N7:3
N7:4
3855<
GRT
B3:0/7
( )
15<
Less Than or Eql(A<=B)
((A<B) Source A
Source B
N7:3
N7:4
3855<
LEQ
B3:0/8
( )
15<
Grtr Than or Eql(A>=B)
((A<B) Source A
Source B
N7:3
N7:4
3855<
GEQ
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7.3 Compute and Math instructions
These are output instructions. You can use the compute instruction Compute (CPT) instruction
or the single function instruction. The difference between the two methods is that:

- The execution time for a compute instruction is longer than the equivalent single arithmetic
operation.
- The compute instruction uses more instruction words to operate therefore take more
memory.

In this group of instructions the resultant value stored in the destination is rounded. The
rounding rule is the following:
- If the remainder is 0.5 or greater, the destination is rounded up.

Compute (CPT)
This instruction allows you evaluate a mathematical expression and move the result to a
destination location. The expression can be up to 255 characters. The instructions that can be
used in the expression include: +, -, *, l (DIV), SQR, - (NEG), NOT, XOR, OR, AND, TOD,
FRD, LN, TAN, ABS, DEG, RAD, SIN, COS, ATN, ASN, ACS, LOG, and ** (XPY).

Design Tip:
The PLC execution time for the CPT instruction is longer than a single arithmetic operation.
Also uses more instruction words, therefore more memory. Take this in consideration when
a fast scan time is required or when not enough memory is available.

Example: Calculate de area of a circle, where the diameter is located in N7:0







Addition (ADD)
When the rung conditions are true, this output instruction executes an ADD function between
the values in source A and source B and write the result in the destination specified.










Gompute
Dest
Expression
F8:0
N7:3
3.14*((N7:0|2.0)**2.0)
3.14<
CPT B3:0/1
2<
B3:0/3
Add
Source A
Source B
N7:1
N7:3
3
ADD
Dest
3<
N7:3
5<
2<
B3:0/4

Add
Source A
Source B
N7:1
N7:3
N7:2
ADD
Dest
3<
N7:4
5<
As shown in the example above, the
two source arguments can be variables
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Subtraction (SUB)
When the rung conditions are true, this output instruction executes an SUB function between the
values in source A and source B and write the result in the destination specified.







Multiplication (MUL)
When the rung conditions are true, this output instruction executes an MUL function between
the values in source A and source B and write the result in the destination specified.











Division (DIV)
When the rung conditions are true, this output instruction executes a DIV function between the
values in source A and source B and write the result in the destination specified.





















2<
B3:0/5

Subtract
Source A
Source B
N7:1
N7:3
N7:2
SUB
Dest
3<
N7:5
-1<
2<
B3:0/6

Multiply
Source A
Source B
N7:1
N7:3
N7:2
MUL
Dest
3<
N7:5
6<
Example using integer addresses.
Example of rounding of decimals.
2<
B3:0/7

Multiply
Source A
Source B
N7:1
N7:3
F8:1
MUL
Dest
4.25<
N7:7
9<
2<
B3:0/8

Divide
Source A
Source B
N7:1
N7:3
N7:2
DIV
Dest
3<
N7:8
1<
2<
B3:0/8

Divide
Source A
Source B
N7:1
N7:3
N7:2
DIV
Dest
3<
F8:2
0.6666667<
Example of rounding of decimals.
Example using a
floating point destination.
2<
B3:0/8

Divide
Source A
Source B
N7:1
N7:3
N7:2
DIV
Dest
3<
F8:3
0.6666667<
0<
Not Equal
Source A
Source B
N7:2
0
3<
NEQ
Example Protection for Division by zero.
Division is allowed if denominator is not equal to zero.

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Square Root (SQR)
When the rung conditions are true, this output instruction executes an SQR function to the
source and write the result in the destination specified.








Negate (NEG)
When the rung conditions are true, this output instruction executes an NEG function to the
source and write the result in the destination specified.









Convert to BCD (TOD)
When the rung conditions are true, this output instruction covert the integer value of the source
into BCD and store the conversion in the destination specified.









Convert from BCD (FRD)
When the rung conditions are true, this output instruction covert the BCD value of the source
into integer and store the conversion in the destination specified.







B3:0/9
25.6<
Square Root
Source
Dest
F8:5
N7:9
SQR
5<
B3:0/10
25.6<
Negate
Source
Dest
F8:5
F8:6
NEG
-25.6<
B3:0/11
6<
To BCD
Source
Dest
N7:10
N7:11
TOD
0006h<
B3:0/12
0006h<
From BCD
Source
Dest
N7:11
N7:12
FRD
6<
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When rung conditions are true, these output instructions perform its function, the result is place in
the specified destination. The value stored in the destination is rounded, is round up for values from
0.5 and up.

Division (DIV)
(This was from the help menu)

When rung conditions are true, this output instruction divides Source A by Source B and stores the
result in the destination and the math register. The value stored in the destination is rounded, is
round up for values from 0.5 and up. The value stored in the math register consists of the un-
rounded quotient (placed in the most significant word) and the remainder (placed in the least
significant word).

Source A and Source B can either be constant values or addresses that contain values, however
Source A and Source B cannot both be constants.

If you are using a 5/02, 5/03, 5/04, 5/05 or MicroLogix processor, you can use indexed addresses
for the source or destination parameters. If you are using a 5/03 OS302, a 5/04 OS401, or a 5/05
processor, you can use indirect addresses for the source or destination parameters.

If a value greater than +32,767 is returned, a minor error flag is set, and the value 32,767 is placed
in the destination. However, if you are using a Series C or later 5/02 or 5/03, 5/04, 5/05 or
MicroLogix processor and have S:2/14 (math overflow selection bit) set, then the unsigned,
truncated least significant 16 bits of the overflow remains in the destination.

If the remainder is 0.5 or greater, the destination is rounded up. The un-rounded quotient is placed
in the most significant word of the math register; the remainder is placed in the least significant
word.


7.4 Arithmetic Status Bits
After an instruction is executed, the arithmetic status bits in the status file are updated. The
arithmetic status bits are in word 0 bits 0-3 in the processor status file (S2).

Bit Description
S:0/0 Carry (C)
It is set when a carry is generated by the math instruction.

S:0/1 Overflow (V)
Is set when the result of the math instruction doesnt fit in its destination.

S:0/2 Zero (Z)
Is set when a zero value is generated during the math, move or logical instruction.

S:0/3 Sign (S)
Is set when a negative value is generated during the math, move or logical instruction.


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Other Status Bits/Words are:

Bit Description

S:5/0 Overflow trap bit
This minor error bit is set when a division by zero was detected. If the bit still set by the
end of the scan (including TND or REF instruction) a major error code 0020 occurred.
The CPU fault can be avoid by using an unlatch (OUT) instruction with address S:5/0
before the END, TND or REF.


S:13 Contains the least significant word of the 32 bit value of the MUL and DDV instruction.
S:14 Contains the most significant word of the 32 bit value of the MUL and DDV instruction.
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Chapter 8 Managing Files

8.1 File instructions

- Bit shift left (BSL)
- Bit shift right (BSR)
- Sequencer Compare (SQC)
- Sequencer Load (SQL)
- Sequencer output (SQO)
- FIFO load (FFL)
- FIFO unload (FFU)
- LIFO load (LFL)
- LIFO unload (LFU)

8.2 File Shift Instructions

Shift Register Concept
The shift register is a logic scheme that indexes (clocks) data along a specified route (through
registers) and outputs that data at a programmed point. Shift registers are used as logic sensing
systems to coordinate the inspection of a product at one location and to allow the resultant action (if
any) to take place at a location downstream in the process. The clock signal is usually generated by
a separate input that is tied to the mechanical movement of the transport mechanism (e.g. a signal
generated by a cam or a sprocket on a conveyor drive, index wheel, etc.).








Bit Shift Left (BSL)
This is an output instruction. When the instruction is energized (false to true transition), the
instruction executes a shift to the left of all bits in the array. The bit located to the extreme left of
the array goes to the unload bit (UL) located in bit 8 of the first control word. The source bit fills
the empty space caused by the shifting to the left. It is important to mention that although the
shifting is within the size of the register, the bit to the extreme left of the array will move to the left
in the register (if the register array is less than 16 bits). Therefore the rest of the word not used by
register array should not be used; other way to think is to use complete words per array.

0 1 2 3 4
Source Bit
Unload Bit
B3:0/1
R6:0
Bit Shift Left
File
Dest
#B3:1
I:1/0
BSL
5<
File
File
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Bit Shift Right (BSR)

This is an output instruction. When the instruction is energized (false to true transition), the
instruction executes a shift to the right to all bits in the array. The bit located to the extreme right of
the array goes to the unload bit (UL) located in bit 10 of the first control word. The source bit fills
the empty space in the extreme left caused by the shifting to the right.








The BSR or BSL instructions have the following parameters (refer to the next figure):

- File = This is the area of memory where the bit array is defined. The pound sign (#) is used
in front of the file address to indicate is a group. Each 16 bits to be shifted are
represented with a word, bits 0 to 15.

- Control = This is the memory area which the PLC uses to save status information for the
BSR or BSL instructions. Three words are required in the control file, R6. These three
control words shall not be used for other instruction or application, or unpredictable
operation could occur. The configuration for the three control words is as follows:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R6:0 EN DN ER UL Internal use
R6:1 Size of bit array
R6:2 Bit Pointer

- Bit Address = This is the source address that will be providing bit values (0 or 1 to the
array).

- Length = This is the total number of bit or the length of the bit array. The maximum
number of bits that can be shifted is 0 to 2048.


8.3 Sequencer Instructions

The sequencer instructions are used mostly in a system that has repeatable steps, for example
the manufacturing of a product. During the operation of the system, a series of steps need to be
executed. The number of steps might vary between systems.

The sequencer instructions allow creating a compact logic with fewer rungs than standard ladder
logic. The effect of less rungs save memory space on the PLC.

B3:0/2
R6:3
Bit Shift Right
File
Dest
#B3:2
I:1/0
BSR
5<
File
File
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8.3.1 Sequencer Compare (SQC) Instruction


The SQC instruction is used to determine when a step of a sequence is complete. It does that by
comparing the inputs specified (source) with a reference file that contains the conditions of the
inputs for the step.

The SQC instruction has the following parameters (refer to the next figure):

- File = This is the area of memory where the steps are define. Each step is represented with a
word, each word has 16 possible bit (0-15) to compare. The first word specified
contains the step 0 (cero), which is executed only the first time the instruction is used.

- Mask = This is a 16 bit word that contains a bit pattern expressed in hexadecimal format.
These bits permit to control which bit from the source (input) will be compared. Also a
file can be specified if the mask varies for each step. The user must fill the mask values
for each step.

- Source = This is the word with the input bits that you want to compare.

- Control = This is the memory area which the PLC uses to save status information for the
SQC instructions. Three words are required. The configuration for the three control words
is as follows:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R6:0 EN DN ER FD Internal use
R6:1 Length of sequencer file
R6:2 Current Position

- Length = This is the length of the sequence, starting in step 1. Since the step 0 is only
executed at start up, is not included in this length.

- Position = This is the current step position for the sequence

When the instruction is energized:

a. The current step is incremented
b. The source (input word) is compare with the word on the file for the corresponding step.
Remember that only those bits activated on the mask will be compared.
c. When the source is equal to the file step, then the found bit (FD) is activated to one. This bit
can be used to trigger an event in other rung, like a sequencer output.
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Example of SQC




When the SQC instruction is energized it increments the step position. It will keep comparing
(looking for a match) while is energized.

In the example shown above, when the permissive bit B3:0 is activated, the position of the step
increment to 1. The source is compared to n7:1.

A typical way to control the SQC is using its own found bit in normally close.







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8.3.2 Sequencer Output (SQO) Instruction

The SQO instruction is used to move a determine sequence file to a destination location. Each
step in the sequence file has 16 bits or 16 possible conditions to move. When the SQO
instruction is energize, it increase a step in the sequence (file), then takes the content of that step
through the mask, and move it the destination specified.

The SQO instruction has the following parameters (refer to the next figure):

- File = This is the area of memory where the steps of the sequence are defined. Each step is
represented with a word; each word has 16 possible bits (0-15) to control. The first word
of the sequencer file contains the step 0 (cero), which is executed only the first time the
instructions is used.

- Mask = This is a 16 bit word that contains a bit pattern expressed in hexadecimal format.
These bits permit to control which bit from the present sequence step will be moved.
Also a file can be specified if the mask varies for each step. The user must fill the mask
values for each step.

- Destination = This is the word that specifies the destination address where the present step
of the file (see file above) will be moved.

- Control = This is the memory area which the PLC uses to save status information for the
SQO instructions. Three words are required. The configuration for the three control words
is as follows:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R6:0 EN DN ER FD Internal use
R6:1 Length of sequencer file
R6:2 Current Position

- Length = This is the length of the sequence, starting in step 1. Since the step 0 is only
executed at start up, is not included in this length.

- Position = This is the current step position for the sequence

When the instruction is energized:

a. The current step is incremented
b. The value of the current step is taken through the mask. Remember that only those bits
activated (1) on the mask will be used.
c. The resultant bits are moved to the destination address.
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The done bit, DN, is energized when the position is the last one in the sequence. In another
words, it is done before it finish the last step.


Attention:
The SQO can be used in combination with the SQC, but the step of the SQC will be one ahead
of the SQO. Proper care must be taken to guaranty proper synchronization in the increments of
the steps.
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8.3.3 Sequencer Load (SQL) Instruction

Could be used to fill the reference file of the sequence





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9.0 Special Addressing

9.1 Indirect Address (Pointers)

Indirect addressing allows you to substitute part of the addressing (file, word or bit) for a word that
contains the correct value to use. The indirect address must be within brackets. The advantage of
using indirect addressing is that gives the flexibility to point to different locations without the need
to change the hard code address specified in the instruction. The ladder program changes the value
in the indirect address specifies in the instruction causing the instruction to point to new locations.
The capability of indirect addressing exists in the SLC 5/03, 5/04, 5/05. Micrologix 1200 and 1500.
Indirect address at file level exists on the PLC-5s.


Examples:

I:1/[N7:0] = in this example the input bit number is specified in the address N7:0

B3:[N7:1]/[C5:1.PRE] = in this example the word in the file B3 is specified in N7:1 and the bit
number specified by the value in C5:1.PRE.



9.2 Indexed Addressing

Indexed addressing lets you offset and address by the number of elements that you select. In the
case of the PLC-5, you store the offset value in an offset word in the processors status file, word 24
(S:24). All the indexed instructions use the same word to offset. The indexed address symbol # is
place before the logical address.

You can manipulate the offset word with the ladder logic.

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10.0 Introduction to Electro-Pneumatic systems

Similar to an electrical system that uses a voltage source, battery, as a source of energy to operate,
the pneumatic system uses a compress gas as a source of energy, normally compressed air. In the
next sections some of the main pneumatic components will be describe:

10.1 Pneumatic Valves
The valves are one of the most important pneumatic devices because is the output device to control.
By opening and closing a valve we control and direct the flow of energy (compress air) to other
devices and perform work. The valve has a number of ports that can be connected to a air supply
and to a another output pneumatic control device.

The ISO 5599 establish a standard nomenclature for the valve port numbering:
- Main port
This is the input port where the air will enter to the valve, and is label port #1.

- Output ports
The output ports are labeled with even numbers: 2, 4, 6 and 8.

- Exhaust ports
The exhaust ports are labeled with none numbers: 3, 5, 7, 9.

- Pilot ports
If the valve has any pilot port, they are labeled with two digits even numbers: 10, 12, 14.

The valve can be name by the number of ports and its operation, in general terms a X/Y :
- The X means the total number of input and output ports
- The Y means the number of positions the valve can do.

For Example:
- 2/2 = Two ports (input port #1 and output port #2) and 2 positions
- 3/2 = Three ports (input port #1 and output port 2, exhaust port #3) and 2 positions.
- 4/2 = Four ports (In #1, out #2, out #4 and exhaust port #3) and 2 positions.
- 5/2 = Five ports (In #1, out #2, out #4, and exhaust port #3, #5) and 2 positions.
- 5/3 = Five ports as above, and 3 positions (similar to above but extra middle position).

The numbers of ports are called the number of ways, for example:
- A 3/2 is called a 3-way valve
- A 4/2 is called a 4-way valve

A common way to control a valve is by using an electrical signal. But for that we need some type a
actuator called solenoid. The term solenoid valve refers to a solenoid-operated or a solenoid
actuated valve. The solenoid is an electromagnet, that when current flows through its coil creates a
magnetic field that causes the ferromagnetic material to become polarized which in turn cause to
move a plunger. When the plunger moves it allow in the valve to connect two ports.
Valve symbols can be drawn as follows:


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9.2 Piston Actuators

Pistons
The pneumatic cylinder or commonly known as piston, is the most famous of the pneumatic
actuators. The pistons are used in a variety of applications, like pushing, pulling, cutting,
sealing, transferring, gripping, etc. They vary in different lengths and bore sizes.

There are two basic types of pistons:
- Single acting piston
This piston has only one port for air supply. The piston can extend or retract when air
supply is applied. Then it returns to its original position by means of an internal spring, or
load connected.







- Double acting piston
This piston has two ports for air supply. The piston requires air supply in one port to extend,
and in the other port to retract. Obviously your design should allow to applied air supply in
one of the port at a time.











Three way valve
1 3
2







Four way valve
1 3
2 4
Air Supply
Air Supply Exhaust
Air to extend
Air Supply Exhaust
Air to retract
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Appendix A
Sample Documentation



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Appendix B
Laboratory Documentation