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Last Updated: June 24, 2014
Contents
1 Introduction to Single Stage Ampliers 2
1.1 Basic Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 CommonSource Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2.1 CommonSource Stage with Resistive Load . . . . . . . . . . . . . . . . . . . . . . 3
1.2.2 CS Stage with DiodeConnected Load . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2.3 CS Stage with CurrentSource Load . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.4 CS Stage with Triode Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.5 CS Stage with Source Degeneration . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1
Chapter 1
Introduction to Single Stage
Ampliers
1.1 Basic Concepts
1. Most of the signals are too small to driver a load and requires amplication. Amplication is one
of basic building block of feedback systems.
An important part of a designers job is to use proper approximations so as to create a simple
mental picture of a complicated circuit. The intuition thus gained makes it possible to formulate
the behavior of most circuits by inspection rather than by lengthy calculations.
from: Design of Analog CMOS Integrated Circuits by Behzad Razavi
2. There are four basic types of singlestage ampliers
(a) CommonSource
(b) CommonGate
(c) Source Followers (CommonDrain)
(d) Cascode Congurations
3. The following aspects of the performance of ampliers are important
(a) Gain
(b) Speed
(c) Power Dissipation
(d) Supply Voltage
(e) Linearity
(f) Noise
(g) Maximum Voltage Swing
(h) Input Impedance
(i) Output Impedance
In practice most of these parameters trade with each other and makes the design a multidimensional
optimization problem. Therefore, intuition and experience play important roles to arrive at an ac
ceptable compromise.
2
Figure 1.1: Multidimensional Tradeos Analog Design
Figure 1.2: CommonSource Stage with Resistive Load
1.2 CommonSource Stage
1.2.1 CommonSource Stage with Resistive Load
1. By virtue of transconductance of a CS stage, a MOSFET converts variations in its gatesource
voltage to a smallsignal drain current, which can pass through a resistor to generate a smallsignal
output voltage.
2. Input impedance of this circuit is very high at low frequencies.
3. If input voltage increases from zero, M
1
is o and V
out
= V
DD
. As V
in
approaches V
TH
, M
1
begins
to turn on, drawing current from R
D
and lowering V
out
. If V
DD
is not excessively low, M
1
turns
on in saturation. The current voltage relationship is given by
V
out
= V
DD
I
D
R
D
= V
DD
R
D
1
2
n
C
ox
W
L
(V
in
V
t
)
2
where channel length modulation is neglected. Here V
in
, V
out
and V
t
are smallsignal quantities.
4. As V
in
is further increased, M
1
enters into trode region.
V
out
= V
DD
R
D
1
2
n
C
ox
W
L
2(V
in
V
t
)V
out
V
2
out
5. As V
in
is further increased, M
1
enters into the deep triode region, V
out
2(V
in
V
t
).
V
out
= V
DD
R
ds
R
ds
+R
D
= V
DD
1
1 +
n
C
ox
W
L
R
D
(V
in
V
t
)
Since the transconductance drops in the triode region, we usually ensure that V
out
> (V
in
V
t
).
It means that M
1
should operate in saturation region for keeping constant transconductance and
linear amplication.
3
6. Smallsignal low frequency gain
A
v
=
V
out
V
in
=
V
in
V
DD
R
D
1
2
n
C
ox
W
L
(V
in
V
TH
)
2
A
v
= R
D
n
C
ox
W
L
(V
in
V
TH
) = g
m
R
D
7. If signal swing is large the transconductance varies and this leads to a nonlinear operation of this
stage and the circuit operates in the large signal mode.
8. How do we maximize the voltage gain of a commonsource stage?
A
v
= R
D
g
m
=
V
RD
I
D
g
m
=
V
RD
I
D
2
n
C
ox
I
D
(W/L) =
V
RD
I
D
2
n
C
ox
(W/L)
Therefore, the smallsignal voltage gain is increased by increasing W/L or increasing V
RD
or de
creasing I
D
if other parameters are constant. It is important to understand the tradeos resulting
from this equation.
(a) A larger MOS device size leads to larger device capacitances.
(b) A higher V
RD
limits the maximum voltage swings. If (V
DD
V
RD
) = (V )in V
t
), M
1
is at
the edge of the triode region, allowing only very small swing at the output and the input.
(c) If V
RD
remains constant and I
D
is reduced, then R
D
must increase, thereby leading to a
greater time constant at the output node.
It means there is a tradeos between gain, bandwidth and voltage swing. Lower
supply voltages further tighten these tradeos
9. For larger values of R
D
, the eect of channel modulation in M
1
becomes signicant.
V
out
= V
DD
R
D
1
2
n
C
ox
W
L
(V
in
V
t
)
2
(1 +V
out
)
V
out
V
in
= R
D
n
C
ox
W
L
(V
in
V
t
)(1 +V
out
) R
D
1
2
n
C
ox
W
L
(V
in
V
t
)
2
V
out
V
in
A
v
= R
D
g
m
R
D
I
D
A
v
A
v
=
g
m
R
D
1 +R
D
I
D
=
g
m
R
D
1 +
R
D
r
o
= g
m
(r
o
//R
D
)
r
o
is eect of channel length modulation. If R
D
r
o
, then eect of r
o
dominates over R
D
.
1.2.2 CS Stage with DiodeConnected Load
1. In many CMOS technologies, it is dicult to fabricate resistors with tightlycontrolled values or
a reasonable physical size. Consequently, it is desirable to replace R
D
with a MOS transistor. A
MOSFET can operate as a smallsignal resistor if its gate and drain are shorted. This is called
diodeconnected transistor. It exhibits a smallsignal behavior similar to a twoterminal resistor.
Note that this transistor is always in saturation because drain and gate have same potential (V
GD
<
V
t
for NMOS and V
GD
> V
T
for PMOS transistors).
2. The voltage across dependent current source g
m
v
gs
is v
gs
. Consequently, the equivalent resistance
is (r
o

1
g
m
)
1
g
m
.
3. If body eect exists, the V
SB
is equal to the voltage between source and ground. The body terminal
is connected to V
SS
for NMOS and to V
DD
for PMOS. In this case, V
SS
is at ground potential.
So, the drain terminal is connected to smallsignal ground; V
SB
= V
SD
= V
DS
= V
r
o
. Therefore,
equivalent resistance of two teminal device becomes
1
g
m
+g
mb
4
Figure 1.3: CommonSource Stage with Diode Connected Load
4. The impedance seen at the source of M
2
as per gure 1.3 is lower when body eect is included.
The load impedance for M
1
is
1
g
m
+g
mb
. Therefore, the smallsignal voltage gain becomes
A
v
= g
m1
1
g
m
+g
mb
=
g
m1
g
m2
1
1 +
=
(W/L)
1
(W/L)
2
1
1 +
since I
D1
= I
D2
.
5. It means that if the variation of with respect to output voltage is neglected, the gain is independent
of bias current and voltage so long as M
1
stays in saturation. In other words, as input and output
signals vary, the gain remains relatively constant, indicating that inputoutput characteristic is
relatively linear. This linear characteristic is shown with smallsignal analysis.
6. This linear behavior is also proved by large signal analysis. Neglecting channellength modulation
for simplicity, we have
I
D1
= I
D2
n
C
ox
2
W
L 1
(V
in
V
t1
)
2
=
n
C
ox
2
W
L
2
(V
in
V
t2
)
2
If the variation of V
t
with V
out
is small, the circuit exhibits a linear inputoutput characteristic.
7. When I
D
decrease to very low values V
GS2
V
t2
and V
out
V
DD
V
t2
. In reality, the subthreshold
conduction in M
2
eventually brings V
out
to V
DD
if I
D
approaches zero, but at very low current
levels, the nite capacitance at the output node slows down the change from V
DD
V
t
.
8. If V
in
< V
t
, the output voltage remains at V
DD
V
t
. For V
in
> V
t
, V
out
follows approximately a
straight line. As V
in
exceeds V
out
+V
t1
, M
1
enters the triode region, and the characteristic becomes
nonlinear.
9. The body eect in diode connected CS conguration is eliminated by using PMOS
diodeconnected transistor.
A
v
=
n
(W/L)
1
p
(W/L)
2
10. To achieve a high gain the dimension of M
1
should be higher than dimension of M
2
. In a sense, a
high gain requires a strong input device and weak load device. In addition to disproportionately wide
or long transistors, a high gain translates to another important limitation: reduction in allowable
voltage swings. Specically, since, I
D1
= I
D2
,
W
L
1
(V
GS1
V
t1
)
2
=
n
W
L
2
(V
GS2
V
t2
)
2
5
revealing that
A
v
V
GS2
V
t2

V
GS1
V
t1
therefore, overdrive voltage of M
2
must be much higher than M
1
. For example, V
GS1
V
t1
=
200mV , and V
t2
 = 0.7V , we have V
GS2
 = 2.7V , severely limiting the output swing. This is
another example of the tradeos. Note that, with diode connected loads, the swing is constrained
by both the required overdrive voltage and the threshold voltage.
A
2
v
=
n
(W/L)
1
p
(W/L)
2
A
v
V
GS2
V
t2

V
GS1
V
t1
=
n
(W/L)
1
p
(W/L)
2
A
v
=
n
(W/L)
1
(V
GS1
V
t1
)
p
(W/L)
2
V
GS2
V
t2

=
n
C
ox
(W/L)
1
(V
GS1
V
t1
)
p
C
ox
(W/L)
2
V
GS2
V
t2

A
v
=
g
m1
g
m2
11. In modern CMOS technology, channellength modulation is quite signicant and, more importantly,
the behavior of transistors notably departs from square law. Thus, the gain of a diodeconnected
CS stage becomes
A
v
= g
m1
1
g
m2
r
o2
r
o1
(W/L)
1
, i.e., if W
1
is not scaled, the overdrive voltage increases, limiting the output swing. Also, since
g
m1
1/
(W/L)
1
, scaling up only L
1
lowers g
m1
. The intrinsic gain of the transistor is given
by the following expression
g
m1
r
o1
=
W
L
n
C
ox
I
D
1
I
D
indicating that the gain increases with L because depends more strongly on L than g
m
does.
Also, note that g
m
r
o
decreases as I
D
increases. Increasing L
2
while keeping W
2
constant
increases r
o2
and hence the voltage gain, but at the cost of higher V
DS2
 required to
maintain M
2
in saturation.
6
1.2.4 CS Stage with Triode Load
1. A MOS device operating in deep triode region behaves as a resistor and can therefore serve as the
load in a CS stage. The gate of M
2
is biased at a suciently low level voltage, ensuring the load
is in deep triode region for all output voltage swings.
R
on2
=
1
p
C
ox
(W/L)
2
(V
DD
V
b
V
t2
)
2. The principal drawback of this circuit stems from the dependence of R
on2
upon
p
C
ox
, V
b
and
V
t2
. Since
p
C
ox
and V
t2
vary with process and temperature and since generating a precise value
of V
b
requires additional complexity, this circuit is dicult to use, this circuit is dicult to use.
Triode loads, however, consume less voltage headroom then do diodeconnected devices because
V
out(max)
= V
DD
for triode load and V
out(max)
= V
DD
V
t2
for diode connected load.
1.2.5 CS Stage with Source Degeneration
1. In some applications, the squarelaw dependence of the drain current upon the overdrive voltage
introduces excessive nonlinearity, making it desirable to soften the device characteristic. The near
linear behavior is achieved using diodeconnected load. Alternatively, this can be accomplished by
placing a degeneration resistor in series with the source terminal. As V
in
increases, so do I
D
and
the voltage drop across R
S
. That is, a fraction of V
in
appears across the resistor rather than as
the gatesource overdrive, thus leading to a smoother variation of I
D
.
2. The equivalent transconductance
G
m
=
g
m
1 +g
m
R
S
The smallsignal voltage gain is thus equal to
A
v
=
g
m
R
D
1 +g
m
R
D
3. It means that as R
S
increases, G
m
becomes a weaker function of g
m
and hence the drain current.
If R
S
is very large, most of the signal appears across R
S
and gain becomes a linearized function.
The linearization is achieved at the cost of lower gain (and higher noise).
4. G
m
in the presence of body eect is derived as
G
m
=
g
m
r
o
R
S
+r
o
[1 + (g
m
+g
mb
)r
o
]
7