Description
+100C
2A minimum peak output current
High speed response: 200ns max propagation delay
over temperature range
250kHz maximum switching speed
30ns typ pulse width distortion
Wide VCC operating range: 10V to 20V
5000Vrms, 1 minute isolation
Under voltage lockout protection (UVLO) with
hysteresis
Minimum creepage distance of 7.0mm
Minimum clearance distance of 7.0mm
C-UL, UL and VDE* approved
RDS(ON) of 1.5 (typ.) offers lower power dissipation
15kV/s minimum common mode rejection
Applications
Package Outlines
FOD3180
NO CONNECTION 1
8 VCC
ANODE 2
7 OUTPUT
CATHODE 3
6 OUTPUT
NO CONNECTION 4
5 VEE
8
1
Note:
A 0.1F bypass capacitor must be connected between pins 5 and 8.
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August 2008
Symbol
Parameter
Value
Units
TSTG
Storage Temperature
-40 to +125
TOPR
Operating Temperature
-40 to +100
Junction Temperature
-40 to +125
TJ
IF(AVG)
Average Input
Current(1)
25
mA
IF(tr, tf)
250
ns
IF(TRAN)
1.0
TSOL
VR
IOH(PEAK)
Current(2)
2.5
IOL(PEAK)
2.5
VCC VEE
Supply Voltage
-0.5 to 25
VO(PEAK)
Output Voltage
0 to VCC
250
mW
295
mW
Dissipation(4)
PO
Output Power
PD
Symbol
Value
Units
Power Supply
10 to 20
IF(ON)
10 to 16
mA
VF(OFF)
-3.0 to 0.8
VCC VEE
Parameter
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2
Parameter
IOH
IOL
Current(2)(3)
Output Voltage(6)(7)
Test Conditions
Min.
0.5
2.0
0.5
2.0
Max.
Unit
A
A
VOH
High Level
VOL
IO = 100mA
ICCH
Output Open,
IF = 10 to 16mA
ICCL
Output Open,
VF = -3.0 to 0.8V
IFLH
IO = 0mA, VO > 5V
VFHL
0.8
IF = 10mA
1.2
VF / TA
IF = 10mA
-1.5
mV/C
VUVLO+
UVLO Threshold
8.3
7.7
0.6
VF
VUVLO
IO = -100mA
Typ.*
VCC 0.5
IR = 10A
CIN
Input Capacitance
f = 1MHz, VF = 0V
V
VEE + 0.5
4.8
6.0
mA
5.0
6.0
mA
8.0
mA
V
1.43
1.8
V
60
pF
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3
Symbol
Parameter
tPLH
tPHL
IF = 10mA,
Rg = 10,
f = 250kHz,
Duty Cycle = 50%,
Cg = 10nF
PWD
Pulse Width
Distortion(9)
Rise Time
tf
Fall Time
tUVLO ON
tUVLO OFF
Typ.* Max.
Unit
50
135
200
ns
50
105
200
ns
65
ns
90
ns
-90
CL = 10nF,
Rg = 10
75
ns
55
ns
2.0
0.3
| CMH |
TA = +25C,
If = 10 to 16mA,
VCM = 1.5kV,
VCC = 20V
15
kV/s
| CML |
TA = +25C,
Vf = 0V,
VCM = 1.5kV,
VCC = 20V
15
kV/s
Isolation Characteristics
Symbol Parameter
Test Conditions
VISO
RI-O
VI-O = 500V
CI-O
Freq. = 1MHz
Min.
Typ.*
5000
Max.
Unit
Vrms
1011
pF
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4
Switching Characteristics
7.
8.
9.
10. The difference between tPHL and tPLH between any two FOD3180 parts under same test conditions.
11. Pin 1 and 4 need to be connected to LED common.
12. Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse
VCM to assure that the output will remain in the high state (i.e. VO > 10.0V).
13. Common mode transient immunity in a low state is the maximum tolerable dVCM/dt of the common mode pulse,
VCM, to assure that the output will remain in a low state (i.e. VO < 1.0V).
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000Vrms,
60Hz for 1 second (leakage detection current limit II-O < 5A).
15. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted
together.
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5
Notes:
1. Derate linearly above +70C free air temperature at a rate of 0.3mA/C.
2. The output currents IOH and IOL are specified with a capacitive current limited load = (3 x 0.01F) + 0.5,
frequency = 8kHz, 50% DF.
3. The output currents IOH and IOL are specified with a capacitive current limited load = (3 x 0.01F) + 8.5,
frequency = 8kHz, 50% DF.
4. Derate linearly above +87C, free air temperature at the rate of 0.77mW/C. Refer to Figure 12.
5. No derating required across operating temperature range.
6. In this test, VOH is measured with a dc load current of 100mA. When driving capacitive load VOH will approach VCC
as IOH approaches zero amps.
100
10
TA = -40C
TA = 100C
TA = 25C
0.1
0.01
V = 10 to 20V
CC
VEE = 0
Output = Open
0.001
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-40
2.2
-20
VEE = 0
0.20
0.15
0.10
0.05
0.00
-40
-20
20
40
60
40
60
80
100
80
0.00
V
CC
= 10 to 20V, VEE = 0
IF = 10mA to 16mA
IOUT = -100 mA
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
100
-40
-20
20
40
60
80
100
6.2
6.2
V
CC
= 20V, VEE = 0
5.8
5.8
20
0.30
0.25
5.4
ICCL
5.0
ICCH
4.6
4.2
3.8
TA = 25oC, VEE = 0V
5.4
5.0
ICCL
ICCH
4.6
4.2
3.8
-40
-20
20
40
60
80
100
10
12
14
16
18
20
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6
200
180
160
tPHL
140
120
tPLH
100
80
180
160
tPHL
140
120
tPLH
100
80
60
60
5
10
15
20
25
12
14
16
200
VCC = 20V, VEE = 0
180
10
160
140
tPHL
120
tPLH
100
80
IF = 10mA
RG = 10, CG = 10nF
f = 250kHz, D. Cycle = 50%
180
160
140
tPHL
120
tPLH
100
80
60
60
10
20
30
40
50
-40
-20
20
40
60
80
100
IF = 10mA, TA = 25oC
RG = 10, CG = 10nF
f = 250 kHz, D. Cycle = 50%
160
140
tPHL
120
tPLH
100
80
60
10
15
20
25
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7
Through Hole
PIN 1
ID.
1
4
0.270 (6.86)
0.250 (6.35)
5
0.270 (6.86)
0.250 (6.35)
0.070 (1.78)
0.045 (1.14)
0.020 (0.51) MIN
0.200 (5.08)
0.140 (3.55)
0.154 (3.90)
0.120 (3.05)
0.022 (0.56)
0.016 (0.41)
0.390 (9.91)
0.370 (9.40)
SEATING PLANE
SEATING PLANE
0.390 (9.91)
0.370 (9.40)
0.016 (0.40)
0.008 (0.20)
0.100 (2.54) TYP
0.070 (1.78)
0.045 (1.14)
0.004 (0.10) MIN
0.200 (5.08)
0.140 (3.55)
15 MAX
0.154 (3.90)
0.120 (3.05)
0.300 (7.62)
TYP
0.022 (0.56)
0.016 (0.41)
0.016 (0.40)
0.008 (0.20)
0.100 (2.54) TYP
Surface Mount
0 to 15
0.400 (10.16)
TYP
0.390 (9.91)
0.370 (9.40)
4
0.070 (1.78)
PIN 1
ID.
0.060 (1.52)
0.270 (6.86)
0.250 (6.35)
0.100 (2.54)
0.295 (7.49)
0.070 (1.78)
0.045 (1.14)
0.020 (0.51)
MIN
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
Lead Coplanarity : 0.004 (0.10) MAX
0.415 (10.54)
0.300 (7.62)
TYP
0.030 (0.76)
0.016 (0.41)
0.008 (0.20)
0.045 (1.14)
0.315 (8.00)
MIN
0.405 (10.30)
MAX.
Note:
All dimensions are in inches (millimeters)
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8
Package Dimensions
Option
No option
FOD3180
FOD3180S
SD
FOD3180SD
FOD3180T
FOD3180V
VDE 0884
TV
FOD3180TV
SV
FOD3180SV
SDV
FOD3180SDV
Description
Standard Through Hole Device
Surface Mount, Lead Bend
Surface Mount, Tape and Reel
Marking Information
3180
XX YY B
V
3
2
6
Definitions
1
Fairchild logo
Device number
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9
Ordering Information
D0
P0
K0
P2
A0
W1
Symbol
W
B0
Description
D1
Dimension in mm
Tape Width
16.0 0.3
Tape Thickness
0.30 0.05
P0
4.0 0.1
D0
1.55 0.05
1.75 0.10
Pocket Location
7.5 0.1
4.0 0.1
P2
P
Pocket Pitch
A0
Pocket Dimensions
12.0 0.1
10.30 0.20
B0
10.30 0.20
K0
4.90 0.20
W1
d
R
1.6 0.1
0.1 max
10
30
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10
245 C, 1030 s
Temperature (C)
300
260 C peak
250
200
150
100
50
Ramp up = 210C/sec
0
0
0.5
1.5
2.5
3.5
4.5
Time (Minute)
Peak reflow temperature: 260 C (package surface temperature)
Time of temperature higher than 183 C for 160 seconds or less
One time soldering reflow is recommended
2.5
0.15
0.1
0.05
1.5
TA = -40C to 100C
Load = .03F +8.5
VDD = 20V
IF = 12mA
LED Duty Factor = 50%
0
1
0
-40
-20
20
40
60
80
10
100
F FREQUENCY (kHz)
100
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11
Reflow Profile
This device is tested and specified when driving a complex reactive load. The load consists of a capacitor in the
series with a current limiting resistor. The capacitor represents the gate to source capacitance of a power
MOSFET transistor. The test load is a 0.03F capacitor
in series with an 8.5 resistor. The LED test frequency is
10.0kHz with a 50% duty cycle. The combined IOH and
IOL output load current duty factor is 0.6% at the test
frequency.
Figure 15 shows the test schematic to evaluate the output voltage and sourcing and sinking capability of the
device. The IOH and IOL are measured at the peak of
their respective current pulses.
IF = 8mA
LED
OFF
ON
20V
N-Channel (ON)
P-Channel (ON)
OUTPUT
0
IOH = 2.2A
Load
Current
IOL = 2.2A
1s/Div
Figure 14. FOD 3180 Output Current and Output Voltage vs. LED Drive
Pulse
Generator
FOD3180
8
0.1F
2
IOMON
VO
0.33F
IFMON
100
8.5
22F
100
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12
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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Making Small Speakers Sound Louder
and Better
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FACT Quiet Series
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FAST
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QS
Quiet Series
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TriFault Detect
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VisualMax
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Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I68
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