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SOIC8
CASE 751
PIN CONNECTION
MFP
Comp
Ct
CS
(Top View)
MARKING DIAGRAM
8
Features
VCC
DRV
GND
ZCD
A
L
Y
W
G
L0000
ALYW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
ORDERING INFORMATION
Device
Package
Shipping
NCL30000DR2G
SOIC8
(PbFree)
Typical Applications
NCL30000
OVP
VOVP
UVP
VUVP
(Enable EA)
E/A
+
MFP
gm
+
RMFP
VREF
Fault
COMP
VControl
VEAH
Clamp
mVDD
VDD
Power Good
VDD
PWM
275 mA*
Add Ct
Offset
Ct
S Q
DRV
CS
VCC
VCC
Management
LEB
195 ns*
OCP
R Q
VCC
VILIM
+
ZCD
S Q
VZCD(ARM)
+
+
VZCD(TRIG)
Demag
R Q
R Q
Reset
mVDD
180 ms*
S Q
Off Timer
R Q
ZCD
Clamp
* Typical Values Shown
DRV
S Q
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2
GND
NCL30000
Table 1. PIN FUNCTION DESCRIPTION
Pin
Name
Function
MFP
The multi-function pin is connected to the internal error amplifier. By pulling this pin below the Vuvp threshold, the
controller is disabled. In addition, this pin also has an over voltage comparator which will disable the controller in the
event of a fault.
COMP
The COMP pin is the output of the internal error amplifier. A compensation network is connected between this pin
and ground to set the loop bandwidth. Normally this bandwidth is set at a low frequency (typically 10 Hz 20 Hz) to
achieve high power factor and low total harmonic distortion (THD).
Ct
The Ct pin sources a regulated current to charge an external timing capacitor. The PWM circuit controls the power
switch on time by comparing the Ct voltage to an internal voltage derived from VControl. The CT pin discharges the
external timing capacitor at the end of the on time cycle.
CS
The CS input is used to sense the instantaneous switch current in the external MOSFET. This signal is filtered by an
internal leading edge blanking circuit.
ZCD
The voltage of an auxiliary zero current detection winding is sensed at this pin. When the ZCD control block circuit
detects that the winding has been demagnetized, a control signal is sent to the gate drive block to turn on the
external MOSFET.
GND
This is the analog ground for the device. All bypassing components should be connected to the GND pin with a short
trace length.
DRV
The high current capability of the totem pole gate drive (+0.5/0.8 A) makes it suitable to effectively drive high gate
charge power MOSFETs. The driver stage provides both passive and active pull down circuits that force the output to
a voltage less than the turn-on threshold voltage of the power MOSFET when VCC(on) is not reached.
VCC
This pin is the positive supply of the controller. The circuit starts to operate when VCC exceeds VCC(on), nominally
12 V and turns off when VCC goes below VCC(off), typically 9.5 V. After startup, the operating range is 10.2 V up to
20 V.
AC
Line
Input
D out
EMI
FILTER
C in
R SU
Ra
D1
Cv
8
R ZCD
NCL30000
1
MFP
VCC
COMP
DRV
CT
GND
Q1
C1
R2
Rx
VCC
RL
R1
Rb
OUT2
7
IN2+ 5
IN2 6
Rt
NCS1002
OUT1
1
2
IN1
IN1+ 3
Ccomp
GND
Cc
4
CS
ZCD
Ry
C tim
C OUT
Rc
R CS
Figure 2. Simplified Flyback Application with Secondary side Constant Current Control
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3
RLED
NCL30000
Overview
the power switch is on for the same length of time over a half
cycle of input power. The current in the primary of the
transformer starts at zero each switching cycle and is directly
proportional to the applied voltage times the on-time.
Therefore with a fixed on-time, the current will follow the
applied voltage generating a current of the same shape. Just
as in a traditional boost PFC circuit, the control bandwidth
is low so that the on-time is constant throughout a single line
cycle. The feedback signal from the secondary side is used
to modify the average on-time so the current through the
LEDs is properly regulated regardless of forward voltage
variation of the LED string.
Symbol
Value
Unit
MFP Voltage
VMFP
0.3 to 10
MFP Current
IMFP
10
mA
COMP Voltage
VControl
0.3 to 6.5
COMP Current
IControl
2 to 10
mA
Ct Voltage
VCt
0.3 to 6
Ct Current
ICt
10
mA
CS Voltage
VCS
0.3 to 6
CS Current
ICS
10
mA
VZCD
0.3 to 10
ZCD Voltage
ZCD Current
IZCD
10
mA
DRV Voltage
VDRV
0.3 to VCC
IDRV(sink)
800
mA
IDRV(source)
500
mA
VCC
0.3 to 20
ICC
20
mA
PD
450
mm2
mW
C/W
RqJA
RqJA
RqJA
178
168
127
TJ
40 to 125
TJ(MAX)
150
TSTG
65 to 150
TL
300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pins 18: Human Body Model 2000 V per JEDEC Standard JESD22A114E.
Pins 1 8:Machine Model Method 200 V per JEDEC Standard JESD22A115A.
2. This device contains Latch-up protection and exceeds 100 mA per JEDEC Standard JESD78.
3. As mounted on a 40 40 1.5 mm FR4 substrate with a single layer of 80 mm2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 low conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 40 40 1.5 mm FR4 substrate with a single layer of 650 mm2 of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51 high conductivity test PCB. Test conditions were under natural convection or zero air flow.
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NCL30000
Table 3. ELECTRICAL CHARACTERISTICS
VMFP = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified
(For typical values, TJ = 25C. For min/max values, TJ = 40C to 125C, unless otherwise specified)
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
VCC Increasing
VCC(on)
11
12
12.5
VCC Decreasing
VCC(off)
8.8
9.5
10.2
HUVLO
2.2
2.5
2.8
Icc(startup)
24
35
mA
Icc1
1.4
1.7
mA
Icc2
2.1
2.6
mA
No Switching, VMFP = 0 V
Icc(fault)
0.75
0.95
mA
VOVP/VREF
105
106
108
VOVP(HYS)
20
60
100
mV
VMFP = 2 V to 3 V ramp,
dV/dt = 1 V/ms
VMFP = VOVP to VDRV = 10%
tOVP
500
800
ns
VMFP = Decreasing
VUVP
0.25
0.31
0.4
VMFP = 1 V to 0 V ramp,
dV/dt = 10 V/ms
VMFP = VUVP to VDRV = 10%
tUVP
100
200
300
ns
TJ = 25C
TJ = 40C to 125C
VREF
2.475
2.460
2.500
2.500
2.525
2.540
VREF(line)
10
10
mV
VMFP = 2.6 V
VMFP = 1.08*VREF
VMFP = 0.5 V
IEA(sink)
IEA(sink)OVP
IEA(source)
6
10
110
10
20
210
20
30
250
mA
gm
90
70
110
110
120
135
RMFP
4.6
10
MW
VMFP = 2.5 V
IMFP
0.25
0.54
1.25
mA
VMFP = Increasing
Overvoltage Hysteresis
Overvoltage Detect Threshold
Propagation Delay
ERROR AMPLIFIER
Voltage Reference
Voltage Reference Line Regulation
Error Amplifier Current Capability
Transconductance
mS
VMFP = 0 V
IControl
mA
IControl(pullup) = 10 mA,
VMFP = VREF
VEAH
5.5
Ct(offset)
0.37
0.65
0.88
VEAH Ct(offset)
VEA(DIFF)
4.5
4.9
5.3
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NCL30000
Table 3. ELECTRICAL CHARACTERISTICS (Continued)
VMFP = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified
(For typical values, TJ = 25C. For min/max values, TJ = 40C to 125C, unless otherwise specified)
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
VCOMP = open
VCt(MAX)
4.775
4.93
5.025
VCOMP = open
VCt = 0 V to VCt(MAX)
Icharge
235
275
297
mA
VCOMP = open
VCt = VCt(MAX) 100 mV to 500 mV
tCt(discharge)
50
150
ns
dV/dt = 30 V/ms
VCt = VControl Ct(offset)
to VDRV = 10%
tPWM
130
220
ns
VZCD = Increasing
VZCD(ARM)
1.25
1.4
1.55
VZCD = Decreasing
VZCD(TRIG)
0.6
0.7
0.83
VZCD(HYS)
500
700
900
mV
RAMP CONTROL
Ct Peak Voltage
On Time Capacitor Charge Current
Ct Capacitor Discharge Duration
PWM Propagation Delay
ZCD Hysteresis
ZCD Bias Current
VZCD = 5 V
IZCD
+2
mA
IZCD = 3 mA
VCL(POS)
9.8
10
12
IZCD = 2 mA
VCL(NEG)
0.9
0.7
0.5
VZCD = 2 V to 0 V ramp,
dV/dt = 20 V/ms
VZCD = VZCD(TRIG) to VDRV = 90%
tZCD
100
170
ns
tSYNC
70
ns
tstart
75
165
300
ms
Isource = 100 mA
Isink = 100 mA
ROH
ROL
12
6
20
13
Rise Time
10% to 90%
trise
35
80
ns
Fall Time
90% to 10%
tfall
25
70
ns
Vout(start)
0.2
VILIM
0.45
0.5
0.55
tLEB
100
195
350
ns
dV/dt = 10 V/ms
VCS = VILIM to VDRV = 10%
tCS
40
100
170
ns
VCS = 2 V
ICS
mA
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NCL30000
107
106
105
50
25
25
50
75
100
125
80
70
60
50
40
50
25
25
50
75
100
125
0.325
0.320
0.315
0.310
0.305
0.300
50
25
25
50
75
100
125
TYPICAL CHARACTERISTICS
7
6
5
4
3
2
1
0
50
25
25
50
75
100
125
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
2.46
50
25
25
50
75
100
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7
125
NCL30000
TYPICAL CHARACTERISTICS
220
14
12
10
8
6
50
25
25
50
75
100
200
195
190
VMFP = 0.5 V
185
25
25
50
75
100
125
115
110
105
100
95
90
25
25
50
75
100
200
200
180
180
Phase
160
160
140
140
120
120
Transconductance
100
125
100
80
60
40
20
0
80
RControl = 100 kW
CControl = 2 pF
VMFP = 2.5 Vdc, 1 Vac
VCC = 12 V
TA = 25C
0.01
0.1
60
40
10
20
0
1000
100
f, FREQUENCY (kHz)
1.0
278
Icharge, Ct CHARGE CURRENT (mA)
205
120
0.9
0.8
0.7
0.6
0.5
0.4
0.3
50
210
180
50
125
125
85
50
215
q, PHASE (DEGREES)
VMFP = 2.6 V
16
25
25
50
75
100
125
276
274
272
270
268
266
264
50
25
25
50
75
100
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8
125
NCL30000
TYPICAL CHARACTERISTICS
5.5
5.0
4.5
4.0
50
25
25
50
75
100
125
170
160
150
140
130
120
110
100
50
25
25
50
75
100
125
220
tLEB, LEADING EDGE BLANKING
DURATION (ns)
0.520
0.515
0.510
0.505
0.500
0.495
0.490
0.485
0.480
50
25
25
50
75
100
210
200
190
180
50
125
25
25
50
75
100
125
205
18
200
16
DRIVE RESISTANCE (W)
6.0
195
190
185
180
175
170
ROH
14
12
10
8
6
ROL
4
2
165
50
25
25
50
75
100
125
0
50
25
25
50
75
100
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9
125
NCL30000
TYPICAL CHARACTERISTICS
13
VCC(on)
12
11
10
VCC(off)
9
8
50
25
25
50
75
100
125
26
24
22
20
18
16
14
50
25
25
50
75
100
125
2.16
2.14
2.12
2.10
2.08
2.06
2.04
2.02
2.00
50
25
25
50
75
100
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10
125
NCL30000
THEORY OF OPERATION
eliminated except for a small capacitor, the voltage to the
flyback converter now follows a rectified sine shape at twice
the line frequency. By employing a critical conduction mode
control technique such that the input current is kept to the
same shape, high power factor can be achieved. The
NCL30000 is a voltage mode, fixed on-time controller
specifically intended for such applications.
Primary
EMI
Filter
Secondary
Zero
Current
Detect
& Bias
Winding
CC/CV
Control
NCL30000
Controller
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11
NCL30000
The NCL30000 (refer to the block diagram Figure 1) is
composed of 4 key functional blocks along with protection
circuitry to ensure reliable operation of the controller.
On-time Control
Zero Current Detection Control
MOSFET Gate Driver
Startup and VCC Management
Ipr(peak)
IS(t)
Ipr(t)
Iin(t)
Iin(peak)
On Time Control
ON
MOSFET
OFF
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NCL30000
VControl
MOSFET Conduction
COMP
VDD
VEAH
PWM
Icharge
Ct
ton
Iprimary
0A
Isecondary
0A
DRV
Ct(offset)
VCt
VCt(off)
VControl Ct(offset)
VControl
ton(max)
DRV
DRV
0V
Vout
0V
VZCD(WIND)
VZCD(WIND),off
0V
VZCD(WIND),on
VCL(POS)
VZCD(ARM)
VZCD(TRIG)
0V
VCL(NEG)
ton
tdiode
toff
tSW
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NCL30000
ZCD Detection Block
NZCD
Vtrig
Q
Reset
Dominant
Latch
R
Q
VZCD(ARM)
+
DRIVE
Demag
VZCD(TRIG)
ZCD
ZCD Clamp
OCP
VILIM
optional
LEB
+
Rsense
I SW(peak) +
CS
DRV
MFP Input
(eq. 1)
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NCL30000
VOVP
Bias
+
R1
OVP Fault
POWER GOOD
UVP
+
UVP Fault
VUVP
MFP
+
RFB
R2
COMP
Shutdown
+ OVP
EA
(Enable EA)
gm
VREF
VControl
CCOMP
time for the device to start switching and allow the bias from
the auxiliary winding to supply VCC.
Example Design
VCC Management
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15
16
1A
1
Line
1
Neutral
J1-2
F1
47nF
C1
BAW56 D7
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R10
6.2k
RT1
R11
100k
4
27mH
1 L1 3
4.7k
R14
R2 5K6
L2 2.2mH
R15
100k
RV1
CS
Ct
ZCD
GND
Comp DRV
VCC
NCL30000
C4
100nF
MFP
C9
820 pF
C8
10uF
D4
MRA4007
V300LA4
1nF R17
100
C7
L3 2.2mH
R3 5K6
C2
47nF
Q2
MMBTA06
D9
MMBZ5245
Q1
D8
Figure 30. Wide Input Main, 415 LED 350 mA Load Schematic
15V
MMBTA06
BZX84C5V1
5.1V
R9 6.2k
Q3
SPD02N80
R20
0.33 W
R18 100
T1A
T1E
T1D
C12
470uF
D10 MURD330
C10 4.7 nF
U2
PS2561L_1
T1C
3
R7
47K T1B
R6
47K
R19 10
R16
47k
D6
BAS21
D5
ES1M
4700 pF
C5
R22
1k
BZX84C5V6
D11
MMBTA06
Q5
MMBTA06
R24
47k
100pF
C14
1k
R25
C15
220nF
U3
8
IN1+
1 VCC IN1
OUT1
IN2+
OUT2
7
IN2
GND
LM2904
D12
BZX84C56
R23
1k
D13 BAW56
3
2
5
6
4
R28
470
R27
200
16k
R26
0.2 W
R29
R30
24k
U4
TL431A
24k
R31
C16
100nF
LED
Anode
J2-1
1
LED
Cathode
J2-2
1
LED HERE
J1-1
NCL30000
Q4
C13
100nF
NCL30000
Zero Current Detection (ZCD)
Feedback Control
Transformer Design
EMI Filter
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NCL30000
Output Filter
FET Switch
Secondary Bias
On-time Capacitor
Ct [
h @ Vpk2 @ VCT(max)
V pk
N @ V out
0.95 @ 2 @ 90 @ 4.775 V
)1
2 @ 90
3.83 @ 50
(eq. 2)
)1
C t [ 740 pF
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NCL30000
Performance Data for 90 to 305 Vac LED Driver
350
87%
345
86%
340
85%
335
84%
330
83%
325
82%
320
81%
315
80%
LED Current
310
Efficiency (%)
current does not vary much over the entire input voltage
range. The data is based on the use of an EFD25 transformer.
79%
Efficiency
305
78%
300
77%
90
115
140
165
190
215
240
265
290
Input Voltage (Vac)
Figure 31. Output Current and Efficiency with 36.9 V Load
315
20
1.00
18
0.99
16
0.98
14
0.97
12
0.96
10
0.95
0.94
0.93
0.92
THD
0.91
PF
0.90
90
115
140
165
190
215
Input Voltage (Vac)
240
265
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290
315
Power factor and Total Harmonic Distortion are shown in Figure 32 below.
NCL30000
Efficiency is affected by the startup circuit losses in
proportion to load and influenced by higher line voltage.
380
86%
370
84%
360
82%
350
80%
340
78%
Efficiency
330
76%
115V Efficiency
230V Efficiency
320
12
17
22
27
32
37
42
LED Forward Voltage (Vdc)
47
52
57
74%
Figure 33. LED Current and Efficiency at 115 and 230 Vac
50
45
40
35
30
25
20
15
10
Protection
Region
5
0
0
100
200
300
400
500
600
LED Current (mA)
Figure 34.
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20
700
800
900
1000
NCL30000
Figure 35 shows output ripple current for 115 Vac input
and 36.9 (12 LED) load operating at 350 mA average. Scale
factor is 67 mA per division. The low frequency ripple
follows the input twice line frequency rectified sine wave
characteristic of single stage converters.
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NCL30000
PACKAGE DIMENSIONS
SOIC8 NB
CASE 75107
ISSUE AK
X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 75101 THRU 75106 ARE OBSOLETE. NEW
STANDARD IS 75107.
A
8
0.25 (0.010)
1
4
G
C
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)
Z Y
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm
inches
ON Semiconductor and
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particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC
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