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S558S563

Center-Channel (CC) Double-Gate (DG) MOSFET

Kidong Kim and Taeyoung Won

Department of Electrical Engineering, School of Engineering, Inha University, Incheon 402-751

In this paper, a novel device structure (Si1x Gex /Si/Si1x Gex heterostructure), which is named

as center-channel (CC) double-gate (DG) MOSFET, is proposed. The device performance of the

proposed FET structure was investigated with our two-dimensional quantum-mechanical simulator

which is based upon the self-consistent solution of Poisson-Schr

odinger equations and the current

continuity equation. The CC operation of CC-NMOS is confirmed by considering the electron

density distribution and the band lineups as well as the lowest-energy wave function. The currentvoltage characteristics including the transconductance (Gm ) of CC-MOSFET are carefully compared

with those of the conventional DG-NMOS in order to observe the distinct feature of the proposed

FET structure. The simulation revealed that the proposed FET exhibits enhancement of about

1.6x for current drive and 60 % for Gm . Finally, short-channel effects were considered for CC

and DG MOSFET, both of which demonstrate excellent sub-threshold behaviors and open the

possibility of device scaling down to sub-20 nm.

PACS numbers: 85.30.De

Keywords: Quantum-mechanical simulation, Center-channel operation, Double-gate MOSFET, Shortchannel effects, Coupled Poisson-Schr

odinger equations

I. INTRODUCTION

Recent approaches for nano-scale semiconductor devices place a lot of emphasis on materials and structures [13]. The enhancement of carrier mobility in the

conduction channel needs high-mobility materials such

as Si1x Gex and strained-Si. However, a conventional

MOSFET with strained-Si channel has some disadvantages such as a limit of scaling, high-electric field in the

channel, and corresponding degradation of mobility. For

the solution of these problems, we propose and simulate a high-performance center-channel (CC) double-gate

(DG) structure incorporating the materials Si1x Gex

and strained-Si. To fulfill the numerical simulation of

nano-scale structures such as DG MOSFET, we need to

obtain a self-consistent solution of the coupled PoissonSchr

odinger equations. The CC-NMOS device exhibits

enhancement of current drive and switching speed caused

by a decrease of surface roughness scattering and mobility enhancement of the strained-Si channel. In this

paper, we report our self-consistent QM approach for

the analysis of CC-NMOS. The electrical performance of

CC-NMOS was carefully investigated in terms of channel

length (Lg ) (10 80 nm) and gate oxide thickness (Tox )

(2 nm). Device optimizations were performed in order to suppress the short-channel effects (SCE) through

some critical parameters such as subthreshold swing,

E-mail:

twon@hsel.inha.ac.kr;

Tel: +82-32-860-8686; Fax: +82-32-875-7436

lowering (DIBL). At the same time, the differences between the CC-NMOS and DG-NMOS simulation results,

and especially enhancement of current drive, were examined by comparing the band lineups, lowest-energy wave

function, and electron density.

The two-dimensional (2-D) QM model for describing

the effect of strain on the band structure of Si and bound

states is based on the self-consistent solution of coupled

Poisson-Schrodinger equations [4]:

[(x, y)(x, y)] = (x, y),

(1)

+

(x, y) = q[n(x, y) + p(x, y) + ND

(x, y) NA (x, y)], (2)

~2

1

n (x, y) + V (x, y)n (x, y) = En n (x, y),

2

m

(3)

where is the dielectric constant, the electrostatic potential, the total charge density, n and p the electron

+

and hole concentrations, ND

and NA the ionized donor

and acceptor concentrations, n (x, y) the wave function

of nth eigenstates, ~ Plancks constant divided by 2,

m (x,y) the effective mass, En the energy of nth eigenstates, and V the potential energy, which is given by

V (x, y) = Ec (x, y) q(x, y). Here, Ec (x, y) is the

-S558-

ionized donors and acceptors are expressed as

ND (x, y)

,

1 + gD e(EF x (x,y)ED )/kB T

NA (x, y)

NA (x, y) =

,

1 + gA e(EA EF y (x,y))/kB T

+

ND

(x, y) =

(4)

(5)

concentrations, gD and gA the degeneracy factors of the

energy levels, EF n (x, y) and EF p (x, y) the quasi-Fermi

levels, ED and EA the ionization energies of donor and

acceptor, kB the Boltzmann constant, and T the temperature.

We used the mixed Dirichlet and von Neumann boundary conditions for the solution of the Schr

odinger equation, which solve the Schr

odinger equation with Dirichlet and Von Neumann boundary conditions, respectively,

and normalize the states to 1/2. The mixed Dirichlet

and von Neumann boundary conditions are given by the

following equation:

Z

| (z) |2 dz = 1/2.

(6)

This means that we obtain a constant function by

summing cosine functions from Dirichlet boundary conditions and sine functions from von Neumann boundary

conditions with normalization to 1/2.

By solving the Schr

odinger equation, we obtain the

quantized states which are occupied with the local quasiFermi levels. The 2-D quantum electron density is found

by using [5]

n(x, y) =

X

1 p

E F Ej

2m kB T

| f (x, y) |2 F1/2

,

~

kB T

j

(7)

where Ej and j (x, y) are the energy and the wave function of the j th eigenstate, EF (x, y) the Fermi level, and

Fk the Fermi-Dirac integrals of order k. These integrals

are defined as follows:

Z

1

uk du

Fk () =

, k 1,

(8)

(k + 1) 0 1 + eu

and also have the following property:

d

Fk () = Fk1 (), k 1.

d

(9)

1st moment of the Boltzmann equation by adopting a

simple drift-diffusion model for the electron current:

Jn (x, y) = n (x, y)n(x, y)EF n (x, y).

(10)

Jn (x, y) = 0.

(11)

-S559-

For a model of carrier mobility, we employed a physicsbased and semi-empirical model which takes various scattering mechanisms into account by using the Mathiessen

rule [6]:

1

1

1

1

=

+

+

,

b

ac

sr

(12)

where b is the carrier mobility in the bulk, ac the carrier mobility from the surface acoustic phonon scattering,

and sr the carrier mobility from surface roughness.

The bulk mobility, b , uses the empirical model expressed by Masetti et al. [7], which depends on the impurity concentration and temperature:

1

max (T ) 0

,(13)

1 + (NA /Cr )

1 + (Cs /NA )

T

max (T ) = max

,

(14)

300

b (NA , T ) = 0 +

= 2.42, the initial estimate for .

The electron mobility for the acoustic phonon scattering and nondegenerate surface, ac , is expressed by [7]

!

BT

C

1

ac (E , T ) =

+ 1/3

,

(15)

E

T

E

where E is the electric field perpendicular to the direction of current flow. Further, B and C are fitting parameters with initial values of Binit = 3.1 108 cm/s and

Cinit = 3.0 107 (V/cm)2/3 Kcm/s based on physical

quantities such as deformation potential, mass density of

silicon, and effective thickness of inversion layer [8].

At very high perpendicular electric field, surface

roughness scattering sr significantly affects the inversion layer mobility. This is described as follows [9]:

sr (E ) =

2 ,

E

(16)

condition, and the initial value of is = 6 1014 V/s.

We consider the decrease of surface roughness scattering of CC-NMOS by specifying the sr of Eq. (12) and

include the velocity-overshoot effect of strained-Si and

dependence on Ge concentration [10].

For the above carrier-mobility model, we arranged the

optimized results for the model fitting parameters in Table 1 for electrons and holes.

In order to obtain self-consistent QM solutions, we employed an iterative procedure [11]. We start out by calculating the electric potential. Next, the program calculates a charge distribution by using an iteration scheme.

Thereafter, the program determines self-consistent solutions of Poisson-Schrodinger and current equations [11].

The Newton method has been employed, called the conjugate gradient method, with a constraint that should

satisfy error criteria as outlined in [12]. The discretization of main equations is performed through a boxintegration method to apply the finite-difference method.

-S560-

work.

Fig. 3. Comparison of band lineups of CC and DG-NMOS

for Lg = 30 nm, Vd = 0.1 V, and Vg = 1.5 V.

is demonstrated in Figure 1.

Figure 2 schematically shows the CC-NMOS considered in this work. Two metal gates with gate length

Lg and work function M = 4.1 eV are located symmetrically on both sides of Si1x Gex /Si/Si1x Gex heterostructure. The source and drain regions are modeled

as ohmic contacts with a doping of 2 1020 /cm3 , and

the channel region under the gate is undoped. The Si,

Parameter

Electrons

Holes

Units

0

52.2

44.9

cm2 /Vs

max

1417

470.5

cm2 /Vs

2

1 43.4

29.0

cm /Vs

16

Cr

9.68 10

2.23 1017

cm3

20

20

Cs

3.43 10

6.10 10

cm3

0.680

0.719

2.00

2.00

2.5

2.2

7

7

B

4.75 10

9.93 10

cm/s

C

1.74105 N0.125

8.84105 N0.125

NA in cm3

A

N

5.82 1014

2.05 1014

From Ref. 7

and 2 nm, respectively, wherein Lg varies from 10 nm to

80 nm.

In this work, we confirmed the CC operation, the enhancement of drive current and Gm , and short-channel

effects (SCE) of the proposed CC-NMOS structure.

First, we confirmed the CC operation of CC-NMOS

through the band lineups, lowest-energy wave function,

and electron density. Figure 3 shows a comparison of

conduction-band lineups of CC and DG-NMOS with Lg

= 30 nm, Vd = 0.1 V, and Vg = 1.5 V. From this

result, we understand the difference of band offsets in

CC and DG-NMOS, the formation of a quantum well of

CC-NMOS from Si1x Gex /Si/Si1x Gex heterostructure,

and corresponding CC operation. The lowest-energy

wave function of CC-NMOS is compared with that of

DG-NMOS in Figure 4 at the condition of Lg = 30 nm,

Vd = 0.1 V, and Vg = 1.5 V. Contrary to DG-NMOS,

the wave function of CC-NMOS is confined to the center of the channel, meaning CC operation. Figure 5

and DG-NMOS for Lg = 30 nm, Vd = 0.1 V.

-S561-

Fig. 6. Comparison of electron density of CC and DGNMOS for Lg = 30 nm, Vd = 0.1 V, and Vg = 1.0 V.

= 30 nm, Vd = 0.1 V.

0.1 V, and Vg = 1.0 V. (a) DG-NMOS, (b) CC-NMOS.

Fig. 8. Gm characteristics of CC and DG-NMOS for Lg =

30 nm, Vd = 0.1 V.

Vd = 0.1 V, and Vg = 1.0 V: (a) DG-NMOS, (b) CCNMOS. The electron density of DG-NMOS shows peak

values at both sides of the channel. On the other hand,

the electrons of CC-NMOS are confined at the center of

Si1x Gex /Si/Si1x Gex heterostructure, definitely show-

densities as seen for a cut through the Si channel of CC

and DG-NMOS are compared in Figure 6. These results

visibly show the different shapes of the channels in CC

-S562-

80 nm, Vd = 0.1 V.

Lg .

acteristics are demonstrated in Figure 11. From these results, we confirmed that both CC and DG-NMOS show

excellent subthreshold behaviors and successfully suppress the SCE.

IV. CONCLUSION

terms of Lg at Vd = 0.1 V.

and DG-NMOS.

Figure 7 demonstrates a comparison of current-voltage

(Id -Vg ) characteristics of CC and DG-NMOS at the condition of Lg = 30 nm and Vd = 0.1 V. This simulation result shows enhancement of about 1.6x for current drive.

The transconductances (Gm ) of CC and DG-NMOS are

compared in Figure 8. The Gm of CC-NMOS increases

by about 60 % compared with that of DG-NMOS, showing Gm = 1428.3 S/m for CC-NMOS, and Gm = 891.3

S/m for DG-NMOS. This is due to enhancement of carrier mobility caused by the strained-Si and a decrease of

surface roughness scattering.

Finally, we estimated the SCE of CC and DG-NMOS

by performing a simulation with respect to Lg . Figure 9

shows the Id -Vg curves for CC-NMOS, produced under

the condition of Lg varying from 10 nm to 80 nm at Vd =

0.1 V. As Lg decreases, the short-channel behavior visibly comes in to sight. Therefore, we analyzed the SCE in

terms of subthreshold swing, threshold voltage (Vt ) rolloff, and drain-induced barrier lowering (DIBL). Figure

10 shows the subthreshold-swing of CC and DG-NMOS

in terms of Lg at Vd = 0.1 V. Vt roll-off and DIBL char-

In this paper, we report our two-dimensional numerical modeling and simulation results for center-channel

(CC) double-gate (DG) MOSFET in comparison with

those for conventional DG structure. CC operation of

CC-NMOS is confirmed by band lineups, lowest energy

wave function, and electron density. The simulation results also reveal that current drive and transconductance

are remarkably enhanced and short-channel effects are

appreciably suppressed. Our simulation results imply

that CC-NMOS structure is a promising candidate for

implementing sub-20 nm MOSFETs.

ACKNOWLEDGMENTS

This work was supported by the Research Program of

Inha University.

REFERENCES

[1] T. Krishnamohan, C. Jungemann and K. C. Saraswat,

in SISPAD Tech. Dig. (Munich, Sep., 2004), p. 191.

[2] A. Svizhenko, M. P. Anantram, T. R. Govindan and B.

Biegel, J. Appl. Phys. 91, 2343 (2002).

[3] S. H. Jin, Y. J. Park and H. S. Min, J. Korean Phys.

Soc. 44, 87 (2004).

[4] K. Kim, O. Kwon, J. Seo and T. Won, J. Korean Phys.

Soc. 45, 1384 (2004).

[5] A. Trellakis and A. T. Galick, J. Appl. Phys. 81, 7880

(1997).

[6] I. H. Cho, B. G. Park, J. D. Lee and J. H. Lee, J. Korean

Phys. Soc. 42, 233 (2003).

[7] G. Masetti, M. Severi and S. Solmi, IEEE Trans. Electron Devices. 30, 764 (1983).

[8] C. T. Sah, T. H. Ning and L. L. Tschopp, Surface Science. 32, 561 (1972).

[9] C. Lombardi, S. Manzini, A. Saporito and M. Vanzi,

IEEE Trans. Computer-Aided Design, 7, 1164 (1988).

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Devices 50, 278 (2003).

[11] M. Sabathil, S. Hackenbuchner, J. A. Majewski, G. Zandler and P. Vogl, J. Computat. Electron 1, 81 (2002).

[12] S. E. Laux, A. Kumar and M. V. Fischetti, in IEDM

Tech. Dig. (San Francisco, Dec., 2002), p. 715.

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