IDEAS FOR DESIGN

Circle 521

Robust, Low-Cost Continuous

Phase FSK Modulator
EDUARD BERTRAN
Universitat Politecnica de Catalunya, Dept. of Signal Theory and
Communications, C/Jordi Girona, 1-3, 08034-Barcelona, Spain;
phone: +34 3 4017074; fax: +34 3 4015910; e-mail: tsceba@eupbl.upc.es.

n bandpass data transmission, one

common way to design low-cost
frequency-shift-keying (FSK) analog modulators is to use two independent oscillators that have outputs
switched according to the binary input wave to be modulated. While this
approach is simple, phase discontinuities during oscillator switching unnecessarily increases the bandwidth
of the modulated signal. On the other
hand, any any solution based on the
synchronization of the oscillator increases the modulator cost.
A well-known alternative is the
use of classical oscillators such as opamp or transistor-based astables,
CMOS oscillators, or linear oscillators (e.g., the Wien oscillator), where
a capacitor value is switched under
the control of the binary wave. Because the capacitor voltage cant
change instantaneously, the result is
a continuous phase FSK (CPFSK).

Filter
+
KD

K0
S
(a)

VCO

Vo

Bit stream

(b)

2. In this simplified X model of a PLL with zero input (a), the change of conversion gain is
similar to having an offset in the phase-detector model output (b).

+
To VCO

ELECTRONIC DESIGN / JANUARY 12, 1998

152

KD

VCC

Vin

From
VCO

Ibias

Bit stream

Phase detector
(linear model)

Qo

1. This double-balanced mixer is based on a constant-current source for a differential amplifier.

Another common solution involves

the direct use of a VCO.
In both of these alternative cases,
the design is very sensitive to powersupply variations and the tolerances
among the ICs fabrication series or
manufacturers. This sensitivity could
be negligible in small production
runs, but leads to problems in large
factory productions of FSK modulators, which are usually solved by
adding some adjustable circuit component. Apart from the augmented
production cost due to this adjustment, experience shows that the adjustment margin can be different if
the oscillators IC is purchased from
different manufacturers.
Shown here is a phase-locked loop
(PLL) based alternative for CPFSK
generation. It exploits the low sensitivity (or robustness) of the set composed
of the phase detector and VCO with re-

IDEAS FOR DESIGN

+5 V

Bit stream
In
13

R1
6.8k

14
2
4016

R2
2.7k
1
4.7k

5 V
4.7k

16

15

14

13
NE564

12

11

10

NC
NC
NC

CO
1 nF
2k

1k

2.2k
FSK out

3. Based on the NE564 analog PLL, this circuit generates continuous-phase FSK signals.

ELECTRONIC DESIGN / JANUARY 12, 1998

spect to certain parameter variations,

mainly in the lower part of its frequency band (compared with the sensitivity of other solutions, such as the direct use of the VCO). However, the
main problem in using a PLL for FSK
generation is that the PLL input is designed for sinusoidal waves, not for the
bit stream to be FSK-modulated.
The proposed solution benefits
from the double-balanced mixer commonly used as a phase detector in PLL
circuits. This mixer is based on a con-

154

stant-current source for a differential

amplifier (Fig. 1). By externally sinking or sourcing bias current at the
transistor Q0, which acts as the current source, the conversion gain (KD)
of the phase detector is changed. In a
simplified X model of the PLL (Fig.
2a) with zero input (regulation model),
the change of conversion gain is similar to having an offset in the output of
the phase-detector model (Fig. 2b).
This offset modifies the voltage input
of the VCO of the PLL, so the VCO

output frequency is varied under the

control of the bit stream applied to the
current source. This structure is similar to some phase-lock angle modulators. However, in the proposed idea,
its unnecessary to break the PLL
with additional circuitry in order to introduce the modulating signal, hence a
single analog PLL can be used.
Figure 3 illustrates a circuit based
on the analog phase-locked loop
NE564. The IC 4016 is a switch controlled by the binary signal to be FSKmodulated, which commutes the voltage at pin 2 of th NE564 between
ground and 5 V 2700/(2700 +
6800) = 1.42 V. This voltage at pin 2
modifies the current bias of the current
source in the phase detector, and consequently the VCO output frequency
varies without phase discontinuities.
The VCO center frequency is fixed by
C0, and the margin between the two
FSK frequencies is adjusted by R1 and
R2. For an FSK modulator with frequencies of 390 kHz for MARK and
560 kHz for SPACE, the component
values are as shown in Figure 3.
In this design, the classical PLL
low-pass filter has not been included,
as its presence is unnecessary for
FSK generation. In addition, the filter increases the transfer function
sensitivity with respect to the VCO
parameters.