Warsaw University of Technology

Faculty of Electrical Engineering

Institute of Control and Industrial Electronics

Ph.D. Thesis

M. Sc. Mariusz Cichowlas

Thesis supervisor
Prof. Dr Sc. Marian P. Ka mierkowski

Warsaw, Poland 2004

-1-

The work presented in this thesis was carried out during my Ph.D. studies at the Institute of
Control and Industrial Electronics at the Warsaw University of Technology. Some parts of the
work were realized in cooperation with University of Aalborg, Denmark (International
Danfoss Professor Programme Prof. Frede Blaabjerg),
First of all, I would like to thank Prof. Marian P. Ka mierkowski for continuous support, help
and friendly atmosphere. His precious advice and numerous discussions enhanced my
knowledge and scientific inspiration.
I am grateful to Prof. Stanisaw Pirg from the AGH University of Science and Technology,
Cracow and Prof. Wodzimierz Koczara from the Warsaw University of Technology for their
interest in this work and holding the post of referee.
Furthermore, I thank my colleagues from the Intelligent Control Group in Power Electronics
for their support and friendly atmosphere. Specially, to Dr. D.L. Sobczuk and Dr. M.
Malinowski for his support for my education.
Finally, I would like to thank my whole family, particularly my wife Kinga and son Kuba for
theirs love and patience.

-2-

Table of Contents
1. Introduction

2. Front-end Rectifiers for Adjustable Speed AC Drives

14

2.1 Introduction

14

2.2 Adjustable Speed AC Drives

14

2.3 Drive System Configurations

15

2.4 Diode rectifiers

16

2.5 Harmonic Limitations

24

2.6 Conclusions

27

3. Basic Theory of PWM Rectifier

28

3.1 Operation of the PWM Rectifier

28

3.2 Mathematical description of PWM Rectifier

33

3.3 Block diagram of PWM rectifier

35

3.4 Operating limits

37

4. Introduction to Active Filtering

39

4.1 Basic configuration

40

4.2 Control of Shunt Active Filters

40

4.3 Types of Harmonic Sources

42

4.4 Analysis of Shunt Active Filter (SAF) Operation with Different Harmonic
Sources

44

4.5 Conclusions

47

5. PWM Rectifier with Active Filtering Function

49

5.1. Introduction

49

5.2. Control Methods of PWM Rectifier

50

6. Dimensioning of Power Converters

64

6.1 PWM Rectifier rating

65

6.2. Shunt Active Power Filter (SAF) Rating

68

6.3. PWM Rectifier with Active Filtering Function Rating

71

6.4 Design of Passive Components

73

-3-

6.5 Conclusions

78

7. Simulation and Experimental Results

79

7.1 Voltage Oriented Control (VOC)

81

7.2 Virtual Flux Based Direct Power Control (VF-DPC SVM)

86

7.3 Summary and Comparison of Compensating Results

90

7.4 Rectifying and Regenerative Mode of PWM Rectifier Operation

92

7.5 Typical Grid Voltage Distortion

95

7.6 Influence of Passive Components, DC-link Voltage and Converter Power

Variations

100

7.7 Discussion on Digital Signal Processor Implementation

102

7.8 Conclusions

104

8. Summary and Closing Remarks

107

Appendix

109

A.1 Harmonics

143

A.2 Basic Harmonic Distortion in Power System

108

A.3 Instantaneous decomposition of powers

110

A.4 Simulations and Experimental environments

115

A.5 Review and design of Current and Power Controllers

120

References

147

-4-

List of symbols
Symbols

phase angle of reference vector

power factor

phase angle of current

angular frequency

phase angle

control phase angle

cos -

fundamental power factor

frequency

i(t), i

instantaneous current

kP, kI

proportional control part, integral control part

instantaneous time

v(t), v -

instantaneous voltage

S virtual line flux vector

S virtual line flux vector components in the stationary , coordinates
S virtual line flux vector components in the stationary , coordinates
Sd virtual line flux vector components in the synchronous d, q coordinates
Sq virtual line flux vector components in the synchronous d, q coordinates
uS line voltage vector
uS line voltage vector components in the stationary , coordinates
uS line voltage vector components in the stationary , coordinates
uSd line voltage vector components in the synchronous d, q coordinates
uSq line voltage vector components in the synchronous d, q coordinates
iS line current vector
iS line current vector components in the stationary , coordinates
iS line current vector components in the stationary , coordinates
iSd line current vector components in the synchronous d, q coordinates
iSq line current vector components in the synchronous d, q coordinates

-5-

uC converter voltage vector

uC converter voltage vector components in the stationary , coordinates
uC converter voltage vector components in the stationary , coordinates
uCd converter voltage vector components in the synchronous d, q coordinates
uCq converter voltage vector components in the synchronous d, q coordinates
iC converter current vector
iC converter current vector components in the stationary , coordinates
iC converter current vector components in the stationary , coordinates
iCd converter current vector components in the synchronous d, q coordinates
iCq converter current vector components in the synchronous d, q coordinates
iL nonlinear load current vector
iL nonlinear load current vector components in the stationary , coordinates
iL nonlinear load current vector components in the stationary , coordinates
iLd nonlinear load current vector components in the synchronous d, q coordinates
iLq nonlinear load current vector components in the synchronous d, q coordinates
udc

DC link voltage

idc

DC link current

Ldc-

DC link inductor

Sa, Sb, Sc

switching state of the converter

capacitance

root mean square value of current

inductance

resistance

apparent power

time period

active power

reactive power

Z-

impedance

p,q-

instantaneous active and reactive power

pref, qref -

reference values of instantaneous active and reactive powers

pA, qA -

nonlinear load instantaneous active and reactive powers

pA, qA -

alternated values of instantaneous active and reactive power

-6-

Subscripts
..a, ..b, ..c -

phases of three-phase system

..d, ..q -

direct and quadrature component

..+, -, 0 -

positive, negative and zero sequence component

.., .., ..0

alpha, beta components and zero sequence component

..h

harmonic order of current and voltage, harmonic component

..n

harmonic order

..max -

maximum

..min -

minimum

..LL -

line to line

..Load -

load

..ref -

reference

..m -

amplitude

..rms -

root mean square value

Abbreviations
APF

Active Power Filter

AFF

Active Filtering Function

ANN

Artificial Neural Network

ASD

Adjustable Speed Drives

DPC

Direct Power Control

DSP

Digital Signal Processor

HPF

High Pass Filter

LPF

Low Pass Filter

EMI

Electro-Magnetic Interference

IGBT

Insulated Gate Bipolar Transistor

PCC

Point Of Common Coupling

PFC

Power Factor Correction

PI

Proportional Integral (Controller)

PLL

Phase Locked Loop

PWM

Pulse-Width Modulation

REC

Rectifier

SVM

Space Vector Modulation

THD

Total Harmonic Distortion

-7-

UPF

Unity Power Factor

VF

Virtual Flux

VF-DPC

Virtual Flux Based Direct Power Control

VSI

Voltage Source Inverter

Basic Definitions
Harmonic Distortion

HD =

n 100%
1

X1 RMS value of first harmonic of voltage or current

Xn RMS value of n harmonic of voltage or current
Total Harmonic Distortion
THD = n > 1
X
1

X2
n

100%

X1 RMS value of first harmonic of voltage or current

Xn RMS value of n harmonic of voltage or current
Power Factor
PF =

I1
cos
I

Partial Weighted Harmonic Distortion

h =14

PWHD =

hI h2

I1

100%

Harmonic Constant

HC =

h=2

h 2 I h2

I1

100%

Remark: Please note that literature is numbered using [x,y] nomenclature, where x denotes a
topic and y number of paper

-8-

1. Introduction
Modern electric devices are usually fed by diode or thyristors front-ends. Such equipment
generates higher harmonics into a grid. Nowdays those problems are going more and more
serious. Grids disturbances may result in malfunction or damage of electrical devices.
Therefore, currently many methods for elimination of harmonic pollution in the power system
are developed and investigated.
Restrictions on current and voltage harmonics maintained in many countries through IEEE
519-1992 in the USA and IEC 61000-3-2/IEC 61000-3-4 in Europe standards, are associated
with the popular idea of clean power.
Harmonic reduction techniques can be divided as shown in Fig. 1.1, where two main groups
can be seen:
-

devices for cancellation of existing harmonics,

grid friendly devices, which do not generate (or generate limited number) harmonics.

Fig. 1.1 Most popular current harmonic reduction techniques in three-phase networks

-9-

The classical method of current harmonic reduction uses passive LC filters (Fig.1.2) [7, 10.5,
10.7]. They are usually constructed as capacitors and inductors series or parallel-connected to
the grid. Each harmonic (5th, 7th, 11th, 13th) requires its own passive filter (see Fig. 1.2). This
means that filters can not be designed in a general way but must be designed according to
each application. Such a solution has advantages of simplicity and low cost. However, among
disadvantages are:
A passive filters are designed for a particular application (size and placement of the
filters elements, risk of resonance problems),
high power losses as a result of high fundamental current,
passive filters are heavy and bulky.

5th

7th

11th

13th

Fig. 1.2. LC passive filters

The simpler way to harmonic reduction of diode rectifier currents are additional series
inductors used in the input or output of rectifier (typical per unit value is 1-5%) (see Chapter
2).
Other technique, based on mixing single and three-phase (Fig. 1.3a) non-linear loads [7.7,
10.2], gives a reduced THD because the 5th and 7th harmonic current of a single-phase diode
rectifier often are in counter-phase with the 5th and 7th harmonic current of a three-phase diode
rectifier. Simulated input current waveform is presented in Fig. 1.3 b.

- 10 -

Fig. 1.3. Mixed single and three-phase nonlinear loads and typical line current waveforms

The multipulse rectifier [3] gives another possibility to decrease current harmonics content.
Although it is easy to implement, it possess several disadvantages such as: bulky and heavy
transformer, higher voltage drop, and higher harmonic currents at non-symmetrical load or
line voltage conditions.
6-pulse rectifier

24-pulse rectifier

12-pulse rectifier

Y
Y

Fig. 1.4. Basic schemes and typical line current waveforms of multipulse rectifiers

A modern alternative to the passive filter is application of the Shunt Active Filters (SAF) [5,
7, 8], which, thanks to used closed feedback loops, gives better dynamics and control of
harmonic as well as fundamental currents. Active filters are generally divided into two

- 11 -

groups: the active shunt filter (current filtering) (Fig. 1.5) and the active series filter (voltage
filtering).
uS

iL

iS

iC

Non-linear
load

APF
L

Fig. 1.5. Three-phase shunt active filter together with non-linear load

The three-phase (two-level) shunt SAF consists of voltage source bridge converter. This
topology is identical to the PWM inverter. SAF represents a controlled current source iC
which added to the load current iL yields sinusoidal line current iS and provide:
harmonic compensation (much effectives than passive filters).
compensation of fundamental reactive components of load current,
load symetrization (from grid point of view),
Parallely to excellent performance, SAF possess few disadvantages as: complex control
strategy, switching losses and EMC problems. Therefore, inclusion of a small LC or LCL
passive filter between the grid and the SAF is necessary.

uS

Load
Fig.1.6 PWM Rectifier

The other possible reduction technique of current harmonic is application of PWM Rectifier
(Fig. 1.6). Two types of PWM converters, with a voltage source output [4] (Fig. 1.7a) and a
current source output (Fig. 1.7b) can be used. First of them called a boost rectifier (increases
the voltage) operates at fixed DC voltage polarity, and the second, called a buck rectifier
(reduces the voltage) operates with fixed DC current flow.

- 12 -

a)

b)
iload

uLa
uLb
u Lc

ia

Ui

iload Ldc

ib

uLa

Udc

ic

3xL

uLb
uLc

ia
ib

Udc

ic

3xL
3xC

Fig. 1.7 Basic topology of PWM rectifier a) boost with voltage output, b) buck with current output
Among the main features of PWM rectifiers are:

bi-directional power flow,

nearly sinusoidal input current,

regulation of input power factor to unity,

low harmonic distortion of line current (THD below 5%),

adjustment and stabilization of DC-link voltage (or current),

reduced capacitor (or inductor) size due to the continues current.

Furthermore, it can be properly operated under line voltage distortion and notching, and line
voltage frequency variations.
This thesis is devoted to investigation of two different control strategies for boost type of
three-phase bridge PWM rectifiers. A well-known method based on current vector orientation
with respect to the line voltage vector (Voltage Oriented Control - VOC) is compared with
control strategy based on instantaneous direct active and reactive power control based on
virtual flux estimation called Virtual Flux based Direct Power Control (VF-DPC).
Additionally, in both control strategies an Active Filtering Function is applied.
Therefore, the following thesis can be formulated:
Application of Active Filtering Function to PWM Rectifier control strategy provides
more efficient utilization of power electronics equipment and leads to neutralization of
harmonics generated by other nonlinear loads. Thus, it improves the line current and
voltage at the point of common coupling (PCC).

- 13 -

In order to prove the above thesis, the author used an analytical and simulation based
approach, as well as experimental verification on the laboratory setup with a 5kVA IGBT
converter. In the analytical approach mathematical description based on space vector are
applied. The following simplifications were assumed when formulated simulation models:

power transistors were considered as ideal switches, however, the voltage drop has
been taken into account,

power diodes were idealized,

models of passive components included inductance with resistance and capacitance

with resistance.

The thesis deals with analysis and comparative study of different control strategies for PWM
Rectifiers having Active Filtering Function (AFF). At legating a general information
regarding diode rectifiers, to well understand and recognition of harmonics problems
generated by them are presented and discussed. Two different control schemes for PWM
Rectifiers and three different methods for elimination of current harmonics are presented.
Additionally, information concerning design of current and power controllers, selection of
passive components and power converter rating calculation are considered. The PhD thesis
consists of 8 chapters
The first Chapter Introduction gives short overview of harmonic reduction techniques and
formulates main goals of the thesis. The second one Front-end Rectifiers for Adjustable
Speed Drives deals with requirements for diode rectifier, which are most common used in
inverter fed adjustable speed drives. Several models of diode rectifiers with different AC and
DC side filters are presented, as well as information about current harmonics generated by
such a rectifiers. Additionally, requirements for passive elements of diode rectifiers are
presented. Finally, international norms devoted to harmonics pollution in the grid are
included. The third chapter titled Basic Theory of PWM Rectifier consists of theoretical
information, mathematical models, basic requirements and limitations for PWM rectifiers.
The fourth chapter Introduction to Active Filtering describes basic principles of parallel
active power filters, principles of shunt active filters for current and voltage harmonics
sources. The fifth chapter PWM Rectifier with Active Filtering Function presents and
investigates, an interesting opportunity for PWM rectifier filtering function. It is a result of
conjunction a PWM rectifier and Active Power Filter. Both of them has the same power
circuit, as well as a control strategies are very similar, therefore such equipment can be
interesting alternative for expensive active filtering units. Two different control strategies are
described: VOC (Voltage Oriented Control) with two different methods of compensation
- 14 -

higher current harmonics and VF-DPC (Virtual Flux based Direct Power Control). Very
important chapter sixth Dimensioning of Power Converters deals with dimensioning of
power converter, taking into account a parameters like: demanded active power of DC load,
input filter inductance, reactive and harmonics power intended to compensation. Additionally,
requirements for passive elements of power converters are presented. The chapter sevenths
entitled Simulation and Experimental Results presents simulation models developed in
thesis and selected waveforms which show operation of investigated control algorithms. Also,
comparative study of Voltage Oriented Control (VOC) versus Direct Power Control (DPC) is
presented. The last chapter eight Summary and Closing Conclusions gives general
overview and final conclusions on discussed topic. Several information, devoted to harmonic
distortion in power system, instantaneous decomposition of powers according to different
authors like: Peng, Akagi, etc. are presented in Appendix A.2. Additionally, general
information

concerning

simulation

models,

used

simulation

packages

(SABER,

MATLAB/SIMULINK, PLECS) and laboratory setup are given in Appendix A.4. Also,
Appendix A.5 presents design algorithms for current (for VOC) and power (for VF-DPC), PI
type regulators. An Artificial Neural Network based, resonant current controllers as well as
delta modulation and hysteresies controllers are presented.
In the authors opinion the following parts of the thesis represent his original
contributions:

elaboration of Virtual Flux based Direct Power Control for PWM rectifiers with Active
Filtering Function control strategy (Chapter 5),
elaboration of methodology for converter power ratio calculations depending on
application PWM Rectifier, Active Power Filter, PWM Rectifier with Active Filtering
Function (Chapter 6),
development of two simulation algorithms in Matlab/Simulink and SABER with control
algorithm in C language for investigation of proposed solutions (Appendix A.4),
implementation and investigation of various closed-loop control strategies for PWM
rectifiers: Virtual Flux Based Direct Power Control (VF -DPC), Voltage Oriented
Control (VOC), as well as open loop and closed loop control strategies for PWM Rectifier
with Active Filtering Function ,
practical verification on the experimental setup based on a mixed RISC/DSP (PowerPC
604/TMS320F240) digital controller.

- 15 -

2. Front-end Rectifiers for Adjustable Speed AC Drives

2.1 Introduction
Voltage source inverters (VSI) fed adjustable speed drives (ASD) are frequently used in
industry, especially in energy saving applications. In the conventional solution the inverter is
fed by a diode or thyristor rectifier [7.8] with a large DC link capacitor. Such a rectifier takes
a high distorted AC-grid current. Frequent use of such rectifiers as ASD front-ends has
resulted in serious utility problems like current and voltage harmonics, reactive power,
voltage notches, etc. Voltage harmonics due to current harmonics becomes the main problem
for utility.
A usual way to reduce high current harmonics is application of a DC or AC-side inductors.
Compared to DC-sided smoothing inductor, an AC-side inductor creates an electrical distance
between grid and a drive. However, the AC-inductor is a source of additional losses, has a
meaningful dimension and determines an additional cost. Fig. 2.1 shows scheme of utility
interface for converter-fed drives [7.1]. These solutions do not provide recommended IEEE
519 harmonic standards, which require voltage distortion limitation at utility-customer point
of common coupling (PCC). IEEE 519 is a justification for using of power quality
compensators.

VS
Motor

PCC AC side filter

Diode rectifier

DC side filter

Inverter

Fig. 2. 1 Converter-Fed adjustable drives utility interface typical scheme

2.2 Adjustable Speed AC Drives

The ASDs input current characteristics depend on: drive type, its load, and the characteristics
of the supplying system [7.4, 7.5]. The input currents harmonic distortion can vary over a
wide range. However, for purposes of analysis it is possible to identify two basic waveform
types as bellow [11].

- 16 -

TYPE 1: Discontinuous mode - High Distortion Current Waveform.

This is a representation of all ASDs that have voltage source inverters without an additional
inductor for current smoothing (Fig. 2.3a). The total harmonic current distortion can be over
80%. Actually, it can be higher for small drives but waveform of Fig. 2.3b is a good
representation for larger drives or groups of smaller drives.
TYPE 2: Continuous mode - Low Distortion Current Waveform.

This mode represents behavior of DC drives, large AC drives with current source inverters,
and smaller AC drives with voltage source inverters and added inductor for current smoothing
(Fig. 2.4a). The typical waveform of Fig. 2.4b has a THD level of 30%, which is obtained for
an AC drive with a 5% inductor.
The significant harmonic reduction is obtained for ASDs just by adding an inductor at the
rectifier input. Fig. 2.5 illustrates the effect of AC-side inductance size on input current
distortion. It is possible to include this inductance in the DC link of the drive, providing the
same harmonic current reduction benefit.

2.3 Drive system configurations

"#$#%&'(
"#$#%&'(
A DC-side inductor can be added to a three-phase rectifier (Fig. 2.2) for harmonic reduction.
With the dc inductor of a sufficient amount, the input current becomes a square waveform. By
adding an infinite dc inductor, a perfect square waveform can be obtained. However, a perfect
square waveform will have difficulties to meet the individual limits for higher order
harmonics.
VS
Motor

Fig. 2.2. Diode rectifier with DC side capacitor and inductor.

Input current THD=60%-130%

- 17 -

"#$#" &'

'((
'

Another solution is to add a series AC-side inductor or passive filter to remove individual
harmonics. Fig. 2.3 shows the circuit arrangement with a LC filter in front of the rectifier
together with a DC-side inductor. Generally, such a LC filter can be tuned to the 5th or 7th
harmonic because they are most important. Once the 5th harmonic is cancelled, rest of
harmonics can also be reduced significantly in the same way.
VS
Motor

Fig. 2.3. Diode rectifier with DC side capacitor and inductor filter and AC side inductor. Input current
THD=30%-40%

Fig. 2.4 compares harmonic contents for different DC-side inductors. The three-phase diode
rectifier generates about 70-percent 5th harmonic. After adding 1% and 5% DC-side inductor,
the 5th harmonic content is reduced to 35% and 25%, respectively. Therefore, an individual
harmonic filter in addition to the DC-side inductor is necessary to meet IEC 1000-3-4
standards.
80

T h re e p h a s e re c tifie r
1 % D C in d u c to r
5 % D C in d u c to r
IE C 1 0 0 0 -3 -4 S ta n d a rd

HD [%]

60

40

20

0
5

11

13

15

17

19

H a rm o n ic n u m b e r

Fig. 2.4. Comparison between different three-phase built-in passive compensation results and IEEE
standard

- 18 -

2.4 Diode rectifiers

"#)#%# *

&'((
&'

The idealized model of three-phase diode rectifier with infinite DC-side inductor is presented
in Fig. 2.5a.
a)

b)
uA

uB

uC

LDC

L
o
a
d

iA
1/6

5/6

Fig. 2.5 Ideal three phase rectifier with infinite DC-side inductor Ldc and no grid impedance (a),
Voltages and currents of idealized three phase rectifier (b).

The idealized rectifiers current assumed to be smooth on the DC-side (infinite LDC) and, for
neglected commutation effects (LS=0), occurs an ideal square. As shown o Fig. 2.5b the
current changes instantaneously from zero to a finite value. Every phase is conducting only
during 2/3 of the period. The input diode rectifier current can be described in following form:
5
0 < t <
6
5
1
I0 < t <
6
6
1
1
isa (t ) =
0 < t <
6
6
1
5
I0
< t <
6
6
5
0
< t <
6

(2.1)

The idealized input current can be also expressed by Fourier series as:
isa (t ) =

3 4I0
1
1
1
1
(sin t + sin 5 t sin 7 t + sin11 t sin13 t + ....)
2
5
7
11
13

(2.2)

There is no triple harmonics, because considered three-phase system operates without neutral
wire. The idealized three-phase diode rectifier has THD=31.1%. Equations (2.6a) and (2.6b)

- 19 -

can be used to determine the order and magnitude of the harmonic currents drawn by a sixpulse diode rectifier:
h = 6k 1

(2.3a)

k = 1, 2, 3.

Ih
= 1/ h
I1

(2.3b)

Thus, the higher harmonic orders are: 5th, 7th, 11th, 13

th

etc., with a 50 Hz fundamental

frequency, that corresponds to 250, 350, 550 and 650 Hz, respectively. The per unit
magnitude of the harmonics of the fundamental is the reciprocal of the harmonic order: 20%
for the 5th, 14,3% for the 7th, etc. Eqs. (2.1)-(2.2) are calculated from the Fourier series for
ideal square wave current (critical assumption for infinite inductance on the input of the
converter). Equation (2.1) is fairly good description of the harmonic orders generally
encountered. The magnitude of actual harmonic currents often differs from the relationship
described in (2.2). The shape of the AC current depends on the input inductance of converter.
The ripple current is proportional to 1/L times the integral of the DC ripple voltage and
inverse proportional to LDC inductance.

iripple =

1
U DC dt
L

(2.4)

"#)#" *

&'((
&'

A diode rectifier with DC-side smoothing capacitor is common used front-end rectifier in
industry. Its construction is very cheap and compact, however from the grid point of view it
has the worst behavior.
a)

b)

L
o
a
d

Fig. 2. 6. Three-phase rectifier with smoothing DC side capacitor a) circuit, b) typical waveforms

- 20 -

The idealized model of three-phase diode rectifier with DC-side capacitor is presented in Fig.
2.6a. Typical input current waveform presents Fig. 2.6b, and as shown it contains high
number of higher harmonics and the THD is over 80%.

"#)#$ *

'((
'

&'((
&'

The idealized model of three-phase diode rectifier with AC-side inductor and DC-side
capacitor is presented in Fig. 2.7a [10.5, 10.6, 10.8]. Typical input current waveforms are
presented in Fig. 2.7b and 2.7c with 1% and 5% AC-side inductor, respectively. It can be seen
that, an input current of Fig. 2.7c consists less higher harmonics and has lower THD
compared with current of Fig. 2.7b.

Fig. 2.7. Diode rectifier with AC-side inductors (a) and typical for 1% and 5% inductor (b).

- 21 -

Input current THD [%]

80

70

60

50

40

30
0

Choke inductance [%]

Fig. 2.8. Effect of input inductance on ASDs input current distortion

Fig. 2.8 presents effect of input inductor on input current THD. The input current THD
decrease with increasing value of input inductance. Therefore, such a solution partially solves
a harmonic problem. However, application of input inductance generates some additional
problems. One of them is the phase shift between fundamental harmonics of gridvoltage and
input current, which is very important parameter determining the reactive power level. Fig.
2.9 shows that it strongly depends and increases in case of increasing input inductance or load

Phase shift between first harmonics

of line voltage and input current [deg]

power.
-1 0

-1 5

-2 0

-2 5
0

12

16

20

in p u t in d u cta n c e [m H ]
i D C [A ]

Fig. 2.9. Phase shift between first harmonics of grid voltage and input current versus AC-side
inductance or load power.

- 22 -

Fig. 2.10 presents simulated waveforms for diode rectifier with AC-side inductance and DCside capacitance for two different load conditions. The decreasing amplitude and phase shift is
present in case of increasing load conditions. That gives an additional reactive power taken by
the converter.

Fig. 2.10. Typical input current waveforms for two different DC-side currents: Idc=3A (blue),
Idc=15A (green)

Applied input inductance value has an additional effect on a diode rectifier operation [9].
Adoption of it, besides of decreasing of harmonic distortion and increasing of reactive power
determine of decreasing of

Fig. 2.11.

i
parameter.
t

i
parameter of diode rectifier input current versus input inductance value
t
a) LL=10mH, b) LL=1mH

- 23 -

As shown in Fig. 2.11 an input inductance value has a great influence on

i
parameter of
t

diode rectifier grid current. A large value of input inductance decrease significantly of

i
t

parameter.
Additional input inductance is the simplest method to reduce grid current harmonics
generated by diode rectifiers feded adjustable speed drives (ASD) converters.
Summarizing, the input inductor has following impact on diode rectifier operation:

Significantly reduce a grid current THD,

Decrease a

Increase reactive power value taken by the converter,

A source of additional voltage drop.

i
parameter,
t

"#)#)
Diode rectifier with DC-side capacitance
180

Grid current THD [%]

160

140

120

100

80
0

200

400

600

800

1000

DC-link capacitance [uF]

Fig. 2.12. Grid current THD versus DC-link capacitance

Fig. 2.12 shows the grid current THD versus DC-link capacitance. A large value of
capacitance provide more smooth shape of DC-link voltage, however a grid current will have
higher amplitude. That significantly increase a grid current THD.

- 24 -

Diode rectifier with DC-side capacitance and inductance

a)

b)

43

38

42

Grid current THD [%]

Line current THD [%]

36

41

40

39

38

34

32

30

37
0

200

400

600

800

10

1000

20

30

40

50

DC-link inductance [mH]

DC-link capacitance [uF]

Fig. 2.13. a) Grid current THD versus DC-link capacitance, b) Grid current THD versus DC-link
inductance

In this situation a DC-link inductance provide a continuous mode of diode rectifier operation.
Therefore, both a large value of a DC-link capacitance and inductance provide decreasing of
input current THD. However, there are the maximal values for capacitance and inductance
(500uF and 30mH, respectively), above which increasing of those parameters is not
profitable, because the grid current THD do not decrease enough.
Diode rectifier with AC-side inductance and DC-side capacitance

a)

b)

100

34,0

80

Grid current THD [%]

Grid current THD [%]

33,5

33,0

32,5

32,0

60

40

20

31,5
0

200

400

600

800

1000

10

15

20

25

AC-side inductance [mH]

DC-link capacitance [uF]

Fig. 2.14. a) Grid current THD versus DC-link capacitance, b) Grid current THD versus AC-side
inductance

Here, for a grid current smoothing the AC-side inductor is applied. Similar, like in previous
situation both a large value of a AC-side inductance and DC-link capacitance provide
decreasing of input current THD. Moreover, there are also the maximal values for capacitance

- 25 -

and inductance (500uF and 15mH respectively), above which increasing of those parameters
is not profitable, from a grid current THD point of view.
Compared to a PWM Rectifier, a diode rectifier needs much bigger values of passive elements
to obtain stabile DC voltage and acceptable input current THD value [10.3]. However, even
with big value of input inductors, a diode rectifier is not able to complete international norms
from the grid current THD point of view.
C = Pout

(2.5)

54 2 f grid U LL U DC
C [F]

0.15

0.12

0.09

0.06

0.03

0
20

40

60

80

100

P [kW]

Fig. 2.15. DC-side capacitor value versus the output power

Fig. 2.15 presents a DC-side capacitor value versus the output power for chosen and stable
value of DC-link voltage and given peak ripple DC-link voltage requirements. A diode
rectifier to have the peak ripple voltage on the same level like a PWM Rectifier needs larger
DC-link capacitor size. This can be a result, that a diode rectifier operates with a grid
frequency fgrid, while a PWM Rectifier operates with a switching frequency fs which is much
faster than the grid frequency.
A voltage source PWM inverter with diode front-end rectifier is one of the most frequently
power configuration used in variable speed AC drives. This solution has following
advantages: simple, robust and low cost.
However, it allows only unidirectional power flow. Therefore, regenerative mode is not
possible and energy must be dissipated on power resistor controlled by chopper connected
across the DC link. The other important disadvantages are: low power factor and high level of
harmonics present in an input current.

- 26 -

2.5 Harmonic Limitations

Severe current or voltage harmonics may damage or malfunction various electronic
equipment supplied from the grid. However, a level of grid distortion where those problems
can occur is not precisely defined. The main reason of harmonics in power system is
electronic equipment mainly a diode rectifiers, mostly spread power electronic AC/DC
converters. The reason of diode rectifier popularity is very simple, it is cheap, robust,
efficient, reliable and has a small size. However, a diode rectifier has one big disadvantage
significantly distorted input current. Therefore, problems related to harmonics produced in the
grid by diode rectifiers, caused necessity of define and arrange requirements for nonlinear
electronic equipment. International norm precisely define maximal harmonic content in a grid
voltage as well as in the current taken by electronic equipment. Norms divide electronic
devices depending on maximum permissible current and force an application of equipment
like passive and active filters or PWM Rectifiers.

+%-((%--"
"#+#%*,,, +%This standard sets limits for harmonic voltage and currents at the Point of Common Coupling
(PCC), therefore the focus is only on the power system. It places responsibility on large
commercial and industrial consumers.
Voltage Distortion Limits
Bus Voltage at PCC Individual voltage distortion [%]*

Total voltage distortion [%]

below 69kV

3.0

5.0

69kV to 138kV

1.5

2.5

Above 138kV

1.0

1.5

* maximum for individual harmonic

Current Distortion Limits
Maximum odd harmonic current distortion in percent of IL for general distribution systems (1.120V 69kV)

ISC/IL

<11

11<n<17

17<n<23

23<n<35

35<n

TDD

<20

4.0

2.0

1.5

0.6

0.3

5.0

20<50

7.0

3.5

2.5

1.0

0.5

8.0

50<100

10.0

4.5

4.0

1.5

0.7

12.0

100<1000

12.0

5.5

5.0

2.0

1.0

15.0

>1000

15.0

7.0

6.0

2.5

1.4

20.0

ISC- maximum short circuit current at the PCC

- 27 -

IL- fundamental of the average (over 12 months) maximum monthly demand load current at
PCC
TDD total demand distortion, harmonic current distortion in % of maximum demand load
current (15 or 30 minute demand)

.%///(($(" 0*,' %///

%///(($("1
"#+#" *,' .%///
The European standard IEC 61000 defines the current distortion limits for equipment
connected to the public supply system. The objective is to limit the voltage distortion and is
addressed to small customer equipment. Emphasis on public, low-voltage and household.
IEC 1000-3-2 Limits for Class D Equipment
Harmonic order

Maximum permissible

Maximum permissible

harmonic current per watt

harmonic current

mA/W

3.4

2.3

1.9

1.14

1.0

0.77

0.5

0.40

11

0.35

0.33

13<n<39 (odd har. only)

3.85/n

Refer to class A

"#+#$ *,' .%///(

.%///($()0*,' %///(
%///($()1
This standard is addressed for larger customers (single and three-phase harmonic limits). It
gives a consideration of the short circuit ratio RSCC.
IEC 1000-3-4 limits for three-phase equipment
Minimal RSCC

Upper limits for harmonic distortion factors

Limits for individual harmonic in % of I1

THD

PWHD

I5

I7

I11

I13

66

17

22

12

10

120

18

29

15

12

12

175

25

33

20

14

12

250

35

39

30

18

13

350

48

46

40

25

15

10

450

58

51

50

35

20

15

>600

70

57

60

40

25

18

- 28 -

2.6 Conclusions
International standards impose voltage and current harmonic limits. Many solutions has been
designed to deal with these standards.
The simplest compensation method is to use an AC-side inductor or an AC-side LC filters.
However, when using these passive compensation methods some problems can occur:
-

Rectifier input voltage distortion and output DC link voltage reduction by AC-side
induction.

Rectifier input current augmentation by parallel connected filters.

The active compensation is therefore preferred in case of performance basis, but its cost and
complexity is a main problem.

- 29 -

3. Basic Theory of PWM Rectifier

As shown in Chapter 2, diode rectifiers are most frequently applied converters in
AC/DC power conversion. However, because of significantly distorted input current, which is
not acceptable in respect to international standards, diode rectifiers should be replaced be
other, not polluting and line power friendly equipment. Therefore, converters which present a
low interaction on the grid are going more interested. The three phase VSC (Voltage Source
Converter) applied as a grid interface stage called Boost active rectifier, can take near
sinusoidal input current with a near unity power factor but also it can work in both rectifying
and regenerative modes. From the reliability and efficiency point of view a PWM Rectifiers
are very promise solutions [1, 4, 6.2, and 6.4].
The PWM Rectifier, by many is considered as most obvious alternative to conventional diode
rectifier. This chapter introduces and presents basics of operation of PWM Rectifier and
operation limitations. Also, mathematical models in different reference frames are presented.
The basic requirements of a PWM Rectifier can be defined as follows:
bi-directional power flow,
low harmonic distortion of line current,
regulation of input power factor to unity,
adjustment and stabilization of DC-link voltage,
reduced DC filter capacitor size.

3.1 Operation of the PWM Rectifier

Fig. 3.1b shows a single-phase representation of the PWM boost Rectifier circuit presented in
Fig. 3.1a. The L and R represent the line inductor. uS is the line voltage and uC is the bridge
converter voltage controllable from the DC-side. Magnitude of uC depends on the modulation
index of the VSC and DC voltage level.

- 30 -

a)

b)

jLiC

RiC
iC

R
uc

uS

Fig. 3.1. Simplified representation of three-phase PWM rectifier for bi-directional power flow
a) Main circuit b) single-phase representation of the rectifier circuit

(a)

(b)
q

R iC

q
uS

iC

iC

uS

j Li C

uC

uC
j Li C

R iC
Fig. 3.2. Phasor diagram for the PWM rectifier a) rectification at unity power factor b) inversion at
unity power factor

Inductors L connected a input of PWM converter with a grid are integral part of the rectifier
circuit. It brings current source character of input circuit and provide boost feature of
converter. The line current iC is controlled by the voltage drop across the inductance L
interconnecting two voltage sources (grid and PWM converter). It means that the inductance
voltage uI equals the difference between the line voltages uS and the converter voltage uC.
When a phase angle and amplitude of converter voltage uC is controlled, indirectly phase
and amplitude of line current is controlled. In this way average value and sign of DC current
is controlled and is proportional to active power flowing through converter. The reactive
power can be controlled independently with shift of fundamental harmonic current iC in
- 31 -

respect to voltage uS. Fig. 3.2 presents general phasor diagram for both rectification and
regeneration modes when unity power factor is required. The figure shows that the voltage
vector uC is higher during regeneration (up to 3%) then rectifier mode [6.6]. Thus, PWM
Rectifier has two operation modes:
Rectifying mode,
Regenerating mode.
Naturally, in a real system the power losses are present because of:
Power transistors switching losses,
AC-side inductor losses,

P losses

Heating losses and others.

VS
Load

Rectifying mode Pgrid = Pload + P losses

Regenerating mode Pgrid = Pload - P losses

Fig. 3.3. Power flow in active PWM rectifier

A three-phase symmetric system represented in a natural coordinate system by phase

quantities like for example voltages (Fig. 3.4), can be replaced by one resultant space vector.
k=

2
1k A (t ) + ak B (t ) + a 2 kC (t )
3

(3.1)

Where: k A (t ), k B (t ), kC (t ) - denote arbitrary phase quantities in a system of natural

coordinates (A, B, C) satisfying the condition k A (t ) + k B (t ) + kC (t ) = 0

1, a, a 2 - Complex unit vectors,

2
- Normalization factor
3

- 32 -

Fig. 3.4. Configuration of space vector

Main circuit of bridge converter (Fig. 3.1a) consists of three legs with IGBT transistor or, in
case of high power, GTO thyristors. The bridge converter voltage can be represented with
eight possible switching states (six-active and two-zero) described by equation 3.2.
Fig. 3.5a presents converter structures for eight different switching states.

Sc= 0

U DC

Sc=1

U DC

Sc=1

U DC

Sc=1

Sb=1

U DC

Sa=1

Sc= 0

Sb= 0

Sa=1

U2

k=1

U DC

Sb=1

U DC

Sa=0

Sc= 0

Sb=1

Sa=0

U4

k=3

Sb=0

Sa=1

Sc=1

Sb=0

Sa=0

U DC

+
A

Sb=1

U DC

U7
Sa=1

Sc=0

Sb=0

Sa=0

U0

U6

k=5

U5

k=4

U3

k=2

U1

k=0

Fig. 3.5a Possible switching states (Sa, Sb, Sc) of PWM bridge converter

- 33 -

uk =

2
U DC e j ( k 1) / 3
3
0

k = 1...6
k = 0, 7

(3.2)

As mentioned in Fig. 3.5a eight possible states of the converter can be presented in vector
representation (Fig. 3.5b). Therefore, demanded command vector, will be constructed using
the nearest accessible vectors [2.1, 2.2].

Fig. 3.5b Representation of input voltage as a space vector

Fig. 3.5b presents of input voltage as a space vector as was mentioned in Fig. 3.5a.
Only one switch in the leg of converter (Fig. 3.1a) can be turn on in one time, if two of them
will be turn on, the short circuit of DC-link will happen. To protect the converter, a delay time
(dead time) in transistor switching signals must be applied [2.3]. The dead time effect
produces a nonlinear distortion of the average voltage trajectory. Therefore, for the proper
operation a compensation of dead time is required.

- 34 -

3.2 Mathematical description of PWM Rectifier

U DC
2

U DC
2

U DC
2

U DC
2

U DC
2

U DC
2

U DC
2

U DC
2

U DC

U DC
2
U DC
3

2
U DC
3

Fig. 3.6 Representation of converter output voltages: a) equivalent scheme of the converter, b)
output voltages

$#$#%2
Three phase grid voltage and the fundamental line current are described as:
u AN = Em sin t

(3.3a)

u BN = Em sin( t +

2
)
3

(3.3b)

uCN = Em sin( t

2
)
3

(3.3c)

iAN = I m sin( t + )

(3.4a)

iBN = I m sin( t +

2
+)
3

(3.4b)

iCN = I m sin( t

2
+)
3

(3.4c)

where Em (Im) and are amplitude of the phase voltage (current) and angular frequency,
respectively.
With assumption

- 35 -

iAN + iBN + iCN 0

(3.5)

we can transform equations (3.3) to a stationary - system and the input voltage in -
frame are expressed by:
uS =

3
Em sin( t )
2

(3.6)

uS =

3
Em cos( t )
2

(3.7)

Similarly, the input voltages in the synchronous d-q coordinates are expressed by:
uSd
=
uSq

3
Em
=
2
0

uS2 + uS2

(3.8)

$#$#" *
Line to line input voltages of PWM rectifier can be described as:
u AB = ( S A S B ) u DC

(3.9a)

u BC = ( S B SC ) u DC

(3.9b)

uCA = ( SC S A ) u DC

(3.9c)

and phase voltages are equal:

u AN = f a uDC

(3.10a)

u BN = fb u DC

(3.10b)

uCN = f c u DC

(3.10c)

where:
fa =

2 S A ( S B + SC )
3

(3.11a)

fb =

2 S B ( S A + SC )
3

(3.11b)

fc =

2 SC ( S A + S B )
3

(3.11c)

The fa, fb, fc are assume 0, 1/3 and 2/3.

- 36 -

3.3 Block diagram of PWM rectifier

$#)#%

The voltage equations for balanced three-phase system without the neutral connection (Fig.
3.1) can be written as:
uS = u I + uC
uS = RiC +

(3.12)

diC
dt

L + uC

(3.13)

uSa
iCa
iCa
uCa
d
uSb = R iCb + L
iCb + uCb
dt
uSc
iCc
iCc
uCc

(3.14)

and additionally for currents

C

dudc
= S a iCa + SbiCb + Sc iCc idc
dt

(3.15)

A block diagram of PWM rectifier corresponding to Eqs(3.13-14) is shown in Fig. 3.7.

u Sa

+
-

Sa

uS

1
R + sL

i dc
iC a
+

+
-

Sb

uS

1
R + sL

iC b

+
-

u Sc

1
R + sL

fc

fb

Sc

u dc

u Sc

1
sC

fa

u Sb

1
3

iC c

Fig. 3.7. Block diagram of voltage source PWM rectifier in natural three-phase coordinates

$#)#"

0 (31

Eq.3.13 after coordinate transformation will receive following form:

uSd = RiCd + L

diCd
LiCq + uCd
dt

(3.16a)

- 37 -

uSq = RiCq + L

diCq
dt

+ LiCd + uCq

(3.16b)

dudc
= (iCd S d + iCq S q ) idc
dt

(3.17)

where: S d = S cos t + S sin t ; S q = S cos t S sin t

S =

1
1
(2S a Sb S c ) ; S =
(Sb S c )
6
2

A block diagram of PWM Rectifier in synchronous rotating d-q model [6.5] is presented in
Fig. 3.8.

Fig. 3.8. Block diagram of voltage source PWM rectifier in synchronous d-q coordinates

R can be practically neglected because voltage drop on resistance is much lower than voltage
drop on inductance, what gives simplification of Eq. 3.13.
uS =

diC

L + uC

(3.18)

uSa
iCa
uCa
d
uSb = L
iCb + uCb
dt
uSc
iCc
uCc

(3.19)

uC
uS
d iC
=L
+
uS
uC
dt iC

(3.20)

dt

Therefore, Eq. 3.16a and b receive following shape:

uSd = L

diCd
LiCq + uCd
dt

(3.21a)

- 38 -

uSq = L

diCq
dt

+ LiCd + uCq

(3.21b)

The active and reactive power supplied from the grid is given by

p = Re u S i C

q = Im u S i

}=u

}=u

+ uS iC = uSaiC a + uSbiCb + uSc iCc

uS iC =

S C

S C

1
( uSc iCa + uSa iCb + uSbiCc )
3

(3.22)
(3.23)

It gives in the synchronous d-q coordinates:

p = (uSq iCq + uSd iCd ) =

3
Em I m
2

(3.24)

q = (uSqiCd uSd iCq )

(3.25)

For a unity power factor operation, following conditions can be obtained:

iCq = 0, uSq = 0, uSd =

3
3
Em , iCd =
Im , q = 0
2
2

(3.26)

3.4 Operating limits

For proper operation of PWM rectifier a minimum DC-link voltage is required [4, 6, 6.3].
Generally it can be determined by the peak value of line-to-line grid voltage. Defining the
natural DC-link voltage value, as possible to obtain in case of not operating transistors, their
freewheeling diodes becomes a standard three-phase diode bridge. Therefore, the boost nature
of the active rectifier leads to:

U DC min uS ( rms ) 3 2 = 2, 45 uS ( rms )

(3.27)

If this condition is not fulfilled, the full control of the input current is not possible. Moreover,
to keep the switching losses down, a DC-link voltage should be as low as possible. Typically,
the reference value for the controlled DC-link voltage should be chosen about 10% above the
natural DC-link voltage. If unity power factor is s required for PWM Rectifier operation, it
can be obtained in case of:
(3.28)

uC2 = u S2 + u I2

The voltage drop across the inductor (uI) depends on reactance of the inductor at the input
frequency and on the input current. The magnitude of the switching voltage vectors depends
on the DC-link voltage level. This means that the maximum AC voltage (uS) a PWM Rectifier
can generate in the linear PWM region.
Assuming the grid side resistance equal to zero and neglecting the converter losses the active
power can be calculated as follows:
- 39 -

PC = 3uS iC = 3uS

U DC
L

(3.29)

This means that high value of a DC-link voltage and small value of the input inductor,
determine a high power rating of the rectifier. The active power can be also defined using DClink voltage and load current as follows:
PC = 3(u S iC RiC2 ) = U DC I DC

(3.30)

Therefore, the input current becomes:

iC =

1 uS

2 R

uS
R

4 PC
3R

(3.31)

if the following relation is satisfied:

3uS2
PC
4R

(3.32)

At steady state operating conditions the capacitor current is zero. Thus the converter output
power is:

PC = U DC iC

(3.33)

and the maximum load current that can be delivered is obtained:

iC ,max =

3uS2
4 RU DC

(3.34)

- 40 -

4. Introduction to Active Filtering

4.1 Basic Configuration
The Shunt Active Filters (SAF) can be divided into two groups [5.2, 5.3, 5.4]: a shunt and

series type of APF. The first one group serve for current and the second one for voltage
compensation. Shunt Active Filters (SAF) [5.2] are most often used for compensating current
distortion produced by nonlinear loads, like diode or thyristors rectifiers fed adjustable speed
drives. General scheme and typical waveforms are shown in Fig. 4.1a and b respectively.
a)

b)

15

L ine curren t

10

diod e rectifier curre nt

ac tive filter cu rrent

current

-5

-1 0

-1 5
0 ,2 8 0

0 ,2 85

0 ,2 90

0 ,29 5

0 ,30 0

tim e

Fig. 4.1. a) Basic configuration of Shunt Active Filter (SAF) b)Typical waveforms for input current of
a diode rectifier compensation

The SAF current injection has a large influence on the grid current and only a small on the
nonlinear load (diode rectifier) current [5.9]. The grid voltage can be modified by SAF,
particularly when it is much distorted and as a result, it modifies the load current. The SAF
effect on the load current is small but may lead to unstable operation in some cases if the
designer has not taken its dynamics into account. If this small influence is neglected and the

- 41 -

load is considered as a current source, there is no interaction between the AF and the load
currents.

4.2 Control of SAF

Two main ways to cancel the grid current harmonics depending on which current is measured
can be maintained. These two ways have a different control structure and lead to different
properties.

)#"#%4

This method is based on load current measurement and then the harmonic content is extracted
from the load current (Fig. 4.2). In this way, the SAF injects the compensating current into the
grid, without information about the grid current [5.7]. All errors in the system, like parameter
uncertainties, measurement errors or control errors, will appear in the grid current as
unfiltered harmonics. The most important advantage of open loop method is system stability,
but it is connected with extended control algorithm and enlarged number of current sensors.
a)

uS

L S iS

iL

LL
M otor

iC

LC
U DC

D SP

b)

zS

iS
iC

uS

uC

iL

Fig. 4.2. a) Open loop Shunt Active Filter (SAF), b) Equivalent circuit for open loop control of SAF

iC = G iL

(4.1)

- 42 -

G iS
1 G

(4.2)

iS = iL (1 G )

(4.3)

iC =

Full compensation can be achieved if: G 1

G is the equivalent transfer function of the SAF, including detection circuit and delay of the
control. In general, G has a function of notching for the fundamental component G f = 0 and

G h = 1 for harmonics.

)#"#" '

Another way to generate the reference current is to measure the grid current. In this way, in
addition to the inner load current control loop, there is an outer grid current loop in the
control. This method does not allow harmonic correction without phase balancing and
reactive power compensation. The control algorithm is less complicated then in open loop
method and requires minimal number of current sensors.
a)

uS

LS

iS

iL LL
Motor

iC

LC

DSP

b)

zS

iS
iC

uS

uC

iL

Fig. 4.3. a) Closed loop SAF , b) quivalent circuit for closed loop control of SAF

- 43 -

iC = G iS

(4.4)

iC =

G iL
1 G

(4.5)

iS =

iL
1 G

(4.6)

Full compensation can be achieved for G

4.3 Types of Harmonic Sources

The harmonic sources are mainly divided into two groups: current and voltage types,
depending on impedance [5.14].

)#$#%5

'

a)

Ld
ZS
AC Source

b)

Harmonic source
ZS

uS

iL
Harmonic
Current
Source

AC Source

Fig. 4.4. Typical harmonic current source a) block scheme, b) equivalent circuit

The common sources of harmonic currents are thyristor converters (Fig. 4.5) where a
sufficient dc inductance Ld forces a constant DC current. The grid voltage and rectifier current
are presented in Fig. 4.5. Because of current contents, this behaves like a current harmonic
source. However, as a current source of harmonics can be also shown a diode rectifier with a
smoothing capacitor and additional AC or DC inductors, applied for decreasing high order
harmonics content.
- 44 -

Fig. 4.5. Voltage and current of thyristor rectifier (commutation effect is neglected)

)#$#" 5

a)

ZS
AC Source
b)

Harmonic source
ZS
iL

uS

uL
Harmonic
Voltage
Source

AC Source

Fig. 4.6. Typical Harmonic Voltage Source

A diode rectifier with smoothing capacitor (Fig. 4.6) becomes another common harmonic
source. Fig. 4.7 present its voltage and current waveforms. The rectifier current is highly
distorted, its harmonic are affected by the ac side impedance. Therefore this behaves like a
voltage harmonic source.

- 45 -

Fig. 4.7. Voltage and current of diode rectifier

4.4 Analysis of Shunt Active Filter (SAF) Operation with Different

Harmonic Sources
A Shunt Active Filter (SAF) is a PWM inverter placed in parallel with a load (harmonic
source) to inject a harmonic current with the same amplitude as that of the load, but opposite
phase into the ac system. A pure current source of harmonic represents zL , whereas a
pure voltage source of harmonic represents zL 0 .

)#)#%6

'

ZS

uS

iS

iL

G ZL

iC

iLO

Fig. 4.8. Basic principle of shunt active filter with harmonic current source

Fig. 4.8 presents basic principle of SAF for harmonic current source, where the harmonic
source is presented as a Nortons equivalent circuit. ZS is source impedance, ILO is the
equivalent harmonic current source, ZL is the equivalent impedance on the load side which
may include passive filters and power factor correction capacitors. All equations in the

- 46 -

following analysis are in per unit representation. Following equation from Fig.4.8 can be
obtained:

iC = GiL
iS =

(4.7)
ZL

ZS +

ZL
1 G

iLO +

uS
ZS +

ZL
1 G

(4.8)

ZL
uS
1
iL = 1 G iLO +
Z
1 G Z + ZL
ZS + L
S
1 G
1 G

(4.9)

Focusing on harmonics

ZL
>> Z S
1 G h

(4.10)

which is the required operating condition for the SAF to cancel the load current harmonic.
When it is satisfied, the Eqs. (4.7)-(4.9) can be written as:

iC = iLh

(4.11)

iSh (1 G )iLOh + (1 G )
iLh = iLOh +

uSh
0
ZL

(4.12)

uSh
ZL

(4.13)

It is seen from the equation (4.12) that source current becomes sinusoidal because of

G 1 h = 0 for harmonics when (4.10) is satisfied. In the Eq. (4.10) only G can be predesigned and determined by the SAF, while ZS and ZL are determined by the system. Because
of pure current harmonic source, represented by a thyristor rectifier with a large dc
inductance, we have Z L >> Z S . Equations (4.8) and (4.10) can be reduced respectively:
IS
= (1 G )
I LO

(4.14)

1 G h << 1

(4.15)

So, the source impedance ZS do not have an impact for compensation characteristics of the
SAF. This is an important advantage of SAF.
However, for a parallel passive filter or power-factor improvement capacitors connected on ac
side of thyristor rectifier, the load impedance will become very low for harmonics. Therefore,
the condition Z L >> Z S will not satisfy any more.

- 47 -

)#)#" 6

iS

ZS

uS

iL

ZL

iC

uL

Fig. 4.9. Basic principle of shunt active filter with harmonic voltage source

Fig. 4.9 shows the basic principle of SAF with harmonic voltage source, where the harmonic
source is represented by Thevenins equivalent circuit, a voltage source VL and impedance ZL.
From Fig.9 we can write following equations:

iC = GiL
uS u L
Z
ZS + L
1 G

(4.17)

uS u L
uS u L
1
=
1 G Z + ZL
(1 G ) Z S + Z L
S
1 G

(4.18)

iS =

iL =

(4.16)

Therefore, following equation (represents required operating condition for the SAF to cancel
the load voltage harmonic) is satisfied
ZS +

ZL
>> 1 pu
1 G h

(4.19)

the grid current will be sinusoidal. So, with condition (4.19), equations (4.16)-(4.18) are:

iC = iLh

(4.20)

iSh = 0

(4.21)

iLh =

uSh uLh
ZL

(4.22)

But it is difficult for SAF to satisfy equation (4.19), because harmonic voltage source
represents usually very low impedance ZL for a diode rectifier with a large smoothing
capacitor Z L 0 as long no series reactor placed on the ac side of the rectifier.

- 48 -

4.5 Conclusions
A Shunt Active Filters (SAF) have fast dynamic behavior, thanks to large energy storage are
not sensitive for load transients. However, injection of high order harmonics requires large
power rating of applied VSI, typically 25%-100% related to load system. From the stability
point of view, are independent of system parameters and typically not influenced by the loads,
except for capacitive loads. Generally are applied for variable fundamental reactive power
compensation, suppression of non-characteristic harmonics and unbalanced systems.
Reliability of the system is good for low voltage applications, however, over-rating is
required. SAF are proposed for low to medium power systems with highly dynamics loads.
General futures of SAF are summarized in Table 4.1.
Table 4.1 Summary of Shunt Active Filter

System configuration

Basic operation principle

Adaptive loads
Required operation
conditions
Compensation
characteristics
Application considerations

Operates as a current source

Inductive or current-source loads or harmonic current
source, e.g. phase-controlled thyristor rectifiers of ac drives
ZL should be high and the SAF should meet 1 G h << 1
Excellent and independent of the source impedance ZS, for
current-source loads, but depend on ZS when the load
impedance ZL is low
Injected current flows into the load side and may cause
overcurrent to a capacitive or voltage-source load

A Shunt Active Filters (SAF) has following advantages:

Controlled as a current source with a simple control algorithm,

Its operation is not affected by supply voltage harmonics,
Can be installed as a black box,
Can be installed as parallel units to obtain higher kVA rating,
Has the same power circuit and equal control algorithm to PWM Rectifier. Therefore,
has possibility of system integration with active front-ends,
Do not create displacement factor problems,
Viable and cost-effective for low and medium power applications,
Is not suitable for high peak harmonic current loads due to large power rating
requirements.
- 49 -

5. PWM Rectifier with Active Filtering Function

5.1 Introduction
Shunt Active Power Filters (SAF) [5.18 5.20] and PWM rectifiers [4] are two typical
examples from several solutions, which are used for harmonics elimination. Both of them
have basically the same power circuit configuration and can operate based on the same
control principle. SAF are able to compensate not only current harmonics, but also a reactive
power and load unbalance. Design and control have been investigated in many papers [5.11,
5.12, and 5.13] where use ness of SAF was proved. PWM Rectifiers [4] as non-polluting
equipment with sinusoidal input currents are going to be more popular because of several
advantages like:
-Bi-directional power flow,
-Closed loop based stabilization of output DC voltage,
-Low harmonic distortion of line currents,
-Regulation of input power factor to unity.
This chapter explores another task of PWM rectifier - active filtering function, which adds
a)

VS

L S iS

iL L L
Motor

iC

LC
U DC

Motor

DSP

b)

VS

LS

iS

iL L L
Motor

iC

LC
Motor

DSP

Fig. 5.1. Control strategy a) open loop with 4 current sensors and b) closed loop with 2 current sensors

- 50 -

advantages of SAF and PWM Rectifiers. So, the PWM rectifier supplies its load and at the
same time compensates AC grid current. This concept was at first introduced in works [4.1 4.4 and 14].
The open loop control strategy illustrated in Fig. 5.1a requires additional control functions
and measurement of nonlinear load current (iL). In contrast the closed loop control strategy
presented in Fig. 5.1b is based on PWM Rectifier operation and do not require additional
current sensors or any modifications in control algorithm. The difference results from location
of line current sensors. Compared to open loop control strategy, where current harmonic
content and power factor improvement can be controlled independently, such a system
performs both of these functions simultaneously.

5.2 Control Methods of PWM Rectifier

The dynamic and static performance of PWM Rectifier depends strongly on adopted control
methods. Therefore, in the next section some basic control strategies used for PWM Rectifiers
will be presented.

+#"#%# 7

'

074'1

Voltage Oriented Control (VOC) is based on coordinate transformations between stationary

and synchronous rotating dq reference system. It guarantees fast transient response and
high performance in steady state. Because of VOC uses an internal current control loops final
performance of the system strongly depends on applied current control techniques [1.2]
mentioned in Appendix.
The conventional VOC system (Fig. 5.3) uses synchronous current control in rotating
reference coordinates, as shown in Fig. 5.2. A meaningful feature for this type of current
controller is signal processing in two coordinate systems. The first is stationary - and the
second is synchronously rotating d-q coordinate system. Three phase measured values are
converted to equivalent two-phase system - and then are transformed to rotating coordinate
system in a block -/d-q:

kd
cos US
=
kq
sin US

sin US
cos US

k
k

(5.1a)

Thanks to the above transformation the control values are DC signals. An inverse
transformation d-q/- is used on the output of control system and it gives a result on rectifier
reference signals in stationary coordinate:

k
cos US
=
k
sin US

sin US
cos US

kd
kq

(5.1b)
- 51 -

The angle of the voltage vector

sin US = uS /

( uS ) + ( uS )

cos US = uS /

( uS ) + ( uS )

US

is defined as:

(5.2a)

(5.2b)

In voltage oriented d-q coordinates, the AC line current vector iC is split into two rectangular
components iC = [iCd, iCq] (Fig. 5.2). The component iCd determinates active power, where iCq
decides about reactive power flow. Thus the active and the reactive power can be controlled
independently via active and reactive components of line current vector iC. The UPF
condition is met when the line current vector, iC, is aligned with the line voltage vector, uS. By
placing the d-axis of the rotating coordinates on the line voltage vector uS a simplified
dynamic model can be obtained.

axis
iC

q-axis

iCq

iS
uS

US=t

iCd

iC

d-axis
(rotating)

uS = uSd
uS

axis
(fixed)

Fig. 5.2. Vector diagram of VOC. Coordinate transformation of line current, line voltage and rectifier
input voltage from stationary coordinates to rotating d-q coordinates

The grid voltage equations in the d-q synchronous reference frame are as follows:

uSd = R iCd + L
uSq = R iCq + L

diCd
+ uCd L iCq
dt
diCq
dt

(5.3)

+ uCq + L iCd

(5.4)

According to Fig. 5.3, the q-axis current is set to zero in all condition for unity power factor
control while the reference current iCd is set by the DC-link voltage controller and adjust the
active power flow between the grid and the DC-link. For R

0 equations (5.3), (5.4) can be

reduced to:
uSd = L

diCd
+ uCd L iCq
dt

(5.5)

- 52 -

0=L

diCq
dt

+ uCq + L iCd

(5.6)

With the q-axis current regulated to zero, the following equations (5.5 and 5.6) becomes
uSd = L

diC
+ uCd
dt

(5.7)

0 = uCq + L iCd

(5.8)

As current controller, the PI-type can is used. However, the PI current controller has no
satisfactory performance, because of the coupled system described by Eqs. (5.5), (5.6).
Therefore, for high performance application with accuracy current tracking at dynamic state
the decoupled controller should be applied. The output signals from PI controllers after dq/
transformation (Eq. (5.1b)) are delivered to a Space Vector Modulator (SVM) which
generates switching signals for power transistors.
udc_ref

udc
-

PIPI

id_ref

iq_ref = 0

udc
id

ica
icb

abc

icc

id_err

dq

ul

iq

iq_err

PI

PI

us

ud
dq

PWM

uq

us

ul

Fig. 5.3. Baseic block of VOC scheme

+#"#"
5.2.2.1 VOC with active filtering function: total harmonic compensation method
As an active filter, PWM rectifier is able to compensate higher harmonics in a grid current
taken by the whole load. In order to compensate higher harmonics additional control block
(AFF) has to be added to standard VOC strategy (Fig. 5.4).
A PWM Rectifier part of control is the same like described in previous chapter. The distorted
currents ila, ilb, ilc are delivered to the abc/dq transformation, where a fundamental (50 Hz)
harmonic becomes a DC quantity and other harmonics are non-DC values. Next those signals
are delivered to the High Pass Filter (HPF), which provides the higher harmonics signals
extraction. Then higher harmonics compensating signals id_fr, iq_fr are added with an opposite
- 53 -

sign to the standard VOC reference signals iCd, iCq and in the same provide higher harmonics
compensation.

id _ err = iCd _ ref iCd id _ f r

(4.9)

iq _ err = iCq _ ref iCq iq _ f r

u dc_ref

u dc
-

PIPI

iCd_ref

iCq_ref = 0

u dc
iCd

ica
icb

abc

icc

dq

iCq

ila

idl
abc

ilc

iq_err

ul

ilb

id_err

dq

iql

HPF

HPF

ul

PI

PI

us a

ud
dq

uq

ab

u sb

PWM

ul

id_ fr

iq_

fr

AFF

Fig. 5.4. Block diagram of VOC scheme with Active Filtering Function (AFF) block based on total
harmonic compensation

The compensating signals are high frequency components, added to the DC values reference
signal produce non-DC reference signals passed to a PI controllers. These give non ideal
conditions for PI controllers operation and produce an additional phase shift between
reference and actual current.

- 54 -

5.2.2.2 VOC with active filtering function: selective harmonic compensation method
udc_ref

udc

iCd_ref

PIPI

iCq_ref = 0

udc
iCd

ica

abc

icb
icc

dq

iCq

ilb

idl_5h

ilc

dq
-5* ul

iql_5h

LPF

LPF

5 harm

11 harm

PI

iq_err

PI

id_fr
ul

abc

id_err

ul

ila

id_5h

iq_5h

dq

uq

PWM

us

ul

iq_fr
dq

dq

us

ud

dq

iq_7h

7* ul

-5* ul

id_7h

LPF

LPF

idl_7h

iql_7h

7 harm

abc

ila
ilb
ilc

dq
7* ul

13 harm

Fig. 5.5. Block diagram of VOC with Active Filtering Function (AFF) scheme based on selective
harmonic compensation

In scheme of Fig. 5.5 active filtering function operates independently on few different main
current harmonics, like 5th, 7th, 11th and 13th in harmonic synchronous coordinates [5.5, 5.15,
5.17]. Moreover, nonlinear load currents ila, ilb, ilc are transformed to dq frame using suitably
angle ul for each harmonic intended to compensation. Then the distorted currents ila, ilb, ilc are
delivered to the Low Pass Filter (LPF), which provides the higher harmonics signals
extraction. Next after back transformation dq/ these signals idfr and iqfr are added with an
opposite sign to the standard VOC reference signals iCd and iCq giving final commands id_err,
iq_err delivered to PI current controllers. The same procedure is used for all specified
harmonics.

- 55 -

+#"#$
udc_ref

udc
-

id_ref

PIPI

iq_ref = 0

udc
id

isa
isb

abc

isc

id_err

dq

iq

ul

iq_err

PI

PI

ud

us

dq

us

uq

PWM

abc

ul

Fig. 5.6. VOC closed loop control strategy

Closed loop control strategy of Fig. 5.6 operates like conventional VOC with the only change
on current sensor location instead PWM rectifier input currents iLa, iLb, iLc, the source
currents iSa, iSb, iSc are measured and controlled.
The nonlinear load current iL is not measured (see Fig. 5.1b). It is naturally created by the
converter as a result of ac-line current sensor location at point of common coupling (PCC),
where the system controls the current to be sinusoidal and may be determined by considering
the summation of currents at the PCC:

iC = iS iL
The source currents iSa, iSb, iSc are measured and taken into control strategy.

+#"#)7

89

&

'

07 (& ' 67 1

Basic principles of virtual flux based active and reactive power estimation is presented below.
It is economically motivated to replace the AC-line voltage sensors [3.1] with a virtual flux
(VF) estimator [4, 6.1, 12]. The principle of VF is based on assumption that the voltages
imposed by the line power in combination with the AC side inductors can be considered as
quantities related to a virtual AC motor (see Fig. 5.7). Where R and L represent the stator
resistance and leakage inductance of the virtual motor. Line to line voltages: USab, USbc, USca
can be considered as induced by a virtual flux. Hence the integration of the voltages leads to
determination of a virtual flux vector S , in stationary - coordinates presents Eq.5.11.

- 56 -

Fig. 5.7. PWM Rectifier

With the definitions

(5.9)

S = u S dt

where
uS

uS =

uS

S =

2
=
3

S
S

iC
iC =
=
iC

uC =

uC
uC

2
3

1
2
3
2

1
0

uS ab

(5.10)

uSbc

u S dt

(5.11)

u S dt

3
2
3
2

0
3

iCa

(5.12)

iCb

1
1
uCAM

2
2
2
= 0
uCBM
3
3
3
uCCM
0

2
2
1

(5.13)

Operation of PWM rectifier is based on assumption, that input current ic is controlled by the
voltage drop across the inductor L interconnecting line and converter voltage sources. It
means that the inductance voltage uI equals the difference between the line voltage uS and the
converter voltage uC

u S = uC + u I

(5.14)
- 57 -

and similarly a virtual flux equation can be presented as:

S = C + I

q-axis

uI =
jL
iL

(5.15)

uS = uSq

iC

uC

iCq

iC uS

iCd

axis
uS
iC

S
S=t

d-axis
(rotating)

C axis

(fixed)

Fig. 5.8. Reference coordinates and vectors (for fundamental component): S virtual line flux vector,

C virtual flux vector of converter, I virtual flux vector of inductor, uC converter voltage vector,
uS - line voltage vector, uI inductance voltage vector, iC input current vector

Based on the measured DC link voltage Udc and the duty cycles of SVM modulator SA, SB, SC
the virtual flux S components are calculated in stationary coordinates system as follows:
S =

S =

2
1
U dc ( S A ( S B + SC ) dt + LiC
3
2

(5.16a)

1
U dc ( S B S C ) dt + LiC
2

(5.16b)

The measured input converter currents ica, icb and the estimated virtual flux components S
,S are used for estimation of the instantaneous power. The voltage equation can be written
as

u S = Ri C +

d
( Li C + C )
dt

(5.17a)

In practice, R can be neglected, giving

uS = L

d iC d
di
+ C = L C + uC
dt dt
dt

(5.17b)

Using complex notation, the instantaneous power can be calculated as follows:

p = Re(u S i C )

(5.18a)

q = Im(u S i C )

(5.18b)

where * denotes the conjugate line current vector. The line voltage can be expressed by the
virtual flux as
- 58 -

uS =

d S jt
d
d
d S jt
S = ( S e jt ) =
e + j S e jt =
e + j S
dt
dt
dt
dt

(5.19)

where S denotes the space vector and S its amplitude. For the virtual flux oriented d-q
coordinates (Fig. 5.20), S=Sd, and the instantaneous active power can be calculated from
(5.10a) and (5.11) as
p=

d Sd
i C d + S d iC q
dt

(5.20)

For sinusoidal and balanced line voltages, equation (5.12) is reduced to

d Sd
=0
dt

(5.21)

p = Sd iCq

(5.22)

which means that only the current components orthogonal to the flux L vector, produce the
instantaneous active power.
Similarly, the instantaneous reactive power can be calculated as:

q=

d Sd
iCq + Sd iCd
dt

(5.23)

and with (5.13) it is reduced to:

q = Sd iCd

(5.24)

As mentioned in [4] for sinusoidal and balanced line voltage the derivatives of the flux
amplitudes are zero. By simulation and experiment investigation were proofed, that even for
distorted line voltage the simplified equations for the instantaneous active and reactive powers
can be used:

p = ( S iC S iC )

(5.25a)

q = ( S iC + S iC ) .

(5.25b)

The measured line currents iCa, iCb and the estimated virtual flux components S ,S are
delivered to the instantaneous power estimator block .

- 59 -

Fig. 5.9. VF-DPC control scheme

A VF-DPC control strategy main scheme is presented in Fig. 5.9. The commanded (delivered
from the outer PI DC voltage controller) active power pref and reactive power qref (set to zero
for unity power factor) values are compared with the estimated instantaneous p and q values,
respectively. The errors are delivered to PI controllers, where the variables are DC quantities
and steady state error were eliminated. The output signals from PI controllers after
transformation (5.29) are delivered to a Space Vector Modulator (SVM).

Fig. 5.10. Power estimation block

Fig. 5.10 shows an instantaneous powers estimation block. The angle is calculated using
estimated virtual flux components Sa ,Sb.

- 60 -

+#"
+#"#+

Fig. 5.11. VF-DPC scheme with Active Filtering Function (AFF) block

Fig. 5.12. Power estimation block

- 61 -

In this scheme of Fig. 5.11 measured input converter currents ica, icb and the estimated virtual
flux components Sa ,Sb are used for the power estimation Fig. 5.12. For a PWM rectifier
operation the reference active power pref (generated by the outer PI DC voltage controller) and
reactive power qref (set to zero for unity power factor) values are compared with estimated
instantaneous p and q values, respectively. The errors are delivered to PI controllers, which
eliminates steady state error. The output signals from PI controllers after transformation

pq/ :

uC
sin S
=
uC
cos S

cos S

uCp
uCq

sin S

(5.26)

where:

sin S = S /

( S ) + ( S )

cos S = S /

( S ) + ( S )

(5.27a)
.

(5.27b)

are used for switching signals generation by Space Vector Modulator.

Here a modified algorithm based on virtual flux, which operates directly on instantaneous
active and reactive power components is presented [5.6]. The instantaneous active and
reactive powers are estimated using currents intended to compensate ila, ilb, ilc and virtual flux

Sa ,Sb according to Eqs (5.11a and b) as:

pA = ( S il S il )

(5.28a)

q A = ( L il + L il )

(5.28b)

The calculated active power (pA) and reactive power (qA) are delivered to the high pass filter
(HPF) to obtain values of the instantaneous active power ( p A) and reactive power ( q A)
which finally are used as a compensating components. Adding active filtering function will
cause suitable distortion of input PWM rectifier current, which will assure almost sinusoidal
line current. It permits to use PWM rectifier as a current harmonics eliminating device.

- 62 -

Fig. 5.13. Instantaneous power waveforms for different current shapes.

a) current in phase with voltage b) current with phase shift c) distorted current
From the top: grid voltage, grid current, active and reactive power

Fig. 5.13 presents simulated examples of active and reactive powers for different current
shapes. It is obvious that for sinusoidal voltage and in phase current an active power has a
certain value and reactive power is equal 0 (Fig. 5.13a). In case that grid current is not in
phase with grid voltage but is still sinusoidal, the active power will have the same level, but
non zero value of reactive power will appear (Fig. 5.13b). If the current become a distorted
one, in active and reactive powers a pulsation component will be visible (Fig. 5.13c).
Summarizing, for higher harmonics elimination two high pass filters are needed, one for each
power component. For higher harmonics elimination and reactive power compensation, only
one high pass filter in active power is required (switch in Fig. 5.11).

+#"#.
+#"#
.

Fig. 5.14. VF-DPC control block

- 63 -

Fig. 5.15. Power estimation block

The nonlinear load current iL is not measured Fig. 5.1b. It is reconstructed by the converter as
a result of AC-line current sensor location at point of common coupling (PCC), where the
system controls the current to be sinusoidal and may be determined by considering the
summation of currents at the PCC.

iC = iS iL

(5.29)

The grid currents isa, isb and the estimated virtual flux components Sa ,Sb are used for
estimation of power components. The reference active power pref and reactive power qref
values are compared with the estimated instantaneous p and q values, respectively. The errors
are delivered to PI controllers. The output signals from PI controllers after transformation

pq/ are used as a reference signals for Space Vector Modulator.

- 64 -

6. Dimensioning of Power Converters

This chapter is devoted to dimensioning of power converters. This is obvious, that proper
dimensioning is very critical issue for designing and selection of PWM Rectifier. Main power
scheme of parallel connected conventional diode rectifier fed Adjustable Speed Drive (ASD)
and modern PWM rectifier/inverter fed system is shown in Fig.6.1. It is very simple to see
that PWM rectifier after some simple modifications in hardware and software can additionally
have active filtering function. Therefore, power relations between those two schemes: diode
and PWM rectifiers are very important for a design process.
S D = PD2 + QD2 + H D2

SC = PC2 + QC2 + H C2

Fig. 6.1. Power system scheme under consideration

Simulated ideal currents for Shunt Active Filter (SAF) operation are presented in Fig. 6.2b
and for PWM Rectifier having Active Filtering Function (AFF) operation in Fig. 6.2a.
a)

b)

Fig. 6.2. The system currents a) PWM rectifier with Power Factor Correction, b) Active Power Filter.
Simulations under ideal conditions
From the top: line current, nonlinear load current, PWM converter input current

It is required to calculate a proper power ratio of PWM Rectifier, especially when it will have
an Active Filtering Function. Therefore, if it will be calculated wrongly a converter will not
be able to deliver demanded power to the load or to proper compensation of nonlinear load.
Contrary, in the case of excesses dimension, it will be expensive for end user.
- 65 -

6.1 PWM Rectifier Rating

In this chapter a PWM Rectifier operation only is considered. Therefore, this converter
supplies only its own load, and does not compensate for diode rectifier/PWM inverter system
(Fig. 6.3).
S D = PD2 + QD2 + H D2

SC = PC

Fig. 6.3. PWM Rectifier operation

Among the power losses in the PWM converter are:

Power transistors switching losses,
AC-side inductor losses,
Heating losses, etc.
It will be considered an ideal PWM rectifier under ideal AC line conditions. The apparent
power of PWM rectifier is given using an RMS value of AC-side voltage and current as:

S = 3urms irms

(6.1)

For this expression, only fundamental components of PWM rectifier input current and voltage
are taken into account.

SC 2 = PC 2 + QC 2 ,

(6.2)

where:

PC = 3RI C2 , QC = 3 X L I C2 , SC = 3Z L I C2 and, Z = R 2 + X L 2

(6.3)

For any ideal input inductance (R=0), the apparent power can be expressed as follows:
SC 2 = P 2 + Q 2 = 3iC uC2 + ( X LiC ) 2

(6.4)

If we consider a unity power factor operation and omits converter losses, the input current iC
can be calculated as follows:

- 66 -

PC = 3iC uS , uLL = 3uS , then iC =

PC

(6.5)

3u LL

Finally the expression for rating of PWM rectifier can be presented in the form:

SC = PC 1 + (

X L PC 2
)
uLL 2

(6.6)

where: PC is load active power, XL reactance of the input filter, uLL line to line voltage.
The graphical representation of equation (6.6) is shown in Fig.6.4.

Fig. 6.3. PWM rectifier rating as a function of input inductance LC and DC-side load power PC a) low
power b) high power application

- 67 -

It can be seen that the power ratio of PWM rectifier strongly depends and increase with
increasing output power PC and input inductor value LC. This is because, the converter supply
active power to AC drive and reactive power to the input inductor. Therefore, the input
inductor value should be kept in reasonable value, otherwise for high power applications, high
value of input inductor will increase demanded power ratio SC of the converter even 10 times.

6.2. Shunt Active Power Filter (SAF) Rating

This chapter deals with dimensioning of power converter working as a Shunt Active Filter
(SAF). Therefore, this converter compensates only neighborhoods nonlinear loads and does
not supply active power PC=0 (Fig. 6.4).

S D = PD2 + QD2 + H D2

SC = QD2 + H D2

Fig. 6.4. Active Filtering operation

The Active Power Filter operation requires different kVA rating. It is calculated only
for compensation of higher harmonics of current, which typically for idealized diode rectifier
with inductor on DC-side.
For considerations in this section following assumptions are made:
-

Sinusoidal grid voltage,

A diode rectifier operates in ideal conditions and commutation effect is neglected,

A phase shift between a grid voltage and fundamental harmonic of diode rectifier
input current changes in the range from 00 to 300 (displacement factor).

Therefore, for calculations of the SAF kVA rating following points should consider:
-

THD of an diode rectifier input current,

displacement power factor,

Input inductor value.

- 68 -

Considering an ideal waveform of diode rectifier input current (rectangle waveform, Fig.
6.2b), we have:
2 3

iL ( t ) =

I DC

where I DC =

1
1
sin ( t ) + sin 5 ( t ) sin 7 ( t ) +
5
7
1
1
sin11( t ) sin13 ( t ) ...
11
13

(6.7)

PD
3 6 cos uS

In the case of ideal compensation, all harmonics and the reactive power will be eliminated. So
in this case the line current iS can be presented as follows:
2 3

iS ( t ) =

I DC sin ( t )

(6.8)

Then, from Eqs.(6.7)-(6.8) the input current of PWM Rectifier with active filtering function is
expressed as:

iC ( t ) =

2 3

I dc

1
1
sin ( t ) sin ( t ) + sin 5 ( t ) sin 7 ( t ) +
5
7
1
1
sin11( t ) sin13 ( t ) ...
11
13

(6.9)

The RMS value of input current, if considering only 5th, 7th, 11th, 13th harmonics, is obtained
as:
iC RMS

PD
= 2.075
3cos uS

(6.10)

The RMS value of input voltage on PWM Rectifier having active filtering function can be
calculated using following expression:
uC RMS =

1
2

u S ( t ) X L
0

dic ( t )
d ( t )

d ( t )

(6.11)

Therefore, finally the kVA rating is calculated in this form:

S = 3uC RMS iC RMS

(6.12)

- 69 -

5000

Apparent power S [VA]

4000

3000

2000

1000

1000

2000
3000
Output power Pc/Pd [W]

4000

5000

Fig. 6.6. SAF converter power rating SC versus diode rectifier output power PD

Fig. 6.6 shows converter power rating of SAF with few different displacement factors versus
diode rectifier output power PD. The waveforms show that SAF rating is lower then PWM
Rectifier rating (for the same load conditions). An SAF rating substantially increases with
displacement factor increasing. However, a displacement factor practically is not higher than
30 degrees, therefore, is shown that for low power applications power rating of PWM
Rectifier is always higher than power rating of SAF.
6000

Apparent power S [VA]

5000

4000

3000

2000

1000

0.002

0.004
0.006
Inductance Lc [mH]

0.008

0.01

Fig. 6.7. Converter power rating versus input filter inductance

- 70 -

Fig. 6.7 shows converter power rating SC versus input filter inductance LC. A comparison of
an example of PWM Rectifier (5kW load) with AFF (compensating 5kW loaded diode
rectifier) is presented. As shown a PWM Rectifier for low power applications is not sensitive
for input filter changes, while SAF is more sensitive for increase of input filter inductance.
Moreover, for the same load conditions an SAF requires lower power rating than PWM
Rectifier. A power rating of SAF depends strongly on displacement factor (phase shift
between grid voltage and 1st harmonics of diode rectifier input current) and increases together
with it.

6.3. PWM Rectifier with Active Filtering Function Rating

This chapter consider a power converter supplying its own load (PC 0) and in the same time
compensating neighborhoods nonlinear loads: diode rectifier/PWM Inverter (Fig. 6.8).

S D = PD2 + QD2 + H D2

SC = PC2 + QD2 + H D2

Fig. 6.8. PWM Rectifier with AFF operation

The kVA rating for PWM Rectifier having active filtering function is more
complicated then for only rectifying mode of operation, because it should additionally include
a compensation for a reactive QD and harmonic HD powers generated by a diode rectifier.
In the case of operation without a PWM Rectifier load (PC=0), the converter works as a Shunt
Active Filter.
Considering an ideal waveform of diode rectifier input current (rectangle waveform)
expressed by Eq. 6.7 and assuming ideal compensation the line current by Eq.6.8. Ideal input
PWM Rectifier current written as follows:
iC ( t ) =

PC
sin ( t )
3uS

(6.13)

The input current of PWM Rectifier with active filtering function has following form:
- 71 -

1
1
sin ( t ) + sin 5 ( t ) sin 7 ( t ) +
PC 2 3
2 3
5
7
(6.14)
+
iC ( t ) =
I sin ( t ) +
I
1
dc
dc 1
3uS
sin11( t ) sin13 ( t ) ...
11
13

where I DC =

PD
3 6 cos uS

The RMS value of input current, if considering only 5th, 7th, 11th, 13th harmonics, is obtained
as:
iC RMS =

PC
2uS

PC
2 2 PD
2 PD
+
+ 2.075
3cos uS
2uS 3cos uS

(6.15)

The RMS value of PWM Rectifier having active filtering function input voltage can be
calculated using Eq 6.11 and the kVA rating using Eq. 6.12, respectively.

#$ " % &

'

!! "

Fig. 6.9. Power ratings of the PWM converter - constant PWM Rectifier load power and variable
diode rectifier load power (1-5kW)

As shown in Fig. 6.9 the apparent power of the PWM Rectifier with Active Filtering Function
depends on diode rectifier power and input inductor value. For higher values of diode rectifier
power the apparent power of the converter increase nonlinearly. It shows that for higher
values of input inductor a higher power is required. This is result of higher voltage drop
across inductor. Fig. 6.6 gives a view for the required apparent power of the PWM Rectifier
- 72 -

with AFF in case of constant its own load power and variable power of a diode rectifier. As
show, the apparent power is higher then demanded PWM Rectifier load. A difference shows
how much power is required for AFF versus a diode rectifier power.

6.4 Design of passive components

The VSC connected to the grid needs an inductor mounted between VSC and a grid which
operates as a voltage sources. The simplest and most common us an L-filter, which contains
three series inductances, one in each phase.
The LC-filter contains the same inductances and in addition, has three parallel coupled
capacitors, but problems can be occurring due to resonances. The resonance frequency
depends on capacitor and grid inductance values, which varies on time. The main advantages
of such a filter are:

Low grid current distortion,

Reactive power production.

Reduction of the current harmonics around switching frequency and multiplication of

switching frequency is the main goal to get high performance PWM rectifier, which fulfills
IEEE 519-1992 standards in relation to EMC. High value of inductance in the frond of
rectifier can solve this problem, however this bulky and expensive solution, reduce dynamics
and operation range. It means voltage drop across the inductance, which has influence for the
current, is controlled by input voltage of the PWM rectifier but maximal amplitude is limited
by the DC-link voltage. Consequently, a high current (high power) through the inductance
requires either a high dc-link voltage or low inductance.
.#)#%
.#)#%

AC side L and LC input filter

The input inductor has to be designed carefully because low inductance will give a high
current ripple and will make the design more depending on the line impedance. The high
value of inductance will give a low current ripple, but simultaneously reduce the operation
range of the rectifier. The voltage drop across the inductance has influence for the line
current. This voltage drop is controlled by the input voltage of the PWM rectifier but maximal
value is limited by the DC-link voltage. Consequently, a high current (high power) through
the inductance requires either a high DC-link voltage or a low inductance (low impedance).

- 73 -

a)

b)

Grid side

Rectifier side

L
C

Fig. 6.10. Input filters a) L type, b) LC type

The aim of the input filters is to reduce the high harmonics at the grid side. The input filter
design procedure should take into account following aspects: power rating, line and switching
frequency. Input inductor value has to be calculated in % of the base values. Therefore, on the
beginning base values should be calculated.
Base impedance: Zb =

( EmLL ) 2
,
PC

(6.16)

1
,
S Zb

(6.17)

Base capacitance: Cb =

EmLL line to line rms voltage,

Where:

fs grid frequency,
PC active power absorbed by the converter in rated conditions,
The maximum value of input impedance defined as:
Lmax =

10% Z b

(6.18)

Therefore, the maximal inductance can be determinate as:

U D2 C
U
3
Im

2
f

(6.19)
L [mH]

10
9
8
7
6
5
4
3
2
1
0

20

40

60

80

100

I [A]

Fig. 6.11. Line inductor value versus rated input current calculated from Eq.(6.19)

- 74 -

Or in the other hand where no load conditions are considered, but the input current ripples
are taken into account.

L=

U LL
,where iripple=5%if
6 2 f S iripple
L [mH]

(6.20)

10
9
8
7
6
5
4
3
2
1
0

20

40

60

80

100

I [A]

Fig. 6.12. Line inductor value versus rated input current calculated from Eq.(6.20)

An LC filter consists also a capacitor, which together with an input inductor create a low pass
filter. A given cut-off frequency fcut-off is used for calculation of capacitance in this way:
C=

(6.30)

2 f cut off L

DC-link capacitor
For balanced three-phase system with neglected switches losses the DC-link model express
by: C

duDC
=
dt

p =1

iSp d p

PC
U DC

(6.31)

where dp is a switching function. For balanced three-phase system

p =1

iSp d p is equal to one.

For known acceptable peak ripple voltage of udc and switching frequency, the minimum
capacitor can be found as:
2+ 3
Cmin = PC

U LL
U DC

(6.32)

2 3U LL U DC f s

- 75 -

C [F]

0.004

0.0032

0.0024

0.0016

8 .10

0
20

40

60

80

100

P [kW]

Fig. 6.13. DC-side capacitor value versus the output power

.#)#"
.#)#"
A selection of input inductance for APF proceeds with different conditions then it was taken
for PWM Rectifier. The main difference is the APF should be able to force currents with high
i
parameter, to be capable compensate higher harmonic currents produced by diode
t

rectifiers. Therefore, the simplest equation for an input inductance value has following form:

U DC
2 f s I

(6.33)
0.8

L [mH]

0.64

0.48

0.32

0.16

20

40

60

80

100

I [A]

Fig. 6.14. Line inductor value versus rated input current calculated from Eq.(6.33)

While, a DC link capacitor minimal value can be calculated using equation presented below:

C=

Pm

(6.34)

2
o U DC

where: Pm amplitude of power pulsation, - UDC voltage error, o - frequency of pulsation

- 76 -

0.004

0.0035

C [F]

0.003

0.0025

0.002

0.0015
600

650

700

750
U [V]

800

850

900

Fig. 6.15. DC-link capacitor value versus DC-link voltage

Fig. 9.6 shows a value of required DC-link capacitor value versus demanded DC-link voltage.
As mentioned the capacitance decreases for DC-link voltage value.
Tab. 6.1. Equations for passive elements design

Parameter

PWM Rectifier

Input
Inductance 1

Input

Cmin = PC

U
L DC
2 f s I

Diode Rectifier
L

U LL
6 2 f S iripple

2+ 3

DC
Capacitance

2
u dc
E m2
3
Im

L=

Inductance 2

Active Filter

U LL
U DC

C=

2 3U LL U DC f s

U max
Ls
di
dt

L=

Pm
~

2
o U DC

C = PC

uS
2 fI

2
54 2 f S U LL U DC

A PWM Rectifier and SAF have the same converter topology, both of them require an passive
elements like: input inductance (that shapes the input currents) and DC-link capacitance
(energy storage device). A DC-link capacitance of the SAF compared to a PWM Rectifier
DC-link capacitance is always smaller, since the SAF has smaller peak input current and no
real power delivery. A size of diode rectifier DC-link capacitance is much larger than of
PWM Rectifier or the SAF. For given (the same) peak ripple voltage requirement, the first
two converters operates with switching frequency, while a diode rectifier operate with
significantly smaller grid frequency. The typical DC-link capacitance value of SAF is above
50% smaller than that of PWM Rectifier. While a diode rectifier DC-link capacitance can be
about 15 times larger than that of PWM Rectifier.

- 77 -

&'((
.#)#$ &'
As mentioned in Chapter 3 a minimal value of DC-link voltage for PWM converters can be
calculated from following equation:

U DC min uS ( rms ) 3 2 = 2, 45 uS ( rms )

(6.35)

A minimal DC-link voltage UDCmin is equal to 560 V. Therefore, typically it is set to 600 V.
For SAF applications to obtain high value of

iS
, a high value of DC-link voltage is required.
TS

iS U DC
=
TS
LC

(6.36)

Above mentioned equation, determine a DC-link voltage for given input inductance LC and
iS
parameter (conditioned by a diode rectifier, described in Chapter 2). Therefore, the SAF
TS

is not suitable for high power applications due to their high DC-link voltage requirements.

6.5 Conclusions

SAF requires lower power rating than PWM Rectifier (for low power applications)

A power ratio of PWM rectifier SC strongly depends on output power PC and input
inductor LC value,

A power rating of SAF depends on displacement factor (phase shift between grid
voltage and 1st harmonics of diode rectifier input current), a diode rectifier load as
well as on input inductor value,

Demanded apparent power of a PWM Rectifier SC with AFF will always be higher
then it results from its own load value PC and depends on diode rectifier load P, as
well as on phase shift angle ,

The kVA rating of SAF is more than two times less then rating of PWM Rectifier (for
the same load conditions).

- 78 -

7. Simulation and Experimental Results

The operation of VOC (Voltage Oriented Control) and VF-DPC (Virtual Flux based
Direct Power Control) schemes under different grid voltage conditions for PWM Rectifier and
Shunt Active Filtering (SAF) operation has been simulated using the MATLAB/SIMULINK
and SABER software. Experimental results were obtained in laboratory set-up described in
Appendix. The main electrical parameters of the power circuit are given in Table I.
Tab. 7.2 Basic parameters of the system under study
Parameters

Simulation

Experiment

Resistance of reactors R:

100 m

100 m

Inductance of reactors L:

10 mH

10 mH

DC-link capacitor:

450 uF

450 uF

Sampling frequency:

10 kHz

10 kHz

Switching frequency f:

10 kHz

10 kHz

Phase voltage V:

230 RMS

150 RMS

DC-link voltage:

600 V

400V

PWM rectifier load resistance R:

150

150

Diode rectifier load resistance R:

150 / 50

150 / 50

The simulation and experimental study has been performed with few main objectives:
-

Presenting and explaining the PWM Rectifier operation, with an ideal sinusoidal and
distorted unbalanced grid voltage, as well as comparison of VF-DPC with conventional
VOC control algorithm. The results present the steady state and dynamic performance of
the system,

Introducing the active filtering function (AFF) for PWM Rectifiers, both for VOC and
VF-DPC control algorithms. A VOC consist of two different methods of compensation
higher current harmonics: the first simple one, non selective and the second one called the
selective compensation is compared with VF-DPC with a compensation of harmonics
based on p-q theory,

Additionally, a closed loop control method will be introduced and compared with open
loop control,

Introduction of possible grid voltage disturbances,

Operation of diode rectifier under different grid voltage conditions,

- 79 -

Introduction of advanced Synchronous Double Reference Frame Phase Locked Loop

(SDRF-PLL) approach which makes control system insensitive for a majority of grid
voltage disturbances,

Introduction of passive elements influence for operation of PWM Rectifier.

The experimental results were measured on laboratory setup with dS1103 DSP board.

Both control strategies were implemented in a system with sampling and switching frequency
10 kHz and non ideal grid voltage conditions. The chosen sampling frequency was 10 kHz to
achieve effective active filtering operation. It is well known that for good extraction of higher
harmonics content, a high sampling frequency is required. The main harmonics produced by
diode rectifiers are: 5, 7, 11 and 13. A 13th harmonic frequency is 650, for 10 kHz switching
frequency it gives only 15 samples per period. Therefore, 10 kHz seems to be a minimal value
of sampling frequency from the point of view of effective filtering.

Fig. 7.0. General system scheme

- 80 -

7.1 Voltage Oriented Control (VOC)

:#%#%
a) Simulation

b) Simulation

Fig. 7.2. Stationary operation of VOC PWM Rectifier

a) ideal grid conditions b) distorted grid 5% of 5th harmonic
From the top: grid voltage, input current, DC-link voltage, FFT of input current

a) Simulation

b) Experiment

Fig. 7.3. Dynamic state operation: simulation load step change

From the top: grid voltage, input current, d and q axis current, DC-link voltage

- 81 -

a) Simulation

b) Experiment
usa

isa

ica

ila

Fig. 7.4. Steady state operation of the system containing of PWM Rectifier and diode rectifier
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

a) Simulation

b) Experiment

Fig. 7.5. PWM Rectifier load step change marked with vertical line
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

Fig. 7.1 presents a steady state operation of VOC scheme (presented in Fig. 5.3) of PWM
Rectifier for ideal grid conditions (a) and 5% of 5th harmonic distorted grid voltage (b). As
shown the VOC scheme in case of distorted grid voltage and without any additional PLL has
significantly distorted input current (THD=9%). In Fig. 7.2 a load step change is presented
and a coupling between d and q axis can be observed. Some decoupling techniques to
eliminate for this effect are presented in Appendix.
- 82 -

Fig. 7.3 and 7.4 presents a steady state operation and dynamic response of PWM Rectifier,
respectively. A PWM Rectifier operates in parallel with diode rectifier. The input current ica is
controlled to be sinusoidal, but together with input diode rectifier current ila gives significantly
distorted grid current isa. After introducing the active filtering function the PWM Rectifier can
drew a distorted current to obtain a sinusoidal grid current. In the next section two different
active filtering approaches are presented.

:#%#"

Fig. 7.5 and 7.6 presents an activation and steady state operation of VOC scheme with active
filtering (Fig.5.4). First two periods on Fig. 7.5 presents a PWM Rectifier operation, where
converter input current is controlled to be a sinusoidal. Then the active filtering function is
activated and sinusoidal waveform of the PWM Rectifier becomes adequately distorted to
obtain sinusoidal shape of grid current.
a) Simulation

b) Experiment

Fig. 7.6. Activation of AFF marked with vertical line

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 83 -

a) Simulation

b) Experiment
usa

i sa

i ca

i la

Fig. 7.7. Steady state operation

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

:#%#$

A block diagram of control algorithm under study is presented in Fig. 5.5. Compared to total
harmonics compensation (Fig.5.4), where the active filtering function calculate total
harmonics content for compensation, the selective harmonics method compensates the main
harmonics individually. Therefore, it gives better results, however require more powerful
microprocessor for implementation. Fig. 7.7 and 7.8 presents the steady state and transients
when Active Filtering Function (AFF) is achieved.
a) Simulation

b) Experiment
usa

isa

ica

ila

Fig. 7.8. Steady state operation

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 84 -

a) Simulation

b) Experiment

Fig. 7.9. Activation of AFF marked with vertical line

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

a) Simulation

b) Experiment

Fig. 7.10. Nonlinear load step change marked with vertical line
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

:#%#)'
This operation gives a possibility of remove one pair of current sensors (Fig. 5.6). Therefore,
an electronic circuit as well as a control algorithm becomes simpler. In this situation with a
PWM Rectifier conventional control strategy can overtake action of active filtering. The only
- 85 -

one change is a current sensors location, which is moved from the converters input to the grid
side. This is significant simplification of the system, but it becomes hole system less stable.
Additional, problems occur over current protection are presented.
a) Simulation

b) Experiment
usa

isa

ica

ila

Fig. 7.11. Steady state operation

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

a) Simulation

b) Experiment

Fig. 7.12. Nonlinear load step change marked with vertical line
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 86 -

7.2 Virtual Flux Based Direct Power Control (VF-DPC SVM)

:#"#%

Fig. 7.12 and 7.13 presents the steady state and dynamic respond for PWM Rectifier
operation respectively. As shown even for distorted grid voltage grid current is almost
sinusoidal. This result from natural low pass filter behavior of virtual flux estimation used in
instantaneous active and reactive power estimation algorithm (Fig. 5.9). Note that, the
coupling effect between active and reactive powers practically does not exist. This is result of
very good behavior of the VF-DPC system described in Chapter 5.2.
a) Simulation

b) Experiment

Fig. 7.12. PWM rectifier operation with distorted grid voltage - steady state
From the top: grid voltage (Ua), grid current (isa)

a) Simulation

b) Experiment

Fig. 7.13. PWM rectifier operation with distorted grid voltage load change
From the top: grid voltage (Ua), grid current (isa) spectrum of grid current, active and reactive power

- 87 -

a) Simulation

b) Experiment
Graph0
(V) : t(s)

400.0

ua

(V)

200.0

0.0

-200.0

-400.0

(A) : t(s)

20.0

ia

(A)

10.0

0.0

-10.0

-20.0

(A) : t(s)
ica

(A)

10.0

0.0

-10.0
(A) : t(s)
10.0

ila

(A)

5.0

0.0

-5.0

-10.0
0.06

0.07

0.08

0.09

0.1

t(s)

Fig. 7.14. PWM rectifier operation at steady state

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

In Fig. 7.14 is presented situation, where a PWM Rectifier operates in parallel with diode
rectifier. The input current ic is controlled to be sinusoidal, but together with input diode
rectifier current il gives significantly distorted grid current is.

:#"#"

The Active Filtering Function presented in Fig. 5.9 gives new advantages for a PWM
Rectifier, like compensation of nonlinear load currents. Fig. 7.15 shows a steady state for
active filtering operation. A converter input current is significantly distorted, while a grid
current becomes almost sinusoidal.
a) Simulation

b) Experiment

Fig. 7.15. Active filtering operation at steady state

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 88 -

a) Simulation

b) Experiment

Fig. 7.16. Start up of active filtering marked with vertical line

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

Fig. 7.16 presents waveform when the active filtering function is switched on. The left part
shows conventional PWM rectifier operation, then after three periods active filtering function
was applied. This action deforms converter current to provide almost sinusoidal grid current.
The notches visible on the grid voltage waveform (Fig. 7.16b) are generated by significantly
distorted currents created by the system during active compensating operation. In Fig. 7.17
nonlinear load change is presented. The amplitude of input diode rectifier is higher, this
produce higher ripples in PWM converter input current to obtain sinusoidal waveform of grid
current.
a) Simulation

b) Experiment

Fig. 7.17. Active filtering operation nonlinear load change marked with vertical line
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 89 -

:#"#$ '
a) Simulation

b) Experiment
Graph5
(V) : t(s)

400.0

ua

(V)

200.0

0.0

-200.0

-400.0

(A) : t(s)
ia

20.0

(A)

10.0

0.0

-10.0

-20.0
(A) : t(s)
15.0

ica

10.0

(A)

5.0
0.0
-5.0
-10.0
-15.0

(-) : t(s)

15.0

ila

10.0

(-)

5.0
0.0
-5.0
-10.0
-15.0
0.04

0.0425

0.045

0.0475

0.05

0.0525

0.055

0.0575

0.06

0.0625

0.065

0.0675

0.07

0.0725

0.075

0.0775

0.08

t(s)

Fig. 7.17. Active filtering operation at steady state

From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

Fig. 7.17 and 7.18 presents a steady state and nonlinear load step change operation
respectively. As mentioned in Chapter 5, this control scheme uses current sensors located on
the grid side. Therefore, a minimal number of current sensors is adopted.
a) Simulation

b) Experiment
Gr a p h 5
(V ) : t(s )

4 0 0 .0

ua

2 0 0 .0

0 .0

-2 0 0 .0

-4 0 0 .0

(A) : t(s )
ia

2 0 .0

1 0 .0

0 .0

-1 0 .0

-2 0 .0
(A) : t(s )
1 5 .0

ic a

1 0 .0
5 .0
0 .0
-5 .0
-1 0 .0
-1 5 .0

(-) : t(s )

1 5 .0

ila

1 0 .0
5 .0
0 .0
-5 .0
-1 0 .0
-1 5 .0
0 .0 4

0 .06

0.0 8

0 .1

0 .1 2

0 .1 4

0 .1 6

t(s )

Fig. 7.19. Active filtering operation nonlinear load step change marked with vertical line
From the top: grid voltage (Ua), grid current (isa) (20A/div), converter current (ica) (10A/div), distorted
current (ila) (10A/div)

- 90 -

Fig. 7.19 shows a nonlinear load step change that results on higher amplitude of a diode
rectifier current. Higher ripples on PWM converter input current are visible. As a result higher
amplitude of grid current is presented.

7.3 Summary - Comparison of Compensating Results

This section presents a compensation results comparison. In Tab. 7.2 a THD and HD
parameters are collected. Fig. 7.20 and 7.21 shows a graphical representation of data collected
in Tab. 7.2 for VOC and VF-DPC SVM respectively.
Tab. 7.3. Comparison of compensation methods: 1 ideal grid voltage, 2 distorted grid voltage

HD [%]

THD isa
[%]

5h

7h

11h

13h

11,47

9,62

3,06

1,88

0,92

Total compensation

3,4

1,85

0,78

0,85

0,32

Selective compensation

2,81

1,56

0,81

0,77

0,32

Closed loop

3,5

1,92

0,81

0,92

0,35

PQ based compensation

3,5

1,33

1.02

0.86

0.43

Closed loop

3,8

1,11

1,17

0,88

0,88

No compensation

VOC1

VF-DPC

HD [%]

THD isa
[%]

5h

7h

11h

13h

12,17

10,12

3,38

1,98

1,42

Total compensation

6,40

2,87

1,76

1,86

1,34

Selective compensation

5,81

2,57

1,83

1,75

1,33

Closed loop

6,50

2,93

1,84

1,91

1,34

PQ based compensation

4,0

1,56

2.02

1.06

0.93

Closed loop

4,4

1,27

2,07

1,04

1,08

No compensation

VOC2

VF-DPC2

- 91 -

a)

b)
12

12

Non compensated
VOC + full
VOC + selective compensation
VOC closed loop

10

HD [%]

HD [%]

Non compensated
VOC + full
VOC + selective compensation
VOC closed loop

10

11

13

Harmonic number

11

13

Harmonic number

Fig. 7.20. HD results for VOC a) ideal grid voltage, b) distorted grid voltage

a)

b)
12

12

Not compensated
VF-DPC SVM open loop
VF-DPC SVM closed loop

10

HD [%]

HD [%]

Not compensated
VF-DPC SVM open loop
VF-DPC SVM closed loop

10

0
5

11

13

Harmonic number

11

13

Harmonic number

Fig. 7.21. HD results for VF-DPC SVM a) ideal grid voltage, b) distorted grid voltage

For methods VOC and VF-DPC SVM the obtained results are quite similar and the HD index
is less than 2 % for all considered higher harmonics. This can be a result of limited sampling
frequency (10 kHz). Such a value can be very high for a PWM Rectifiers, especially for high
power applications. However, it is rather small in case of Active Filters. The highest
considered harmonic number is 13. This means the 650 Hz, for 10 kHz sampling frequency
that gives about 15 samples per period of 13th harmonic, this can be not enough for proper
recognition of harmonic content. Additional increasing of sampling frequency gives better
results for compensation of higher harmonics like 13th , 17th, 19th etc.

7.4 Rectifying and Regenerative Mode of PWM Rectifier Operation

The PWM Rectifier in most cases is applied in ASD when regenerative mode of operation is
required. Also in energy saving applications it works in regenerative mode, where the energy

- 92 -

flows from the load to the grid. In this situation a grid current will be in phase with a grid
voltage to obtain a unity power factor. However, the amplitude of the grid current will be in
opposite phase.
Fig. 7.22 presents simulation results of a) PWM rectifier operation mode and b) PWM
Rectifier having active filtering function. It can be observed that the grid current Fig. 7.22b
compared with Fig. 7.22a becomes almost sinusoidal and is in phase with grid voltage, which
provides unity power factor. In this situation converter input current is more distorted to
compensate for higher harmonics of nonlinear load current.
a)

b)

Fig. 7.22. Simulation results for rectifier operation mode. a) PWM Rectifier operation mode b) Active
filtering function of PWM Rectifier
From the top: grid voltage, grid current, converter current, nonlinear load current.

Fig. 7.24 shows a regenerative operation mode of PWM Rectifier without a) and with b)
active filtering function activated. In worst situation grid current can be more distorted then
presented in Fig. 7.23a and for equal load conditions for diode and PWM rectifiers could be
significantly distorted like in Fig. 7.23. That precisely shows that active filtering function of
PWM Rectifiers can be very useful in topic of harmonics pollution control. Additionally, it
works correctly in both operating modes of PWM Rectifier: rectifying and regenerating.

- 93 -

Fig. 7.23. Simulation results for regenerative mode for equal loads of diode and PWM Rectifier.
From the top: grid voltage, grid current, converter current, nonlinear load current.

a)

b)

Fig. 7.24. Simulation results for regenerative operation mode. a) PWM Rectifier operation mode b)
Active filtering function of PWM Rectifier
From the top: grid voltage, grid current, converter current, nonlinear load current.

Fig. 7.25 presents percentage content of higher harmonics in grid current for PWM Rectifier
rectifying mode (red), regenerative mode (green) and applied active filtering mode (blue). As
shown active filtering function reduces harmonics content even few times and HD factor is no
higher than 2%.

- 94 -

20

Not compensated rectyfying mode

Not compensated regenerative mode
Filtering function applied

18
16
14

HD [%]

12
10
8
6
4
2
0
5

11

13

Harmonic number

Fig. 7.25. Percentage harmonics content PWM Rectifier rectifying and regenerative operation
(under 5% of 5th harmonic grid voltage distortion)
8

10

20

15

6
4

10
4

-2

-2

-5

-4
-4

-10
-6

-6
-8
-8

-15

-8
-6

-4

-2

10

-10
-10

-8

-6

-4

-2

10

15

-15

-10

-5

10

15

20

-15

-10

-5

10

15

20

20

15

10

-20
-20

10
4

2
0

-2

-5

-5

-4

-10
-6

-10

-15

-8
-10
-10

-8

-6

-4

-2

10

-15
-15

-10

-5

10

15

-20
-20

Fig. 7.26. Current vector locus of: a) diode rectifier input currents, b) PWM Rectifier and c) grid
currents (where AFF is not applied), d) and e) PWM Rectifier currents (where AFF is applied) for
regenerative and rectifying operation mode, f) grid currents while AFF applied.

Fig. 7.26 shows current vector locus for oscillograms presented in Fig. 7.22 and 7.24.
Significantly distorted diode rectifier input current is presented in Fig. 7.26a, while a PWM
Rectifier has almost ideal circular shape (Fig. 7.26b). Therefore, grid current (Fig. 7.26c)
becomes distorted. For AFF activated, the PWM Rectifier currents (rectifying and
regenerating mode Fig. 7.26e and 7.26d respectively) becomes distorted, while a grid current
(Fig. 7.26f) is almost circular.

- 95 -

7.5 Typical Grid Voltage Distortion

The power quality problems [5.10, 5.16] can be demonstrated as: nonstandard voltage, current
or frequency deviation, which results in a failure or a disoperation of end-use equipment. The
most often appear grid voltage distortions can be summarized as:

Voltage sags (drop in voltage as a result of starting high power motors, few-cycles
duration).

Voltage swell (short-term increase in voltage of a few cycles duration as a result a

single line-to-ground faults or energizing a capacitor bank).

Interruption (few-cycles duration).

Harmonics (produced by applied nonlinear elements in power systems, such as, power
electronic switches, saturated magnetic components).

Typical waveforms of grid voltage disturbances are shown in 7.28.

Fig. 7.27. Grid voltage emergency conditions: a) voltage nothing, b) impulsive, c) oscillatory, d)
voltage sag, e) voltage swell, f) voltage interruption, g) voltage flicker

- 96 -

Presented grid voltage disturbances have tremendous impact on proper operation of electronic
equipment like a diode or PWM Rectifiers. Therefore, those disturbances in a grid system can
cause malfunction or damage of electronic equipment.

:#+#%&
a)

THDu = 0[%]

b)

THDu = 5[%]

c)

400

400

400

200

200

200

-200

-200

-200

-400
0.08

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

-400
0.08

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

-400
0.08

-5

-5

0.08

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

0.08
495

495

490

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

-5

500

Unbalanced voltage

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

0.08
505
500
495
490

490
0.08

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

485
0.08

0.082

0.084

0.086

0.088

0.09

0.092

0.094

0.096

0.098

0.1

485
0.08

Fig. 7.28. Operation of diode rectifier for a) ideal grid voltage conditions, b) distorted of 5th harmonics
grid voltage, c) unbalanced grid voltage.
From the top: grid voltage, grid current, DC-link voltage.

As shown in Fig. 7.28 unbalanced grid voltage has a negative influence on grid currents as
well as on DC-link voltage. Surprising is, that for harmonics distorted grid voltage obtained
results are a bit better, then for ideal grid conditions. It is s reason of higher grid voltage,
therefore a grid current looks more squared and a DC-link voltage is smoother.
a)

-10[%]

b)

400

400

200

200

-200

-200

-400
0.06

0.08

0.1

0.12

0.14

0.16

0.18

-400
0.06

10

10

-5

-5

-10
0.06

+10[%]

0.08

0.1

0.12

0.14

0.16

0.18

0.08

0.1

0.12

0.14

0.16

0.18

0.08

0.1

0.12

0.14

0.16

0.18

-10
0.08

0.1

0.12

0.14

0.16

0.18

550

0.06
560
540

500

520
450
400
0.06

500
480
0.08

0.1

0.12

0.14

0.16

0.18

0.06

Fig. 7.29. Operation of diode rectifier for a) voltage swell, b) voltage sag.
From the top: grid voltage, grid current, DC-link voltage.

- 97 -

Fig. 7.29 presents operation of a diode rectifier under voltage swell (a) and voltage sag (b). As
shown a grid current decrease and increase respectively. Moreover, a DC-link voltage
increases and decreases respectively.
400
200
0
-200
-400
0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2

0.08

0.1

0.12

0.14

0.16

0.18

0.2

0.08

0.1

0.12

0.14

0.16

0.18

0.2

20
10
0
-10
-20
0.06
550
500
450
400
0.06

Fig. 7.30. Operation of diode rectifier for one phase voltage interrupt.
From the top: grid voltage, grid current, DC-link voltage.

Fig. 7.30 presents operation of diode rectifier for one phase voltage interrupt. It is well visible,
that in this situation a diode rectifier becomes a one phase H type bridge, supplied from line to
line voltage. A decreasing effect of DC-link voltage is present and voltage level fluctuations
appears.

Im [ A ]

Phase C

Im [ A ]

Phase B

Im [ A ]

Phase A

-5

-5

-5

0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
t [s]

0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
t [s]

0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
t [s]

6
4
Im [ A ]

Im [ A ]

2
0

THD = 35.93[%]

10

15

20
f=n*50 [Hz]

25

30

35

40

THD = 39.99[%]

Im [ A ]

THD = 27.56[%]

10

15

20
f=n*50 [Hz]

25

30

35

40

10

15

20
f=n*50 [Hz]

25

30

35

Fig. 7.31. Operation of diode rectifier for unbalanced grid voltage conditions.
From the top: grid voltage, grid current, 1st-harmonic of grid current, FFT of grid current.

- 98 -

40

Fig. 7.31 shows unbalanced grid voltage impact for diode rectifier operation. As shown each
phase is distorted individually, which introduce an unsymmetrical conditions.

:#+#"
A PWM Rectifier with VF-DPC SVM scheme is not robust for all types of grid voltage
distortions. As shown in Fig. 7.32 for unbalanced grid voltage, significantly input currents are
obtained. Additionally, DC-link voltage fluctuations are presented. Therefore, an additional
PLL system is required for complete protection of the system from grid voltage disturbances.
400
200
0
-200
-400
0.06

0.07

0.08

0.09

0.1

0.11

0.12

0.07

0.08

0.09

0.1

0.11

0.12

0.07

0.08

0.09

0.1

0.11

0.12

20
0
-20
0.06
670
660
650
640
630
0.06

Fig. 7.32. Operation of PWM Rectifier under distorted and unbalanced grid voltage conditions
From the top: Grid voltage, grid current, DC-link voltage.

The advanced PLL algorithm presented in [9.3] were selected and implemented in VF-DPC
SVM control algorithm.

va
vb
vc

[T ]

v
v

[T ]
+
dq

vd+
vq+

k p + ki

'

'

'

vd

sin

-2

Fig. 7.33. Synchronous Double Reference Frame Phase Locked Loop (SDRF-PLL) [9.3]

The results obtained with (SDRF-PLL) are much promised, the control system is robust
against of most grid voltage disturbances. This assure proper operation of the system for

- 99 -

abnormal and failure grid conditions. Bellow are presented selected simulation results with
illustrate VF-DPC SVM scheme with advanced PLL system operation.

Fig. 7.34. Operation of PWM Rectifier under distorted and unbalanced grid voltage conditions
From the top: grid voltage, grid current.

Fig. 7.35. Operation of PWM Rectifier under grid voltage sag.

From the top: grid voltage, grid current.

Fig. 7.36. Operation of PWM Rectifier under grid voltage swell.

From the top: grid voltage, grid current.

- 100 -

Fig. 7.37. Operation of PWM Rectifier under grid voltage momentarily one phase interruption.
From the top: grid voltage, grid current.

In figures 7.34 - 37 operation of PWM Rectifier under several different grid voltage
distortions are presented. All of them show three phase grid voltage (upper waveform) and
three phase PWM Rectifier input current (lower waveform). Fig. 7.34 presents the 5%
distortion of 5th harmonic and 10% unbalance. Fig. 7.35 and 36 shows 10% voltage sag and
swell respectively. Finally, Fig. 7.37 shows momentarily interruption in one phase. Those
results illustrate stable operation of PWM Rectifier under different grid voltage conditions is
guaranteed.

7.6 Influence of Passive Components, DC-link Voltage and Converter

Power Variations
:#.#%

'

This chapter presents results of VF-DPC-SVM for different parameters variations.

rectifier operation
active filtering

THD [%]

3
200

400

600

800

1000

C [uF]

Fig. 7.37. Grid current THD versus value of DC side capacitor

- 101 -

As presented in Fig. 7.38 a grid current THD decreases with increasing value of DC-side
capacitor. This can be a result of storage bigger value of energy in capacitor.
8

rectifier operation
active filtering

THD [%]

2
4

12

16

20

L [mH]

Fig. 7.39. Grid current THD versus value of AC-side inductor

Fig. 7.39 shows grid current THD versus value of AC-side inductor. As shown in Fig. 7.39 the VFDPC SVM is not much sensitive for input inductance changes, but for active filtering function this
parameter changes.

'

10

rectifier operation
active filtering
8

THD [%]

:#.#" &'(
&'(

500

600

700

800

900

1000

UDC [V]

Fig. 7.40. Grid current THD versus value of DC-voltage

- 102 -

Fig. 7.40 presents a grid current THD versus value of DC-voltage. It is well visible that high value
of DC voltage impose low value of grid current THD for both PWM and active filtering operation.

Line current THD [%]

8
7
6
5
4
3
2
0

Active power of PWM Rectifier[kVA]

Diode Rectifier current [A]

Fig. 7.41. Grid current THD versus: a) active power of PWM Rectifier and b) diode rectifier power

7.7 Discussion on Digital Signal Processor Implementation

:#:#%'
:#:#%
'

'

Differences between the control techniques with respect to the computation complexity are
presented in Fig. 7.41 and 7.42. First one presents the number of instructions per sample
cycle, the second one shows computation intensity (dSPACE 1103).
400

Number of instructions per sample time

350
300
250
200
150
100
50
0

VOC

VF-DPC

VF-DPC
+PQ

VOC
+ Total

VOC
+ Selective

Fig. 7.41. Number of instructions per sample time

- 103 -

60

Computation intensity dSPace

50

40

30

20

10

VOC

VF-DPC

VF-DPC
+PQ

VOC
+ Total

VOC
+ Selective

Fig. 7.41. Computation intensity dSPACE

:#:#%6

<

A sampling time TS selection is very important from the digital control point of view.
First of all, high sampling time TS is required for the proper reconstruction and selection of
higher harmonics content. For a chosen minimal required number of samples per period and
limited higher harmonic, the minimal sampling time can be selected (Tab. 7.3).

Tab. 7.4. Selection of sampling time TS

Harmonic number
5
7
11
13

Corresponding
frequency [Hz]
250
350
550
650

Ts(min) [kHz]
4
5.5
8.5
10

For the parameters presented in Tab. 7.3 a minimal required number of samples were 15.
Indirectly, a sampling time TS has an influence for compensation capability (

i
resulting
t

from a diode rectifier operation, mentioned in Chapter 2) specially, when a sampling

frequency is not equal to switching frequency of the modulator. In case when a sampling
frequency is higher then a switching frequency, the modulator can loose some information
from the control algorithm. The response of the modulator in this case can be not complete or
delayed. That may cause in malfunction of the compensation.

- 104 -

7.8 Conclusions
This chapter presents simulation and experimental results of two different control strategies:
conventional control strategy for PWM rectifiers - Voltage Oriented Control (VOC), and
novel grid voltage sensorless Virtual Flux based Direct Power Control (VF-DPC) with
constant switching frequency using Space Vector Modulator (SVM).
Steady state and dynamic behavior as well as harmonic compensation effectiveness of VOC
strategy depends on applied current control technique (see Appendix A.5). In case of
unbalanced grid voltage the PLL is strongly required to obtain possibly close sinusoidal grid
current. In contrast performance of VF-DPC SVM depends strongly on accuracy of
instantaneous active and reactive estimation, which in the case of VF based calculations, is
more robust to higher harmonics in grid voltage. However, both VOC and VF-DPC SVM are
very sensitive for unbalanced grid voltage (Fig. 7.32). Therefore, to compensate for
unbalanced voltage, a SDRF-PLL [9.1-9.3] system has been applied. A VF-DPC control
strategy is additionally equipped on SDRF-PLL approach, which makes control system robust
for a majority of grid voltage disturbances (Fig. 7.27). Regarding the dynamic performance in
VOC scheme a coupling effect between id and iq currents can be observed. This can be
compensated for using decoupling algorithm presented in Appendix A.5. On the other hand in
VF-DPC scheme the coupling between instantaneous active and reactive power practically
does not exist (see Fig. 7.6). In the case when PWM Rectifier should be extend with Active
Filtering Function, it can be implemented in two ways: open (Fig. 5.1.a) or closed loop (Fig.
5.1.b). For both open and closed loop control strategies two control issues are presented. The
open loop control strategy requires additional current sensors and modification of control
algorithm. The closed loop control strategy operates like a PWM rectifier with only changed
location of current sensors. However, the open loop strategy allows controlling current
harmonics content and grid power factor independently (see Fig. 5.11). So, the power factor
compensation can be used as an option. The Active Filtering Function (AFF) for both control
strategies has been presented. This is suitable solution, which extend functionality of PWM
Rectifier. A device can work as typical PWM rectifier or/and operate as Shunt Active Filter
(SAF). After small modification of hardware and software as well as appropriate increase of
PWM converter kVA power, it is possible to compensate for neighboring non-linear power
loads supplied at the PCC. For VOC method there are proposed two different higher
harmonics compensation strategies: total (Fig. 5.4) and selective (Fig. 5.5) harmonics
compensation methods. A VF-DPC uses only one compensation method based on pq power

- 105 -

theory (Fig. 5.11). The effectiveness of the current harmonic reduction depends strongly on
the used control strategy, but also on grid voltage distortion. VF-DPC SVM scheme with AFF
performs much better (about two times) as VOC (in depended on harmonic compensation
method: total or selective) under distorted grid voltage (see Tab. 7.2). However, under pure
sinusoidal grid voltage both control methods gives similar results. Note that in the case of
VOC scheme selective harmonic compensation is lightly better as total compensation.
The regenerative mode of operation (Fig. 7.22) is very critical in the case if the nonlinear load
current and regenerative current of PWM Rectifier are at the same value (Fig. 7.23).
However, the AFF is able to eliminate this phenomenon (Fig. 7.24).
Additionally, influence of passive elements and DC-link voltage values is introduced and
discussed, as well as selection of sampling time.
Tab. 7.4. Comparison of VOC SVM+AFF with VF-DPC SVM+AFF

VOC AFF
No

VF-DPC AFF
No

Current control loops

Yes

No

Power control loops

No

Yes

Robust for higher harmonics in grid voltage

No

Yes

Possible use of different SVM strategies

Yes

Yes

Outer DC-link voltage regulation

Yes

Yes

parameter
Grid voltage sensor

Tab. 7.5. Comparison of conventional and simplified VF-DPC AFF

Additional current sensor

Yes

VF-DPC AFF
closed loop
No

Grid voltage sensor

No

No

Additional modification of control algorithm

Yes

No

Grid current harmonics content control (1)

Yes

Yes

Power factor correction (2)

Yes

Yes

Yes

Yes

Yes

No

VF-DPC AFF
open loop

parameter

Independent control of

(1)

and

(2)

Precise over current protection

Based on simulation study carried-out in SABER simulation package as well as experimental

results measured in the laboratory setup the main features and advantages of VF-DPC SVM
PWM Rectifier with AFF can be summarized as:

No line voltage sensors are required,

- 106 -

Simple control algorithm without several coordinate transformation,

No current control loops, the system operates directly on instantaneous active and
reactive powers,

Good dynamics and practically no coupling between active and reactive power,

Sinusoidal line currents for ideal and distorted line voltage, thanks to the natural lowpass filter behaviour of the integrators used in flux estimator,

Constant switching frequency thanks to use of Space Vector Modulator (SVM),

Proposed system can operate as a PWM rectifier, Shunt Active Filter or it can take the
role of PWM rectifier having active filtering function. This extends tasks of PWM
rectifier on eliminating of higher harmonics in line current. In this case PWM rectifier
supply its load and at the same time compensate for harmonics AC line current,

Thanks to active filtering function it is possible to use non polluting equipment what is
PWM rectifier as a current harmonics eliminating device, it is also possible to add this
function to currently existing PWM rectifiers,

The system has been verified by the simulation and experimental study,

Compared to standard PWM rectifier, it has to be dimensioned for a larger power

ratio.

- 107 -

8. Summary and Closing Conclusions

The thesis has been devoted to analyse, control and design of PWM Rectifiers with
additional Active Filtering Function (AFF).
Various problems were addressed and discussed as follows:

Open (4 current sensors Fig. 5.1a) and closed (2 current sensors Fig. 5.1b) loop for
grid current higher harmonic neutralization,

Control strategies for active and reactive power control with special emphasis on
Direct Power Control with Space Vector Modulation (DPC-SVM) scheme,

Algorithms for Active Filtering Function (AFF),

Rated power conditions,

Passive components design,

To analyze and comparative study two simulation models, were developed: using SABER
software package and Matlab/Simulink. These models allow studying both power converters
with control loop and harmonic neutralization methods.
For experimental validation a laboratory set-up based on 5kVA Danfoss diode and PWM
converters with dSPACE controller has been constructed.
Among important results of the thesis are:

Application of Active Filtering Function to PWM Rectifier control strategy provides

more efficient utilization of power electronics equipment and leads to neutralization of
harmonics generated by other nonlinear loads. Thus, it improves the line current and
voltage at the point of common coupling (PCC),

Proposed system can operate as a PWM Rectifier, Shunt Active Filter (SAF) or it can
take the role of PWM Rectifier having AFF. This extends tasks of PWM Rectifier on
eliminating of higher harmonics in grid current. In this case PWM Rectifier supply its
load and at the same time compensate for AC grid current harmonics of
neighbourhood nonlinear loads,

Thanks to AFF it is possible to use a PWM Rectifier as a non polluting equipment and
current harmonics eliminating device. Also it is possible to add this function to
currently working PWM rectifiers,
- 108 -

Compared to standard PWM Rectifier, it has to be dimensioned for a higher power

ratio. Therefore, designing process for converter power ratio calculations (depending
on application PWM Rectifier, Shunt Active Filter, and PWM Rectifier with Active
Filtering Function) was elaborated.

As mentioned in Chapter 6 application of PWM Rectifier or PWM Rectifier is

profitable for high power applications (>150 kW), while adoption of Shunt Active
Filters is advantageous for low power applications.

Various control strategies for current harmonic neutralization were presented and
verified in simulations and experimental. Demonstrated results confirm usefulness of
Active Filtering as an extended function of PWM Rectifier control algorithm.

Above mentioned control strategies were investigated in simulations and

experimentally. Obtained results, confirms equity of argument of this thesis.

In the author opinion the results of this thesis can be used in design and development of
modern PWM rectifiers with active harmonic neutralization function as well as shunt active
power filters.

- 109 -

Appendix
A.1 Harmonics
#%#%

=>

Harmonics in a three-phase system transformed to the -frame will rotate in different

directions depending on the harmonic number [6]. For instance, the fundamental current will
rotate counter-clockwise: the 5th harmonic current will rotate clockwise and the 7th harmonic
current will rotate counter-clockwise. The three voltage vectors in the -frame are shown
bellow.

7 g (t )

(7)

g (t )

(t )

(1)

(t )

5 g (t )

(5)

(t )

Fig. A.1.1. Representation of harmonic vectors rotation in dq reference frame

Harmonics of orders n=3k, k=1,2,3, are of a zero sequence. In the -frame this harmonic
vector will not rotate. In a three-phase grid without a neutral leader, zero-sequence harmonics
will not occur.
Harmonics of the order n=6k+1, K=1,2,3 are of a positive sequence. Thus, the harmonic
vector in the -frame will rotate counter-clockwise. The positive-sequence harmonics are
the 7th, 13th, 19th, etc.
Harmonics of the order n=6k-1, K=1,2,3 are of a negative sequence. Thus, the harmonic
vector in the -frame will rotate clockwise. The negative-sequence harmonics are the 5th,
11th, 17th, etc.
The rotating vector in below is defined for each harmonic n, using a three line currents:
in =

j
2
ian + ibn e
3

2
3

+ icn e

4
3

= i n + ji n

(A.1.1)

- 110 -

#%#" 5

When transforming rotating vectors from the -frame to the dq-frame, a counter-clockwise
rotation of the -frame with fundamental angular frequency will occur. The current vector
i ( ) is transformed using:
i

( dq )

=e

j ( g t )
2

i ( )

(A.1.2)

The fundamental current vector in the -frame will be transformed to a stationary vector in
the dq-frame. Positive-sequence harmonics will rotate slower in the dq-frame. For negativesequence harmonics, the vectors in -frame will rotate faster in the dq-frame. The harmonics
transformation from -frame to dq-frame is shown in table bellow.
Tab. A.3. Harmonics representation in stationary and rotating dq frames

Harmonic type

Harmonic number n

Fundamental

n=1

Positive sequence
Negative sequence

n=6k+1, k=1,2,3
n=6k-1, k=1,2,3

-frame

( )
1

( )

( )

j ( g t )
2

(t ) = i(1) e
(t ) = i( n ) e
(t ) = i(1) e

- 111 -

dq-frame

jn ( g t )
2

jn ( g t )
2

( dq )
1

( dq )

( dq )

(t ) = i(1)

(t ) = i( n ) e
(t ) = i( n ) e

j ( n 1)( g t )
2

j ( n +1)( g t )
2

A.2 Basic Harmonic Distortion in Power System

The specification of power system harmonic, conventional and instantaneous power theories
will be reviewed under ideal and distorted conditions [4]. A waveform is distorted when a
voltage or current in power system contains other frequencies than the fundamental frequency
of the mains. The distorting components of waveforms under steady state conditions are
usually integer multiples of the fundamental power frequency.

#"#%'

According to the above description periodical signal of voltage, current and power can be
represented as Fourier series

u (t ) =

2U n sin( n t + n )

(A.2.1)

2 I n sin( n t + n n )

(A.2.2)

n=0

i (t ) =

n=0

where n = (U n , I n ) - phase angle between n-th voltage and current harmonics

n = n1; n is the angular frequency of the nth harmonic

n = 2nf 1 =

2n
T1

(A.2.3)

Un and In are the rms (root mean square) value of the nth harmonic voltage and current

respectively:
T

1 2
Xn =
x n (t )dt
T 0

(A.2.4)

based on Parseval theorem the rms value of the distorted voltage and current is given by:

U rms =

I rms =

1
u (t ) 2 dt =
T 0
T

1
i (t ) 2 dt =
T 0

U n2 = U 02 + U 12 + U 22 + ...

(A.2.5)

I n2 = I 02 + I 12 + I 22 + ...

- 112 -

(A.2.6)

The total harmonic distortion factor (THD) is most commonly used to characterize the
magnitude of the distorted signals. The THD gives the ratio between the geometric sum of the
magnitudes or rms of the harmonics and the magnitude (or rms value) of the fundamental
component:

n=2

THD =

X n2

X1

(A.2.7)

The main disadvantage of the THD is that the detailed information about harmonic spectrum
is lost. The instantaneous power is defined as:
(A.2.8)

p(t) = u(t) i(t)

Classical approaches define that active power is an average value of instantaneous power

1
1
P=
p (t )dt =
u (t ) i (t )dt =
T 0
T 0
S = U rms I rms

n =0

Pn = U 0 I 0 +

1
1
=
u (t ) 2 dt
i(t ) 2 dt =
T0
T0

n =0

n =1

U n2

U n I n cos n

n =0

I n2

(A.2.9)

Q = S 2 P2 D2
For a typical three-phase system without neutral wire, U0I0 will be zero since a zero sequence
components of the current system do not exist. Therefore, the equations (A.2.9) posses only
AC components:
P=

n =1

Pn =

S=

n =1

Q=

n =1

U n2

Qn =

n =1

n =1

U n I n cos n

(A.2.10)

I n2

(A.2.11)

n =1

U n I n sin n

(A.2.12)

- 113 -

Where the active power P will thus represent a measure of the average energy flow even in a
disturbed power system. The apparent power S is usually used to specify the size of required
power system equipment. The apparent power S is considered as representing the maximum
active power, which can be delivered by a voltage source while the line losses are maintained
constant. The reactive power Q is of interest for specifying the size of compensation
equipment in power system such as PWM converters and active power filters.
From the comparison of Eqs. (A.2.18), (A.2.20) with (A.2.19) can be seen that as distinct
from sinusoidal signals the square sum of active and reactive power is not equal to apparent
power. Therefore, to complete the definitions a distortion power D has been introduced
(Fig.A.A.2.2). The separate power are connected in equation
D = S 2 P2 Q2

(A.2.13)
D
S

Q
P
Fig. A.2.4. Graphical representation of power components

A.3 Instantaneous decomposition of powers

Instantaneous power for three-phase system is usually considered in orthogonal coordinates

--0 then in three-phase coordinate a-b-c. Therefore, the Clarke transformation C and its
reverse transformation C-1 define the relationship between the three-phase system a-b-c and
the stationary reference frame --0 are described as:

x
x =
x0

2
3

1 / 2 1 / 2 xa
3 / 2 3 / 2 xb
1 / 2 1 / 2 1 / 2 xc
1
0

where x denotes currents or voltages

- 114 -

(A.3.1a)

xa
xb =
xc

1
0
1 / 2 x
2
1/ 2
3 / 2 1/ 2 x
3
1 / 2 3 / 2 1 / 2 x0

(A.3.1b)

The - components can be represented in the Cartesian plane by a space vector x:

x = x + jx

(A.3.2)

where the -axis and the a-axis have the same orientation. The -axis leads the a-axis with
900.
For a three-phase power system, instantaneous voltages ua, ub, uc and instantaneous currents

ia, ib, ic are expressed as instantaneous space vectors u and i

ua
u = ub
uc

ia
i = ib
ic

and

(A.3.3)

For three-phase voltages and currents ua, ub, uc and ia, ib, ic the , and 0 components are
expressed as:

u
ua
u = [C ] u b
u0
uc

and

i
ia
i = [C ] ib
i0
ic

(A.3.4)

For the typical three-phase system without neutral wire, zero sequence component i0 of the
current system does not exist ( ia + ib + ic = 0 ). It gives finally simple realization of signal
processing thanks to only two signals in - coordinate what is the main advantage of abc/
transformation. With this assumption the equations (A.2.25) can be described as:

u
=
u

ua
2 1 1/ 2 1/ 2
ub
3 0 3/2 3/2
uc

and

- 115 -

(A.3.5)

ia
2 1 1/ 2 1/ 2
ib
3 0 3/2 3/2
ic

i
=
i

(A.3.6)

General three-phase four-wire system is represented as separated: three-phase three-wire

system and a single-phase system, which represents the zero sequence components.
T

ua

ia

p = ub
uc

ib = u

i = p (t ) + p 0 (t )

ic

i0

u0

(A.3.7)

The instantaneous zero sequence power p0(t) is only observable if exist both zero sequence
components (u0, i0).
(A.3.8)

p 0 (t ) = v0 i0

#$#%<
The Takahashi define the instantaneous active power p as scalar product between the threephase voltages and currents and instantaneous reactive power q as vector product between
them:
p = u ( abc ) i ( abc ) = u a ia + u b ib + u c ic

(A.3.9)

q = u ( abc) i ( abc ) = u a'ia + u b'ib + u c'ic

(A.3.10)

where ua, ub, uc is 900 lag of ua, ub, uc respectively. The same equations can be described in
matrix form as:

ia
p
u a ub u c
= ' ' ' ib ,
q
u a ub u c
ic

(A.3.11)

where
u a'
u
u

'
b
'
c

1
3

uc ub

u ca

ua uc =
u ac .
3
ub u a
u ba

- 116 -

(A.3.12)

Additional information can be obtained by defining an instantaneous complex power p(t) in

the Cartesian plane:

{ }

{ }

p(t ) = u(t ) i(t )* = Re p(t ) + Im p(t ) = p(t ) + jq(t ) =

= ua ia + ub ib + uc ic + j

1
3

[(ub uc )ia + (uc ua )ib + (ua ub )ic ]

(A.3.13)

#$#"
The most frequently referred power theory was proposed by Akagi [9] when the three-phase
voltages and currents are transformed into - coordinates, and additionally the three-phase
voltages and currents excluding zero-phase sequence components. Therefore, instantaneous
power on the three-phase circuit can be defined as follows:
p = u i + u i

(A.3.14)

In order to define the instantaneous reactive power, Akagi introduced the instantaneous
imaginary power space vector defined by:
q = u i + u i

(A.3.15)

(imaginary axis vector is perpendicular to the real plane on the - coordinates)

The conventional instantaneous power p and the above defined instantaneous imaginary
power q, which is the amplitude of space vector q are expressed by:
p
q

u
u

u
u

i
i

(A.3.16)

ui and ui obviously mean instantaneous power because they are defined by product of the
instantaneous voltage in one axis and the instantaneous current in the same axis. Therefore, p
is the real power in the three-phase circuit and its dimension is [W]. Conversely, u i and u
i are not instantaneous power, because they are defined by the product of the instantaneous
voltage in one axis and instantaneous current not in the same axis but in the perpendicular
axis.
The - currents can be obtained as follows:

- 117 -

i
i

(A.3.17)

and gives finally

u
u

i
u
1
= 2
2
i
u + u u

p
q

(A.3.18)

#$#$
The theory proposed by Peng [14] defines vector q designated as the instantaneous reactive
(or nonactive) power vector of the three-phase circuit. The magnitude (or the length) of q is
designated as the instantaneous reactive power that is

qa
q = qb
qc

ub
ib
u
= c
ic
ua
ia

uc
ic
ua
ia
ub
ib

(A.3.19)

and
q = q = q a2 + qb2 + qc2

(A.3.20)

Next the instantaneous active current vector ip, the instantaneous reactive current vector iq, the
instantaneous apparent power s and the instantaneous power factor are defined as:
iap

def
p
i p = ibp =
u
u u
icp

(A.3.21)

iaq

def q u
i q = ibq =
u u
icq
def

s = ui

and

(A.3.22)

def

p
s

(A.3.23)

where

- 118 -

u = u = u a2 + u b2 + u c2 and i = i = ia2 + ib2 + ic2

(A.3.24)

are the instantaneous magnitudes (or norms) of the three-phase voltage and current,
respectively.

A.4 Simulations and Experimental environments

#)#%6 9

Fig. A.4.1. Saber model

The control algorithms of PWM rectifier was implemented in SABER, which provides
analysis of the complete behavior of analog and mixed-signal systems, including electrical
subsystems. The main electrical parameters of the power circuit and control data are given in
the Table 7.1. The example of PWM rectifier model is shown in Fig. A.4.2. The electrical
elements are taken from library, but control algorithm has been written in MAST language.

- 119 -

#)#" 6

Fig. A.4.2. Simulink based simulation model

Additionally, the simulink models were used. The power system elements were modeled in
Power System Toolbox. The control structure was build using blocks from the library.

Fig. A.4.3. Plecs based simulation model

The Plecs power system elements were also considered into simulations and some comparison
between Power System Toolbox and Plecs were done.

#)#$ 2 9

&6%%/$

Laboratory setup consists of two parts:

power circuit,
control and measurement systems.

- 120 -

PWM Rectifier

PWM Inverter

TM

IPC
Optic fiber
receiver

IPC
Optic fiber
receiver

Optic fiber

DC link

AC Voltage&Currents
Measurements

Optic fiber

2
AC Voltage&Currents
Measurements

DC Voltage
Measurements

3 Phase
Grid

TM

DSP Interface

Measurement
Equipment

DS1103 dSPACE
Master :
PowerPC 604e
Slave: DSP TMS320F240

Pentium TM

AC Motor

Host Computer

Fig. A.4.4. Configuration of laboratory setup

Power circuit
The laboratory setup (Fig. A.4.4) consists of two commercial Danfoss inverters VLT 5000
series (Table A.2) with a resistors as a passive load.
Table A.2 General parameters of VLT5005 inverter
ULN

ILN

IVLT,N

SVLT,N

PVLT,N

Efficiency

[V]

[A]

[A]

[kVA]

[kW]

380

7,2

5,5

3,0

0,96

where:
ULN - line voltage, ILN - line current, IVLT,N - output current, SVLT,N - output power, PVLT,N - power on shaft.

Control and measurement systems

This part of system consists of following elements:

dSpace DS1103 board inserted into a PC-Pentium,
interface board and measurement system,
Software.

- 121 -

AC&DC
Voltages&Currents
AC&DC
Voltages&Currents

Optic Fiber
Receivers
Optic Fiber
Receivers
Optic Fibers

Measurement
Equipment
Measurement
Equipment

Isolation
Amplifiers

DA
Converters

LEM-55 Converters
and
Isolation
Amplifiers

AD
Converters

Optic Fiber
Drivers
Optic Fiber
Drivers

Input/Output
Signals

START
STOP
START
STOP

PWM
Signals

DS1103
DS1103

Fig. A.4.5. Block diagram of DSP interface

The power converters are controlled by the dSpace DS1103 board inserted into a PC-Pentium.
The mixed RISC/DSP/CAN digital controller based on two microprocessors (PowerPC604e
333MHz and TMS320F240 20MHz) and four high-resolution analog-to-digital (A/D)
converters (0.8s - 12 bit) provide a very fast processing for floating point calculations. It
makes possible real time control.

Fig. A.4.6. DS1103 inside the Pentium PC

Basic parameters of DS1103:

master processor - Motorola PowerPC604e/333MHz
slave processor fixed point DSP of TIs TMS320F240
16 channels of ADC 16 bit (resolution) 4 )s (sampling time), +10V
4 channels of ADC 12 bit 0.8 )s, +10V
- 122 -

8 channels of DAC 14 bit - 5 )s, +10V

incremental Encoder Interface 7 channels
32 digital I/O lines
Control Desk software
The DSP subsystem, based on the Texas Instruments TMS320F240 fixed point processor,
is especially designed for control of power electronics. Among other I/O capabilities, the
DSP provides one three-phase PWM generator and four single phase PWM generators. The
other CAN subsystem based on Siemens 80C164 microcontroller is used for connection to
a CAN bus.
The PPC has access to both the DSP and the CAN subsystems. The PPC is the master,
whereas the DSP and the CAN microcontroller are slaves. The following figures give an
overview of the functional units of the DS1103 PPC.
b)
ADC Unit

Master PPC
Decrementer
,
Timebase

DAC Unit
Incremental
Encoder
Interface

Timer A & B

Bit I/O Unit

Interrupt Control

Serial
Interface
I/O Units

DPMEM

DPMEM

Slave MC

Slave DSP

I/O Connectors P1, P2, P3

ISA Bus interface conector (Host intrface)

a)

CAN Subsystem

ADC Unit
Timing I/O
Unit (PWM,
CAP)
CAN
Controller

Bit I/O Unit

CAN Subsystem

Fig. A.4.7. a) Block scheme of DS1103; b) Placement of main components

DSP interface provide galvanic isolation between control board DS1103 and power circuit.
All PWM signals are generated by DS1103 and send using optic fibers to the Interface and
Protection Card IPC that is mounted on the front panel of the inverter, instead of original
Danfoss control board. The IPC includes: optic fiber receivers, 4MHz modulation of gate
- 123 -

signals and protective function required by the VLT, i.e. short-circuit, shoot-trough of the
DC link, over voltage and over temperature.

Software
Operation on DS1103 is provided by an integrated Control Desk program (see Fig. A.4.9).
Thanks to this application it is possible to change structure and parameters in real time. For
algorithms application it is possible to use: assembler, C language and Simulink.

Fig. A.4.8 Screen of Control Desk software

A.5. Review and design of Current and Power Controllers

A.5.1 Current Control Techniques
Current control (CC) [1, 1.1, 1.2] creates the integral control and therefore quality of CC is
most important for the quality of the whole control and filtering function.

#+#%#%
%#%'
#+#
%#%
'

'

'

A.5.1.1.1 Basic Requirements and Definitions

Most applications of three-phase voltage-source PWM converters - AC motor drives, active
filters, high power factor AC/DC converters, uninterruptible power supply (UPS) systems and
AC power supplies - have a control structure comprising an internal current feedback loop.
Consequently, the performance of the converter system largely depends on the quality of the
applied current control strategy.
- 124 -

UDC

iAc
iBc
iCc

-
C

PWM
Current
Controller

SA
SB
SC
iC
iB
iA
AC side
(load)

Fig. A.5.1. Basic block diagram of current controlled PWM converter

The main task of the control scheme in CC-PWM converter (Fig. A.5.1) is to force the
currents in a three-phase AC load to follow the reference signals. By comparing the command
iAc (iBc,iCc) and measured iA (iB,iC) instantaneous values of the phase currents, the CC
generates the switching states SA (SB,SC) for the converter power devices which decrease the
current errors A (B,C). Hence, in general the CC implements two tasks: error compensation
(decreasing A,B,C) and modulation (determination of switching states SA,SB,SC).
A.5.1.1.2 Basic requirements and performance criteria
The accuracy of the CC can be evaluated with reference to basic requirements, valid in general, and to specific requirements, typical of some applications. Basic requirements are:

no phase and amplitude errors (ideal tracking) over a wide output frequency range,

to provide high dynamic response of the system,

limited or constant switching frequency to guarantee safe operation of converter

semiconductor power devices,

low harmonic content,

good dc-link voltage utilization.

The following parameters of the CC system dynamic response can be considered: dead time,
settling time, rise time, time of the first maximum and overshoot factor. The foregoing
features result both from the PWM process and from the response of the control loop. For
example, for dead time the major contributions arise from signal processing (conversion and
calculation times), and may be appreciable especially if the control is of the digital type. On
the other hand, rise time is mainly affected by the AC side inductances of the converter. The
optimization of the dynamic response usually requires a compromise, which depends on the
- 125 -

specific needs. This may also influence the choice of the CC technique according to the
application considered.
In general, the compromise is easier as the switching frequency increases. Thus, with the
speed improvement of today'
s switching components (e.g. IGBT'
s), the peculiar advantages of
different methods lose importance and even the simplest one may be adequate. Nevertheless,
for some applications with specific needs, like active filters, which require very fast response
or high power converters where the number of commutations must be minimized, the most
suitable CC technique must be selected.
A.5.1.1.3 Presentation of CC Techniques
Existing CC techniques can be classified in different ways. In this Chapter, the CC techniques
are divided into two main groups (Fig. A.5.2): Controllers with open loop PWM block (Fig.
A.5.3a) and On-Off controllers (Fig. A.5.3b).
PWM Current Control Methods

On-Off Controllers

Hysteresis

Delta
Modulaction

On line
Optimized

PI

Separated PWM block

Linear
Controllers

State
Feedback

Fuzzy Logic
and ANN

Resonant
Controllers

Predictive and
Deadbeat

Fig. A.5.2. Current Control techniques

In contrast to the On-Off controllers (Fig. A.5.3b), schemes with open loop PWM block (Fig.
A.5.3a) have clearly separated current error compensation and voltage modulation parts. This
concept allows us to exploit the advantages of open loop modulators (sinusoidal PWM, space
vector modulator, optimal PWM) which are: constant switching frequency, well-defined
harmonic spectrum, optimum switch pattern and good DC link utilization. Also, full
independent design of the overall control structure as well as open loop testing of the
converter and load can be easily performed.

- 126 -

ic

Controller

Control Part

ic

SA
SB
PWM S
C

vc

AC
Side
(Load)

Voltage
Source
Converter

AC
Side
(Load)

Modulation Part

SA
SB
SC

On-Off Controller

Voltage
Source
Converter

Control + Modulation Part

Fig. A.5.3. a) Controller with open loop PWM block b) On-Off Controller

A.5.1.1.4 Introduction to Linear Controllers - Basic structures of linear controllers

Two main tasks influence the control structure, when designing current control scheme:
reference tracking and disturbance rejection abilities.
Conventional PI controller
a)
d

PI Controller
r

C(s)

Plant

G(s)

b)

c)
K1
K1

1/T2

K2
Fig. A.5.4. a) Feedback controller, b) and c) Two forms of PI controller structure

The input-output relation of the control scheme presented in Fig. A.5.4a can be described by:
y( s) =

C ( s )G ( s )
G( s)
r( s) +
d ( s) ,
1 + C ( s )G ( s )
1 + C ( s )G ( s )

(A.5.1)

or in the form:
y ( s ) = T ( s ) r ( s ) + S ( s )d ( s ) ,

where: C(s) controller transfer function (Fig. A.5.4b and Fig. A.5.4c), here
C ( s ) = K1 +

K2
1 + sT2
K
= K1
, where T2 = 1
s
sT2
K2

G(s) plant transfer function,

K1 proportional gain,
- 127 -

(A.5.2)

T(s) reference transfer function,

K2 integral gain,

S(s) disturbance transfer function, T2 integrating time,

r - reference signal, d disturbance signal, y output signal, s Laplace variable,
For good reference tracking it should be:
T (s) =

C ( s )G ( s )
1,
1 + C ( s )G ( s )

(A.5.3)

and for effective disturbance rejection:

S ( s) =

1
0,
1 + C ( s )G ( s )

(A.5.4)

The above conditions can be fulfilled for low frequency range. However, in higher frequency
range the performance is detoriated. Moreover, PI controller parameters influence both
reference tracking and disturbance rejection performance and are not possible to influence the
characteristics separately.
Table A.3. Controller parameters according to standard rules (for fast sampling TS 0)
Integrating time T2
Method
Optimal Modulus
Criterion
(For Ta >> o )

Optimal Symmetry
Criterion
(For Ta >> (Tb + O ) )

Damping Factor
Selection
= 1 (For O = 0 )

Rule of the Thumb

Plant

Proportional gain
K1

K O e s 0
1 + sTa

Ta
K1 =
2 K O o

K O e s 0
sTa (1 + sTb )

Ta
K1 =
2 K O (Tb + o )

T2 = Ta
K2 =

1
2 KO o

T2 = 4(Tb + o )

K O e s 0
1 + sTa

Remarques

Integrating gain K2

- 4% overshoot in response to step change

of reference
- Very slow disturbance rejection
- Fast disturbance rejection
- 43% overshoot in response to step change

K2 =

Ta
8KO (Tb + o ) 2

T2 =

4 2 Ta K O
(1 + K O ) 2

K2 =

(1 + KO ) 2
4 2Ta KO

K1 = 1

T2 = Ts

K1 = 1

K2 =

1
Ts

of reference.
-A n input filter is required (TF=T2)

- Well damped

- Only for very roughly design

Ts sampling time

Some of such a standard rules commonly used in power electronics and drives control
practice are given in Table A.3. For Ta < 4o the modulus criterion is more useful, whereas for

Ta >> o it is better to apply the symmetry criterion. The rules of Table A.3 are valid for
continuous or fast sampled (Ts 0) discrete systems. For slow (Ts Ta) or practical (Ts < Ta)
sampling, the sampling time Ts has to be included in controller parameters. It should be noted,

- 128 -

however, that controller parameters calculated often on the basis roughly estimated plant data,
can only be used as broadly indicative of the values to be employed.

#+#%#"
#+#
%#" *'

'

A.5.1.2.1 Ramp Comparison Controller

The Ramp Comparison Current Controller, uses three PI error to produce the voltage
commands uAc,uBc,uCc for a three-phase sinusoidal PWM (Fig. A.5.4)
Carier
uAc
uBc
uCc

iAc +
iBc + iCc+ -

UDC
SA
SB
SC

iA
iB
iC

AC side

Fig. A.5.4. Ramp comparison controller

In keeping with the principle of sinusoidal PWM, comparison with the triangular carrier
signal generates control signals SA,SB,SC for the inverter switches. Although this controller is
directly derived from the original suboscilation PWM, the behavior is quite different, because
the output current ripple is fed back and influences the switching times. The integral part of
the PI compensator minimizes errors at low frequency, while proportional gain and zero
placement are related to the amount of ripple. The maximum slope of the command voltage
uAc (uBc, uCc) should never exceed the triangle slope. Additional problems may arise from
multiple crossing of triangular boundaries. As a consequence, the controller performance is
satisfactory only if significant harmonics of current commands and the load EMF are limited
at a frequency well below the carrier (less than 1/9) .

- 129 -

Simulation results
a)

b)
40

ix ref

30

30

20

20

ix, iy

ix, iy

40

ix

ix ref

10

10

iy

iy ref

iy ref

iy

0,030

0,035

0,040

0,045

0,050

time

0,055

0,060

0,030

Line voltage
Line current

20

0,035

0,040

0,045

time

0
-20
-40

0,050

0,055

0,060

Line voltage

40

Line current
and line voltage

40

Line current
and line voltage

ix

Line current

20
0
-20
-40

0,030

0,035

0,040

0,045

0,050

time

0,055

0,060

0,030

0,035

0,040

0,045

time

0,050

0,055

0,060

Fig. A.5.5. Simulated transient to the step change of reference current (at 0.04 s): 10A 30A, and the
line voltage drop (at 0.055 s) a) damping factor selection = 0.707, b) = 1

A.5.1.2.2 Stationary Vector Controller

In three-phase isolated neutral load topology (Fig. A.5.1), the three phase currents must add to
zero. Therefore, only two PI controllers are necessary and the three-phase inverter reference
voltage signals can be established algebraically using two-to-three phase conversion blocks

/ABC. Fig. A.5.7 shows the block diagram of a PI current controller based on stationary
coordinates , variables. The main disadvantage of the PI controller acting on AC
components, namely the nonzero steady state current error, still remains.
Current controller
K1

ic +

K2

K1

K2

ic -

Phase Conversion

+
+

+
+

ABC

ABC

UDC
PWM

modulator

iA
iB
iC
AC side
(Load)

Fig. A.5.5. Stationary PI controller operating in coordinates with AC components

- 130 -

A.5.1.2.3 Synchronous Vector Controller (PI)

In many industrial applications an ideally impressed current is required, because even small
phase or amplitude errors causes incorrect system operation (e.g. vector controlled AC
motors, active power filters). In such cases the control schemes based on space vector
approach are applied. Fig. A.5.6 illustrates the Synchronous Controller, which uses two PI
compensators of current vector components defined in rotating synchronous coordinates x-y.
Thanks to the coordinate transformations, isx and isy are dc-components, and PI compensators
reduce the errors of the fundamental component to zero.
Current controller Coordinate transformation
and Phase Conversion
K1
+ vx
ixc +
v
K2
xy

+
PWM
v
K1
modulator
+ vy
+

ABC
K2
+
iyc sin st
cos st

ix

iy

xy

ABC

UDC

iA
iB
iC

AC side
(Load)

Fig. A.5.6. Synchronous PI controller working in rotating coordinates x,y with DC components

However, the synchronous controller of Fig. A.5.6 is more complex as the stationary
controller (Fig. A.5.7). It requires two coordinate transformations with explicit knowledge of
the synchronous frequency s. As shown, the inner loop of the controller (consisting of two
integrators and multipliers) is a variable frequency generator which produces always reference
voltage Vc, Vc for the modulator (PWM), even when in the steady states the current error
signals are zero. Hence, this controller solves the problem of non zero steady state error under
ac components. However, the dynamic is generally worst than that of the stationary controller
because of the cross coupling between , components.

- 131 -

Example Synchronous Current Controller for PWM Rectifier Design Based on Standard Rules

The block diagram of a synchronous current controller working in x-y coordinates for PWM rectifier is shown in
Fig. A.5.3A.

Input
Filter
ixyc

PI Controller

1
1 + sTF

ixy

K1

1 + sT2
sT2

Processing
Delay

PWM Rectifier

1
1 + sTp

Kc
1 + sTo

UL

VR

AC side
inductor
1
RL + sLL

ixy

Sampling/Feedback
Delay
1
1 + sTf

Fig. A.5.7 Block diagram of synchronous current controller

A. Open loop transfer function

The following simplifying assumptions are made:

the cross-coupling effect between the x and y axes due to inductance L is neglected,
the dead time of the power converter (also processing and sampling) is approximated by a first-order inertia
element:
e sTo

1 ,
1 + sTo

(A.5.5)

the sum of small time constants is defined as:

(A.5.6)

= Tp + To + T f

where: Tp processing/execution time of algorithm, To power converter dead time, Tf time delay of the
feedback filter and sampling.
Note that with switching frequency fs the statistical delay of the PWM inverter is (0.5)/2fs, delay of the time
discrete signal processing 1/2fs and feedback delay (avarager) (0.5)/2fs. So, the sum of the small time constant
is the ramge (1.5)/2fs to 1/fs.
The open loop transfer function is given by the equation:

KGo ( s ) = K1

1 + sT2 1
Ko
sT2 1 + s 1 + sTL

(A.5.7)

where
K1, T2 proportional gain and integral time of PI controllers,
1
L
- gain and time constant of the line reactor,
KO = KCKL , K L = , TL =
RL
RL
KC power converter (PWM) gain,

- 132 -

(A.5.8)

The choice of optimal current controller parameters depends on the line reactor time constant TL relative to the
sum of all other small time constants.
B. For TL>> controller parameters selection according symmetry criterion
T2 = 4 , K1 =

TL ,
2 K o

(A.5.9)

which substituted in, yields open-loop transfer function of the form:

KGo ( s ) =

TL
1 + s 4
KO
T
1 + s 4
1 + s 4
L

2 K o s 4 (1 + s ) 1 + sTL 2 s 4 (1 + s ) sTL s 2 8 2 + s 3 8 3

(A.5.10)

For the closed-loop transfer function we obtain:

KG ( s ) =

1 + s 4
1 + s 4 + s 2 8 2 + s 3 8 3

(A.5.12)

To compensate for the forcing element in the numerator, use is made of the input inertia filter
GF ( s ) =

1
,
1 + s 4

(A.5.13)

so that expression becomes

KGcF ( s ) = KGC ( s )GF ( s ) =

1
,
1 + s 4 + s 2 8 2 + s 3 8 3

(A.5.14)

or approximately
KGcF ( s )

1
1 ,
=
1 + s 4 1 + sTeq

(A.5.16)

where Teq = 4 is the equivalent time constant of the closed current control loop optimized according to the
symmetry criterion.
C. Calculations

Data
R L = 0 .1

U L = 220V

f t = 10kHz

I L = 40 A

U DC = 700V LL = 10mH

TS =

1
= 0.0001
2 fs

f L = 50Hz

Slope conditions
2 I L 2f L +
UT =

2U L + 0.5U DC
LL
= 2V
4 ft

Converter gain
M = 0 .9
MU DC
KC =
= 31.5
10U T

Load

- 133 -

TL =

LL
= 0 .1
RL

KL =

1
= 10
RL

Sum of the small time constants

= 2TS = 0.0002
Open loop gain
K O = K L K C = 315

Controller parameters design using Symmetry Criterion

K1 =

TL
= 0.8
2 K O

T2 = 4 = 0.0008
K2 =

TL
= 992
8 K o ( ) 2

D. Simulation results

a)

b)
40

ix ref
30

20

20

ix, iy

ix, iy

40

ix

ix ref
30

iy

10

ix

iy

10

iy ref

iy ref

0,030

0,035

0,040

0,045

time

0,055

0,060

0,030

Line voltage

20

0,035

0,040

0,045

time

Line current

0
-20
-40

20

0,050

0,055

0,060

Line voltage

40

Line current
and line voltage

40

Line current
and line voltage

0,050

Line current

0
-20
-40

0,030

0,035

0,040

0,045

time

0,050

0,055

0,060

0,030

0,035

0,040

0,045

time

0,050

0,055

0,060

Fig. A.5.8. Simulated transient to the step change of reference current (at 0.04s): 10A 30A, and the line
voltage drop (at 0.055s) a) without input filter b) with input filter
E. Decoupling control

So far the cross-coupling effect due to line inductance L was neglected. However, it can be easy compensated for
using a decoupling network inside or outside the controller [1]. Fig. A.5.11 illustrates in expanded time scale
improvements by the decoupling network.

- 134 -

40
35

35

30

30

25

25

currents

currents

40

20
15
10

20
15
10

12

-5

-5

0,040

0,045 0,055

0,060

0,040

0,045 0,055

time

0,060

time

Fig. A.5.9. Synchronous PI controller a) without decoupling, b) with decoupling inside of controller (see Fig.
A.5.42.b). 1 without input filter, 2 with input filter TF = T2

#+#"
#+#
"6

'

The transfer function of the standard PI compensator used in synchronous controller working
in rotating coordinates with DC components can be expressed as:
G ( s ) = K1 +

K2
1 + sT2
K
, where T2 = 1
= K1
s
sT2
K2

(A.5.17)

As shown in [36], an equivalent single phase stationary AC current controller which achieves
the same DC control response centered on the AC control frequency can be calculated as
follows:
G( s) =

1
sK
[ g ( s + j ) + g ( s j )] = K1 + 2 2 2 ,
2
s + s

(A.5.18)

The last equation can be seen to be a Resonant Controller with infinite gain at the resonant
frequency s.
Current controller
K1

ic +

K2

K1

K2

ic -

Phase Conversion

+
+

+
+

ABC

ABC

UDC

PWM
modulator

iA
iB
iC
AC side
(Load)

Fig. A.5.10. Stationary Resonant Controller

- 135 -

Example: Design of Stationary Resonant Current Controller for PWM Rectifier.

The block diagram of a stationary resonant current controller for PWM rectifier (only phase A) is shown in Fig.
A.5.13.
Resonant
Controller

IAc
IA

K1

PWM Rectifier

sK 2
s + s2

KC

VR

UL

AC side
inductor
1
RL + sLL

IA

Fig. A.5.11. Simplified block diagram of current control loop with resonant controller (small time constatns are
neglected and Kc = 1)
A. Open loop transfer function

Transfer function of the resonant controller given by Eq (A.5.19) can be expressed as follows:
GC ( s ) = K1 +

sK 2
c + c s + c s2
= 0 21 22
2
s + s
s + s

(A.5.19)

where: c0 = K1 s2 , c1 = K 2 , c2 = K1
The open loop transfer function is given:
KGO ( s ) =

c0 + c1 s + c2 s 2
1
s 2 + s2
RL + sLL

(A.5.20)

B. Controller design based on Naslin polynomial

The characteristic polynomial of the closed-loop transfer function can be calculated as:
(A.5.21)

D( s ) = c0 + c1 s + c2 s + ( RL + sLL )( s2 + s 2 )

The parameters of the controller can be computed based on 3nd order Naslin polynomial:
PN ( s ) = a 0 (1 +

s2

2
0

s3

3 02

(A.5.22)

From two last equations one obtains:

c0 = LL 03 3 RL s2

(A.5.23)

c1 = LL 02 3 RL s2
c 2 = LL 0 2 R L

or in the form:
K1 = LL 0 2 RL

(A.5.24)

K 2 = LL 02 3 LL s2

s2 = 02
C. Calculations

Data

- 136 -

R L = 0 .1
LL = 10mH

s = 314rad / s
Selecting the Naslin polynomial parameter = 2

0 =

1
1
s =
314rad / s 222rad / s
a
2

Controller parameters
c0 = 865424.2
c1 = 295A.5.7
c2 = A.78

or in the form
K1 = A.87
K2 = 295A.5.7
D. Simulations results
40

ix ref

ix

ix, iy

30
20
10

iy

iy ref

0
0,030

0,035

0,040

0,045

time

Line current
and line voltage

0,055

0,060

Line voltage

40
20

0,050

Line current

0
-20
-40

0,030

0,035

0,040

0,045

time

0,050

0,055

0,060

Fig. A.5.12. Simulations for Resonant Controller

#+#$
#+#
$ 4 (2

<

>>
>
>'

'

The block scheme of a digital ANN-based current controller for three-phase PWM converter
is shown in Fig. 5.13. The controller operates with components defined in stator oriented
coordinates -. Thus, the coordinate transformation is not required. The output voltages uc,
uc are delivered to the space vector modulator, which generates control pulse SA, SB, SC for
power transistors of the PWM converters.

- 137 -

UDC
ic

ic

ic

uc

ANN

ic

Vector
modulator

uc

ANN

SA
SB
SC

uA uB uC

i
error

error

Converter

iA
iB

/ABC

RLE

Fig..A.5.13. On-line trained ANN current controller of PWM converter

To assure a fast response and high performance of current control, the configuration of ANN
is based on linear adaptive filter topology. Fig. A.5.14 shows the ANN controller for one
component (phase A). As input of the controller is reference current iAc(n), which is sampled
by delay blocks Z-1, and output is sampled voltage command uAc(n).
There are L units in the input layer and the number L is set to be the same as the sampling
number in a period of the reference current so that the information of harmonics in the
reference current is known to the network.
i Ac (n)

i Ac (n)

OUT 1

OUT 2

-1
i Ac (n-2)

-1
i Ac (n-1)

u Ac (n)

OUT 3

-1
i Ac (n-L-1)

WL

OUT L
e (n)

Fig. A.5.14. ANN topology for one components (phase)

The relationship between the output and input is:

u Ac (n) =

i Ac (n i + 1) w = i Ac (n) wi

where: i=1,2,.....,L

is units number,

iAc(n)={iAc(n),...,IAc(n-L+1)}T,
T

wi={w1,...,wL} ,

is command current vector,

is weight vector

The ANN consists of two layers:

- 138 -

(A.5.25)

Input layer: in this layer there are L units V11, V12, ....,V1L. The outputs of these units are
OUT1, OUT2, ..., OUTL, which are connected which the output layer through the weights w1,
w2, ..., wL.
Output layer: this layer consists of one unit only. The inputs to this layer are outputs OUTL
from the input layer. This layer acts as a fan-out layer and hence the output of this layer is
reference voltage uAc(n).
The error signal user for learning of ANN can be expressed as follows:

e( n ) = ( + z 1 )(i Ac ( n) i A ( n ))

(A.5.26)

R
RTs
)
where : = K , = , = exp(
L
1

R, L - are load parameters, K is the gain of the PWM inverter.

The weights vector wi(n) are modified by the rule :

wi (n) = wi (n 1) + e(n)i A (n)

Example: On-line ANN based current controller for PWM rectifier

ANN CR simulation results for PWM Rectifier

ANN parameters: 10kHz sampling frequency - 100 levels
UDC=600V, RL=0.1, LL=10mH, ft=10kHz,
Reference current step change: 10A to 30A

Fig. A.5.15. Simulink - simulation panel

- 139 -

(A.5.27)

ANN - simulation results

Reference
Load

35
30

id

25
20
15
10
5
0,04

0,05

0,06
Reference
Load

0,04

0,05

0,06
Line current

25
20

iq

15
10
5
0
-5
40
30

Line current

20
10
0
-10
-20
-30
-40
0,01

0,02

0,03

0,04

0,05

0,06

0,07

time

Fig. A.5.16. Simulation results

The ANN is on-line trained controller and it needs time to learn reference signal waveform.
To improve transient response a proportional controller P with a control gain KP is connected
in parallel with the ANN, as shown in Fig. A.5.17.

P
ic

ANN

Fig. A.5.17. ANN with parallel P controller

This combination provides faster learning (Fig. A.5.18(a) and (b)) and improves dynamic
response of the controller (Fig. A.5.18(c) and (d)).

- 140 -

b)

Reference current
Load current

20

20

10

10

current

current

a)

-10

-10

-20

-20

0,00

0,01

0,00

0,02

20

20

10

10

current

current

d)

Reference current
Load current

-10

-20

-20

0,03

0,02

0,04

Reference current
Load current

-10

0,02

0,01

time

time

c)

Reference current
Load current

0,04

time

0,05

0,06

time

Fig. A.5.18. Learning process and response of the amplitude change of the ANN current controller
(fsw=5kHz) (a) and (c) ANN without proportional gain (b) and (d) ANN with proportional gain KP=7
(learning rate =0.01)

Learning and adaptation (can learn the reference shape) abilities are the main advantages of
the on-line trained ANN current controller. However, high sampling frequency (for good
reference tracking) and time consuming design procedure is required to assure high
performance current control.

#+#)>
#+#
)>

4 (4 '

A.5.4.1 Introduction
Ideally impressed current in an inductive load could be implemented using an ideal
comparator operated as On-Off controller. In such system, however, the converter switching
frequency will be infinity, and as consequence, of high switching losses the semiconductor
power devices will be damaged. Therefore, in practical schemes switching frequency is
limited by introducing: hysterese with width h or sample and hold (S&H) block with sampling
frequency fS (Fig. A.5.19). This creates two classes of controllers which will be discussed in
the next sections.

- 141 -

a)

b)

ic

ic

SA

S&H

SA

Ideal
Comparator

Ideal
Comparator

fs

Fig. A.5.19. Two methods to limit the switching frequency of current control system with ideal
comparator a) Hysteresis controller , b) Delta Modulator

A.5.4.1 Hysteresis Current Controllers

Hysteresis control schemes are based on a nonlinear feedback loop with two-level hysteresis
comparators (Fig. A.5.19a). The switching signals SA,SB,SC are generated directly when the
error exceeds an assigned tolerance band h (Fig. A.5.19b).
UDC

a)

iAc
iBc
iCc

b)

+
+

SA
SB
SC

Hysteresis
band

state 1

state 0

iA

iS

iB

iC

-h

+h

Three-phase
Load

Fig. A.5.20. Two levels hysteresis controller: block scheme (a), switching trajectory (b)

Although the constant switching frequency scheme is more complex and the main advantage
of the basic hysteresis control - namely the simplicity - is lost, these solutions guarantee very
fast response together with limited tracking error. Thus, constant frequency hysteresis controls
are well suited for high-performance, high speed applications.
A.5.4.3 Delta Modulation (DM)
The basic scheme, the Delta Modulation-Current Controller (DM-CC), is shown in Fig.
A.5.21.

- 142 -

iA
c
iBc

iCc

UDC

SH1
SH2
SH3
+
+

SA
SB

S&H

SC

iA
iB
iC
Three-phase
Load

Fig. A.5.21. Delta modulation current controller - basic block scheme

It looks quite similar to that of a hysteresis CC, but the operating principle is quite different.
In fact, only the error sign is detected by the comparators, whose outputs are sampled at a
fixed rate so that the inverter status is kept constant during each sampling interval. Thus, no
PWM is performed; only basic voltage vectors can be generated by the converter for a fixed
time. This mode of operation gives a discretization of the inverter output voltage, unlike the
continuous variation of output voltages which is a particular feature of PWM.
A.5.4.4 Analog and Discrete Hysterese
When the hysteresis controller is implemented in digital signal processor (DSP), its operation
is quite different as in the analog scheme. Figure A.5.22 illustrates typical switching sequence
in analog (a) and discrete (b) implementation (also called sampled hysterese).
(a)

(b)

S/H
1/Ts

ic + h
ic
ic - h

t1

t2

t3

Ts

Ts

Ts

Fig. A.5.22. Operation of the analog (a) and discrete (b) hysteresis controller

In the analog controller the current ripples are kept exactly within the hysteresis band and
switching instance are not equal. In contrast, the discrete system operates at fixed sampling
time Ts, the controller operates rather like Delta modulator.

- 143 -

Figure A.5.53 illustrates operation of different current controllers for the same number of
switchings (N = 26). It is clearly to see that for hysterese band h = 2A, the discrete controller
(Fig. A.5.23c) requires 3.3s sampling time (300 kHz) to exactly copy the continuous
hysterese behaviour (Fig. A.5.23b). With longer sampling time 330s (3 kHz), operation of
discrete hysteresis controller (Fig. A.5.23d) is far from those of continuous one (Fig.
A.5.23b).
a)

b)

35

35

30

30

25

25

20

20

15

15

10

10

-5

-5

0 .0 0 1

0 .00 2

0 .0 0 3

0 . 00 4

c)

0 .0 0 5
T im e

0 .00 6

0 .0 0 7

0 . 00 8

0 .0 0 9

0 . 01

35

35

30

30

25

25

20

20

15

15

10

10

-5

-5

0 .0 0 1

0 .00 2

0.003

0 . 00 4

0 .0 0 5
T im e

0 .0 0 1

0 . 00 2

0 .0 0 3

0 .00 4

d)

0 . 00 6

0.007

0 . 00 8

0 .0 0 9

0 . 01

0 .0 0 1

0 . 00 2

0 .0 0 3

0 .00 4

0 .0 0 5
T im e

0 .0 0 5
Tim e

0 . 00 6

0 . 00 6

0 .0 0 7

0 .0 0 7

0 .00 8

0 .00 8

0 .0 0 9

0 .0 0 9

0 . 01

0 .01

Fig. A.5.23. Current control with: a) Delta modulator Ts = 167s; b) continues hysterese h = 2A;
c) discrete hysterese h = 2A, Ts = 3.3s; d) discrete hysterese h = 2A, Ts = 330s.

A.5.2 Power Controllers

The synthesis of the active and reactive power controllers can be done analytically using a
simplified model. In this model the switching waveforms created by the PWM converter are
replaced by its average value within the switching period.
A model in dq coordinates has the following equations:
di Ld
Li Lq + u Sd
dt
di Lq
+L
+ Li Ld + u Sq
dt

u Ld = Ri Ld + L
u Lq = Ri Lq

(A.5.28)

where,
u Lq = U

(A.5.29)

u Ld = 0

- 144 -

and
p = Ui Lq

(A.5.30)

q = Ui Ld

That gives, the model simplifies:

di Ld
Li Lq + u Sd
dt
di Lq
+L
+ Li Ld + u Sq
dt

0 = Ri Ld + L
U = Ri Lq

(A.5.31)

Introducing PI controllers for active power p and reactive power q the block diagram of Fig.
A.5.24 is obtained.
U
u Ld
q

PI

1
Ls + R

+
L

PI

iLd

1
Ls + R

iLq

u Lq
U

Fig. A.5.24. Simplified block diagram

The active and reactive power controllers are coupled by the cross therms. The synthesis of
the PI parameters should be done in order to get a good response and to minimize those
effects. Considering the reactive power null, that is iLd=0, the active power control loop
becomes disconnected of the reactive power. The influence of the reactive power on this
control loop should be analyzed later. The block diagram is,
p*
+

-1

1+sTn
sTi

usq
-

U
R+Ls

U
Fig. A.5.25. Active power control block diagram

- 145 -

The line voltage is seen as a constant perturbation, and is compensated by the integral part of
the PI controller. In this way, the zero of the PI controller is placed over the pole of the
system. So, the open loop time constant Tol can be expressed by:
L
= Tol
R

Tn =

(A.5.32)

The closed loop transfer function is:

U
Geq
sTi R
p( s)
1
=
=
=
sT R
pref ( s ) 1 + Geq 1 + U
1+ i
sTi R
U

(A.5.33)

The closed loop time constant Tcl is given by:

Tcl =

Ti R
U

(A.5.34)

And can be a specification of the controller design. So

Ti =

UTcl
R

(A.5.35)

The parameters of the PI controller can be given by:

kp =

Tn 1 L
1 1 R
, ki = =
=
Ti U Tcl
Ti U Tcl

(A.5.36)

The specification of Tcl should be done in order to get good response and decoupling between
p and q powers. The ratio of kp/ki for different closed loop time constant Tcl is constant and
equal to open loop time constant Tol. Because the active and reactive power control loops are
similar, equations (A.5.33) are valid for both controllers.
Fig. A.5.26 obtained in MATLAB/Simulink presents a step change on the reference active
power. The reference of the reactive power is constant and equal to zero. This figures shows
that effectively there is a perturbation on the reactive power. Note that the perturbation is
eliminated depending of the open loop time constant. Reducing the closed loop time constant,
the maximum value of the perturbation is reduced as shown in Fig. A.5.2A.

- 146 -

Active power [kW]

Reactive power [kVAr]

Response to step changes on active power

6
4

Tcl=0.5ms

2
0

Tcl=0.1ms
0

6
Time (ms)

10

10

0.8
Tcl=0.5ms

0.6
0.4

Tcl=0.1ms

0.2
0

6
Time (ms)

Fig. A.5.26 Step change of the reference active power for different Tcl

- 147 -

References
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Direct Power Control

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[3.3] M. Malinowski, M. Jasinski, M. P. Kazmierkowski Simple Direct Power Control of Three-Phase PWM
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[3.4] T. Noguchi, H. Tomiki, S. Kondo, I. Takahashi Direct Power Control of PWM converter without
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[5.2] H. Akagi, New trends in active filters for power conditioning, IEEE Trans. Ind. Applicat., vol. 32, pp.
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[5.8] N. Yamamura, R. Moriya, T. Hori, A study for active filter using operating amplifier without
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Society, IEEE 2002 28th Annual Conference of the], Volume: 4, 5-8 Nov. 2002 Pages: 2951 - 2956 vol.4
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Power Filters for AC Drives with Unity Power Factor personal contacts

[5.22] S. Fryze Moc rzeczywista, urojone i pozorna w obwodach elektrycznych o przebiegach

odksztaconych pr du i napi cia Przegl*d Elektrotechniczny nr 7, nr 8 1931

PWM Rectifier
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2000 IEEE International Symposium on , Volume: 2 , 4-8 Dec. 2000 Page(s): 453 -458 vol.2
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IEEE

Transactions

on

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Electronics,

Volume:

12

No.

Jan.

1997

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IEEE Transactions on Power Electronics, Volume: 14 No. 5, Sept. 1999 Page(s): 966 972
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Page(s): 642 -647

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, Nov. 2002 Page(s): 935 -945

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Papers written during work on this thesis

[8.1] M. Cichowlas, D. Sobczuk, M. P. Ka mierkowski, Mariusz Malinowski Novel Artificial Neural Network
(Ann) Based Current Controller For PWM Rectifiers. EPE-PEMC 2000 Kosice, Slovak Republic

vol.1 p.41-47
[8.2] M. Cichowlas PWM Rectifier with Neural Network Based Current Controller XII Polish-German
Seminar Development Trends in Design of Machines and Vehicles, Warsaw, October 24-27 2000 p.27-38
[8.3] M. Cichowlas PWM Rectifier with A New Current Regulator - Based On Neural Network (ANN)
Oszcz+dno,-Energii, 80-lecie Wydziau Elektrycznego, Warszawa 2001 p.315-317
[8.4] M. Cichowlas, M. P. Ka mierkowski Current Control Techniques For PWM Rectifiers SENE 2001,
d.
[8.5] M. Cichowlas, M. P. Ka mierkowski Comparison of Current Control Techniques for PWM
Rectifiers IEEE-ISIE 2002, lAquila, Italy

[8.6] M. Jasinski, M. Liserre, F. Blaabjerg, M. Cichowlas Fuzzy Logic Current Controller for PWM
Rectifiers, IEEE-IECON02, Sevilla, Spain, 5 - 8 November 2002 r.

- 152 -

[8.7] M. Cichowlas, M. Malinowski, M. P. Kazmierkowski, Frede Blaabjerg Direct Power Control for threephase PWM rectifier with active filtering function IEEE-APEC 2003, Miami Beach, USA, 9-13 luty

2003
[8.8] M. Cichowlas, M. Malinowski, M. P. Kazmierkowski Active Filtering Function of Sensorless
Controlled Three-Phase PWM Rectifier CPE 2003 Gda/sk

[8.9] M. Cichowlas, M. Malinowski, M. Jasinski ,M. P. Kazmierkowski DSP Based Direct Power Control for
three-phase PWM Rectifier with Active Filtering Function IEEE-ISIE 2003, Rio de Janeiro, Brazil

[8.10] M. Malinowski, Gil Marques, M. Cichowlas, M. P. Kazmierkowski New Direct Power Control of
Three-Phase PWM Boost Rectifiers under Distorted and Imbalanced Line Voltage Conditions

IEEE-ISIE 2003, Rio de Janeiro, Brazil

[8.11] M. Cichowlas, M. Malinowski, M. P. Kazmierkowski, M. Jasi ski Novel Active Filtering Function For
DPC Based Three-Phase PWM Rectifier EPE 2003 France

[8.12] M. Cichowlas A new control strategy for three-phase PWM rectifier with active filtering function
Archiwum Elektrotechniki 2003
[8.13] M. Cichowlas Integrated Power Quality Compensator based on advanced control strategies
EDPE Sowacja 2003
[8.14] M. P. Kazmierkowski, M. Cichowlas, M. Jasinski Artificial Intelligence Based Controllers for
Industrial PWM Power Converters IEEE-INDIN 2003 Canada

[8.15] M. P. Kazmierkowski , M. Cichowlas Prostownik PWM z funkcj aktywnej filtracji, Konferencja

Naukowo-Techniczna Enel-Tech 2003 Gliwice, 9-10 pa dziernik 2003 str. 9-18
[8.16] M. P. Kazmierkowski, M. Cichowlas Prostowniki aktywne z funkcj filtracji harmonicznych do
zasilania nap dw falownikowych IX Konferencja Naukowo-Techniczna, Szczyrk 9-10 pa dziernika

2003 str.11-15
[8.17] M. P. Kazmierkowski, M. Cichowlas Prostownik PWM z funkcj

filtracji harmonicznych do

zasilania nap dw falownikowych Nap+dy i Sterowanie listopad 2003 str. 45-50

[8.18] M. CICHOWLAS, M. MALINOWSKI, M. P. KAZMIERKOWSKI Novel Active Filtering Function of

Sensorless Controlled Three-Phase PWM Rectifier NorFa, Zegrze Poland, 21-23 June 2003

[8.19] M. Cichowlas, M. Malinowski, M. P. Kazmierkowski Active filtering Function of Sensorless

Controlled Three-Phase PWM Rectifier, I WATAB Seminar Aachen Germany, July 2003

PLL
[9.1] A. Ghosh and A. Josh, A new algorithm for the generation reference voltages of a DVR using the
method of instantaneous symmetrical components IEEE Power Eng. Review, vol. 2, pp. 63-65, Jan.

2002.
[9.2] S. Chung A phase tracking system for three phase utility interface inverters IEEE Trans. Power
Electron., vol. 15, pp. 431-438, May 2000.
[9.3] P. Rodrguez, J. Bergas, and L. Sainz New PLL Approach Considering Unbalanced Line Voltage
Condition, in Proc. IEEE Int. Conf. on Power and Energy Systems, June 2002, pp. 329-334.

Others publications
- 153 -

[10.1] Application note Harmonics: Danfoss

[10.2] Guide to Harmonics with SC Drives, Technical Guide No 6, ABB
[10.3] Dimensioning of a Drive System, Technical Guide No.7, ABB
[10.4] Electrical Braking, Technical Guide No.8, ABB
[10.5] M. ukiewski Dawiki kompensacyjne, materiay informacyjne firmy ELHAND
[10.6] M. ukiewski Dawiki sieciowe, materiay informacyjne firmy ELHAND
[10.7] M. ukiewski Dawiki w ukadach filtrw wy szych harmonicznych, materiay informacyjne firmy
ELHAND
[10.8] M. ukiewski Dawiki wygadzaj ce, materiay informacyjne firmy ELHAND
[10.9] Danfoss VLT 5000 series, manual, 1999
[10.10] Experiment Guide Control Desk, May 1999
[10.11] Electrical Drives Basics Laboratory Book, AAU, March 2000
[10.12] Feauture Reference DS1103 PPC Controller Board, May 1999
[10.13] Hardware Reference DS1103 PPC Controller Board, May 1999

- 154 -