BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI- K. K.

BIRLA GOA CAMPUS

INSTRUCTION DIVISION
FIRST SEMESTER 2013-2014
Course Handout Part II

Date: 02.08.2013
In addition to part I (General Handout for all courses appended to the time table) this portion gives further
specific details regarding the course.
Course No.
: EEE F313/INSTR F313/EEE C443
Course Title
: ANALOG AND DIGITAL VLSI DESIGN
Instructor-in-charge
: PRAVIN S. MANE
Instructors
: Gavax Joshi, Chhayadevi Bhamare

1. Scope and Objective of the Course:

The objective of this course is to provide to the students an introduction to the

fundamentals and practical considerations pertaining to the design of integrated circuits.
The scope encompasses both analog and digital integrated circuits. The importance of CAD
tools in IC system design process is also acknowledged and stressed upon.
2. Prime reference Books
(R1)) Kang. S.M and Leblebici Y., CMOS Digital Integrated Circuits: Analysis and Design,
McGraw Hill International Editions 3rd Edition 2003.
3. Text Book
(T1) Rabaey J. M., Chandrakasan Anantha, Nikolic Borivoje, Digital Integrated Circuits : A Design
Perspective,PHI Learning Private Limited, 2nd Edition.
Other Reference Books :

Ra) Neil H.E. Weste, Kamran Eshraghian, "Principles of CMOS VLSI Design, Addison-Wesley Publishing
Company.
Rb) Pucknell D.A., Eshraghian K.,"Basic VLSI design, systems and circuits", Third edition,
Prentice Hall
of India Pvt. Ltd.
Rc) Fabricius E.D., "Introduction to VLSI design", McGraw Hill international editions.
Rd) Gregorian R., Temes G.C.,"Analog Mos integrated circuits for signal processing", Wiley
interscience
publication.
Re) Sze S.M.,"VLSI Technology", Second edition, McGraw Hill International Edition.
Rf) Randall A Geiger, Phillips E. allen, Noel R Strader, "VLSI Design techniques for analog and digital
circuits," McGraw Hill International Edition' 1990.
Rg) Bhaskhar Jayram, "AVHDL PRIMER", Prentice Hall.
Rh) IEEE Journals of solid state circuits, VLSI system.
Ri) Martin. Ken, Digital Integrated Circuit Design, Oxford University Press, Inc.
Rj) Johns. David A. and Martin K, Analog Integrated Circuit Design, John Wily & Sons.
Inc. 2002.
Rk) Lab Manuals--Rl) References for design assignments
Rm)
Michael. L. Bushnell, and Vishwani. D. Agrawal, Essentials Of Electronic Testing For Digital,
Memory And Mixed Signal VLSI Circuits. Kluwer Academic Publishers, Third Edition, 2004

4. Notices: All assignments and notices will be put up on the moodle.

5. Course Plan :
No of
Lec.
2
2
3

6
8
4
5
5
4
5

Topic To be Covered

Learning Objectives

Common Topics
1. Introduction to VLSI Design
Methodogies
2. Scaling
3.

CMOS Technology, Design

Rules, MOS Capacitances

Analog Design
4. Advanced Current Sources
& sinks; Current Reference
circuit, Operational
amplifiers Architectures,
feed back
5. Noise

Introduction to the semiconductor

industry
Technology Generation transition and its
effects on performance
Introduction to layouts and industry
design flow for analog and digital
integrated circuits
Building temperature independent voltage
and current references, Basic building
block for most analog subsystems
Quantification of various types of noise in
analog circuits

Digital Design
6. MOS inverter- Static and
switching
characteristics,
Combinational MOS logic
circuits static logic
7.

Synchronous system and

Sequential circuits design

8.

Memory Circuits Design

9.

Design verification & test

Basic building block for most digital subsystems and Speed of digital systems
Study and design of various CMOS logic
gate families
Synchronous design, timing metrics,
Design of flip-flops
Design of SRAM, DRAM, decoders, sense
amplifiers
Verification of functionality,
manufacturing defects

6. Evaluation Scheme :
Component
Test I
Test II
Assignments/
Online
test/projects/quiz
Comp. Exam

Duration

Weightage %

Date

Time

Remark

1 Hour
1 Hour
(Continuous)

20
20
20

17.09.2013
27.10.2013
Spread across the
semester

8.30 am to 9.30 am
8.30 am to 9.30 am

Closed Book
Closed Book

3 Hours

40
100

09.12.2013

9.00 am to 12.00 pm

Closed Book

7. Assignments: Regular system design Assignments covering use Cadence tools for Simulation of VLSI

Circuits will be given.

8. Make up Policy: Make up will be given only on genuine reasons. Applications for make up should be given
in advance and prior permission should be obtained for Scheduled tests.
9. Chamber Consultation Hours: will be announced in the class
Instructor-In-Charge
EEE F313/INSTR F313