CORDIC BASED FAST RADIX-2 DCT ALGORITHM

ABSTRACT:
This letter proposes a novel coordinate rotation digital computer (CORDIC)-based fast
radix-2 algorithm for computation of discrete cosine transformation (DCT). The proposed
algorithm has some distinguish advantages, such as Cooley-Tukey fast Fourier transformation
(FFT)-like regular data flow, uniform post-scaling factor, in-place computation and arithmeticsequence rotation angles. Compared to existing DCT algorithms, this proposed algorithm has
lower computational complexity. Furthermore, the proposed algorithm is highly scalable,
modular, regular, and suitable for pipelined VLSI implementation.

EXISTING SYSTEM:
In existing radix algorithms generally have a regular computational structure, which
reduces implementation complexity. However, due to their recursive nature, radix algorithms are
difficult to realize pipeline and are not suitable for high-speed applications. Compared to non
radix algorithms, radix algorithms allow us to generate higher-order DCTs from lower-order
DCTs.

EXISTING SYSTEM ALGORITHM:

Fast Discrete Cosine Transform algorithm

EXISTING SYSTEM DRAWBACKS:

Difficult to realize pipeline

Not suitable for high-speed

PROPOSED SYSTEM:
In proposed system CORDIC-based radix-2 fast DCT algorithm is proposed. Based on
the proposed algorithm, signal flows of DCTs and inverse DCTs (IDCTs) are developed and
deduced using their orthogonal properties, respectively. Similar to the Cooley-Tukey fast Fourier
transformation (FFT) algorithm, the proposed algorithm can generate the next higher-order DCT
from two identical lower-order DCTs. By using the unfolding CORDIC technique, this algorithm
can overcome the problem of difficult to realize pipeline that in conventional CORDIC
algorithms.

PROPOSED SYSTEM BLOCK DIAGRAM:

8-POINT FAST DISCRETE COSINE TRANSFORMATION:

PROPOSED SYSTEM ALGORITHM:

CORDIC Fast Radix-2 DCT Algorithm.

PROPOSED SYSTEM ADVANTAGES:

Lower Computational Complexity

Highly Scalable

pipeline and high-speed VLSI implementation

SOFTWARE REQUIREMENT:

ModelSim6.4c

Xilinx 9.1/13.2

HARDWARE REQUIREMENT:

FPGA Spartan 3/ Spartan 3AN

REAL TIME EXAMPLE:

Mobile Multimedia Devices

Signal & Image Processing

Digital Cameras

HDTV
FUTURE ENHANCEMENT:
Implementation of CORDIC based Inverse Discrete Cosine Transform will be done.

ALTERNATE TITLES:
Title 1: Fast Radix-2 DCT Algorithm for CORDIC
Title 2: Realization of Fast Radix-2 Discrete Cosine Transform
Title 3: Implementation of Fast Radix-2 DCT Algorithm Using Verilog HDL

PROJECT FLOW:
First Phase:
60% of Base Paper (3 Modules only Simulation)

Second Phase:
Remaining 40% of Base Paper with Future Enhancement (Modification).