B ARBARA (O GREY ) J ESSEL

www.linkedin.com/in/barbarajessel ogrey@comcast.net
SENIOR PROGRAM MANAGER / ENGINEERING BUSINESS MANAGER
Proven expertise in managing large, complex engineering programs at Lab126, AMD and Apple with an
exemplary record of marshaling plans to timely completion with a strong sense of program ownership.
Comprehensive experience in program planning and execution ensuring that cross-functional product
development teams deliver industry-leading new core technologies, from design through delivery, over multiple
product generations.
Strong qualifications in engineering business management driving monthly operational reviews, executive
level communications, team meetings, and budget tracking. Strengths in executive presentations, identifying
and mitigating risk, and perform post-mortem learning and process improvements.
Excel at working with executive teams and product management stakeholders to define strategy, product features
and requirements; skillful at influencing teams across an organization to facilitate delivery of product and
supporting software and services in sync with launch timelines.

PROFESSIONAL EXPERIENCE
LAB 126, Cupertino, CA
Senior Program Manager - Silicon Division

Program managed development of new ASIC within a start up division at Lab.

Collaborated with program team from concept to final drop of ASIC. Responsibilities include, establishing
program schedule and dependencies, risk management and mitigation plans, and driving action items to
closure.
Worked with business and technical teams to drive critical program requirements.
Responsible for adherence to program budget.

ADVANCED MICRO DEVICES (AMD), Sunnyvale, CA

Senior Program Manager - Microprocessor Cores Division

1997 to 2013
2008 - 2013

Program managed development of 4 microprocessor cores used in multiple products.

During high-level design phase work with architects, Client BU, Server BU, Embedded BU and SemiCustom Business Unit to communicate preliminary core performance, power, frequency and die size to
ensure alignment with long-term roadmap.
Collaborate with senior managers and directors from concept phase thru final drop of Core. Disciplines
include RTL, Physical Design, Methodology, Performance Modeling and Verification. Responsibilities
include adherence to engineering development process, establishing program schedule and dependencies,
risk management and mitigation plans, aligning headcount to budget, and driving action items to closure.
Create and maintain top-level operational view of program for monthly reviews with Core VP.
Once SOC is established, provide monthly updates on Core IP to ensure schedule alignment; communicate
risks and mitigation plans.

Engineering Business Manager - Microprocessor Cores Division

2013 to Present

2010 to 2013

Manage business aspects of 575 Cores organization. Responsibilities include tracking a $74M budget, work
with finance to model headcount and operational expenses, report out monthly on adherence to plan and
communicate risks and mitigations plans.
For futures budgets, establish headcount profile in support of cores roadmap, update business systems to
establish budget requirements, communicate to VP R&D funding and requirements for additional funding.
Once final budget numbers, work with finance to create budget model and update business system.
Drive monthly cores operational reviews prepare monthly operations deck for VP to communicate cores
status to executive management.

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On a quarterly basis, facilitate cores staff and fellows from all five sites meet face-to-face to strengthen
relationships and discuss what is working and areas for organizational improvement. Collect input and in
conjunction with the VP set agenda and drive the two-day meeting.
Set agenda and create deck for quarterly communications meetings with entire core team

Senior Program Manager - Software Process Development

Identified the need to establish a standardized and scalable process for the software alliance team.
Assembled cross-functional team to define milestones, dependencies and deliverables to ensure software
compatibility and support of new microprocessor features.
Milestones defined to capture customer and market requirements, identify performance optimizations and
business opportunities based on new software visible features, creation of partner engagement plans and
establishing requirements for partner software compatibility for validation team.
Fully documented process containing ~30 milestones completed in 8 months

Senior Program Manager - Platform and Infrastructure Division Development

2007 to 2008

1997 to 2007

Program managed the creation of $1B hardware infrastructure for Athlon in 18 months
Met with teams and stakeholders to ensure project scope was defined. Tracked and coordinated
development of the platform solution: chip-set design, product engineering, board design, drivers and BIOS
development, thermal/mechanical design, cards and drivers, diagnostics, component enablement and
infrastructure.
Drove plan execution, ensuring functional teams achieved commitments to meet planned product feature
launch dates.
Managed internal chipset design, three external chipsets vendors, over 20 motherboard companies and
BIOS development. Ensured guidelines and documentation created in the U.S. was available on time.
Coordinated with AMDs Taiwan office to ensure motherboards were developed to meet end-goal launch
for various customers such as Micron, Hewlett Packard and system builders.
Created and implemented the OEM support model within Program Management. Personally program
managed tier-1 OEMs.
Managed 11 program coordinators across business segments to meet overall program goals for both
Desktop and Server Business Units.
Worked with Microsoft and Open Source community to establish the 64-bit software infrastructure for a
seamless migration path form 32-bit to 64-bit computing

APPLE COMPUTER, Cupertino, California

Project Manager High End Desktop Macintosh Engineering

1987 to 1997

Managed all program aspects to bring the first Power PC-based Macintosh computers to market worldwide.
Coordinated activities within engineering, software development, product design, component enablement,
EMC, validation, reliability, materials and worldwide manufacturing sites from development to production.

Oversaw program schedule, budget and execution of speed-bumps for high-end computer systems. Drove
IBM and Motorola to meet engineering deliverables and program needs for leading-edge microprocessors.

Early work consisted of coordinating and supporting project/program manager for CPU and peripheral
programs.

EDUCATION
General education courses; West Valley College, San Jose, CA