VISVESVARAYA TECHNOLOGICAL UNIVERSITY

Jnana Sangama, Belgaum - 580 014

A
Project Report
on
Design of low voltage operational amplifier for high
speed ADC
Submitted in Partial Fulfillment for the award of the Degree

Master of Technology
in

VLSI Design and Testing

Submitted By

Mr.Abhishek C Math
(USN:2BV13LDT02)
Under the guidance of

Dr.Rajshekar.B.Shettar

B. V. BHOOMARADDI COLLEGE OF
ENGINEERING AND TECHNOLOGY HUBLI-31
2014-2015

B.V.BHOOMARADDI COLLEGE OF
ENGINEERING AND TECHNOLOGY HUBLI-31

CERTIFICATE
This is to certify that the Project report entitled Design of low voltage
operational amplifier for high speed ADC is a bonafide work carried
out by Mr. Abhishek C Mathi bearing (USN: 2BV13LDT02) as a
part of VISVESVARAYA TECHNOLOGICAL UNIVERSITYS M.Tech in
VLSI Design and Testing at B. V. Bhoomaraddi College of Engineering and
Technology, Vidyanagar, Hubli for the academic year 2014-2015.

Dr.Rajshekar.B.Shettar
Guide

Dr.Uma Mudenagudi
Head of the Department

Dr.Ashok Shettar
Principal

External Viva
Name of Examiners

Signature with date

1) ..................
2)..................

ABSTRACT

In this work, a high speed, low power fully differential folded cascode
Operational Amplifier was designed to be used in the A/D converter which
is supplied by 1V. It uses a folded cascode operational amplifier as well
as the gain boosting amplifier to improve the gain. Two fully differential
folded-cascode op amps with continuous time CMFBs are used as auxiliary
op amps to increase the open-loop gain of the main op amp. Common mode
feedback (CMFB) is used to stable the designed op-amp against temperature.
This design has been implemented in 130nm technology in Mentor Graphics.
Spectre simulation shows that the op-amp has the DC gain of greater than
100dB and the unity gain bandwidth greater than 900MHz.

ACKNOWLEDGMENTS

The sense of contentment and elation that accompanies the successful

completion of our project and its report would be incomplete without mentioning the names of the people who helped us in accomplishing this.
We take this opportunity to thank our principal Dr. Ashok Shettar, for
providing healthy environment in the college, which helped in concentrating
on the task. We express a deep sense of gratitude to our H. O. D. Dr. Uma
Mudenagudi for providing the inspiration required for taking the project to
its completion.
We sincerely thank to our guide Dr.Rajshekar.B.Shettar for their inspiring guidance and promising support they gave during the course of completion.
We sincerely thank to our project coordinator Dr.Saroja Sidmal,for
great support and encouragement
We sincerely thank Smartplay Pvt Technology for offering the Internship under the guidance of Dr.Ramesh.Karmungi
Last but not the least we like to thank all the staff members, teaching
and non - teaching staff for helping us during the course of the project.

Mr.Abhishek C Math

Contents
1 Introduction
1.1 Problem Statement . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Objective of the Project . . . . . . . . . . . . . . . . . . . . .
1.3 Methodology . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Literature Survey
2.1 Simple Differential Amplifier . . . . .
2.2 Telescopic cascode op amps . . . . .
2.3 Folded cascode operational amplifier
2.4 Gain boosting Amplifier . . . . . . .
2.5 Two stage OTA . . . . . . . . . . . .
2.6 Specification . . . . . . . . . . . . . .

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3 Conclusion
14
3.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

iii

List of Figures
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8

Differential Amplifier . . . . . . . . . . . . . . .
Telescopic cascode op amps . . . . . . . . . . .
cascode op amp with input and output shorted
PMOS diff pair folded cascode OTA . . . . . . .
NMOS diff pair folded cascode OTA . . . . . .
Gain boosting amplifier . . . . . . . . . . . . . .
Two stage OTA . . . . . . . . . . . . . . . . . .
Proposed architecture . . . . . . . . . . . . . . .

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List of Tables
2.1

Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Chapter 1
Introduction
Op Amps play an important role in many analog and mixed-mode applications. The rapid growth of high speed and high resolution applications
such as ADC and DACs results in a necessary demand to the high speed and
high gain amplifiers. The realization of high-gain amplifiers with large GBW
in processes with decreasing supply voltage requires innovative circuit design
techniques and advances in IC process technology. Since op amps are usually employed to implement feedback systems, the open-loop gain of an op
amp determines the precision of the feedback system employing the op amp.
With a very high dc gain needed for precision applications, four approaches
for gain enhancement has received considerable attention for many years.
One is based upon gain multiplication achieved by cascading two or more
lower gain stages. Although high dc gains are achievable, the excess phase
shift introduced by the cascading introduces serious compensation requirements which limit the high frequency performance of cascaded amplifiers in
feedback applications. The second approach achieves gain enhancement by
increasing the output impedance of a basic gain stage. This approach has
proven most effective at achieving high gains and high GBW with favorable power dissipation (for medium accuracy). E. H. Armstrong, first time,
in 1914, presented positive feedback [1] and this method, several times, was
used in op-amps. Using positive feedback, dc gain can be increased a lot, but
it simply, can make op-amp structures unstable. Also, this method can decrease output swing the same as negative feedback in active cascode op-amps
[2]. Another commonly used gain enhancement technique is gain-boosting
[3]. Very high gains are achievable with gain-boosting but it still requires one
level of stacking of devices thereby making it difficult to operate with low
1

Design of low voltage operational amplifier for high speed ADC

supply voltages. The gain-boosting amplifier also adds its own poles, and
reduces the speed of amplifier and consumes more power. Although negative
impedance compensation offers potential for the most gain enhancement, low
power dissipation, low voltage operation and excellent high frequency performance, the technique is seldom used commercially because of the high
sensitivity of the gain to the negative compensating impedance inherent in
existing negative impedance schemes. In 1993, a new concept as replica amplification was introduced. This method is more suitable for low voltage and
high performance applications such as data converters. We have designed an
op amp by using this method.

1.1

Problem Statement

To desing the low power high speed folded cascode gain boosting amplifier
for1V power supply to achieve a DC gain greater than 100dB and the UGB
grretaer than 900MHz. The design is to be implemented using 130nm technology in MentorGraphics tool. Tool: MentorGraphics Eldo tool.

1.2

Objective of the Project

To design the low power ,high speed folded cascode amplifier with the gain
boosting amplifier for ADC in 130nm technology. At reduced supply voltages,
output swing becomes an important parameter. At large supply voltages,
there is a trade off among speed, power and gain.

1.3

Methodology

Literature survey of the amplifier architectures is carried out after going

through various papers. All the devices used in the design were characterized
and the required parameters like threshold voltage Vth,VDS and VGS of a
transistor were extracted. After under-standing the working of amplifier,
basic circuits were simulated with ideal conditions and specifications. Later
with these specifications, the circuits are designed in MentorGraphics and
simulated using Edol tool. The schematic and symbol representation for
major units of amplifier namely differential amplifier, current mirror and

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

CMFB circuit is done and the behaviour of each unit is verified by transient,
DC and AC analysis.

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Chapter 2
Literature Survey
The differential amplifier is an important stage of a very large area of applications, including high-performances analog/mixed ICs, such as operational
amplifiers, voltage comparators, voltage regulators, video amplifiers, modulators and demodulators or A/D and D/A converters. The linearity of the
classical CMOS differential amplifier is relatively poor because of the fundamental nonlinear characteristic of MOS transistors, resulting the possibility
of achieving a relatively good linearity only for a restricted input voltage
range (the amplitude of the input voltage for the classic differential amplifier
using MOS transistors in saturation have to be below a few hundreds of mV).
Five commonly used operational amplifiers architectures are briefly presented here. Advantages and limitations of these architectures are also summarized and some solutions suggested in the literature to overcome these
limitations are also presented.[3] All these commonly used amplifiers shown
in this chapter are fully differential, and might need common mode feedback
circuits in practical applications. The performances of all of these different
commonly used configurations are summed up in Table 2.1. A brief literature review describing previously done work related to high gain operational
amplifier architectures and mechanisms is described in this chapter. Various
methods used for increasing the gain of the amplifier used in the literature
are presented along with the drawbacks of each method. A brief summary
of results from this review is also presented which leads to the motivation
for this particular work. Later in the chapter a brief description of various
operational amplifier parameters that determine the quality and usefulness
of the amplifiers is also provided as a guide. The difference between an Operational Transconductance Amplifier (OTA) and an Operational Amplifier
4

Design of low voltage operational amplifier for high speed ADC

(op-amp) is that the op-amp has got an output buffer so that it is able to
drive resistive loads. An OTA can only drive capacitive loads

2.1

Simple Differential Amplifier

In a differential amplifier the output signal generally is the amplified version

of the difference of two inputs of the amplifier. Because of the exclusive properties of this type of amplifier, it is considered as one of the most important
building blocks in many analog circuits.[4] The fig 2.1 shows the single ended
output differential amplifier.the small signal ,low frequency gain of both circuits is equal to gmN (rON ||rOP ).The bandwidth is usualyy determined by the
load capapcitance CL

Figure 2.1: Differential Amplifier

2.2

Telescopic cascode op amps

In order to achieve high gain ,the differential cascade topologies can be

2
2
used.such circuits displays a gain on the order of gmN [(gmN rON
||(gmP rOP
)],but
at the cost of output swing and additional poles these configuration are called
telescopic cascade op amps. (a): The circuit providing a single-ended output
Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

Figure 2.2: Telescopic cascode op amps

suffers from a mirror pole at node X, creating stability issues. (b): Fully
differential topology, the output swing is given by 2[VDD (VOD1 + VOD3
+ VCSS + VOD5 + VOD7)] where V ODj denotes the overdrive
voltage of Mj Another drawback of telescopic cascodes is the difficult in shorting their inputs and outputs, e.g., to implement a unity-gain buffer. Cascode op amp with input and output shorted unit gain feedback topology as
shown in fig2.2 Output swing: M2 and M4 in saturation Vout <= Vx + VT H2
and Vout >= Vb + VT H4 . Since Vx <= Vb + VGS4 ,Vb VT H4 <= Vout <=
Vb VGS4 + VT H2 Since the op amp attempts to force Vout to be equal to
Vin , forVin < Vb VT H4 , we have Vout Vin and M4 is in triode region while others
are saturated. Under this condition, the open-loop gain of the op amp is reduced. As Vin and Vout hence exceed Vb VTH4, M4 enters saturation and
the open-loop gain reaches a maximum. For Vb VT H4 < Vin < Vb (VGS4 VT H2 ),
both M2 and M4 are saturated and for Vin > Vb (VGS4 VT H2 ), M2 and M1
enter the triode region, degrading the gain. Thus, a cascode op amp is rarely
used as a unit-gain buffer

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

Figure 2.3: cascode op amp with input and output shorted

2.3

Folded cascode operational amplifier

We saw that telescopic cascode OpAmps suffer from limited output swing.
Folded-cascode OpAmps allow more swing at the output. Although, this
topology consumes more power than telescopic topology due to its need for
another current source (M3 and M4 act as a current source). This topology
can be implemented either employing PMOS input devices or NMOS input
devices.[5] Each one has its advantages and disadvantages. In Figure 2.4 and
Figure 2.5 two implementation of folded-cascode topology are shown:
It can be seen that voltage swing in folded-cascode topology is higher than
telescopic topology by one overdrive voltage across current source. This gain
is about 2-3 times less the gain of telescopic OpAmps. One reason is the
lower transconductance of PMOS input devices compared to NMOS input
devices. Another reason is appearing of r01 in parallel with r02 , which will
reduce the output impedance of amplifier. One of the important benefits
of folded-cascode OpAmps is that their input CM level range is larger than
that of telescopic OpAmps. Depending on the kind of input device, input
CM level can be very close to one of the supply sources. In case of PMOS
input devices, input CM level can be zero and having NMOS input device,
OpAmp tolerate input CM level equal to . In general the choice of input
device depends on the application. Whether gain is the target or CM level
dictates the input device vdd.

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

Figure 2.4: PMOS diff pair folded cascode OTA

2.4

Gain boosting Amplifier

In telescopic and folded-cascode topologies, increasing output impedance has

been used as a means of increasing gain. In both, stacking more transistors
in output branch as cascode devices helps to do so. What if there is a
need for higher gain and larger output swing at the same time? Then, there
would be no good outcome, inserting another level of transistors in the stack.
The idea behind gain boosting is to increase the output impedance further
more to achieve higher gain without adding more transistors to the output
branch and reducing the swing as a result. In this approach, the cascode
device is placed in a current- voltage feedback using an amplifier. Assuming
telescopic OpAmp, both NMOS cascode devices in signal path and the PMOS
cascode devices in the load current source can be used for gain boosting. In
Figure 2.6 cascode transistors M3-M6 are placed in the feedback loop The
gain boosting technology makes the DC gain of the circuit increasing several
orders of magnitude.

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

Figure 2.5: NMOS diff pair folded cascode OTA

2.5

Two stage OTA

By adding another stage we get a two-stage amplifier. This is shown in Figure

2.7. This modification increases the gain up to a certain extent as compared
to a single stage OTA. But this addition of an extra stage also increases the
complexity. The increased complexity will reduce the speed in comparison
to a single stage amplifier.
This configuration needs a suitable compensation scheme to stabilize the
amplifier. One of the various compensation circuits (Rc, Cc) is also shown
in Figure 2.7
Speed and accuracy are two of the most important parameters of any
analog circuits. It is difficult to optimize any circuit for both these parameters and a compromise is to be reached between the two. Optimizing the
circuit for both leads to contradictory demands. In many analog circuits like
switched-capacitor filters , algorithmic A/D converters , sample and hold amplifiers and pipelined. A/D converters, speed and accuracy are determined
by the settling behavior of the operational amplifiers. Fast settling requires
high unity gain frequency of the amplifier and accurate settling requires high
gain of the amplifier. Designing a CMOS operational amplifier that provides
both high gain and high unity gain frequency has always been a challenging problem. High gain requirement leads to multistage designs, designs
Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

Design of low voltage operational amplifier for high speed ADC

Figure 2.6: Gain boosting amplifier

involving long channel devices biased at low currents, whereas high unity
gain frequency requirement leads to single stage design with short channel
devices biased at high currents.

2.6

Specification

Hence we aim at a DC gain of at least 100dB combined with unity gain

frequency of at least 900 MHz.
In a regulated cascode stage has been presented that increases the gain
of a normal cascode stage without affecting the frequency behavior to a
large extent. This work describes this regulated cascode technique in detail.
A complete analysis and working of this technique is presented. A complete stability analysis, high frequency behavior and settling behavior are
described. Next, a circuit implementation of this technique in which folded
cascode circuit is designed using gain boosting topology, is presented as a
proof of concept for this topology. This technique has been used in this work
to design an operational amplifier with a gain greater than 100 dB and a
unity gain bandwidth greater than 900 MHz.

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

10

Design of low voltage operational amplifier for high speed ADC

Figure 2.7: Two stage OTA

Table 2.1: Specification

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

11

Design of low voltage operational amplifier for high speed ADC

Figure 2.8: Proposed architecture

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

12

Design of low voltage operational amplifier for high speed ADC

Department of Electronics & Communication Engineering, B.V.B.C.E.T., Hubli - 31.

13

Chapter 3
Conclusion
3.1

Conclusion

The different architecture of Operational Amplifier Topology is presented.

We found that for high speed ADC we need a high gain ,high output swing
OTA. We choose the folded cascode amplifier architeture which provides the
high gain and high output swing. To enhance the gain without affecting the
swing we go for the gain boosting amplifier with the common mode feedback
circuit and without affecting the UGB.

14

Bibliography
[1] K. Bult and G. J. G. M. Geelen, A Fast-Settling CMOS OpAmp for
SC Circuits with 90dB DC Gain Chines journal of semiconductors, Vol.
27, No. 5, pp. 778-782, 2006.
[2] A.D. Grasso,S. Pennisi, High-Performance CMOS Pseudo-Differential
Amplifier Circuits and Systems, ISCAS 2005. IEEE InternationalSymposium on, pp. 1569 1572, 23-26 May 2005.
[3] B.J. Hosticka, Improvement of the Gain of CMOS Amplifiers IEEE
Journal of Solid-State Circuits, vol. SC-14, Issue 6, Dec.1979, pp.11111114. 1996.
[4] Behzad Razavi Design of analog cmos integrated circuits McGrawHill, 2001.
[5] Phillip E. Allen and Douglas R. Holberg CMOS analog circuit Design
McGraw-Hill, 2001.