Sedra/Smith

Microelectronic Circuits 5/e

Chapter 5B MOS Field-Effect Transistors
(MOSFETs)

S. C. Lin, EE National Chin-Yi University of Technology

5.5 Small-Signal operation and models

5.5.1 The DC Bias Point

1
1
2
2
I D = kn (VGS Vt ) = knVOV
2
2
VDS = VDD I D RD
To ensure saturation region operation.
We must have VD > VOV

S. C. Lin, EE National Chin-Yi University of Technology

5.5.2 The Signal Current in the Drain Terminal

vGS = vgs + VGS
1
iD = kn (vgs + VGS Vt ) 2
N 2
i +I
d

1
1
2
= kn (VGS Vt ) + kn (VGS Vt )vgs + kn vgs 2 (5.43)
2
2

DC bias current I D

nonlinear distotion

The Current component that is directly

proportional to the input signal vgs
To reduce the nonlinear distotion, the input signal shonld be kept small
1 'W 2
' W
so that kn vgs << kn (VGS Vt )vgs vgs <<2(VGS Vt )
L
2 L
S. C. Lin, EE National Chin-Yi University of Technology

Example :
For the amplifier in Fig.A, let the MOSFET is specified to have Vt = 2V
and kn' W / L = 2mA/V 2 ,VGS = 5V, assume =0. if vgs = 0.5sin t volts
(a) Determine the various components. (b)Find the second harmonic
component as a percentage of the amplitude of fundamental
Sol:
(a ) iD = 1mA/V 2 (5 - 2) 2 V 2 + 2mA/V 2 0.5sin t (5 - 2)V 2
+ 0.25sin 2 t 1mA
1 1
= 9 + 3sin t + 0.25( cos 2t ) ( mA )
2 2
= 9.125 + 3sin t 0.125cos 2t ( mA )
(b) Harmonic distotion percentage
0.125
100% = 4.16%
D% =
3
S. C. Lin, EE National Chin-Yi University of Technology

Small-signal operation of the enhancement MOSFET amplifier.

id
' W
gm
= kn (VGS Vt )(5.47)
vgs
L

I D
gm
VGS

(5.49)
vgs =VGS

S. C. Lin, EE National Chin-Yi University of Technology

5.5.3 The voltage gain

vD = VDD iD RD
= VDD (id + I D ) RD
= VDD I D RD id RD
The biasing component is
VD = VDD I D RD

The signal component is

vds = id RD = g m vgs RD
vd
Av
= g m RD
vgs

The minus sign, indicates that

the vd is 1800 out of phase
with respct to the vgs

(5.50)
(5.51)

S. C. Lin, EE National Chin-Yi University of Technology

vi = vgs
small signal condition

Total instantaneous voltages vGS and vD for the circuit in Fig. 4.34.
S. C. Lin, EE National Chin-Yi University of Technology

5.5.5 Small-signal Equivalent-Circuit Models

(a) neglecting the dependence of iD
on vDS in saturation (the channel
-length modulation effect);

(b) including the effect of channel

-length modulation, modeled by
output resistance ro = |VA| /ID.

S. C. Lin, EE National Chin-Yi University of Technology

5.5.6 The Transconductance gm

gm =

id
= kn ( vGS Vt )
vgs

W
' W
v
V
k

=
( GS t ) n VOV (5.55)
L
L
1 'W
2
' W
I D = kn VOV VOV = 2 I D / kn
2 L
L
Subtituting for VOV in (5.55) by
= kn'

VOV = 2 I D / k (W / L ) , we obtain
'
n

g m = 2kn'

(W / L ) I D

(5.56)

iD

ID

Slop g m =
0

1
2

VOV VOV

2I D

( vGS Vt )

, we obtain g m =
2

VOV

Figure 5.38

Yet another useful expression for g m , Subtituting for kn'

in (5.55) by

ID
1
V
2 OV

W
L

2I D
ID
=
vGS Vt VOV / 2

S. C. Lin, EE National Chin-Yi University of Technology

(5.57)
9

Example 5.10 For the amplifier in Fig.a, let the MOSFET is specified to

have Vt = 1.5V, VA = 50Vand kn = 0.25mA/V 2 . Assume the coupling

capacitors to be sufficiently large so as to act as short circuit at the
signal frequencies of intrrest.(a) Find the voltage gain (b)Find the input
resistance (c) Find the largest allowable input signal.

S. C. Lin, EE National Chin-Yi University of Technology

10

(b)ii = (Vi Vo ) / RG

1 W
Sol:(a ) I D = kn'
(VGS Vt ) 2
2 L
1
= 0.25 (VGS 1.5) 2
N
2
V
DS

Vi
V
(1 o )
RG
Vi

Vi
(1 Av )
RG

4.3
Vi
RG

VDS = 15 I D RD = 15 10 I D
I D = 1.06mA VD = 4.4V
W
gm = k
(VGS Vt )
L
= 0.25 (4.4 1.5) = 0.724mA/V
V
50V
ro = A =
= 47k
I D 1.06mA
'
n

vo = g m vgs ( RD // RL // ro )
v
Av = o = g m ( RD // RL // ro )
vi
= 0.725(10 //10 // 47) = 3.3V/V

Thus : Rin =

Vi RG
=
ii 4.3

= 10 / 4.3 = 2.33M

(c)vDS (min) = vGS (max) Vt

vDS Av vi = vGS + vi Vt
4.4 3.3vi = 4.4 + vi 1.5
Vt
1.5
=
= 0.35V
vi =
Av + 1 3.3 + 1

S. C. Lin, EE National Chin-Yi University of Technology

11

5.5.6 The T Equvalent-Circuit Model

S. C. Lin, EE National Chin-Yi University of Technology

12

Figure 5.41 (a) The T model of the MOSFET augmented with the
drain-to-source resistance ro. (b) An alternative representation of the
T model.

S. C. Lin, EE National Chin-Yi University of Technology

13

5.6 Basic MOSFET Amplifier Configurations

5.6.1 The Three Basic Configurations
+
vi +

RD

RD

vo
vi +

vo

(a) Common-Source (CS)

(b) Common-Gate(CG)

vi +

RD

+
vo (c) Common-Drain(CD)

or Source Follower

S. C. Lin, EE National Chin-Yi University of Technology

14

5.6.2 Characterizing Amplifier

Rin
vi =
vsig ,
Rin + Rsig

RL
vo =
Avo vi
Ro + RL

S. C. Lin, EE National Chin-Yi University of Technology

15

vi
Input resistance: Rin
ii
vo
Open-circuit voltage gain: Avo
vi

RL =

vo
RL
Voltage gain with RL : Av = Avo
vi
RL + Ro
io
Short-circuit current gain: Ais
ii

(5.67)

RL = 0

io
Current gain: Ai
ii

S. C. Lin, EE National Chin-Yi University of Technology

16

vx
Output resistance : Ro
ix

vi = 0, RL =

vo
vi vo
Rin
overall voltage gain: G v
=
=
Av
vsig vsig vi Rin + Rsig
Rin
RL
=
Avo
Rin + Rsig
RL + Ro
S. C. Lin, EE National Chin-Yi University of Technology

(5.68)

17

5.6.3 The Common-Source (CS) Amplifier

Characterizing Parameters of CS Amplifier
Rin =
+

Rsig

vsig +

Ri

RD

+
vi

vo = ( g m vgs ) ( RD // ro )
Avo = g m ( RD // ro )

vo
Ro

g m RD

Rsig

vsig

Rin =

(5.71)

Ro = RD // ro
RD

+
vi = vgs

(5.69)

(5.73)

+
g m vgs

ro

RD

vo

Ro = RD // ro

S. C. Lin, EE National Chin-Yi University of Technology

18

Concludes:
X The input resistance is ideally infinite.
Y The Ro RC is moderate to high in value (typically, in the
kilohms to tens kilohms range). Reducing RD to lower Ro
is not a viable proportional, because the Av is also reduced.
Z The open circuit voltage gain Avo can be hig, making the
CS configration the work-hourse in MOS amplifier design.
However the bandwidth of the CS amplifier is severely limited.

S. C. Lin, EE National Chin-Yi University of Technology

19

Overall Voltage Gain

v
Av = o = g m ( RD // RL // ro )
vi

(5.75)

vi = vsig

(5.74)

vo
vi vo
=
= g m ( RD // RL // ro )
Gv
vsig vsig vi

(4.76)

Performing the Analysis Directly on the Circuit

g mvgs

Rsig

vsig +

+
vi = vgs
Rin =

ro

RD

vo
Ro = RD // ro

vo = g mvgs ( RD // ro )

S. C. Lin, EE National Chin-Yi University of Technology

20

4.6.4 The Common-Source (CS) Amplifier with an

Source Resistance
+
Rsig

vsig +

RD

vi
Rin

++ i
vi
Rin =

Ro

Rs

Rsig

vsig

vo

vgs

1
gm

i
RD

Rs

vo

Ro = RD

S. C. Lin, EE National Chin-Yi University of Technology

21

1/ g m )
(
1
vgs =
vi =
vi
1 + g m Rs
(1/ g m ) + Rs
vi

gm
=
i=
vi
(1/ g m ) + Rs 1 + g m Rs

(5.78)

g m RD
vo
g m RD
=
vo = iRD =
vi Avo =
1 + g m Rs
vi
1 + g m Rs

(5.80)

Total resistance in drain

Av (from gate to drain ) =
(5.81)
Total resistance in source
Ro = RD
Alternatively, Av can be obtained by simply replacing RD

in (5.80) by ( RD //RL )

g m ( RD //RL )
vo
RD //RL
Av =
=
=
1/ g m + Rs
1 + g m Rs
vi
S. C. Lin, EE National Chin-Yi University of Technology

(5.83)
22

5.6.5 The Common-Gate (CG) Amplifier

RD
Rsig

vi +

Rin = 1/ g m

vo

vi
vo = iRD , i =
1/ g m

vi

Ro

Rin

vo
Avo = g m RD
vi

(5.85)

Ro = RD

(5.86)

1/ g m

Rsig

+
vsig

(5.84)

vi

Rin = 1/ g m

RD

vo

Ro = RD

S. C. Lin, EE National Chin-Yi University of Technology

23

Overall Voltage Gain

1/ g m )
(
vi
Rin
=
=
vsig Rin + Rsig (1/ g m ) + Rsig

(5.87)

vo
Av = = g m ( RD // RL )
vi

1/ g m )
(
vo
vi vo
=
=
g m ( RD // RL )
Gv
vsig vsig vi (1/ g m ) + Rsig
RD // RL
=
1 / g m + Rsig

S. C. Lin, EE National Chin-Yi University of Technology

(5.88)

24

5.6.6 The CD Amplifier or Source Follower

The Need for Voltage Buffers
Rsig = 1 M

Rsig = 1M

vsig = 1V

RL = 1 k

1 k vo  1mV

1V

Ro = 100

Rsig = 1 M
1V

Avo = 1

vsig = 1 V

+
RL = 1 k

Rin very large

vo  0.9V

S. C. Lin, EE National Chin-Yi University of Technology

25

Rsig

Rsig G 0

+
vsig +

vi
Rin

RL
Ro

+
vo

vsig

vi

vsig

+ i

1/ g m

vi
Rin =

RL

0
Rsig

1/ g m

RL

ro
+

vo

Ro = 1/ g m

+
vo

S. C. Lin, EE National Chin-Yi University of Technology

26

Rin =
vo
RL
Av =
(5.89),
vi RL + (1/ g m )
Ro = 1/ g m

vo
Avo
vi

 1 (5.90)
RL =

(5.91)

Overall Voltage Gain

vo
vi vo
Gv
=
= 1 Av
vsig vsig vi
RL
=
1
RL + (1/ g m )

(5.92)

G v will be lower than unity,but close to unity.

S. C. Lin, EE National Chin-Yi University of Technology

27

5.7 Biasing in MOS amplifier circuits

iD =

1
W

n Cox (vI Vt ) 2
2
L
Biasing by Fixed VGS

VG = VGS + I D RS

Figure 5.51 The use of fixed bias (constant VGS) can result in a
large variability in the value of ID. Devices 1 and 2 represent
extremes among units of the same type.
S. C. Lin, EE National Chin-Yi University of Technology

28

Figure 5.52 Biasing using a fixed voltage at the gate, VG, and
a resistance in the source lead, RS: (a) basic arrangement;
(b) reduced variability in ID;
S. C. Lin, EE National Chin-Yi University of Technology

29

(c) practical implementation using a single supply;

(d) coupling of a signal source to the gate using a capacitor CC1;
(e) practical implementation using two supplies.
S. C. Lin, EE National Chin-Yi University of Technology

30

Example 5.12 Design the circuit of Fig.5.53 to establish a I D = 0.5mA.

The MOSFET is specified to have Vt = 1V and kn = 1mA/V 2 .
For simplicity, assume = 0. Calculate the percentage change in value
of I D obtained when the MOSFET is replaced with another unit having
the same kn' W / L but Vt = 1.5V.

Solution
VDD VD 15 10
=
= 10k
(a ) RD =
ID
0.5
VS
5
=
= 10k
RS =
I D 0.5

1 '
1
2
I D = kn (W / L)VOV = 1 VOV 2
N 2
2
0.5mA
VOV = 1V

S. C. Lin, EE National Chin-Yi University of Technology

31

Thus. VGS = Vt + VOV = 2V

VG = VS + VGS = 5V+2V = 7V
we may select RG1 = 8M, and RG2 = 7M

(b) If the NMOSFET is replaced with another having

Vt = 1.5V
1
2
I D = 1 (VGS Vt )
2
VG = VGS + I D RS VGS = 7 10 I D
2I D = ( 7 10 I D 1.5 ) I D = 0.455mA
2

I D = 0.455 0.5 = 0.045mA

0.045mA
100% = 9%
which
0.5mA

S. C. Lin, EE National Chin-Yi University of Technology

32

5.7.3 Biasing Using a Drain-to-Gate Feedback Resistor

Here the large feedback resistance RG
(Usually in the M range) I G = 0
We can written
VGS = VDS = VDD I D RD
or

VDD = VGS + I D RD

Figure 5.54 Biasing the MOSFET using a large drainto-gate feedback resistance, RG.
S. C. Lin, EE National Chin-Yi University of Technology

33

5.7.4 Biasing Using a Constant-Current Source.

S. C. Lin, EE National Chin-Yi University of Technology

34

1
2
I D1 = ( nCox )(W / L )1 ( vGS Vt )
2
VDD + VSS VGS
I D1 = I ref =
R
1
2
I = I D2 = ( nCox ) (W / L )2 ( vGS Vt )
2
1
( nCox ) (W / L )2 (vGS Vt ) 2
I D2
I
2
=
=
I D1 I ref
1
( n Cox ) (W / L )1 (vGS Vt ) 2
2
I = I ref

(W / L )2
(W / L )1
S. C. Lin, EE National Chin-Yi University of Technology

35

5.8 Discrete-Circuit MOS Amplifier.

5.8.2 The Common-Source Amplifier

S. C. Lin, EE National Chin-Yi University of Technology

36

S. C. Lin, EE National Chin-Yi University of Technology

37

S. C. Lin, EE National Chin-Yi University of Technology

38

Analysis of the circuit is straight ward and proceeds in step-by

step manner, from the signal source to the amplifier load.

ig = 0,

Rin = RG

vo = g m vgs ( ro // RD // RL )
vo
Av = g m ( ro // RD // RL )
vi
The overall voltage gain from the signal-source to the load will be
RG
Rin
Gv =
Av =
g m ( ro // RD // RL ) (5.101)
Rin + Rsig
RG + Rsig
Rout = ro // RD

S. C. Lin, EE National Chin-Yi University of Technology

39

5.8.3 The Common-Source Amplifier with a Source Resistance

S. C. Lin, EE National Chin-Yi University of Technology

40

Small-signal equivalent circuit with ro neglected.

ig = 0,

Rin = RG

vo
g m ( RD // RL )
Av = =
vi
1 + g m Rs
Avo = Av

RL =

g m RD
=
1 + g m Rs

RG
g m ( RD // RL )

Gv =
1 + g m Rs
RG + Rsig
S. C. Lin, EE National Chin-Yi University of Technology

41

(a) A common-gate amplifier based on the circuit of Fig. 5.56

S. C. Lin, EE National Chin-Yi University of Technology

42

(b) A small-signal equivalent circuit of the amplifier in (a).

S. C. Lin, EE National Chin-Yi University of Technology

43

(c) The common-gate amplifier fed with a current-signal input.

S. C. Lin, EE National Chin-Yi University of Technology

44

5.8.5 The Common- Drain or Source-Follower Amplifier.

S. C. Lin, EE National Chin-Yi University of Technology

45

Small-signal equivalent-circuit model.

vo
Av =
vi
=

RL // ro
1
( RL // ro ) +
gm

Avo = Av
=

Gv =

RL =

ro
1
ro +
gm

Ro = (1/ g m ) // ro

RG
RL // ro

RG + Rsig R // r + 1
( L o)
gm

1
which approaches unity for RG >> Rsig , ro >>
and ro >> RL
gm
S. C. Lin, EE National Chin-Yi University of Technology

46

5.8.6 The Amplifier Frequency Response

S. C. Lin, EE National Chin-Yi University of Technology

47

5.9 The Body Effect and other Topics

5.9.1 The role of the substrate-The body effect

(5.107)
Vt = Vto + 2 f + vSB 2 f
where Vto is the threshold voltage for vSB = 0
f is a physical parameter with typically 0.3V
is a fabrication-process parameter
2qN A s
, typically = 0.4V 1/ 2 (5.108)
given by =
Cox

S. C. Lin, EE National Chin-Yi University of Technology

48

Modeling the body effect

The body effect occurs in a MOSFET when the source is
not tied to the substrate. We consider the body effect

)}

2
1 'W
iD = kn
VGS Vt0 + 2 f + VSB 2 f

2 L
iD
' W
= kn
gm
VGS Vt0 + 2 f + VSB 2 f

VGS
L

g mb

iD
iD

=
VBS
VBS

)}

vGS , vDS = constant

)}

1
W
= kn'
VGS Vt0 + 2 f + VSB 2 f ( 2 f + VSB ) 2

L

 

2
gm

= gm

Vt

= g m where
=
(5.111)
VSB 2 2 f + VSB
2 2 f + VSB
S. C. Lin, EE National Chin-Yi University of Technology

49

Figure 5.62 Small-signal equivalent-circuit model of a MOSFET in

which the source is not connected to the body.

S. C. Lin, EE National Chin-Yi University of Technology

50

5.9.3 Temperature effects

(1)T Vt ( 2mV / o C ) iD
(2)T k '

iD (Dominant)

5.9.4 Breakdown and input protection

(1)As the vDS ,a value is reached at which the PN junction
between the drain region and substrate suffers avalanche
breakdown. Usually occurs at voltages of 20V 150V
(2)Punch-through in drain to source
(3) When the vGS exceeds about 30V the oxide breakdown.
The protection mechanism invariably makes use of clamping
diodes.
S. C. Lin, EE National Chin-Yi University of Technology

51

S. C. Lin, EE National Chin-Yi University of Technology

52